Re: [flashrom] Intel SandyBridge serie 6 chipsets support

Hi Stefan,

After all, we will use a direct SPI Flash access with some special hardware on the machine to bypass the PCH protections.
Thanks a lot for your help flashrom fellows.

Best regards
Amine Rebai

-----Stefan Tauner  a écrit : -----
A : [e-mail]
De : Stefan Tauner 
Date : 30/05/2011 17:42
Cc : [e-mail]
Objet : Re: [flashrom] Intel SandyBridge serie 6 chipsets support

On Mon, 30 May 2011 13:57:21 +0200
[e-mail] wrote:
> Hallo Stefan,

hello!
> Wir könnten eigentlich deutsch sprechen ;).

we could, but it would upset those nasty dutch people and all those who
cant make any sense out of german even more ;)

i tricked your client to reply not directly to me but to the mailing
list with a special header in my email so that everyone else can read
your replies too (and answer them). that is because often people (new to
mailing lists or just unwary) just reply to the sender and not to the
list as well (you did so too in your reply to idwer). usually there is a
button or menu entry to "reply to all" which also includes previously
"cc:"-tagged addresses in your reply. hth
> Ja, unsere Kunden benützen auch flashrom. Wir haben usere EFI shell 
> flashing tool, aber die Kunden benützen das Linux Shell am liebsten, 
> besonders wenn du viele Clusters/Servers flashen muss.

understandable :)
> Aber mein Problem ist vor diesen Sachen. « chipset_flash_enable » findet 
> nicht das PCH:
>         « This chipset supports the following protocols: Non-SPI. WARNING: 
> No chipset found. Flash detection will most likely fail. »
>
> und das PCH device_id (Vendor ID:0x8086, Device ID:0x244e ) existiert 
> nicht in das «chipset_enables » stuct. ( mein PCH heisst Patsburg oder 
> C200 chipset ).

ah ok i was not aware that those are missing.
my laptop is based on ibex peak/QS57 and i have not checked if the newer
ones are actually there.
i will put that on my todo list.
> Wenn ich « enable_flash_ich10 » Funktion nötige, es funkioniert auch 
> nicht.
>         Maximum FWH chip size: 0x0 bytes        BIOS Lock Enable: 
> disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 tried to set 0xdc 
> to 0x1 on ICH10 failed (WARNING ONLY)   Root Complex Register Block 
> address = 0x0   Error accessing ICH RCRB, 0x4000 bytes at 0x00000000 
> /dev/mem mmap failed: Resource temporarily unavailable

ok that certainly does not look right. could you please send us a full
log of the output of flashrom -VV with the added pci id please?
> Ich werde vielleicht eine neue funktion schreiben ;).

that would of course be very appreciated.