Hello,
I'm playing with flashrom on an ASEM Industrial PC based on an Atom Z530 and the US15W (Poulsbo) System Controller Hub. The BIOS flash is the SST 49LF0008A (Firmware Hub).
After downloading the latest development code using git, flashrom was able to detect and read the flash, but the erase command failed.
At first I've tried to increase the delay that is used by the toggle functions in jedec.c, passing from the default 8 to 80 (just for testing). At this point, the Erase command started to work properly.
SST manual reads: The End-of-Write detection mode is incorporated into the FWH Read cycle. The actual completion of the nonvolatile write is asynchronous with the system; therefore, either a Data# Polling or Toggle Bit read may be simultaneous with the completion of the Write cycle. If this occurs, the system may possibly get an erroneous result, i.e., valid data may appear to conflict with either DQ7 or DQ6. In order to prevent spurious rejection, if an erroneous result occurs, the software routine should include a loop to read the accessed location an additional two (2) times. If both reads are valid, then the device has completed the Write cycle, otherwise the rejection is valid.
So, I've set the delay for reading the toggle bit again to the default value of 8 and I've added an additional toggle bit check, in case the first one seems to be ok.
It works!
So, I'm able to Read, Write and Erase the chip.
Best Regards
Panino
diff -Nur flashromold/jedec.c flashromnew/jedec.c --- flashromold/jedec.c 2010-03-08 14:07:23.000000000 +0100 +++ flashromnew/jedec.c 2010-03-08 13:29:30.000000000 +0100 @@ -50,7 +50,11 @@ programmer_delay(delay); tmp2 = chip_readb(dst) & 0x40; if (tmp1 == tmp2) { - break; + tmp1 = chip_readb(dst) & 0x40; + programmer_delay(delay); + tmp2 = chip_readb(dst) & 0x40; + if (tmp1 == tmp2) + break; } tmp1 = tmp2; }
_________________________________________________________________ Personalizza il tuo Messenger con nuove e divertenti Emoticon http://www.pimpit.it/emoticon.html