Am Montag, den 20.06.2011, 01:59 +0200 schrieb Carl-Daniel Hailfinger:
The locking blocks of the FWH block lock cover 128KB areas, and thats the only thing page_size is used for in the functions referenced in the LHF00L04 entry.
My datasheet talks about 8 kB sectors and 64 kB blocks in "Figure 3. Memory Map", but "Table 8. FWH Flash Registers Configuration Map" only mentions registers for the 8 kB sectors in the top 64 kB block explicitly. "Table 8" also mentions "XX002H Whole Block Lock Register" as generic placeholder, and AFAICS those two X mean you have one block lock register for each of the 15 bottom 64 kB blocks and one for each of the 8 top 8 kB sectors. That also means the 82802ab unlocking as is can't be used.
I'm looking at Sharp Spec No. FM037006, Issue Date: June 18, 2003
You are right that the erase block size is 64kB as shown e.g. in figure 3. This is not touched by my patch, though. Taking a close look at table 8, I read it as: The whole block locking bit (affecting the whole flash chip area 0-1M) is possibly accessible each 4KB, but no matter what address you use, you get to the same single "master write protect" bit. This bit is located at data bit 1. On the other hand, the bits locking only parts of the flash chip are mentioned in the lines below that, with a "Protected address range of 128KB each and addresses of F0002h, F2002h, F4002h, F6002h, F8002h, FA002h, FC002h and FE002h. These 8 "sector-specific" lock bits are located at bit 0. Nowhere this table mentions anything about bits affecting only 8KB sized areas.
On the other hand, text of the data sheet nowhere mentions the sectorwise locking - it is just in the table. I have no idea how to read that.
Regards, Michael Karcher