Hello Rudolf,
Recently we had someone on IRC with another AMD board. I had a look at its bios and wrote some pseudocode for its board enable function. Maybe it will be useful for this or other situations.
P.S. the function names are mostly my own and there may be some small mistakes in the code.
// Supermicro H8SGL board enable pseudocode // PrepareForFlashProgramming is at F000:05FC in the unpacked SLAB (module 1b) // for the BIOS H8SGL2.831
h8sgl_board_enable: flash_write_enable() enable_rom_map() oem_enable() imc_gpio9_high()
imc_present: return pci[0:14.3][0x40] & 0x80; // IntegratedImcPresent
testenable_on: io[0xCD6] = 0x53; // TESTENABLE? io[0xCD7] |= 8;
testenable_off: io[0xCD6] = 0x53; // TESTENABLE? io[0xCD7] &= ~8;
// 8587 hpet_bar_unhide: pci[0:14.0][0x43] &= ~8; // HPETBarHid = 0
// 8599 hpet_bar_hide: pci[0:14.0][0x43] |= 8; // HPETBarHid = 1
// 868A imc_read_byte(idx): io[0x3E] = idx return io[0x3F]
// 8697 imc_write_byte(idx, val): io[0x3E] = idx io[0x3F] = val
// 86A4 imc_wait_reply: while 1: fixed_delay(66) if imc_read_byte(0x82) == 0xFA: break
// 8630 imc_send_command(id, val): if imc_present(): imc_write_byte(0x82, 0) imc_write_byte(0x83, id>>8) imc_write_byte(0x84, id&0xFF) imc_write_byte(0x80, val) fixed_delay(4000) imc_wait_reply()
// 85D5 imc_disable: hpet_bar_unhide() if (pci[0:14.0][0x20] & 2) == 0: pci[0:14.0][0x20] |= 2 if cmos[0x7D] & 8: imc_send_command(0x00B4, 0x96) hpet_bar_hide()
// 1388 disable_imc_if_present: if imc_present(): testenable_on() imc_disable()
// 12FD flash_write_enable: disable_imc_if_present() pci[0:14.0][0x79] |= 1; // PM_Addr_Enable = 1 io[0xC6F] |= 0x40; // Flash Rom Program Enable?
// 13DD enable_rom_map: val = pci[0:14.0][0x41] val &= ~0x12 val |= 0x12 pci[0:14.0][0x41] = val
pci[0:14.3][0xA3] |= 0x10; // Rom Range 2 Port Enable pci[0:14.3][0x6C] = 0xA0; // LPC ROM Address Range 2
// 1353 oem_enable: if imc_present(): hpet_bar_unhide() pci[0:14.0][0x20] &= ~1; hpet_bar_hide() testenable_off()
// 94F1 imc_gpio9_high: pci[0:14.3][0xC9] &= ~2; // IMC_Gpio_OeB[9]=0 (enable) pci[0:14.3][0xC7] |= 2; // IMC_Gpio_Out[9]=1 (high)
Monday, March 25, 2013, 8:47:17 AM, you wrote:
RM> Hi all,
RM> I was asked by Idwer to look into this. Since the patch was code reviewed RM> already I have just some comments:
RM> 1) does it work if IMC is disabled?
RM> If not, we should first detect if IMC firmware is active.
RM> 2) it writes to reserved bits 7:1
RM> This should be easy fix
RM> 3) is there a way to release it back after writes are done?
RM> Alternative way would be to send "go to IDLE/ram command to firmware.
RM> Thanks RM> Rudolf
RM> _______________________________________________ RM> flashrom mailing list RM> flashrom@flashrom.org RM> http://www.flashrom.org/mailman/listinfo/flashrom