Hi Nico,
Thanks for looking into it.
On Fri, Oct 29, 2021 at 9:15 AM Nico Huber nico.h@gmx.de wrote:
I guess there's the issue, your flash chip is bigger than 16MiB, right?
Yes, the BIOS flash chip on these boards is 32MiB.
If you want, I could write a patch that you could test? I'd simply remove the inexplicable code. Worth a shot, IMO.
Happy to test a patch for the read path. I did put the machine into production now, so I would prefer to avoid accidentally erasing the BIOS again. I did put in a request with the vendor to send me a dev board for testing, so I may have that in a few weeks, but until then, I'll play it a little more carefully.
However, without risking to break somebody else's use case there is not much that can be done upstream as AMD doesn't publish datasheets for their chips (better to avoid AMD if one wants free software, IMHO; they release some code from time to time, but they don't support free software developers with the necessary documentation).
Is there a particular document that you know that you need? I've sometimes had luck getting these kinds of things released. Unfortunately, I don't have very many contacts at AMD, but it helps to know what to ask for. Particularly for things like the SPI controllers, that doesn't feel like it should be especially sensitive.
Nico
[1] https://review.coreboot.org/c/flashrom/+/44073/comment/98f16693_5ef6976a/