Author: stefanct Date: Sat Dec 29 16:03:51 2012 New Revision: 1634 URL: http://flashrom.org/trac/flashrom/changeset/1634
Log: Improve SPI status register pretty printing.
- Move all functions related to SPI status registers to a new file spi25_statusreg.c. This includes the generic as well as the SST-specific functions from spi25.c and the chip-specific functions from a25.c and at25.c. - introduce helper functions * spi_prettyprint_status_register_hex() * spi_prettyprint_status_register_bpl() * spi_prettyprint_status_register_plain() Use the latter on every compatible flash chip that has no better printlock function set and get rid of the implicit pretty printing in the SPI probing functions. - remove * spi_prettyprint_status_register_common() * spi_prettyprint_status_register_amic_a25lq032() because it can be fully substituted with spi_prettyprint_status_register_amic_a25l032(). * spi_prettyprint_status_register() (old switch, no longer needed) - promote and export * spi_prettyprint_status_register_amic_a25l05p() as spi_prettyprint_status_register_default_bp1(). * spi_prettyprint_status_register_amic_a25l40p() as spi_prettyprint_status_register_default_bp2(). * spi_prettyprint_status_register_st_m25p() as spi_prettyprint_status_register_default_bp3(). - add #define TEST_BAD_REW and use it for a number of Atmel chips which had only TEST_BAD_READ set even though they dont have erasers or a write function set.
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at Acked-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at
Added: trunk/spi25_statusreg.c (contents, props changed) Deleted: trunk/a25.c trunk/at25.c Modified: trunk/Makefile trunk/chipdrivers.h trunk/flash.h trunk/flashchips.c trunk/spi25.c
Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/Makefile Sat Dec 29 16:03:51 2012 (r1634) @@ -296,8 +296,8 @@
CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ - sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o \ - a25.o at25.o opaque.o sfdp.o en29lv640b.o + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ + opaque.o sfdp.o en29lv640b.o
############################################################################### # Library code.
Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/chipdrivers.h Sat Dec 29 16:03:51 2012 (r1634) @@ -51,47 +51,44 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -uint8_t spi_read_status_register(struct flashctx *flash); -int spi_write_status_register(struct flashctx *flash, int status); -void spi_prettyprint_status_register_bit(uint8_t status, int bit); -void spi_prettyprint_status_register_bp(uint8_t status, int bp); -void spi_prettyprint_status_register_srwd(uint8_t status); -void spi_prettyprint_status_register_welwip(uint8_t status); -int spi_prettyprint_status_register(struct flashctx *flash); -int spi_disable_blockprotect(struct flashctx *flash); int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte); int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
-/* sfdp.c */ -int probe_spi_sfdp(struct flashctx *flash); - -/* opaque.c */ -int probe_opaque(struct flashctx *flash); -int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); - -/* a25.c */ -int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash); -int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash); +/* spi25_statusreg.c */ +uint8_t spi_read_status_register(struct flashctx *flash); +int spi_write_status_register(struct flashctx *flash, int status); +int spi_prettyprint_status_register_plain(struct flashctx *flash); +int spi_prettyprint_status_register_default_bp1(struct flashctx *flash); +int spi_prettyprint_status_register_default_bp2(struct flashctx *flash); +int spi_prettyprint_status_register_default_bp3(struct flashctx *flash); +int spi_disable_blockprotect(struct flashctx *flash); int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash); -int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash); - -/* at25.c */ int spi_prettyprint_status_register_at25df(struct flashctx *flash); int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash); int spi_prettyprint_status_register_at25f512b(struct flashctx *flash); int spi_prettyprint_status_register_at25fs010(struct flashctx *flash); int spi_prettyprint_status_register_at25fs040(struct flashctx *flash); -int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash); +int spi_prettyprint_status_register_at26df081a(struct flashctx *flash); int spi_disable_blockprotect_at25df(struct flashctx *flash); int spi_disable_blockprotect_at25df_sec(struct flashctx *flash); int spi_disable_blockprotect_at25f512b(struct flashctx *flash); int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); +int spi_prettyprint_status_register_sst25(struct flashctx *flash); +int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); +int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); + +/* sfdp.c */ +int probe_spi_sfdp(struct flashctx *flash); + +/* opaque.c */ +int probe_opaque(struct flashctx *flash); +int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
/* 82802ab.c */ uint8_t wait_82802ab(struct flashctx *flash);
Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/flash.h Sat Dec 29 16:03:51 2012 (r1634) @@ -188,6 +188,7 @@ #define TEST_BAD_READ (1 << 5) #define TEST_BAD_ERASE (1 << 6) #define TEST_BAD_WRITE (1 << 7) +#define TEST_BAD_REW (TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_MASK 0xf0
Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/flashchips.c Sat Dec 29 16:03:51 2012 (r1634) @@ -564,7 +564,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -598,7 +598,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -633,7 +633,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -668,7 +668,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -703,7 +703,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -738,7 +738,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -778,7 +778,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -813,7 +813,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -848,7 +848,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -886,7 +886,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -924,7 +924,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -956,7 +956,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -988,7 +988,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1020,7 +1020,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1052,7 +1052,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1084,7 +1084,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1116,7 +1116,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1194,7 +1194,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25lq032, + .printlock = spi_prettyprint_status_register_amic_a25l032, .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -1810,7 +1810,9 @@ .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, } - }, /* Supports also an incompatible page write (of exactly 256 B) and an auto-erasing write. */ + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + /* Supports also an incompatible page write (of exactly 256 B) and an auto-erasing write. */ .write = spi_chip_write_1, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, /* 3.0-3.6V for higher speed, 2.7-3.6V normal */ @@ -1847,7 +1849,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_atmel_at26df081a, + .printlock = spi_prettyprint_status_register_at26df081a, .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1923,7 +1925,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_atmel_at26df081a, + .printlock = spi_prettyprint_status_register_at26df081a, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1943,7 +1945,7 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .printlock = spi_prettyprint_status_register_atmel_at26df081a, + .printlock = spi_prettyprint_status_register_at26df081a, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1957,7 +1959,7 @@ .model_id = ATMEL_AT26F004, .total_size = 512, .page_size = 256, - .tested = TEST_UNTESTED, + .tested = TEST_BAD_WRITE, .feature_bits = FEATURE_WRSR_WREN, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1980,6 +1982,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .write = NULL /* Incompatible Page write */, .read = spi_chip_read, .voltage = {2700, 3600}, @@ -2090,7 +2093,7 @@ .total_size = 16896 /* No power of two sizes */, .page_size = 1056 /* No power of two sizes */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL /* Incompatible Page write */, @@ -2107,7 +2110,7 @@ .total_size = 128 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2124,7 +2127,7 @@ .total_size = 256 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2141,7 +2144,7 @@ .total_size = 512 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2158,7 +2161,7 @@ .total_size = 1024 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2175,7 +2178,7 @@ .total_size = 2048 /* Size can only be determined from status register */, .page_size = 512 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2192,7 +2195,7 @@ .total_size = 4224 /* No power of two sizes */, .page_size = 528 /* No power of two sizes */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2211,7 +2214,7 @@ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .feature_bits = FEATURE_OTP, - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2228,7 +2231,7 @@ .total_size = 8192 /* Size can only be determined from status register */, .page_size = 1024 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2621,6 +2624,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, @@ -2654,6 +2658,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2687,6 +2692,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2720,6 +2726,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2753,6 +2760,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2787,6 +2795,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2821,6 +2830,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2855,6 +2865,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2889,6 +2900,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2923,6 +2935,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2957,6 +2970,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2991,6 +3005,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3025,6 +3040,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3059,6 +3075,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3093,6 +3110,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3127,6 +3145,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3161,6 +3180,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3198,6 +3218,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3235,6 +3256,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3272,6 +3294,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3306,6 +3329,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3340,6 +3364,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3374,6 +3399,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3408,6 +3434,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3442,6 +3469,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3477,6 +3505,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3512,6 +3541,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3553,6 +3583,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3588,6 +3619,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3623,6 +3655,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3658,6 +3691,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3693,6 +3727,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3729,6 +3764,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4017,6 +4053,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4054,6 +4091,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4092,6 +4130,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4130,6 +4169,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4168,6 +4208,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4206,6 +4247,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4243,6 +4285,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4279,6 +4322,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4671,6 +4715,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp1, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4705,6 +4750,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4742,6 +4788,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4779,6 +4826,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4816,6 +4864,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4853,6 +4902,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4887,6 +4937,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4921,6 +4972,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4955,6 +5007,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4989,6 +5042,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5023,6 +5077,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5057,6 +5112,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5461,6 +5517,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5492,6 +5549,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5523,6 +5581,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5554,6 +5613,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5585,6 +5645,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5753,6 +5814,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5784,6 +5846,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5821,6 +5884,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5852,6 +5916,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5883,6 +5948,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5920,6 +5986,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5951,6 +6018,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6224,6 +6292,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6314,6 +6383,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6342,6 +6412,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6370,6 +6441,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6398,6 +6470,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6426,6 +6499,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6457,6 +6531,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, @@ -6488,6 +6563,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, @@ -6519,6 +6595,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, @@ -6556,6 +6633,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25vf016, .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6593,6 +6671,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6630,6 +6709,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6661,6 +6741,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, @@ -6698,6 +6779,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25vf040b, .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6735,6 +6817,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25vf040b, .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6772,6 +6855,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -7726,6 +7810,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7759,6 +7844,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, @@ -7787,6 +7873,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7816,6 +7903,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, @@ -7844,6 +7932,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7872,6 +7961,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7900,6 +7990,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7927,6 +8018,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7955,6 +8047,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7983,6 +8076,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8011,6 +8105,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8039,6 +8134,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8071,6 +8167,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8101,6 +8198,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8132,6 +8230,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8949,6 +9048,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8987,6 +9087,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9025,6 +9126,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9063,6 +9165,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9100,6 +9203,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9130,6 +9234,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9161,6 +9266,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9192,6 +9298,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9223,6 +9330,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9260,6 +9368,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9297,6 +9406,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9334,6 +9444,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read,
Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/spi25.c Sat Dec 29 16:03:51 2012 (r1634) @@ -148,14 +148,8 @@
msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
- if (id1 == chip->manufacture_id && id2 == chip->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - + if (id1 == chip->manufacture_id && id2 == chip->model_id) return 1; - }
/* Test if this is a pure vendor match. */ if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) @@ -210,14 +204,8 @@
msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2);
- if (id1 == chip->manufacture_id && id2 == chip->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - + if (id1 == chip->manufacture_id && id2 == chip->model_id) return 1; - }
/* Test if this is a pure vendor match. */ if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) @@ -268,10 +256,6 @@ if (id2 != flash->chip->model_id) return 0;
- /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); return 1; }
@@ -292,168 +276,9 @@ if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) return 0;
- /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); return 1; }
-uint8_t spi_read_status_register(struct flashctx *flash) -{ - static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; - /* FIXME: No workarounds for driver/hardware bugs in generic code. */ - unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */ - int ret; - - /* Read Status Register */ - ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, - readarr); - if (ret) - msg_cerr("RDSR failed!\n"); - - return readarr[0]; -} - -/* Common highest bit: Status Register Write Disable (SRWD). */ -void spi_prettyprint_status_register_srwd(uint8_t status) -{ - msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n", - (status & (1 << 7)) ? "" : "not "); -} - -void spi_prettyprint_status_register_welwip(uint8_t status) -{ - msg_cdbg("Chip status register: Write Enable Latch (WEL) is " - "%sset\n", (status & (1 << 1)) ? "" : "not "); - msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " - "%sset\n", (status & (1 << 0)) ? "" : "not "); -} - -/* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_bp(uint8_t status, int bp) -{ - switch (bp) { - /* Fall through. */ - case 4: - msg_cdbg("Chip status register: Block Protect 4 (BP4) " - "is %sset\n", (status & (1 << 5)) ? "" : "not "); - case 3: - msg_cdbg("Chip status register: Block Protect 3 (BP3) " - "is %sset\n", (status & (1 << 5)) ? "" : "not "); - case 2: - msg_cdbg("Chip status register: Block Protect 2 (BP2) " - "is %sset\n", (status & (1 << 4)) ? "" : "not "); - case 1: - msg_cdbg("Chip status register: Block Protect 1 (BP1) " - "is %sset\n", (status & (1 << 3)) ? "" : "not "); - case 0: - msg_cdbg("Chip status register: Block Protect 0 (BP0) " - "is %sset\n", (status & (1 << 2)) ? "" : "not "); - } -} - -/* Prettyprint the status register. Unnamed bits. */ -void spi_prettyprint_status_register_bit(uint8_t status, int bit) -{ - msg_cdbg("Chip status register: Bit %i " - "is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); -} - -static void spi_prettyprint_status_register_common(uint8_t status) -{ - spi_prettyprint_status_register_bp(status, 3); - spi_prettyprint_status_register_welwip(status); -} - -/* Prettyprint the status register. Works for - * ST M25P series - * MX MX25L series - */ -void spi_prettyprint_status_register_st_m25p(uint8_t status) -{ - spi_prettyprint_status_register_srwd(status); - spi_prettyprint_status_register_bit(status, 6); - spi_prettyprint_status_register_common(status); -} - -void spi_prettyprint_status_register_sst25(uint8_t status) -{ - msg_cdbg("Chip status register: Block Protect Write Disable " - "(BPL) is %sset\n", (status & (1 << 7)) ? "" : "not "); - msg_cdbg("Chip status register: Auto Address Increment Programming " - "(AAI) is %sset\n", (status & (1 << 6)) ? "" : "not "); - spi_prettyprint_status_register_common(status); -} - -/* Prettyprint the status register. Works for - * SST 25VF016 - */ -void spi_prettyprint_status_register_sst25vf016(uint8_t status) -{ - static const char *const bpt[] = { - "none", - "1F0000H-1FFFFFH", - "1E0000H-1FFFFFH", - "1C0000H-1FFFFFH", - "180000H-1FFFFFH", - "100000H-1FFFFFH", - "all", "all" - }; - spi_prettyprint_status_register_sst25(status); - msg_cdbg("Resulting block protection : %s\n", - bpt[(status & 0x1c) >> 2]); -} - -void spi_prettyprint_status_register_sst25vf040b(uint8_t status) -{ - static const char *const bpt[] = { - "none", - "0x70000-0x7ffff", - "0x60000-0x7ffff", - "0x40000-0x7ffff", - "all blocks", "all blocks", "all blocks", "all blocks" - }; - spi_prettyprint_status_register_sst25(status); - msg_cdbg("Resulting block protection : %s\n", - bpt[(status & 0x1c) >> 2]); -} - -int spi_prettyprint_status_register(struct flashctx *flash) -{ - const struct flashchip *chip = flash->chip; - uint8_t status; - - status = spi_read_status_register(flash); - msg_cdbg("Chip status register is %02x\n", status); - switch (chip->manufacture_id) { - case ST_ID: - if (((chip->model_id & 0xff00) == 0x2000) || - ((chip->model_id & 0xff00) == 0x2500)) - spi_prettyprint_status_register_st_m25p(status); - break; - case MACRONIX_ID: - if ((chip->model_id & 0xff00) == 0x2000) - spi_prettyprint_status_register_st_m25p(status); - break; - case SST_ID: - switch (chip->model_id) { - case 0x2541: - spi_prettyprint_status_register_sst25vf016(status); - break; - case 0x8d: - case 0x258d: - spi_prettyprint_status_register_sst25vf040b(status); - break; - default: - spi_prettyprint_status_register_sst25(status); - break; - } - break; - } - return 0; -} - int spi_chip_erase_60(struct flashctx *flash) { int result; @@ -879,92 +704,6 @@ } }
-int spi_write_status_enable(struct flashctx *flash) -{ - static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; - int result; - - /* Send EWSR (Enable Write Status Register). */ - result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); - - if (result) - msg_cerr("%s failed\n", __func__); - - return result; -} - -/* - * This is according the SST25VF016 datasheet, who knows it is more - * generic that this... - */ -static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) -{ - int result; - int i = 0; - /* - * WRSR requires either EWSR or WREN depending on chip type. - * The code below relies on the fact hat EWSR and WREN have the same - * INSIZE and OUTSIZE. - */ - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ enable_opcode }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_WRSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", __func__); - /* No point in waiting for the command to complete if execution - * failed. - */ - return result; - } - /* WRSR performs a self-timed erase before the changes take effect. - * This may take 50-85 ms in most cases, and some chips apparently - * allow running RDSR only once. Therefore pick an initial delay of - * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. - */ - programmer_delay(100 * 1000); - while (spi_read_status_register(flash) & SPI_SR_WIP) { - if (++i > 490) { - msg_cerr("Error: WIP bit after WRSR never cleared\n"); - return TIMEOUT_ERROR; - } - programmer_delay(10 * 1000); - } - return 0; -} - -int spi_write_status_register(struct flashctx *flash, int status) -{ - int feature_bits = flash->chip->feature_bits; - int ret = 1; - - if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { - msg_cdbg("Missing status register write definition, assuming " - "EWSR is needed\n"); - feature_bits |= FEATURE_WRSR_EWSR; - } - if (feature_bits & FEATURE_WRSR_WREN) - ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); - if (ret && (feature_bits & FEATURE_WRSR_EWSR)) - ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); - return ret; -} - int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte) { @@ -1049,35 +788,6 @@ return result; }
-/* A generic brute-force block protection disable works like this: - * Write 0x00 to the status register. Check if any locks are still set (that - * part is chip specific). Repeat once. - */ -int spi_disable_blockprotect(struct flashctx *flash) -{ - uint8_t status; - int result; - - status = spi_read_status_register(flash); - /* If block protection is disabled, stop here. */ - if ((status & 0x3c) == 0) - return 0; - - msg_cdbg("Some block protection in effect, disabling... "); - result = spi_write_status_register(flash, status & ~0x3c); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - status = spi_read_status_register(flash); - if ((status & 0x3c) != 0) { - msg_cerr("Block protection could not be disabled!\n"); - return 1; - } - msg_cdbg("done.\n"); - return 0; -} - int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes, unsigned int len) {
Added: trunk/spi25_statusreg.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/spi25_statusreg.c Sat Dec 29 16:03:51 2012 (r1634) @@ -0,0 +1,591 @@ +/* + * This file is part of the flashrom project. + * It handles everything related to status registers of the JEDEC family 25. + * + * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger + * Copyright (C) 2008 coresystems GmbH + * Copyright (C) 2008 Ronald Hoogenboom ronald@zonnet.nl + * Copyright (C) 2012 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "flash.h" +#include "chipdrivers.h" +#include "spi.h" + +/* === Generic functions === */ +int spi_write_status_enable(struct flashctx *flash) +{ + static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; + int result; + + /* Send EWSR (Enable Write Status Register). */ + result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); + + if (result) + msg_cerr("%s failed\n", __func__); + + return result; +} + +static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) +{ + int result; + int i = 0; + /* + * WRSR requires either EWSR or WREN depending on chip type. + * The code below relies on the fact hat EWSR and WREN have the same + * INSIZE and OUTSIZE. + */ + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ enable_opcode }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_WRSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(flash, cmds); + if (result) { + msg_cerr("%s failed during command execution\n", __func__); + /* No point in waiting for the command to complete if execution + * failed. + */ + return result; + } + /* WRSR performs a self-timed erase before the changes take effect. + * This may take 50-85 ms in most cases, and some chips apparently + * allow running RDSR only once. Therefore pick an initial delay of + * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. + */ + programmer_delay(100 * 1000); + while (spi_read_status_register(flash) & SPI_SR_WIP) { + if (++i > 490) { + msg_cerr("Error: WIP bit after WRSR never cleared\n"); + return TIMEOUT_ERROR; + } + programmer_delay(10 * 1000); + } + return 0; +} + +int spi_write_status_register(struct flashctx *flash, int status) +{ + int feature_bits = flash->chip->feature_bits; + int ret = 1; + + if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { + msg_cdbg("Missing status register write definition, assuming " + "EWSR is needed\n"); + feature_bits |= FEATURE_WRSR_EWSR; + } + if (feature_bits & FEATURE_WRSR_WREN) + ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); + if (ret && (feature_bits & FEATURE_WRSR_EWSR)) + ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); + return ret; +} + +uint8_t spi_read_status_register(struct flashctx *flash) +{ + static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; + /* FIXME: No workarounds for driver/hardware bugs in generic code. */ + unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */ + int ret; + + /* Read Status Register */ + ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr); + if (ret) + msg_cerr("RDSR failed!\n"); + + return readarr[0]; +} + +/* A generic brute-force block protection disable works like this: + * Write 0x00 to the status register. Check if any locks are still set (that + * part is chip specific). Repeat once. + */ +int spi_disable_blockprotect(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & 0x3c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + result = spi_write_status_register(flash, status & ~0x3c); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & 0x3c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +static void spi_prettyprint_status_register_hex(uint8_t status) +{ + msg_cdbg("Chip status register is 0x%02x.\n", status); +} + +/* Common highest bit: Status Register Write Disable (SRWD). */ +static void spi_prettyprint_status_register_srwd(uint8_t status) +{ + msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +/* Common highest bit: Block Protect Write Disable (BPL). */ +static void spi_prettyprint_status_register_bpl(uint8_t status) +{ + msg_cdbg("Chip status register: Block Protect Write Disable (BPL) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +/* Common lowest 2 bits: WEL and WIP. */ +static void spi_prettyprint_status_register_welwip(uint8_t status) +{ + msg_cdbg("Chip status register: Write Enable Latch (WEL) is %sset\n", + (status & (1 << 1)) ? "" : "not "); + msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is %sset\n", + (status & (1 << 0)) ? "" : "not "); +} + +/* Common block protection (BP) bits. */ +static void spi_prettyprint_status_register_bp(uint8_t status, int bp) +{ + switch (bp) { + /* Fall through. */ + case 4: + msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n", + (status & (1 << 5)) ? "" : "not "); + case 3: + msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n", + (status & (1 << 5)) ? "" : "not "); + case 2: + msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n", + (status & (1 << 4)) ? "" : "not "); + case 1: + msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n", + (status & (1 << 3)) ? "" : "not "); + case 0: + msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n", + (status & (1 << 2)) ? "" : "not "); + } +} + +/* Unnamed bits. */ +static void spi_prettyprint_status_register_bit(uint8_t status, int bit) +{ + msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); +} + +int spi_prettyprint_status_register_plain(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + return 0; +} + +/* Works for many chips of the + * AMIC A25L series + * and MX MX25L512 + */ +int spi_prettyprint_status_register_default_bp1(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + spi_prettyprint_status_register_bp(status, 1); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +/* Works for many chips of the + * AMIC A25L series + */ +int spi_prettyprint_status_register_default_bp2(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +/* Works for many chips of the + * ST M25P series + * MX MX25L series + */ +int spi_prettyprint_status_register_default_bp3(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bp(status, 3); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +/* === Amic === + * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using + * spi_prettyprint_status_register_default_bp1 or + * spi_prettyprint_status_register_default_bp2. + * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using + * spi_prettyprint_status_register_amic_a25l032 if those have locks controlled + * by the second status register. + */ + +int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + msg_cdbg("Chip status register: Sector Protect Size (SEC) is %i KB\n", (status & (1 << 6)) ? 4 : 64); + msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top"); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + msg_cdbg("Chip status register 2 is NOT decoded!\n"); + return 0; +} + +/* === Atmel === */ + +static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status) +{ + msg_cdbg("Chip status register: Write Protect Enable (WPEN) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status) +{ + msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status) +{ + msg_cdbg("Chip status register: Erase/Program Error (EPE) is %sset\n", + (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: WP# pin (WPP) is %sasserted\n", + (status & (1 << 4)) ? "not " : ""); +} + +static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status) +{ + msg_cdbg("Chip status register: Software Protection Status (SWP): "); + switch (status & (3 << 2)) { + case 0x0 << 2: + msg_cdbg("no sectors are protected\n"); + break; + case 0x1 << 2: + msg_cdbg("some sectors are protected\n"); + /* FIXME: Read individual Sector Protection Registers. */ + break; + case 0x3 << 2: + msg_cdbg("all sectors are protected\n"); + break; + default: + msg_cdbg("reserved for future use\n"); + break; + } +} + +int spi_prettyprint_status_register_at25df(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_srpl(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_atmel_at25_epewpp(status); + spi_prettyprint_status_register_atmel_at25_swp(status); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cdbg("Ignoring security lockdown (if present)\n"); + msg_cdbg("Ignoring status register byte 2\n"); + return spi_prettyprint_status_register_at25df(flash); +} + +int spi_prettyprint_status_register_at25f512b(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_srpl(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_atmel_at25_epewpp(status); + spi_prettyprint_status_register_bit(status, 3); + spi_prettyprint_status_register_bp(status, 0); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs010(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " + "%sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " + "%sset\n", (status & (1 << 5)) ? "" : "not "); + spi_prettyprint_status_register_bit(status, 4); + msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " + "%sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " + "%sset\n", (status & (1 << 2)) ? "" : "not "); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs040(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bp(status, 4); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at26df081a(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_srpl(status); + msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) is %sset\n", + (status & (1 << 6)) ? "" : "not "); + spi_prettyprint_status_register_atmel_at25_epewpp(status); + spi_prettyprint_status_register_atmel_at25_swp(status); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_disable_blockprotect_at25df(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & (3 << 2)) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Sector Protection Register Lock\n"); + if ((status & (1 << 4)) == 0) { + msg_cerr("WP# pin is active, disabling " + "write protection is impossible.\n"); + return 1; + } + /* All bits except bit 7 (SPRL) are readonly. */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + + } + /* Global unprotect. Make sure to mask SPRL as well. */ + result = spi_write_status_register(flash, status & ~0xbc); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & (3 << 2)) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +int spi_disable_blockprotect_at25df_sec(struct flashctx *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cinfo("Ignoring security lockdown (if present)\n"); + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25f512b(struct flashctx *flash) +{ + /* spi_disable_blockprotect_at25df is not really the right way to do + * this, but the side effects of said function work here as well. + */ + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25fs010(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & 0x6c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xec); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & 0x6c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +int spi_disable_blockprotect_at25fs040(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & 0x7c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xfc); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & 0x7c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +/* === SST === */ + +static void spi_prettyprint_status_register_sst25_common(uint8_t status) +{ + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_bpl(status); + msg_cdbg("Chip status register: Auto Address Increment Programming (AAI) is %sset\n", + (status & (1 << 6)) ? "" : "not "); + spi_prettyprint_status_register_bp(status, 3); + spi_prettyprint_status_register_welwip(status); +} + +int spi_prettyprint_status_register_sst25(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_sst25_common(status); + return 0; +} + +int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash) +{ + static const char *const bpt[] = { + "none", + "1F0000H-1FFFFFH", + "1E0000H-1FFFFFH", + "1C0000H-1FFFFFH", + "180000H-1FFFFFH", + "100000H-1FFFFFH", + "all", "all" + }; + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_sst25_common(status); + msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]); + return 0; +} + +int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash) +{ + static const char *const bpt[] = { + "none", + "0x70000-0x7ffff", + "0x60000-0x7ffff", + "0x40000-0x7ffff", + "all blocks", "all blocks", "all blocks", "all blocks" + }; + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_sst25_common(status); + msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]); + return 0; +}