On Sat, Oct 24, 2009 at 12:42:21AM +0200, Luc Verhaegen wrote:
Let's use your original pci_dev_find variant and refactor it later.
Yep.
Acked-by: Uwe Hermann uwe@hermann-uwe.de
See below for smaller fixes though.
/**
- Set the specified GPIO on the specified ICHx southbridge to high.
- Raises a GPIO line on intel ICH, ICH0 and ICH2 through ICH10 southbridges.
s/intel/Intel/
- In hardware, the GPIO BARs have the lower bits (5:1) zeroed, starting
- with a mobile ich9 version bits 6:1 are zeroed. The 0xFFC0 mask should
s/ich9/ICH9/
+/**
- Suited for ASUS P4B266: socket478 + intel 845D + ICH2.
s/intel/Intel/
+/**
- Suited for Acorp 6A815EPD: socket 370 + intel 815 + ICH2.
s/intel/Intel/
*/
- Suited for Asus P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R.
-static int ich2_gpio22_raise(const char *name) +static int board_asus_p4p800(const char *name) {
- return ich_gpio_raise(name, 0x8086, 0x2440, 0x58, 0x0c, 0xffc0, 22);
- struct pci_dev *dev;
- dev = pci_dev_find(0x8086, 0x24D0); /* Intel ICH5R ISA Bridge */
- if (!dev) {
fprintf(stderr, "\nERROR: Intel ICH5 ISA Bridge not found.\n");
One comment says ICH5R, one says ICH5.
/**
- Suited for the Dell PowerEdge 1850. All parameters except the last one are
- documented in the public Intel 82801EB ICH5 / 82801ER ICH5R datasheet. The
- last parameter (GPIO number) has to be in the range [16,31] according to
- said Intel datasheet and was found by exhaustive search.
- Suited for Dell Poweredge 1850: Intel PPGA604 + E7520 + ICH5R.
s/Poweredge/PowerEdge/ as per vendor website.
- Suited for MSI MS-7046.
*/
- Suited for MSI MS-7046: LGA775 + 915P + ICH6.
-static int ich6_gpio19_raise(const char *name) +static int board_msi_ms7046(const char *name) {
- return ich_gpio_raise(name, 0x8086, 0x2640, 0x48, 0x0c, 0xffc0, 19);
- struct pci_dev *dev;
- dev = pci_dev_find(0x8086, 0x2640); /* Intel ICH6 LPC Interface */
- if (!dev) {
fprintf(stderr, "\nERROR: Intel ICH9R LPC not found.\n");
One comment says ICH6, the other ICH9R. One of them is wrong.
Uwe.