- Infrastructure support in flashchips.c added for (28 in total) - - Eon(13) : EN25QH128, EN25Q128, EN25QH64, EN25Q64, EN25QH32, EN25QH16, EN25Q16, EN25Q32(A/B), EN25Q80(A), EN25Q40 - GigaDevice(13) : GD25Q80(B), GD25Q32(B), GD25Q64(B), GD25Q128B, GD25Q128C, GD25VQ21B, GD25VQ40C, GD25VQ41B, GD25VQ80C, GD25VQ16C - Winbond(2) : W25Q40BL, W25Q64FV
Signed-off-by: Hatim Kanchwala hatim@hatimak.me --- flashchips.c | 187 +++++++++++++++++++++++----------- spi25_statusreg.h | 6 ++ statusreg_layouts.c | 58 ++++++++++- writeprotect.h | 13 ++- writeprotect_layouts.c | 269 ++++++++++++++++++++++++++++++++++++++++++++++++- 5 files changed, 471 insertions(+), 62 deletions(-)
diff --git a/flashchips.c b/flashchips.c index 725a9e2..43545a4 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1161,27 +1161,27 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_20, }, { .eraseblocks = { { 64 * 1024, 16 } }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { { 1024 * 1024, 1 } }, .block_erase = spi_block_erase_c7, } }, .status_register = &a25l080_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, - .wp = &gd25_a25l080_q16_32a_wp, + .wp = &gd_w_wp, },
{ .vendor = "AMIC", .name = "A25L016", .bustype = BUS_SPI, .manufacture_id = AMIC_ID_NOPREFIX, .model_id = AMIC_A25L016, .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, @@ -1271,27 +1271,27 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_d8, }, { .eraseblocks = { { 2048 * 1024, 1 } }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { { 2048 * 1024, 1 } }, .block_erase = spi_block_erase_c7, } }, .status_register = &a25lq16_32a_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, - .wp = &gd25_a25l080_q16_32a_wp, + .wp = &gd_w_wp, },
{ .vendor = "AMIC", .name = "A25LQ032", .bustype = BUS_SPI, .manufacture_id = AMIC_ID_NOPREFIX, .model_id = AMIC_A25LQ032, .total_size = 4096, .page_size = 256, /* A25LQ32A supports SFDP */ /* OTP: 64B total; read 0x4B, 0x48; write 0x42 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, @@ -4528,31 +4528,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 8} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &en25q80a_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25q40_wp, },
{ .vendor = "Eon", .name = "EN25Q80(A)", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25Q80, .total_size = 1024, .page_size = 256, /* OTP: 256B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, @@ -4564,31 +4564,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 256} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 16} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &en25q80a_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25q80a_wp, },
{ /* Note: EN25D16 is an evil twin which shares the model ID but has different write protection capabilities */ .vendor = "Eon", .name = "EN25Q16", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25Q16, .total_size = 2048, .page_size = 256, /* OTP: D16 512B/Q16 128B total; enter 0x3A */ @@ -4606,67 +4606,103 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_d8, }, { /* not supported by Q16 version */ .eraseblocks = { {64 * 1024, 32} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &en25q16_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25q16_wp, },
{ .vendor = "Eon", - .name = "EN25Q32(A/B)", + .name = "EN25Q32", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25Q32, .total_size = 4096, .page_size = 256, /* OTP: 512B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 1024} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 64} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &en25q16_sr, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + .wp = &en25q32_wp, + }, + + { + .vendor = "Eon", + .name = "EN25Q32A/EN25Q32B", + .bustype = BUS_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EON_EN25Q32, + .total_size = 4096, + .page_size = 256, + /* OTP: 512B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .status_register = &en25qh128_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25q32ab_wp, },
{ .vendor = "Eon", .name = "EN25Q64", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25Q64, .total_size = 8192, .page_size = 256, /* OTP: 512B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, @@ -4678,31 +4714,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 2048} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 128} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &en25qh128_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25q64_wp, },
{ .vendor = "Eon", .name = "EN25Q128", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25Q128, .total_size = 16384, .page_size = 256, /* OTP: 512B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, @@ -4714,30 +4750,30 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 4096} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 256} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {16 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {16 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &en25qh128_sr, .write = spi_chip_write_256, .read = spi_chip_read, + .wp = &en25q128_wp, },
{ .vendor = "Eon", .name = "EN25QH16", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25QH16, .total_size = 2048, .page_size = 256, /* supports SFDP */ /* OTP: 512B total; enter 0x3A */ /* QPI enable 0x38, disable 0xFF */ @@ -4751,31 +4787,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 512} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 32} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {1024 * 2048, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {1024 * 2048, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .status_register = &en25qh16_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25qh16_wp, },
{ .vendor = "Eon", .name = "EN25QH32", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25QH32, .total_size = 4096, .page_size = 256, /* supports SFDP */ /* OTP: 512B total; enter 0x3A */ /* QPI enable 0x38, disable 0xFF */ @@ -4789,31 +4825,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 1024} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 64} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {1024 * 4096, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {1024 * 4096, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .status_register = &en25qh128_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25qh32_wp, },
{ .vendor = "Eon", .name = "EN25QH64", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25QH64, .total_size = 8192, .page_size = 256, /* supports SFDP */ /* OTP: 512B total; enter 0x3A */ /* QPI enable 0x38, disable 0xFF */ @@ -4826,31 +4862,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 2048} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 128} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { { 8192 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { { 8192 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .status_register = &en25qh128_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25qh64_wp, },
{ .vendor = "Eon", .name = "EN25QH128", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25QH128, .total_size = 16384, .page_size = 256, /* supports SFDP */ /* OTP: 512B total; enter 0x3A */ /* QPI enable 0x38, disable 0xFF */ @@ -4863,31 +4899,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {4 * 1024, 4096} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 256} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { { 16384 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { { 16384 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .status_register = &en25qh128_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &en25qh128_wp, },
{ .vendor = "Eon", .name = "EN25S10", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, .model_id = EON_EN25S10, .total_size = 128, .page_size = 256, /* OTP: 256B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, @@ -5706,27 +5742,27 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .status_register = &gd25lq_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950}, - .wp = &gd25_a25l080_q16_32a_wp, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25LQ80", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25LQ80, .total_size = 1024, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, @@ -5745,27 +5781,27 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {1 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {1 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .status_register = &gd25lq_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950}, - .wp = &gd25_a25l080_q16_32a_wp, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25LQ16", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25LQ16, .total_size = 2048, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, @@ -5784,27 +5820,27 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .status_register = &gd25lq_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950}, - .wp = &gd25_a25l080_q16_32a_wp, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25LQ32", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25LQ32, .total_size = 4096, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, @@ -6053,61 +6089,99 @@ const struct flashchip flashchips[] = { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, },
{ .vendor = "GigaDevice", - .name = "GD25Q80(B)", + .name = "GD25Q80", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q80, .total_size = 1024, .page_size = 256, - /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (B version only) */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 256} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {32 * 1024, 32} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 16} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25q10_20_40_80_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .wp = &gd_w_wp, + }, + + { + .vendor = "GigaDevice", + .name = "GD25Q80B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q80, + .total_size = 1024, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .status_register = &gd25q80b_128_sr, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25Q16", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q16, .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, @@ -6125,27 +6199,27 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .status_register = &gd25q10_20_40_80_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, - .wp = &gd25_a25l080_q16_32a_wp, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25Q16B", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q16, .total_size = 2048, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (B version only) */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, @@ -6164,27 +6238,27 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .status_register = &gd25q16_32_64b_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, - .wp = &gd25_a25l080_q16_32a_wp, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25Q32(B)", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q32, .total_size = 4096, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, @@ -6199,31 +6273,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {32 * 1024, 128} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 64} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25q16_32_64b_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25Q64(B)", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q64, .total_size = 8192, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, @@ -6238,31 +6312,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {32 * 1024, 256} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 128} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25q16_32_64b_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25Q128B", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q128, .total_size = 16384, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, @@ -6277,31 +6351,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {32 * 1024, 512} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 256} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {16 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {16 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25q16_32_64b_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25Q128C", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q128, .total_size = 16384, .page_size = 256, /* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */ /* QPI: enable 0x38, disable 0xFF */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, @@ -6317,32 +6391,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {32 * 1024, 512} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 256} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {16 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {16 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - /* TODO: 2nd status reg (read 0x35, write 0x31) and 3rd status reg (read 0x15, write 0x11) */ - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, + .status_register = &gd25q128c_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25T80", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25T80, .total_size = 1024, .page_size = 256, /* OTP: 256B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, @@ -6395,31 +6468,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { { 32 * 1024, 8} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { { 64 * 1024, 4} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {256 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {256 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25vq21_41b_q21_q41b_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2300, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25VQ40C", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25VQ41B, .total_size = 512, .page_size = 256, /* Supports SFDP */ /* OTP: 1024B total; read 0x48, write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, @@ -6435,31 +6508,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { { 32 * 1024, 16} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { { 64 * 1024, 8} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25vq16_80c_q16_40c_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2300, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25VQ41B", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25VQ41B, .total_size = 512, .page_size = 256, /* OTP: 1536B total; read 0x48, write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_OK_PREW, @@ -6474,31 +6547,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { { 32 * 1024, 16} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { { 64 * 1024, 8} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25vq21_41b_q21_q41b_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2300, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25VQ80C", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25VQ80C, .total_size = 1024, .page_size = 256, /* Supports SFDP */ /* OTP: 1024B total; read 0x48, write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, @@ -6514,31 +6587,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { { 32 * 1024, 32} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { { 64 * 1024, 16} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25vq16_80c_q16_40c_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2300, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "GigaDevice", .name = "GD25VQ16C", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25VQ16C, .total_size = 2 * 1024, .page_size = 256, /* Supports SFDP */ /* OTP: 1024B total; read 0x48, write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, @@ -6554,31 +6627,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { { 32 * 1024, 64} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { { 64 * 1024, 32} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .status_register = &gd25vq16_80c_q16_40c_sr, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2300, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "Hyundai", .name = "HY29F002T", .bustype = BUS_PARALLEL, .manufacture_id = HYUNDAI_ID, .model_id = HYUNDAI_HY29F002T, .total_size = 256, .page_size = 256 * 1024, .feature_bits = FEATURE_EITHER_RESET, /* Some revisions may need FEATURE_ADDR_2AA */ .tested = TEST_OK_PRE, .probe = probe_jedec, @@ -14489,31 +14562,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {32 * 1024, 16} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 8} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &w25q40bl_64fv_sr, .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "Winbond", .name = "W25Q80.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, .model_id = WINBOND_NEX_W25Q80_V, .total_size = 1024, .page_size = 256, /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, @@ -14649,31 +14722,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {32 * 1024, 256} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 128} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &w25q40bl_64fv_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + .wp = &gd_w_wp, },
{ .vendor = "Winbond", .name = "W25Q128.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, .model_id = WINBOND_NEX_W25Q128_V, .total_size = 16384, .page_size = 256, /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, @@ -14926,31 +14999,31 @@ const struct flashchip flashchips[] = { .eraseblocks = { {32 * 1024, 256} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 128} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .status_register = &w25q40bl_64fv_sr, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ + .wp = &gd_w_wp, },
{ .vendor = "Winbond", .name = "W25X10", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, .model_id = WINBOND_NEX_W25X10, .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, diff --git a/spi25_statusreg.h b/spi25_statusreg.h index 8bfffa0..f93a084 100644 --- a/spi25_statusreg.h +++ b/spi25_statusreg.h @@ -70,26 +70,32 @@ enum wp_mode { WP_MODE_POWER_CYCLE,
/* Status register is permanently protected and cannot be written to. */ WP_MODE_PERMANENT, };
/* Describes corresponding bits from enum status_register_bit */ extern char *statreg_bit_desc[][2];
/* === Single status register === */ /* === AMIC === */ extern struct status_register a25l080_sr;
+/* === Eon === */ +extern struct status_register en25qh128_sr; +extern struct status_register en25qh16_sr; +extern struct status_register en25q16_sr; +extern struct status_register en25q80a_sr; + /* === Macronix === */ extern struct status_register mx25l64xe_sr; extern struct status_register mx25lx5d_sr; extern struct status_register mx25lx65e_sr;
/* === Double status registers === */ /* === AMIC === */ extern struct status_register a25lq16_32a_sr; extern struct status_register a25l032_sr;
/* === GigaDevice === */ extern struct status_register gd25lq_sr; extern struct status_register gd25q16_32_64b_sr; diff --git a/statusreg_layouts.c b/statusreg_layouts.c index f4275af..e83b1b4 100644 --- a/statusreg_layouts.c +++ b/statusreg_layouts.c @@ -38,26 +38,80 @@ /* === AMIC === */ /* A25L080 */ struct status_register a25l080_sr = { .layout = { { WIP, WEL, BP0, BP1, BP2, RESV, RESV, SRP0 }, }, .read = &spi_read_status_register_generic, .write = &spi_write_status_register_generic, .print = &spi_prettyprint_status_register_generic, .print_wp_mode = &spi_prettyprint_status_register_wp_generic, .get_wp_mode = &get_wp_mode_generic, .set_wp_mode = &set_wp_mode_generic, }; + +/* === Eon === */ +/* EN25QH128, EN25Q128, EN25QH64, EN25Q64, EN25QH32 */ +struct status_register en25qh128_sr = { + .layout = { + { WIP, WEL, BP0, BP1, BP2, BP3, WP, SRP0 }, + }, + .read = &spi_read_status_register_generic, + .write = &spi_write_status_register_generic, + .print = &spi_prettyprint_status_register_generic, + .print_wp_mode = &spi_prettyprint_status_register_wp_generic, + .get_wp_mode = &get_wp_mode_generic, + .set_wp_mode = &set_wp_mode_generic, +}; + +/* EN25QH16 */ +struct status_register en25qh16_sr = { + .layout = { + { WIP, WEL, BP0, BP1, BP2, BP3, QE, SRP0 }, + }, + .read = &spi_read_status_register_generic, + .write = &spi_write_status_register_generic, + .print = &spi_prettyprint_status_register_generic, + .print_wp_mode = &spi_prettyprint_status_register_wp_generic, + .get_wp_mode = &get_wp_mode_generic, + .set_wp_mode = &set_wp_mode_generic, +}; + +/* EN25Q16, EN25Q32 */ +struct status_register en25q16_sr = { + .layout = { + { WIP, WEL, BP0, BP1, BP2, RESV, RESV, SRP0 }, + }, + .read = &spi_read_status_register_generic, + .write = &spi_write_status_register_generic, + .print = &spi_prettyprint_status_register_generic, + .print_wp_mode = &spi_prettyprint_status_register_wp_generic, + .get_wp_mode = &get_wp_mode_generic, + .set_wp_mode = &set_wp_mode_generic, +}; + +/* EN25Q80A, EN25Q40 */ +struct status_register en25q80a_sr = { + .layout = { + { WIP, WEL, BP0, BP1, BP2, RESV, WP, SRP0 }, + }, + .read = &spi_read_status_register_generic, + .write = &spi_write_status_register_generic, + .print = &spi_prettyprint_status_register_generic, + .print_wp_mode = &spi_prettyprint_status_register_wp_generic, + .get_wp_mode = &get_wp_mode_generic, + .set_wp_mode = &set_wp_mode_generic, +}; + /* === Macronix === */ /* MX25L6408E, MX25L6406E */ struct status_register mx25l64xe_sr = { .layout = { { WIP, WEL, BP0, BP1, BP2, BP3, RESV, SRP0 }, }, .read = &spi_read_status_register_generic, .write = &spi_write_status_register_generic, .print = &spi_prettyprint_status_register_generic, .print_wp_mode = &spi_prettyprint_status_register_wp_generic, .get_wp_mode = &get_wp_mode_generic, .set_wp_mode = &set_wp_mode_generic, }; @@ -132,27 +186,27 @@ struct status_register a25l032_sr = { struct status_register gd25lq_sr = { .layout = { { WIP, WEL, BP0, BP1, BP2, BP3, BP4, SRP0 }, { SRP1, QE, SUS2, LB1, LB2, LB3, CMP, SUS1 }, }, .read = &spi_read_status_register_generic, .write = &spi_write_status_register_generic, .print = &spi_prettyprint_status_register_generic, .print_wp_mode = &spi_prettyprint_status_register_wp_generic, .get_wp_mode = &get_wp_mode_generic, .set_wp_mode = &set_wp_mode_generic, };
-/* GD25Q16B, GD25Q32B, GD25Q64B */ +/* GD25Q16B, GD25Q32B, GD25Q64B, GD25Q128B */ struct status_register gd25q16_32_64b_sr = { .layout = { { WIP, WEL, BP0, BP1, BP2, BP3, BP4, SRP0 }, { RESV, QE, LB1, RESV, RESV, RESV, CMP, SUS }, }, .read = &spi_read_status_register_generic, .write = &spi_write_status_register_generic, .print = &spi_prettyprint_status_register_generic, .print_wp_mode = &spi_prettyprint_status_register_wp_generic, .get_wp_mode = &get_wp_mode_generic, .set_wp_mode = &set_wp_mode_generic, };
@@ -160,27 +214,27 @@ struct status_register gd25q16_32_64b_sr = { struct status_register gd25q10_20_40_80_sr = { .layout = { { WIP, WEL, BP0, BP1, BP2, BP3, BP4, SRP0 }, { SRP1, QE, RESV, RESV, RESV, RESV, RESV, RESV }, }, .read = &spi_read_status_register_generic, .write = &spi_write_status_register_generic, .print = &spi_prettyprint_status_register_generic, .print_wp_mode = &spi_prettyprint_status_register_wp_generic, .get_wp_mode = &get_wp_mode_generic, .set_wp_mode = &set_wp_mode_generic, };
-/* GD25VQ16C, GD25VQ80C, GD25Q16C, GD25Q40C */ +/* GD25VQ16C, GD25VQ40C, GD25VQ80C, GD25Q16C, GD25Q40C */ struct status_register gd25vq16_80c_q16_40c_sr = { .layout = { { WIP, WEL, BP0, BP1, BP2, BP3, BP4, SRP0 }, { SRP1, QE, LB1, RESV, RESV, HPF, CMP, SUS }, }, .read = &spi_read_status_register_generic, .write = &spi_write_status_register_generic, .print = &spi_prettyprint_status_register_generic, .print_wp_mode = &spi_prettyprint_status_register_wp_generic, .get_wp_mode = &get_wp_mode_generic, .set_wp_mode = &set_wp_mode_generic, };
diff --git a/writeprotect.h b/writeprotect.h index 41dbc7c..87a0f63 100644 --- a/writeprotect.h +++ b/writeprotect.h @@ -21,20 +21,31 @@ #ifndef __WRITEPROTECT_H__ #define __WRITEPROTECT_H__ 1
#include "flash.h"
#define LEN_RANGES 64
struct range { uint32_t start; uint32_t len; /* in kB */ };
extern struct wp a25l032_32a_wp; -extern struct wp gd25_a25l080_q16_32a_wp; +extern struct wp gd_w_wp; +extern struct wp en25qh128_wp; +extern struct wp en25q128_wp; +extern struct wp en25qh64_wp; +extern struct wp en25q64_wp; +extern struct wp en25qh32_wp; +extern struct wp en25q32ab_wp; +extern struct wp en25qh16_wp; +extern struct wp en25q16_wp; +extern struct wp en25q32_wp; +extern struct wp en25q80a_wp; +extern struct wp en25q40_wp; extern struct wp mx25l16xd_wp; extern struct wp mx25l6405d_wp; extern struct wp mx25lx5d_wp; extern struct wp mx25lx65e_wp;
#endif /* !__WRITEPROTECT_H__ */ diff --git a/writeprotect_layouts.c b/writeprotect_layouts.c index f5ac2ec..67e59c2 100644 --- a/writeprotect_layouts.c +++ b/writeprotect_layouts.c @@ -32,35 +32,300 @@ * int (*print_table) (struct flashctx *flash); * }; */
/* A25LQ032, A25LQ32A */ struct wp a25l032_32a_wp = { .range_table = &a25l032_range_table, .bp_bitmask = &bp_bitmask_generic, .print_table = &print_table_generic, .set_range = &set_range_generic, .disable = &disable_generic, };
-/* A25L080, A25LQ16, GD25LQ40, GD25LQ80, GD25LQ16, GD25Q16, GD25Q16B */ -struct wp gd25_a25l080_q16_32a_wp = { +/* A25L080, A25LQ16, GD25LQ40, GD25LQ80, GD25LQ16, GD25Q16, GD25Q16B GD25Q32(B), + * GD25Q64(B), GD25Q128B, GD25Q128C, GD25VQ16C, GD25VQ21B, GD25VQ40C, GD25VQ41B, + * GD25VQ80C, W25Q40BL, W25Q64FV */ +struct wp gd_w_wp = { .range_table = &sec_block_range_pattern, .bp_bitmask = &bp_bitmask_generic, .print_table = &print_table_generic, .set_range = &set_range_generic, .disable = &disable_generic, };
+/* EN25QH128 */ +struct wp en25qh128_wp = { + .ranges = (struct range[]){ + /* BP3 effectively acts as TB bit, + * BP[0..2] function normally. */ + { 0x000000, 0 }, + { 0xff0000, 64 }, + { 0xfe0000, 128 }, + { 0xfc0000, 256 }, + { 0xf80000, 512 }, + { 0xf00000, 1024 }, + { 0xe00000, 2048 }, + { 0x000000, 16384 }, + + { 0x000000, 0 }, + { 0x000000, 64 }, + { 0x000000, 128 }, + { 0x000000, 256 }, + { 0x000000, 512 }, + { 0x000000, 1024 }, + { 0x000000, 2048 }, + { 0x000000, 16384 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25Q128 */ +struct wp en25q128_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x000000, 16320 }, + { 0x000000, 16256 }, + { 0x000000, 16128 }, + { 0x000000, 15872 }, + { 0x000000, 15360 }, + { 0x000000, 14336 }, + { 0x000000, 16384 }, + + { 0x000000, 0 }, + { 0x010000, 16320 }, + { 0x020000, 16256 }, + { 0x040000, 16128 }, + { 0x080000, 15872 }, + { 0x100000, 15360 }, + { 0x200000, 14336 }, + { 0x000000, 16384 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25QH64 */ +struct wp en25qh64_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x7f0000, 64 }, + { 0x7e0000, 128 }, + { 0x7c0000, 256 }, + { 0x780000, 512 }, + { 0x700000, 1024 }, + { 0x600000, 2048 }, + { 0x000000, 8192 }, + + { 0x000000, 0 }, + { 0x000000, 64 }, + { 0x000000, 128 }, + { 0x000000, 256 }, + { 0x000000, 512 }, + { 0x000000, 1024 }, + { 0x000000, 2048 }, + { 0x000000, 8192 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25Q64 */ +struct wp en25q64_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x000000, 8128 }, + { 0x000000, 8064 }, + { 0x000000, 7936 }, + { 0x000000, 7680 }, + { 0x000000, 7168 }, + { 0x000000, 6144 }, + { 0x000000, 8192 }, + + { 0x000000, 0 }, + { 0x010000, 8128 }, + { 0x020000, 8064 }, + { 0x040000, 7936 }, + { 0x080000, 7680 }, + { 0x100000, 7168 }, + { 0x200000, 6144 }, + { 0x000000, 8192 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25QH32 */ +struct wp en25qh32_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x3f0000, 64 }, + { 0x3e0000, 128 }, + { 0x3c0000, 256 }, + { 0x380000, 512 }, + { 0x300000, 1024 }, + { 0x200000, 2048 }, + { 0x000000, 4096 }, + + { 0x000000, 0 }, + { 0x000000, 64 }, + { 0x000000, 128 }, + { 0x000000, 256 }, + { 0x000000, 512 }, + { 0x000000, 1024 }, + { 0x000000, 2048 }, + { 0x000000, 4096 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25Q32A/EN25Q32B */ +struct wp en25q32ab_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x3f0000, 4032 }, + { 0x3e0000, 3968 }, + { 0x3c0000, 3840 }, + { 0x380000, 3584 }, + { 0x300000, 3072 }, + { 0x200000, 2048 }, + { 0x000000, 4096 }, + + { 0x000000, 0 }, + { 0x010000, 4032 }, + { 0x020000, 3968 }, + { 0x040000, 3840 }, + { 0x080000, 3584 }, + { 0x100000, 3072 }, + { 0x200000, 2048 }, + { 0x000000, 4096 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25QH16 */ +struct wp en25qh16_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x1f0000, 64 }, + { 0x1e0000, 128 }, + { 0x1c0000, 256 }, + { 0x180000, 512 }, + { 0x100000, 1024 }, + { 0x000000, 2048 }, + { 0x000000, 2048 }, + + { 0x000000, 0 }, + { 0x000000, 64 }, + { 0x000000, 128 }, + { 0x000000, 256 }, + { 0x000000, 512 }, + { 0x000000, 1024 }, + { 0x000000, 2048 }, + { 0x000000, 2048 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25Q16 */ +struct wp en25q16_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x000000, 1984 }, + { 0x000000, 1920 }, + { 0x000000, 1792 }, + { 0x000000, 1536 }, + { 0x000000, 1024 }, + { 0x000000, 2048 }, + { 0x000000, 2048 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25Q32 */ +struct wp en25q32_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x3f0000, 64 }, + { 0x3e0000, 128 }, + { 0x3c0000, 256 }, + { 0x380000, 512 }, + { 0x300000, 1024 }, + { 0x200000, 2048 }, + { 0x000000, 4096 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25Q80A */ +struct wp en25q80a_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x000000, 1016 }, + { 0x000000, 1008 }, + { 0x000000, 992 }, + { 0x000000, 960 }, + { 0x000000, 896 }, + { 0x000000, 768 }, + { 0x000000, 1024 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + +/* EN25Q40 */ +struct wp en25q40_wp = { + .ranges = (struct range[]){ + { 0x000000, 0 }, + { 0x000000, 504 }, + { 0x000000, 496 }, + { 0x000000, 480 }, + { 0x000000, 448 }, + { 0x000000, 384 }, + { 0x000000, 256 }, + { 0x000000, 512 }, + }, + .bp_bitmask = &bp_bitmask_generic, + .print_table = &print_table_generic, + .set_range = &set_range_generic, + .disable = &disable_generic, +}; + /* MX25L1605D, MX25L1608D, MX25L1673E */ struct wp mx25l16xd_wp = { .ranges = (struct range[]){ /* BP3 effectively acts as CMP bit, * BP[0..2] function normally. */ { 0x000000, 0 }, { 0x1f0000, 64 }, { 0x1e0000, 128 }, { 0x1c0000, 256 }, { 0x180000, 512 }, { 0x100000, 1024 }, { 0x000000, 2048 }, { 0x000000, 2048 },