Re: [flashrom] KabyLake Utilization of flashrom for BIOS update with two devices totalling 32MB.

[Furlong, Simon]

Hi Nico,

Thanks for your direction and advice it was much appreciated and successful.

Your advice has accelerated our investigations; we were heading in that direction ourselves, as we had noticed the mapping was actually trying to overlay invalid physical address regions (non-contiguous as you describe).

Cheers,
Simon

-----Original Message-----
From: Nico Huber [mailto:[e-mail]] 
Sent: Sunday, January 21, 2018 2:37 PM
To: Furlong, Simon ; [e-mail]
Cc: Lewis, Michael 
Subject: Re: [flashrom] KabyLake Utilization of flashrom for BIOS update with two devices totalling 32MB.

Hello Simon,

On 19.01.2018 16:23, Furlong, Simon wrote:
> Can you help explain as two why the SPI region fails to program 
> (specifically due to the mmap failure)?

the attempt to map the flash chip into flashrom's user-space is a very old relict that, I assume, doesn't apply to SPI programmers at all. It's likely that the mapping just fails because there is no contiguous 32MiB space at that address (IIRC, on Intel systems, at most 16MiB of the BIOS flash is memory mapped). You may find more information about why the mapping is rejected in your system log (e.g. dmesg).

To get rid of the attempt to map, you'd have to patch and build flashrom by yourself. Here is a patch that might fix the issue for you [1]. If you use Git, you can simply check it out with the following commands:

git fetch https://review.coreboot.org/flashrom.git refs/changes/44/23344/1
  git checkout FETCH_HEAD

Some information about build requirements can be found here [2].

Hope that helps,
Nico

[1] https://review.coreboot.org/23344/
[2] https://flashrom.org/Downloads