Dear,
I'm facing this problem when flashing my rom:
flashrom v0.9.2-r1028 on Linux 2.6.35-28-generic (i686), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... delay loop is unreliable, trying to continue OK. No coreboot table found. Found chipset "Intel ICH4-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... ERASE FAILED at 0x00000008! Expected=0xff, Read=0x00, failed byte count from 0x00000000-0x00000fff: 0xfc5 ERASE FAILED! ERASE FAILED at 0x00000008! Expected=0xff, Read=0x00, failed byte count from 0x00000000-0x0000ffff: 0xfadb ERASE FAILED! FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom@flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF!
Regards,
Cyrille Bartholomée | De Damhouderestraat 20 | 2018 Antwerpen t. 0032 3 298 4244 | m. 0032 499 711 018 | e. cyrille@bartholomee.com