Author: stefanct Date: Thu Jan 14 23:47:55 2016 New Revision: 1913 URL: http://flashrom.org/trac/flashrom/changeset/1913
Log: Pimp the manpage to create nicer hyperlinks and HTML output.
Also, add a target to the makefile to build a flashrom.8.html with groff. To fix some formatting issues this adds some indention commands as well.
Signed-off-by: Stefan Tauner stefan.tauner@alumni.tuwien.ac.at Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Modified: trunk/ (props changed) trunk/Makefile trunk/flashrom.8.tmpl trunk/flashrom.c trunk/ichspi.c trunk/internal.c trunk/mcp6x_spi.c trunk/print.c
Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Jan 7 19:13:07 2016 (r1912) +++ trunk/Makefile Thu Jan 14 23:47:55 2016 (r1913) @@ -810,7 +810,7 @@ # This includes all frontends and libflashrom. # We don't use EXEC_SUFFIX here because we want to clean everything. clean: - rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 $(BUILD_DETAILS_FILE) + rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) @+$(MAKE) -C util/ich_descriptors_tool/ clean
distclean: clean @@ -1069,8 +1069,12 @@ @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX)
+$(PROGRAM).8.html: $(PROGRAM).8 + @groff -mandoc -Thtml $< >$@ + $(PROGRAM).8: $(PROGRAM).8.tmpl - @sed -e '1 s#".*".*#"$(shell ./util/getrevision.sh -d $(PROGRAM).8.tmpl 2>/dev/null)" "$(VERSION)"#' <$< >$@ + @# Add the man page change date and version to the man page + @sed -e 's#.TH FLASHROM 8 ".*".*#.TH FLASHROM 8 "$(shell ./util/getrevision.sh -d $(PROGRAM).8.tmpl 2>/dev/null)" "$(VERSION)"#' <$< >$@
install: $(PROGRAM)$(EXEC_SUFFIX) $(PROGRAM).8 mkdir -p $(DESTDIR)$(PREFIX)/sbin
Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Thu Jan 7 19:13:07 2016 (r1912) +++ trunk/flashrom.8.tmpl Thu Jan 14 23:47:55 2016 (r1913) @@ -1,3 +1,43 @@ +." Load the www device when using groff; provide a fallback for groff's MTO macro that formats email addresses. +.ie \n[.g] \ +. mso www.tmac +.el \ +. de MTO \$2 (la\$1 (ra\$3 +. . +." Create wrappers for .MTO and .URL that print only text on systems w/o groff or if not outputting to a HTML +." device. To that end we need to distinguish HTML output on groff from other configurations first. +.nr groffhtml 0 +.if \n[.g] \ +. if "*[.T]"html" \ +. nr groffhtml 1 +." For code reuse it would be nice to have a single wrapper that gets its target macro as parameter. +." However, this did not work out with NetBSD's and OpenBSD's groff... +.de URLB +. ie (\n[groffhtml]==1) {\ +. URL \$@ +. } +. el {\ +. ie "\$2"" {\ +. BR "\$1" "\$3" +. } +. el {\ +. RB "\$2 (la" "\$1" "(ra\$3" +. } +. } +.. +.de MTOB +. ie (\n[groffhtml]==1) {\ +. MTO \$@ +. } +. el {\ +. ie "\$2"" {\ +. BR "\$1" "\$3" +. } +. el {\ +. RB "\$2 (la" "\$1" "(ra\$3" +. } +. } +.. .TH FLASHROM 8 "" "" .SH NAME flashrom - detect, read, write, verify and erase flash chips @@ -160,9 +200,8 @@ Same as .BR --list-supported , but outputs the supported hardware in MediaWiki syntax, so that it can be -easily pasted into the wiki page at -.nh -.BR http://www.flashrom.org/ . +easily pasted into the +.URLB https://flashrom.org/Supported_hardware "supported hardware wiki page" . Please note that MediaWiki output is not compiled in by default. .TP .B "-p, --programmer <name>[:parameter[,parameter[,parameter]]]" @@ -452,9 +491,9 @@ .B BUGS section). The embedded controller (EC) in these machines often interacts badly with flashing. -.nh -.B http://www.flashrom.org/Laptops -has more information. For example the EC firmware sometimes resides on the same +More information is +.URLB https://flashrom.org/Laptops "in the wiki" . +For example the EC firmware sometimes resides on the same flash chip as the host firmware. While flashrom tries to change the contents of that memory the EC might need to fetch new instructions or data from it and could stop working correctly. Probing for and reading from the chip may also @@ -480,10 +519,9 @@ to tell flashrom (at your own risk) that it is not running on a laptop. .SS .BR "dummy " programmer -The dummy programmer operates on a buffer in memory only. It provides a safe -and fast way to test various aspects of flashrom and is mainly used in -development and while debugging. -.sp +.IP +The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various +aspects of flashrom and is mainly used in development and while debugging. It is able to emulate some chips to a certain degree (basic identify/read/erase/write operations work). .sp @@ -599,6 +637,7 @@ .BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\ , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\ , " satamv" , " atahpt", " atavia " and " it8212 " programmers +.IP These programmers have an option to specify the PCI address of the card your want to use, which must be specified if more than one card supported by the selected programmer is installed in your system. The syntax is @@ -619,6 +658,7 @@ .B "flashrom -p nic3com:pci=05:04.0" .SS .BR "atavia " programmer +.IP Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the .sp .B " flashrom -p atavia:offset=addr" @@ -627,10 +667,10 @@ .B addr will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal). For more information please see -.nh -.B http://flashrom.org/VT6421A +.URLB https://flashrom.org/VT6421A "its wiki page" . .SS .BR "nicintel_eeprom " programmer +.IP This is the first programmer module in flashrom that does not provide access to NOR flash chips but EEPROMs mounted on gigabit Ethernet cards based on Intel's 82580 NIC. Because EEPROMs normally do not announce their size nor allow to be identified, the controller relies on correct size values written to predefined addresses @@ -639,6 +679,7 @@ M95128, M95256 and OnSemi (Catalyst) CAT25CS128. .SS .BR "ft2232_spi " programmer +.IP An optional parameter specifies the controller type and channel/interface/port it should support. For that you have to use the .sp @@ -682,6 +723,7 @@ syntax. .SS .BR "serprog " programmer +.IP A mandatory parameter specifies either a serial device (and baud rate) or an IP/port combination for communicating with the programmer. The device/baud combination has to start with @@ -711,6 +753,7 @@ in the source distribution. .SS .BR "buspirate_spi " programmer +.IP A required .B dev parameter specifies the Bus Pirate device node and an optional @@ -735,12 +778,13 @@ .B state can be .BR on " or " off . -More information about the Bus Pirate pull-up resistors and their purpose is available at -.nh -.BR "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_re... " . +More information about the Bus Pirate pull-up resistors and their purpose is available +.URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_re..." \ +"in a guide by dangerousprototypes" . Only the external supply voltage (Vpu) is supported as of this writing. .SS .BR "pickit2_spi " programmer +.IP An optional .B voltage parameter specifies the voltage the PICkit2 should use. The default unit is Volt if no unit is specified. @@ -769,6 +813,7 @@ (in Hz). The default is a frequency of 1 MHz. .SS .BR "dediprog " programmer +.IP An optional .B voltage parameter specifies the voltage the Dediprog should use. The default unit is @@ -819,6 +864,7 @@ to select target chip 1 or 2 respectively. The default is target chip 1. .SS .BR "rayer_spi " programmer +.IP The default I/O base address used for the parallel port is 0x378 and you can use the optional .B iobase @@ -844,19 +890,16 @@ STK200/300, " wiggler " for the Macraigor Wiggler, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)." .sp More information about the RayeR hardware is available at -.nh -.BR "http://rayer.ic.cz/elektro/spipgm.htm " . +.URLB "http://rayer.g6.cz/elektro/spipgm.htm" "RayeR's website" . The Altera ByteBlasterMV datasheet can be obtained from -.nh -.BR "http://www.altera.co.jp/literature/ds/dsbytemv.pdf " . +.URLB "http://www.altera.co.jp/literature/ds/dsbytemv.pdf" Altera . For more information about the Macraigor Wiggler see -.nh -.BR "http://www.macraigor.com/wiggler.htm " . +.URLB "http://www.macraigor.com/wiggler.htm" "their company homepage" . The schematic of the Xilinx DLC 5 was published in -.nh -.BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " . +.URLB "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf" "a Xilinx user guide" . .SS .BR "pony_spi " programmer +.IP The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is specified using the mandatory .B dev @@ -867,8 +910,7 @@ parameter accepts the values "si_prog" (default) or "serbang". .sp Information about the SI-Prog adapter can be found at -.nh -.BR "http://www.lancos.com/siprogsch.html " . +.URLB "http://www.lancos.com/siprogsch.html" "its website" . .sp An example call to flashrom is .sp @@ -878,6 +920,7 @@ this slows down operation considerably. .SS .BR "ogp_spi " programmer +.IP The flash ROM chip to access must be specified with the .B rom parameter. @@ -907,6 +950,7 @@ .BR http://wiki.opengraphics.org . .SS .BR "linux_spi " programmer +.IP You have to specify the SPI controller to use with the .sp .B " flashrom -p linux_spi:dev=/dev/spidevX.Y" @@ -925,6 +969,7 @@ Please note that the linux_spi driver only works on Linux. .SS .BR "mstarddc_spi " programmer +.IP The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging informations between a computer and attached displays. Its most common uses are getting display capabilities through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address @@ -1024,7 +1069,7 @@ .B buspirate_spi needs userspace access to a serial port. .sp -.BR dediprog ", " ft2232_spi " and " usbblaster_spi and " pickit2_spi +.BR dediprog ", " ft2232_spi ", " usbblaster_spi " and " pickit2_spi need access to the USB device via libusb. .sp .B dummy @@ -1034,7 +1079,7 @@ .BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt" and " atavia have to be run as superuser/root, and need additional raw access permission. .sp -.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi " and " ft2232_spi and " pickit2_spi +.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi " and " pickit2_spi can be run as normal user on most operating systems if appropriate device permissions are set. .sp @@ -1047,23 +1092,22 @@ .B "/etc/rc.securelevel" and rebooting, or rebooting into single user mode. .SH BUGS -Please report any bugs to the flashrom mailing list at -.B "flashrom@flashrom.org" +Please report any bugs to the +.MTOB "flashrom@flashrom.org" "flashrom mailing list" . .sp We recommend to subscribe first at -.sp -.B " http://www.flashrom.org/mailman/listinfo/flashrom" +.URLB "https://flashrom.org/mailman/listinfo/flashrom" "" . .sp Many of the developers communicate via the .B "#flashrom" IRC channel on .BR chat.freenode.net . +If you don't have an IRC client, you can use the +.URLB http://webchat.freenode.net/?channels=flashrom "freenode webchat" . You are welcome to join and ask questions, send us bug and success reports there too. Please provide a way to contact you later (e.g.& a mail address) and be -patient if there is no immediate reaction. Also, we provide a pastebin service -at -.nh -.B http://paste.flashrom.org +patient if there is no immediate reaction. Also, we provide a +.URLB https://paste.flashrom.org "pastebin service" that is very useful when you want to share logs etc.& without spamming the channel. .SS @@ -1078,8 +1122,8 @@ .B internal programmer subsection of the .B PROGRAMMER-SPECIFIC INFORMATION -section and the information in our wiki at -.BR "http://www.flashrom.org/Laptops " . +section and the information +.URLB "https://flashrom.org/Laptops" "in our wiki" . .SS One-time programmable (OTP) memory and unique IDs .sp @@ -1174,8 +1218,10 @@ .br some others, please see the flashrom svn changelog for details. .br -All still active authors can be reached via email at flashrom@flashrom.org. +All still active authors can be reached via +.MTOB "flashrom@flashrom.org" "the mailing list" . .PP -This manual page was written by Uwe Hermann uwe@hermann-uwe.de, -Carl-Daniel Hailfinger and others. +This manual page was written by +.MTOB "uwe@hermann-uwe.de" "Uwe Hermann" , +Carl-Daniel Hailfinger, Stefan Tauner and others. It is licensed under the terms of the GNU GPL (version 2 or later).
Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Thu Jan 7 19:13:07 2016 (r1912) +++ trunk/flashrom.c Thu Jan 14 23:47:55 2016 (r1913) @@ -1787,7 +1787,7 @@ void print_banner(void) { msg_ginfo("flashrom is free software, get the source code at " - "http://www.flashrom.org%5Cn"); + "https://flashrom.org%5Cn"); msg_ginfo("\n"); }
Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Thu Jan 7 19:13:07 2016 (r1912) +++ trunk/ichspi.c Thu Jan 14 23:47:55 2016 (r1913) @@ -1692,8 +1692,8 @@ ich_spi_rw_restricted |= ich9_handle_frap(tmp, i); if (ich_spi_rw_restricted) msg_pwarn("Not all flash regions are freely accessible by flashrom. This is " - "most likely\ndue to an active ME. Please see http://flashrom.org/ME " - "for details.\n"); + "most likely\ndue to an active ME. Please see " + "https://flashrom.org/ME for details.\n"); }
/* Handle PR registers */
Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Thu Jan 7 19:13:07 2016 (r1912) +++ trunk/internal.c Thu Jan 14 23:47:55 2016 (r1913) @@ -296,7 +296,7 @@ msg_perr("Laptops, notebooks and netbooks are difficult to support and we\n" "recommend to use the vendor flashing utility. The embedded controller\n" "(EC) in these machines often interacts badly with flashing.\n" - "See the manpage and http://www.flashrom.org/Laptops for details.\n\n" + "See the manpage and https://flashrom.org/Laptops for details.\n\n" "If flash is shared with the EC, erase is guaranteed to brick your laptop\n" "and write may brick your laptop.\n" "Read and probe may irritate your EC and cause fan failure, backlight\n"
Modified: trunk/mcp6x_spi.c ============================================================================== --- trunk/mcp6x_spi.c Thu Jan 7 19:13:07 2016 (r1912) +++ trunk/mcp6x_spi.c Thu Jan 14 23:47:55 2016 (r1913) @@ -19,7 +19,7 @@
/* Driver for the NVIDIA MCP6x/MCP7x MCP6X_SPI controller. * Based on clean room reverse engineered docs from - * http://www.flashrom.org/pipermail/flashrom/2009-December/001180.html + * https://flashrom.org/pipermail/flashrom/2009-December/001180.html * created by Michael Karcher. */
Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Jan 7 19:13:07 2016 (r1912) +++ trunk/print.c Thu Jan 14 23:47:55 2016 (r1913) @@ -565,7 +565,7 @@ B("ASRock", "960GM-GS3 FX", OK, "http://www.asrock.com/mb/overview.asp?Model=960GM-GS3%20FX", NULL), B("ASRock", "A330GC", OK, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL), B("ASRock", "A770CrossFire", OK, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL), - B("ASRock", "A780FullHD", OK, "http://www.asrock.com/mb/overview.asp?Model=A780FullHD", "While flashrom is working correctly, there might be problems with the firmware images themselves. Please see http://www.flashrom.org/pipermail/flashrom/2012-July/009600.html for details."), + B("ASRock", "A780FullHD", OK, "http://www.asrock.com/mb/overview.asp?Model=A780FullHD", "While flashrom is working correctly, there might be problems with the firmware images themselves. Please see https://flashrom.org/pipermail/flashrom/2012-July/009600.html for details."), B("ASRock", "ALiveNF6G-DVI", OK, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL), B("ASRock", "AM2NF6G-VSTA", OK, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL), B("ASRock", "ConRoeXFire-eSATA2", OK, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL), @@ -577,7 +577,7 @@ B("ASRock", "IMB-180-H", OK, "http://www.asrock.com/ipc/overview.asp?Model=IMB-A180-H", NULL), B("ASRock", "K7S41", OK, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL), B("ASRock", "K7S41GX", OK, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL), - B("ASRock", "K7VT4A+", BAD, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"), + B("ASRock", "K7VT4A+", BAD, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. https://flashrom.org/pipermail/flashrom/2009-August/000393.html"), B("ASRock", "K8S8X", OK, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL), B("ASRock", "M3A790GXH/128M", OK, "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL), B("ASRock", "N61P-S", OK, "http://www.asrock.com/mb/overview.asp?Model=N61P-S", NULL), @@ -624,7 +624,7 @@ B("ASUS", "M2N32-SLI Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL), B("ASUS", "M2N68-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M2N68VM/", NULL), B("ASUS", "M2NBP-VM CSM", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL), - B("ASUS", "M2N-E", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"), + B("ASUS", "M2N-E", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See https://flashrom.org/pipermail/flashrom/2009-November/000879.html"), B("ASUS", "M2N-E SLI", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL), B("ASUS", "M2N-MX SE Plus", OK, "http://www.asus.com/Motherboards/M2NMX_SE_Plus/", NULL), B("ASUS", "M2NPV-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL), @@ -649,7 +649,7 @@ B("ASUS", "M4N68T V2", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4N68T_V2/", NULL), B("ASUS", "M4N78 PRO", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL), B("ASUS", "M4N78 SE", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_SE/", NULL), - B("ASUS", "M5A78L-M LX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A78LM_LX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see http://www.flashrom.org/pipermail/flashrom/2012-May/009200.html"), + B("ASUS", "M5A78L-M LX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A78LM_LX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see https://flashrom.org/pipermail/flashrom/2012-May/009200.html"), B("ASUS", "M5A97 (rev. 1.0)", OK, "http://www.asus.com/Motherboard/M5A97/", NULL), B("ASUS", "M5A99X EVO", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL), B("ASUS", "Maximus IV Extreme", BAD, "http://www.asus.com/Motherboards/Intel_Socket_1155/Maximus_IV_Extreme/", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -716,12 +716,12 @@ B("ASUS", "P5PE-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL), B("ASUS", "P5QPL-AM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL), B("ASUS", "P5VD1-X", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL), - B("ASUS", "P5VD2-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD2MX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see http://www.flashrom.org/pipermail/flashrom/2012-March/009014.html"), + B("ASUS", "P5VD2-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD2MX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see https://flashrom.org/pipermail/flashrom/2012-March/009014.html"), B("ASUS", "P6T SE", OK, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL), B("ASUS", "P6T Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL), B("ASUS", "P6T Deluxe V2", OK, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL), B("ASUS", "P7H57D-V EVO", OK, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL), - B("ASUS", "P7H55-M LX", BAD, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"), + B("ASUS", "P7H55-M LX", BAD, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see https://flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"), B("ASUS", "P8B-E/4L", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8B WS", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8B75-M LE", BAD, NULL, "Probing works (2x 8192 kB via hwseq), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -789,7 +789,7 @@ B("Elitegroup", "P6VAP-A+", OK, NULL, NULL), B("Elitegroup", "RS485M-M", OK, NULL, NULL), B("Emerson", "ATCA-7360", OK, "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Pro...", NULL), - B("EPoX", "EP-3PTA", BAD, NULL, "Missing board enable (W83627HF/F/HG/G), see http://www.flashrom.org/pipermail/flashrom/2012-April/009043.html"), + B("EPoX", "EP-3PTA", BAD, NULL, "Missing board enable (W83627HF/F/HG/G), see https://flashrom.org/pipermail/flashrom/2012-April/009043.html"), B("EPoX", "EP-8K5A2", OK, "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL), B("EPoX", "EP-8NPA7I", OK, "http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL), B("EPoX", "EP-8RDA3+", OK, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL), @@ -888,24 +888,24 @@ B("HP", "Vectra VL400", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c0006...", NULL), B("HP", "Vectra VL420 SFF", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c0006...", NULL), B("HP", "xw4400 (0A68h)", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c0077...", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"), - B("HP", "xw6400", BAD, NULL, "No chip found, see http://www.flashrom.org/pipermail/flashrom/2012-March/009006.html"), - B("HP", "xw9300", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&...", "Missing board enable, see http://www.flashrom.org/pipermail/flashrom/2012-February/008862.html"), + B("HP", "xw6400", BAD, NULL, "No chip found, see https://flashrom.org/pipermail/flashrom/2012-March/009006.html"), + B("HP", "xw9300", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&...", "Missing board enable, see https://flashrom.org/pipermail/flashrom/2012-February/008862.html"), B("HP", "xw9400", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&...", "Boot block is write protected unless the solder points next to F2 are shorted."), - B("HP", "Z400 Workstation (0AE4h)", BAD, NULL, "ICH10R with BIOS lock enable and a protected range PRBAD, see http://www.flashrom.org/pipermail/flashrom/2012-June/009350.html"), + B("HP", "Z400 Workstation (0AE4h)", BAD, NULL, "ICH10R with BIOS lock enable and a protected range PRBAD, see https://flashrom.org/pipermail/flashrom/2012-June/009350.html"), B("IBASE", "MB899", OK, "http://www.ibase-i.com.tw/2009/mb899.html", NULL), B("IBM", "x3455", OK, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL), B("IEI", "PICOe-9452", OK, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&a...", NULL), B("Intel", "D201GLY", OK, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL), B("Intel", "D2700MUD", BAD, "http://www.intel.com/cd/products/services/emea/eng/motherboards/desktop/D270...", "SMM protection enabled"), - B("Intel", "D425KT", BAD, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/des...", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"), + B("Intel", "D425KT", BAD, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/des...", "NM10 with SPI lock down, BIOS lock, see https://flashrom.org/pipermail/flashrom/2012-January/008600.html"), B("Intel", "D865GLC", BAD, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"), B("Intel", "D945GCNL", OK, NULL, NULL), B("Intel", "DG45ID", BAD, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.ht...", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("Intel", "DQ965GF", BAD, NULL, "Probing enables Hardware Sequencing (behind that hides a SST SST25VF016B, 2048 kB). Parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked (and the platform data region seems to be bogus)."), B("Intel", "DG965OT", BAD, NULL, "Probing enables Hardware Sequencing (behind that hides a SST SST25VF080B, 1024 kB). Parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked (and the platform data region seems to be bogus)."), - B("Intel", "DH61AG ", BAD, NULL, "H61 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2012-June/009417.html"), - B("Intel", "DH67CF", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"), - B("Intel", "DH67CL", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html"), + B("Intel", "DH61AG ", BAD, NULL, "H61 with BIOS lock enable and locked ME region, see https://flashrom.org/pipermail/flashrom/2012-June/009417.html"), + B("Intel", "DH67CF", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see https://flashrom.org/pipermail/flashrom/2011-September/007789.html"), + B("Intel", "DH67CL", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see https://flashrom.org/pipermail/flashrom/2012-November/010112.html"), B("Intel", "DN2800MT (Marshalltown)", BAD, NULL, "BIOS locked via BIOS_CNTL."), B("Intel", "DQ45CB", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Intel", "DQ77MK", BAD, NULL, "Q77 with BIOS lock enable and locked ME region, see http://paste.flashrom.org/view.php?id=1603"), @@ -972,13 +972,13 @@ B("MSI", "MS-7548 (Aspen-GL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&...", NULL), B("MSI", "MS-7551 (KA780G)", OK, "http://www.msi.com/product/mb/KA780G.html", NULL), B("MSI", "MS-7596 (785GM-E51)", OK, "http://www.msi.com/product/mb/785GM-E51.html", NULL), - B("MSI", "MS-7597 (GF615M-P33)", BAD, NULL, "Missing board enable/SIO support (Fintek F71889), see http://www.flashrom.org/pipermail/flashrom/2012-March/008956.html"), + B("MSI", "MS-7597 (GF615M-P33)", BAD, NULL, "Missing board enable/SIO support (Fintek F71889), see https://flashrom.org/pipermail/flashrom/2012-March/008956.html"), B("MSI", "MS-7599 (870-C45)", OK, "http://www.msi.com/product/mb/870-C45.html", NULL), B("MSI", "MS-7613 (Iona-GL8E)", BAD, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&...", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("MSI", "MS-7635 (H55M-ED55)", BAD, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("MSI", "MS-7640 (890FXA-GD70)",OK, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL), B("MSI", "MS-7642 (890GXM-G65)", OK, "http://www.msi.com/product/mb/890GXM-G65.html", NULL), - B("MSI", "MS-7676 (H67MA-ED55(B3))", OK, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"), + B("MSI", "MS-7676 (H67MA-ED55(B3))", OK, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See https://flashrom.org/pipermail/flashrom/2012-January/008547.html"), B("MSI", "MS-7676 (Z68MA-G45 (B3))", OK, "http://www.msi.com/product/mb/Z68MA-G45--B3-.html", NULL), B("MSI", "MS-7696 (A75MA-G55)", OK, "http://www.msi.com/product/mb/A75MA-G55.html", NULL), B("MSI", "MS-7698 (E350IA-E45)", OK, "http://www.msi.com/product/mb/E350IA-E45.html", NULL), @@ -1133,11 +1133,11 @@ B("Clevo", "P150HM", BAD, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Dell", "Inspiron 1420", OK, NULL, NULL), B("Dell", "Latitude CPi A366XT", BAD, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."), - B("Dell", "Vostro 3700", BAD, NULL, "Locked ME, see http://www.flashrom.org/pipermail/flashrom/2012-May/009197.html."), - B("Dell", "Latitude E6520", BAD, NULL, "Locked ME, see http://www.flashrom.org/pipermail/flashrom/2012-June/009420.html."), + B("Dell", "Vostro 3700", BAD, NULL, "Locked ME, see https://flashrom.org/pipermail/flashrom/2012-May/009197.html."), + B("Dell", "Latitude E6520", BAD, NULL, "Locked ME, see https://flashrom.org/pipermail/flashrom/2012-June/009420.html."), B("Elitegroup", "A928", OK, NULL, "Bootsector is locked and needs to be skipped with a layout file (writeable address range is 00000000:0003bfff)."), B("HP/Compaq", "EliteBook 8560p", BAD, NULL, "SPI lock down, SMM protection, PR in BIOS region, read-only descriptor, locked ME region."), - B("HP/Compaq", "nx9005", BAD, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"), + B("HP/Compaq", "nx9005", BAD, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. https://flashrom.org/pipermail/flashrom/2010-May/003321.html"), B("HP/Compaq", "nx9010", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc...", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."), B("IBM/Lenovo", "ThinkPad T40p", BAD, "http://www.thinkwiki.org/wiki/Category:T40p", NULL), B("IBM/Lenovo", "ThinkPad T420", BAD, "http://www.thinkwiki.org/wiki/Category:T420", "Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs) and ME is locked. Also, a Protected Range is locking the top range of the BIOS region (presumably the boot block)."),