Hi,
I was looking at Intel ICH SPI specs, and saw that there are a few registers on hardware sequencing. I was hence thinking on the feasibility of hardware sequencing.
But then I saw that for hardware sequencing, I cannot find any registers where I can input opcodes like reading/writing to status registers. This is unlike software sequencing, where there is actually pre-op (06h) and other opcodes like 01h (writing status register) and 05h (reading status register).
So I was thinking if the host CPU/Bios Master can actually still do flashing of the Bios itself using hardware sequencing, without the need of pre-op such as 06h?
Thanks!
Date: Tue, 30 Mar 2010 03:19:00 +0200 From: c-d.hailfinger.devel.2006@gmx.net To: btwvolcano@live.com CC: flashrom@flashrom.org Subject: Re: [flashrom] Hardware Sequencing vs Software Sequencing
Hi John,
On 30.03.2010 02:47, john warwick wrote:
I was looking through the code, and see that flashrom is using software sequencing. Is there any reason for software sequencing to be chosen instead of hardware sequencing?
Assuming that you're talking about the Intel ICH SPI code, here's the info I have: Yes, there are multiple reasons why hardware sequencing is not supported:
- You can't reflash the complete chip, just the region for the current
(BIOS) descriptor.
- You're unable to read the whole chip.
- If you exchange the flash chip, write/erase may fail in random ways.
- Crossflashing/hotflashing is pretty much impossible.
- Nobody implemented it.
Are there any restrictions imposed for hardware sequencing?
Please see above.
Of course, if you're willing to contribute code for ICH SPI hardware sequencing, we'll be glad to review and merge it. Please be warned that this is a rather difficult task, especially because flashrom assumes that a flash chip can be accessed in full and you'll either have to emulate this or change flashrom safety checks and code flow in a few strategic places.
Regards, Carl-Daniel
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