On Sat, Dec 05, 2009 at 10:13:51AM +0100, Maciej Pijanka wrote:
--- chipset_enable.c (revision 791) +++ chipset_enable.c (working copy) @@ -270,6 +270,8 @@ uint16_t old, new; uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */
buses_supported = CHIP_BUSTYPE_PARALLEL;
old = pci_read_word(dev, xbcs);
/* Set bit 9: 1-Meg Extended BIOS Enable (PCI master accesses to
ping? I hoped this is enough trivial to be applied without long review procedure.
I checked the PIIX* datasheets and didn't see any signs of LPC or FWH (definately no SPI) in there, as expected.