[flashrom] [commit] r1043 - trunk

[repository service]

Author: mkarcher
Date: Sun Jun 13 12:16:12 2010
New Revision: 1043
URL: http://flashrom.org/trac/coreboot/changeset/1043

Log:
VIA: disable byte merging

All mentioned north bridges have been checked against data sheet. That's
all north bridges google found a datasheet for with "byte merge" included.

Runs multiple chipset enables if the first one requests further enables to
be run.

VIA byte-merging logic tested: works.
multiple chipset logic: completely untested

Signed-off-by: Michael Karcher 
Acked-by: Carl-Daniel Hailfinger

Modified:
   trunk/chipset_enable.c

Modified: trunk/chipset_enable.c
==============================================================================
--- trunk/chipset_enable.c	Sun Jun 13 01:14:03 2010	(r1042)
+++ trunk/chipset_enable.c	Sun Jun 13 12:16:12 2010	(r1043)
@@ -37,6 +37,8 @@

#if defined(__i386__) || defined(__x86_64__)

+#define NOT_DONE_YET 1
+
 static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
 {
    uint8_t tmp;
@@ -642,6 +644,32 @@
    return enable_flash_ich_dc_spi(dev, name, 10);
 }

+static void via_do_byte_merge(void * arg)
+{
+	struct pci_dev * dev = arg;
+	uint8_t val;
+
+	msg_pdbg("Re-enabling byte merging\n");
+	val = pci_read_byte(dev, 0x71);
+	val |= 0x40;
+	pci_write_byte(dev, 0x71, val);
+}
+
+static int via_no_byte_merge(struct pci_dev *dev, const char *name)
+{
+	uint8_t val;
+
+	val = pci_read_byte(dev, 0x71);
+	if (val & 0x40)
+	{
+		msg_pdbg("Disabling byte merging\n");
+		val &= ~0x40;
+		pci_write_byte(dev, 0x71, val);
+		register_shutdown(via_do_byte_merge, dev);
+	}
+	return NOT_DONE_YET;	/* need to find south bridge, too */
+}
+
 static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
 {
    uint8_t val;
@@ -1420,6 +1448,14 @@
    {0x1039, 0x0746, NT, "SiS", "746",		enable_flash_sis540},
    {0x1039, 0x0748, NT, "SiS", "748",		enable_flash_sis540},
    {0x1039, 0x0755, NT, "SiS", "755",		enable_flash_sis540},
+	/* VIA northbridges */
+	{0x1106, 0x0585, NT, "VIA", "VT82C585VPX",	via_no_byte_merge},
+	{0x1106, 0x0595, NT, "VIA", "VT82C595",		via_no_byte_merge},
+	{0x1106, 0x0597, NT, "VIA", "VT82C597",		via_no_byte_merge},
+	{0x1106, 0x0691, NT, "VIA", "VT82C69x",		via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */
+	{0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A",	via_no_byte_merge},
+	{0x1106, 0x8601, NT, "VIA", "VT8601T",		via_no_byte_merge},
+	/* VIA southbridges */
    {0x1106, 0x8324, OK, "VIA", "CX700",		enable_flash_vt823x},
    {0x1106, 0x8231, NT, "VIA", "VT8231",		enable_flash_vt823x},
    {0x1106, 0x3074, NT, "VIA", "VT8233",		enable_flash_vt823x},
@@ -1446,11 +1482,16 @@
    for (i = 0; chipset_enables[i].vendor_name != NULL; i++) {
    	dev = pci_dev_find(chipset_enables[i].vendor_id,
    			   chipset_enables[i].device_id);
-		if (dev)
-			break;
-	}
-
-	if (dev) {
+		if (!dev)
+			continue;
+		if (ret != -2) {
+			msg_pinfo("WARNING: unexpected second chipset match: "
+			       ""%s %s"\nignoring, please report lspci and "
+			       "board URL to [e-mail]!\n",
+				chipset_enables[i].vendor_name,
+					chipset_enables[i].device_name);
+			continue;
+		}
    	msg_pinfo("Found chipset "%s %s", enabling flash write... ",
    	       chipset_enables[i].vendor_name,
    	       chipset_enables[i].device_name);
@@ -1460,11 +1501,15 @@

ret = chipset_enables[i].doit(dev,
    				      chipset_enables[i].device_name);
-		if (ret)
+		if (ret == NOT_DONE_YET) {
+			ret = -2;
+			msg_pinfo("OK - searching further chips.\n");
+		} else if (ret < 0)
    		msg_pinfo("FAILED!\n");
-		else
+		else if(ret == 0)
    		msg_pinfo("OK.\n");
    }
+
    msg_pinfo("This chipset supports the following protocols: %s.\n",
           flashbuses_to_text(buses_supported));