It is extremely unlikely that a chip not requiring delays in probe does require them in erase. We observed unreliable erasing with a SST49LF004A with these delays, so remove them if the are not required.
Signed-off-by: Michael Karcher flashrom@mkarcher.dialup.fu-berlin.de --- jedec.c | 33 +++++++++++++++++++++------------ 1 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/jedec.c b/jedec.c index 199c64d..822de88 100644 --- a/jedec.c +++ b/jedec.c @@ -242,21 +242,24 @@ static int erase_sector_jedec_common(struct flashchip *flash, unsigned int page, unsigned int pagesize, unsigned int mask) { chipaddr bios = flash->virtual_memory; + int delay_us = 10; + if(flash->probe_timing != TIMING_ZERO) + delay_us = 0;
/* Issue the Sector Erase command */ chip_writeb(0xAA, bios + (0x5555 & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x55, bios + (0x2AAA & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x80, bios + (0x5555 & mask)); - programmer_delay(10); + programmer_delay(delay_us);
chip_writeb(0xAA, bios + (0x5555 & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x55, bios + (0x2AAA & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x30, bios + page); - programmer_delay(10); + programmer_delay(delay_us);
/* wait for Toggle bit ready */ toggle_ready_jedec_slow(bios); @@ -272,6 +275,9 @@ static int erase_block_jedec_common(struct flashchip *flash, unsigned int block, unsigned int blocksize, unsigned int mask) { chipaddr bios = flash->virtual_memory; + int delay_us = 10; + if(flash->probe_timing != TIMING_ZERO) + delay_us = 0;
/* Issue the Sector Erase command */ chip_writeb(0xAA, bios + (0x5555 & mask)); @@ -302,21 +308,24 @@ static int erase_chip_jedec_common(struct flashchip *flash, unsigned int mask) { int total_size = flash->total_size * 1024; chipaddr bios = flash->virtual_memory; + int delay_us = 10; + if(flash->probe_timing != TIMING_ZERO) + delay_us = 0;
/* Issue the JEDEC Chip Erase command */ chip_writeb(0xAA, bios + (0x5555 & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x55, bios + (0x2AAA & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x80, bios + (0x5555 & mask)); - programmer_delay(10); + programmer_delay(delay_us);
chip_writeb(0xAA, bios + (0x5555 & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x55, bios + (0x2AAA & mask)); - programmer_delay(10); + programmer_delay(delay_us); chip_writeb(0x10, bios + (0x5555 & mask)); - programmer_delay(10); + programmer_delay(delay_us);
toggle_ready_jedec_slow(bios);