Hi Matthias,
I'm sorry, I forgot to CC you.
On 15.09.2010 11:38, Carl-Daniel Hailfinger wrote:
New version, fixes a variable misuse found by Uwe. Thanks for the review.
AMD SB700 and later have an integrated microcontroller (IMC) which runs from shared flash. The IMC will happily issue reads while we write, issue writes while we read, and generally cause lots of havoc due to the concurrent accesses it performs while flashrom is running. A failing or corrupted read can be detected since r1145, and the worst case is that the read aborts and the user has to retry. A failing write is much more serious. It can be detected since r1145, but if the SPI interface locks up, we can't continue writing nor can we read the current chip contents.
If the IMC is inactive, there is no reason to worry. If the IMC is active, flashrom will refuse to erase/write the chip with this patch.
The correct fix would be to stop the IMC during flashing, but apparently the relevant registers are undocumented, so we take the safe route for now until someone from AMD can give us more info.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Patch at http://patchwork.coreboot.org/patch/1946/
Could you please reply with a full log from "flashrom -V -r foo.rom" and if the log says "Disabling write.", please also reply with either
Tested-by: Your name your@email
or
Acked-by: Your name your@email
The Tested-by statement is for pure tests, and if you have reviewed the code, feel free to use Acked-by.
Regards, Carl-Daniel