[flashrom] Re: Uprgrae SPIROM for Skylake-D platform

[HubertLin]

Hi David,

Flashrom upgrade full log as below, may you please guide me how should I do? Thank you.

root@ubuntu:~/hubert/bios# ./flashrom -p internal:boardmismatch=force -l allregion.xml -i bios -w Lightning_R01.0.9_test.bin -c W25Q256.V -V -N
flashrom v1.2-55-gc7e9a6e-dirty on Linux 4.15.18 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

flashrom was built with libpci 3.5.2, GCC 7.4.0, little endian
Command line (12 args): ./flashrom -p internal:boardmismatch=force -l allregion.xml -i bios -w Lightning_R01.0.9_test.bin -c W25Q256.V -V -N
romlayout 00000000 - 01ffffff named bios
Using region: "bios".
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Initializing internal programmer
/sys/class/mtd/mtd0 does not exist
No coreboot table found.
Using Internal DMI decoder.
DMI string chassis-type: "Desktop"
DMI string system-manufacturer: "Ufi Space"
DMI string system-product-name: "Default string"
DMI string system-version: "Default string"
DMI string baseboard-manufacturer: "Ufi Space"
DMI string baseboard-product-name: "Default string"
DMI string baseboard-version: "Default string"
Found chipset "Intel C620 Series Chipset (QS/PRQ)" with PCI ID 8086:a1c8.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom *and* were (not) able to successfully update your firmware with it,
then please email a report to [e-mail] including a verbose (-V) log.
Thank you!
Enabling flash write... BIOS_SPI_BC = 0x888: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x0 (SPI)
Top Swap: not enabled
SPI Read Configuration: prefetching enabled, caching enabled,
BIOS_CNTL = 0x89: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
SPIBAR = 0x00007fb8e4b4a000 (phys = 0xfe010000)
0x04: 0x6800 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, SCIP=0, PRR34_LOCKDN=0, WRSDIS=1, FDOPSS=1, FDV=1, FLOCKDN=0
Programming OPCODES... done
0x06: 0x0010 (HSFC)
HSFC: FGO=0, HSFC=8, WET=0, FDBC=0, SME=0
0x0c: 0x00000000 (DLOCK)
DLOCK: BMWAG_LOCKDN=0, BMRAG_LOCKDN=0, SBMWAG_LOCKDN=0, SBMRAG_LOCKDN=0,
       PR0_LOCKDN=0, PR1_LOCKDN=0, PR2_LOCKDN=0, PR3_LOCKDN=0, PR4_LOCKDN=0,
       SSEQ_LOCKDN=0
0x50: 0x00005edf (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x5e, BRRA 0xdf
0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
0x58: 0x1fff1000 FREG1: BIOS region (0x01000000-0x01ffffff) is read-write.
0x5C: 0x0a350001 FREG2: Management Engine region (0x00001000-0x00a35fff) is read-write.
0x80: 0x0fef0a36 FREG11: unknown region (0x00a36000-0x00feffff) has unknown permissions.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
0xa0: 0xc0 (SSFS)
SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
0xa1: 0xfe0000 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=6
0xa4: 0x5006     (PREOP)
0xa6: 0x463b     (OPTYPE)
0xa8: 0x05200302 (OPMENU)
0xac: 0xc79f0190 (OPMENU+4)
0xc4: 0xf1d82084 (LVSCC)
LVSCC: BES=0x0, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1
0xc8: 0x00002000 (UVSCC)
UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x20
OK.
The following protocols are supported: Parallel, LPC, FWH, SPI.
Probing for Winbond W25Q256.V, 32768 kB: probe_spi_rdid_generic: id1 0xf7, id2 0xa00c
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
Restoring MMIO space at 0x7fb8e4b4a0ac
Restoring MMIO space at 0x7fb8e4b4a0a8
Restoring MMIO space at 0x7fb8e4b4a0a6
Restoring MMIO space at 0x7fb8e4b4a0a4
Restoring PCI config space for 00:1f:5 reg 0xdc

Thank you
BR, Hubert.lin

-----Original Message-----
From: David Hendricks [mailto:[e-mail]] 
Sent: Wednesday, June 03, 2020 5:30 AM
To: HubertLin
Cc: flashrom
Subject: Re: [flashrom] Uprgrae SPIROM for Skylake-D platform

Hello Hubert,
There was some discussion about Skylake-D a few months ago:
https://www.mail-archive.com/[e-mail]/msg14426.html .
There were some PCI IDs which were added
(https://review.coreboot.org/c/flashrom/+/39780) after flashrom-v1.2

The problems you describe are strange, indeed... Can send a verbose log using `-V`? The W25Q256JVFIQ is also in the table already (as W25Q256.V), so I'm curious why you needed to add another chip entry.

On Mon, Jun 1, 2020 at 5:10 PM HubertLin  wrote:
> Hi,
>
> I would like to use flashrom to upgrade BIOS on Skylake-D platform.
>
> I have done some work to unlock ME and fill W25Q256JVFIQ table in flashschips.c.
>
> But there still have some opcode problem.
>
> Have you try flashrom on Skylake-D platform before?
>
> Is there any temporary patch for Skylake-D platform after v1.2 version.
>
> I would like to try it, may you please help me?
>
> The problem I meet as below,
> ich_spi_send_command: Internal command size error for opcode 0xe9, got writecnt=1, want >=4
>
> Probing for Winbond W25Q256JVFIQ, 32768 kB: Invalid OPCODE 0x9f, will not execut
>
> Probing for Winbond W25Q256JVFIQ, 32768 kB: probe_spi_rdid_generic: id1 0xf7, id
>
>
>
> Thank you
>
> BR, Hubert.lin
>
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