Boris,
I moved this discussion under another more appropriate subject as it is no more related to the original "Support for 4-bytes addressing".
Flashrom is slow because read and erase operations are written very slow now. They could be easily changed to become faster in times or in 10s of times. Probably I'll do this later. This should be another patch.
I'll try to describe where these issues are...
The read issue is in spi_read_chunked. There is a loop that reads data by pages (normally by 256 bytes). So, to read 32 MB flash we'll send 131k read commands with 3-7 ms wait for each.
Everything you say is true and optimizations you propose would be very helpful, but the main question is - what introduces this 3-7ms delays. That is NOT flashrom, nor it is libfti, nor libusb. The flash chips also don't seem to require millisecond delays for READ/READ4B commands.
I guess I know the reason and you are right in blaming 256-byte reads. The delay is introduced by USB itself as transactions happen in time slots. It is indeed needed to make flashrom fill the USB transaction buffer as much as possible before executing the transaction. FT2232H supports in MPSSE mode up to 64K of commands/data.
With best regards - Alexander Amelkin, T-Platforms [http://www.t-platforms.com]