Signed-off-by: Aidan Thornton makosoft@gmail.com Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at ---
granularity handling is undecided yet... rest pretty much is ready IMHO. FIXME: commit log
Makefile | 2 +- at45db.c | 465 +++++++++++++++++++++++++++++++++++++++++++++++++++++ chipdrivers.h | 12 ++ flashchips.c | 303 +++++++++++++++++++++++++++++----- flashchips.h | 3 + serprog.c | 3 +- spi25_statusreg.c | 2 +- 7 files changed, 742 insertions(+), 48 deletions(-) create mode 100644 at45db.c
diff --git a/Makefile b/Makefile index b948996..a1cb2ae 100644 --- a/Makefile +++ b/Makefile @@ -297,7 +297,7 @@ endif CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ - opaque.o sfdp.o en29lv640b.o + opaque.o sfdp.o en29lv640b.o at45db.o
############################################################################### # Library code. diff --git a/at45db.c b/at45db.c new file mode 100644 index 0000000..9dd6fce --- /dev/null +++ b/at45db.c @@ -0,0 +1,465 @@ +/* + * Support for Atmel AT45DB series DataFlash chips. + * This file is part of the flashrom project. + * + * Copyright (C) 2012 Aidan Thornton + * Copyright (C) 2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <stdbool.h> +#include "flash.h" +#include "chipdrivers.h" +#include "programmer.h" +#include "spi.h" + +/* Status register bits */ +#define AT45DB_READY (1<<7) +#define AT45DB_CMP (1<<6) +#define AT45DB_PROT (1<<1) +#define AT45DB_POWEROF2 (1<<0) + +/* Opcodes */ +#define AT45DB_STATUS 0xD7 /* NB: this is a block erase command on most other chips(!). */ +#define AT45DB_DISABLE_PROTECT 0x3D, 0x2A, 0x7F, 0x9A +#define AT45DB_READ_PROTECT 0x32 +#define AT45DB_READ_LOCKDOWN 0x35 +#define AT45DB_PAGE_ERASE 0x81 +#define AT45DB_BLOCK_ERASE 0x50 +#define AT45DB_SECTOR_ERASE 0x7C +#define AT45DB_CHIP_ERASE 0xC7 +#define AT45DB_CHIP_ERASE_ADDR 0x94809A /* Magic address. See usage. */ +#define AT45DB_BUFFER1_WRITE 0x84 +#define AT45DB_BUFFER1_PAGE_PROGRAM 0x88 +/* Buffer 2 is unused yet. +#define AT45DB_BUFFER2_WRITE 0x87 +#define AT45DB_BUFFER2_PAGE_PROGRAM 0x89 +*/ + +static uint8_t at45db_read_status_register(struct flashctx *flash, uint8_t *status) +{ + static const uint8_t cmd[] = { AT45DB_STATUS }; + + int ret = spi_send_command(flash, sizeof(cmd), 1, cmd, status); + if (ret != 0) + msg_cerr("Reading the status register failed!\n"); + else + msg_cspew("Status register: 0x%02x.\n", *status); + return ret; +} + +int spi_disable_blockprotect_at45db(struct flashctx *flash) +{ + static const uint8_t cmd[4] = { AT45DB_DISABLE_PROTECT }; /* NB: 4 bytes magic number */ + int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (ret != 0) { + msg_cerr("Sending disable lockdown failed!\n"); + return ret; + } + uint8_t status; + ret = at45db_read_status_register(flash, &status); + if (ret != 0 || ((status & AT45DB_PROT) != 0)) { + msg_cerr("Disabling lockdown failed!\n"); + return 1; + } + + return 0; +} + +static unsigned int at45db_get_sector_count(struct flashctx *flash) +{ + unsigned int i, j; + unsigned int cnt = 0; + for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { + if (flash->chip->block_erasers[i].block_erase == &spi_erase_at45db_sector) { + for (j = 0; j < NUM_ERASEREGIONS; j++) { + cnt += flash->chip->block_erasers[i].eraseblocks[j].count; + } + } + } + msg_cspew("%s: number of sectors=%u\n", __func__, cnt); + return cnt; +} + +/* Reads and prettyprints protection/lockdown registers. + * Some elegance of the printouts had to be cut down a bit to share this code. */ +static uint8_t at45db_prettyprint_protection_register(struct flashctx *flash, uint8_t opcode, const char *regname) +{ + const uint8_t cmd[] = { opcode, 0, 0, 0 }; + /* The first two sectors share the first result byte. */ + uint8_t buf[at45db_get_sector_count(flash) - 1]; + + int ret = spi_send_command(flash, sizeof(cmd), sizeof(buf), cmd, buf); + if (ret != 0) { + msg_cerr("Reading the %s register failed!\n", regname); + return ret; + } + + unsigned int i; + for (i = 0; i < sizeof(buf); i++) { + if (buf[i] != 0x00) + break; + if (i == sizeof(buf) - 1) { + msg_cdbg("No Sector is %sed.\n", regname); + return 0; + } + } + + /* FIXME: print which addresses are mapped to (un)locked sectors. */ + msg_cdbg("Sector 0a is %s%sed.\n", ((buf[0] & 0xC0) == 0x00) ? "un" : "", regname); + msg_cdbg("Sector 0b is %s%sed.\n", ((buf[0] & 0x30) == 0x00) ? "un" : "", regname); + for (i = 1; i < sizeof(buf); i++) + msg_cdbg("Sector %2u is %s%sed.\n", i, (buf[i] == 0x00) ? "un" : "", regname); + + return 0; +} + +/* bit 7: busy flag + * bit 6: memory/buffer compare result + * bit 5-2: density (encoding see below) + * bit 1: protection enabled (soft or hard) + * bit 0: "power of 2" page size indicator (e.g. 1 means 256B; 0 means 264B) + * + * 5-2 encoding: bit 2 is always 1, bits 3-5 encode the density as "2^(bits - 1)" in Mb e.g.: + * AT45DB161D 1011 16Mb */ +int spi_prettyprint_status_register_at45db(struct flashctx *flash) +{ + uint8_t status; + if (at45db_read_status_register(flash, &status) != 0) { + return 1; + } + + msg_cdbg("Chip status register is 0x%02x\n", status); + msg_cdbg("Chip status register: Bit 7 / Ready is %sset\n", (status & AT45DB_READY) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 / Compare match is %sset\n", (status & AT45DB_CMP) ? "" : "not "); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + spi_prettyprint_status_register_bit(status, 3); + spi_prettyprint_status_register_bit(status, 2); + const uint8_t dens = (status >> 3) & 0x7; /* Bit 2 is always 1, we use the other bits only */ + msg_cdbg("Chip status register: Density is %u Mb\n", 1 << (dens - 1)); + msg_cdbg("Chip status register: Bit 1 / Protection is %sset\n", (status & AT45DB_PROT) ? "" : "not "); + msg_cdbg("Chip status register: Bit 0 / "Power of 2" is %sset\n", + (status & AT45DB_POWEROF2) ? "" : "not "); + if (status & AT45DB_PROT) { + at45db_prettyprint_protection_register(flash, AT45DB_READ_PROTECT, "protect"); + } + if (strcmp(flash->chip->name, "AT45DB321C") != 0) + at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock"); + return 0; +} + +/* Probe function for AT45DB* chips that support multiple page sizes. */ +int probe_spi_at45db(struct flashctx *flash) +{ + uint8_t status; + struct flashchip *chip = flash->chip; + + if (!probe_spi_rdid(flash)) + return 0; + + /* Some AT45DB* chips support two different page sizes each (e.g. 264 and 256 B). In order to tell which + * page size this chip has we need to read the status register. */ + if (at45db_read_status_register(flash, &status) != 0) + return 0; + + /* We assume the dataflash's default of non-power-of-2 page sizes and adjust the chip attributes in + * case this is not the case. */ + if ((status & AT45DB_POWEROF2) == 0) { + chip->total_size = (chip->total_size / 32) * 33; + chip->page_size = (chip->page_size / 32) * 33; + + unsigned int i, j; + for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { + struct block_eraser *eraser = &chip->block_erasers[i]; + for (j = 0; j < NUM_ERASEREGIONS; j++) { + eraser->eraseblocks[j].size = (eraser->eraseblocks[j].size / 32) * 33; + } + } + //FIXME - this is wrong for 528-byte etc blocks + flash->chip->gran = write_gran_264bytes; + } else + flash->chip->gran = write_gran_256bytes; + + msg_cdbg2("%s: total size %i kB, page size %i B\n", __func__, chip->total_size * 1024, chip->page_size); + + return 1; +} + +/* Returns the minimum number of bits needed to represent the given address. + * FIXME: use mind-blowing implementation. + * FIXME: move to utility module. */ +static uint32_t address_to_bits(uint32_t addr) +{ + unsigned int lzb = 0; + while (((1 << (31 - lzb)) & ~addr) != 0) + lzb++; + return 32 - lzb; +} + +/* In case of non-power-of-two page sizes we need to convert the address flashrom uses to the address the + * DataFlash chips use. The latter uses a segmented address space where the page address is encoded in the + * more significant bits and the offset within the page is encoded in the less significant bits. The exact + * partition depends on the page size. + */ +static unsigned int at45db_convert_addr(unsigned int addr, unsigned int page_size) +{ + unsigned int page_bits = address_to_bits(page_size - 1); + unsigned int at45db_addr = ((addr / page_size) << page_bits) | (addr % page_size); + msg_cspew("%s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x\n", + __func__, addr, page_size, page_bits, at45db_addr); + return at45db_addr; +} + +int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + if ((addr + len) > total_size) { + msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", + __func__, addr, len, total_size); + return 1; + } + + /* We have to split this up into chunks to fit within the programmer's read size limit, but those + * chunks can cross page boundaries. */ + const unsigned int max_data_read = flash->pgm->spi.max_data_read; + const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; + while (addr < len) { + unsigned int chunk = min(max_chunk, len); + int ret = spi_nbyte_read(flash, at45db_convert_addr(addr, page_size), buf + addr, chunk); + if (ret) { + msg_cerr("%s: error sending read command!\n", __func__); + return ret; + } + addr += chunk; + } + + return 0; +} + +/* Returns 0 when ready, 1 on errors and timeouts. */ +static int at45db_wait_ready (struct flashctx *flash, unsigned int us, unsigned int retries) +{ + while (true) { + uint8_t status; + int ret = at45db_read_status_register(flash, &status); + if ((status & AT45DB_READY) == AT45DB_READY) + return 0; + if (ret != 0 || retries-- == 0) + return 1; + programmer_delay(us); + } +} + +static int at45db_erase(struct flashctx *flash, uint8_t opcode, unsigned int at45db_addr, unsigned int stepsize, unsigned int retries) +{ + const uint8_t cmd[] = { + opcode, + (at45db_addr >> 16) & 0xff, + (at45db_addr >> 8) & 0xff, + (at45db_addr >> 0) & 0xff, + }; + + /* Send erase command. */ + int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (ret != 0) { + msg_cerr("%s: error sending erase command!\n", __func__); + return ret; + } + + /* Wait for completion. */ + ret = at45db_wait_ready(flash, stepsize, retries); + if (ret != 0) + msg_cerr("%s: chip did not became ready again after sending the erase command!\n", __func__); + + return ret; +} + +int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { + msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); + return 1; + } + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically about 35 ms for completion, so let's wait 100 ms in 500 us steps. */ + return at45db_erase(flash, AT45DB_PAGE_ERASE, at45db_convert_addr(addr, page_size), 500, 200); +} + +int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check blocks not pages + msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); + return 1; + } + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically between 20 and 100 ms for completion, so let's wait 300 ms in 1 ms steps. */ + return at45db_erase(flash, AT45DB_BLOCK_ERASE, at45db_convert_addr(addr, page_size), 1000, 300); +} + +int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check sectors not pages + msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); + return 1; + } + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically about 5 s for completion, so let's wait 20 seconds in 200 ms steps. */ + return at45db_erase(flash, AT45DB_SECTOR_ERASE, at45db_convert_addr(addr, page_size), 200000, 100); +} + +int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically from about 5 to over 60 s for completion, so let's wait 100 s in 500 ms steps. + * NB: the address is not a real address but a magic number. This hack allows to share code. */ + return at45db_erase(flash, AT45DB_CHIP_ERASE, AT45DB_CHIP_ERASE_ADDR, 500000, 200); +} + +static int at45db_fill_buffer1(struct flashctx *flash, uint8_t *bytes, unsigned int off, unsigned int len) +{ + const unsigned int page_size = flash->chip->page_size; + if ((off + len) > page_size) { + msg_cerr("Tried to write %u bytes at offset %u into a buffer of only %u B.\n", + len, off, page_size); + return 1; + } + + /* Create a suitable buffer to store opcode, address and data chunks for buffer1. */ + const unsigned int max_data_write = flash->pgm->spi.max_data_write; + const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ? + max_data_write : page_size; + uint8_t buf[4 + max_chunk]; + + buf[0] = AT45DB_BUFFER1_WRITE; + while (off < page_size) { + unsigned int cur_chunk = min(max_chunk, page_size - off); + buf[1] = (off >> 16) & 0xff; + buf[2] = (off >> 8) & 0xff; + buf[3] = (off >> 0) & 0xff; + memcpy(&buf[4], bytes + off, cur_chunk); + int ret = spi_send_command(flash, 4 + cur_chunk, 0, buf, NULL); + if (ret != 0) { + msg_cerr("%s: error sending buffer write!\n", __func__); + return ret; + } + off += cur_chunk; + } + return 0; +} + +static int at45db_commit_buffer1(struct flashctx *flash, unsigned int at45db_addr) +{ + uint8_t cmd[4]; + cmd[0] = AT45DB_BUFFER1_PAGE_PROGRAM; + cmd[1] = (at45db_addr >> 16) & 0xff; + cmd[2] = (at45db_addr >> 8) & 0xff; + cmd[3] = (at45db_addr >> 0) & 0xff; + + /* Send buffer to device. */ + int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (ret != 0) { + msg_cerr("%s: error sending buffer to main memory command!\n", __func__); + return ret; + } + + /* Wait for completion (typically a few ms). */ + ret = at45db_wait_ready(flash, 250, 200); // 50 ms + if (ret != 0) { + msg_cerr("%s: chip did not became ready again!\n", __func__); + return ret; + } + + return 0; +} + +static int at45db_program_page(struct flashctx *flash, uint8_t *buf, unsigned int at45db_addr) +{ + int ret = at45db_fill_buffer1(flash, buf, 0, flash->chip->page_size); + if (ret != 0) { + msg_cerr("%s: filling the buffer failed!\n", __func__); + return ret; + } + + ret = at45db_commit_buffer1(flash, at45db_addr); + if (ret != 0) { + msg_cerr("%s: committing page failed!\n", __func__); + return ret; + } + + return 0; +} + +int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size; + + if ((start % page_size) != 0 || (len % page_size) != 0) { + msg_cerr("%s: cannot write partial pages: start=%u, len=%u\n", __func__, start, len); + return 1; + } + + if ((start + len) > (total_size * 1024)) { + msg_cerr("%s: tried to write beyond flash boundary: start=%u, len=%u, size=%u\n", + __func__, start, len, total_size); + return 1; + } + + unsigned int i; + for (i = 0; i < len; i += page_size) { + if (at45db_program_page(flash, buf + i, at45db_convert_addr(start + i, page_size)) != 0) { + msg_cerr("Writing page %u failed!\n", i); + return 1; + } + } + return 0; +} diff --git a/chipdrivers.h b/chipdrivers.h index f0223ae..8321c4c 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -61,6 +61,7 @@ int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, /* spi25_statusreg.c */ uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); +void spi_prettyprint_status_register_bit(uint8_t status, int bit); int spi_prettyprint_status_register_plain(struct flashctx *flash); int spi_prettyprint_status_register_default_bp1(struct flashctx *flash); int spi_prettyprint_status_register_default_bp2(struct flashctx *flash); @@ -99,6 +100,17 @@ int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsign int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
+/* at45db.c */ +int probe_spi_at45db(struct flashctx *flash); +int spi_prettyprint_status_register_at45db(struct flashctx *flash); +int spi_disable_blockprotect_at45db(struct flashctx *flash); +int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen); + /* 82802ab.c */ uint8_t wait_82802ab(struct flashctx *flash); int probe_82802ab(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index d4ab1be..f7e7cce 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2255,14 +2255,39 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB011D, - .total_size = 128 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 128 /* or 132, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {256, 512} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 512/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {120 * 256, 1}, + {128 * 256, 3}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ .voltage = {2700, 3600}, },
@@ -2272,14 +2297,39 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB021D, - .total_size = 256 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 256 /* or 264, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {256, 1024} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 1024/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {120 * 256, 1}, + {128 * 256, 7}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ .voltage = {2700, 3600}, },
@@ -2289,15 +2339,40 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB041D, - .total_size = 512 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 512 /* or 528, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, - .voltage = {2500, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ + .block_erasers = + { + { + .eraseblocks = { {256, 2048} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 2048/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {248 * 256, 1}, + {256 * 256, 7}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ + .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ },
{ @@ -2306,14 +2381,39 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB081D, - .total_size = 1024 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 1024 /* or 1056, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {256, 4096} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 4096/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {248 * 256, 1}, + {256 * 256, 15}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ },
@@ -2323,14 +2423,39 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB161D, - .total_size = 2048 /* Size can only be determined from status register */, - .page_size = 512 /* Size can only be determined from status register */, + .total_size = 2048 /* or 2112, determined from status register */, + .page_size = 512 /* or 528, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {512, 4096} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 512, 4096/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 512, 1}, + {248 * 512, 1}, + {256 * 512, 15}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {2048 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ },
@@ -2357,17 +2482,82 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB321D, - .total_size = 4096 /* Size can only be determined from status register */, - .page_size = 512 /* Size can only be determined from status register */, + .total_size = 4096 /* or 4224, determined from status register */, + .page_size = 512 /* or 528, determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {512, 8192} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 512, 8192/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 512, 1}, + {120 * 512, 1}, + {128 * 512, 63}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ + .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ + }, + + { + .vendor = "Atmel", + .name = "AT45DB321E", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT45DB321C, + .total_size = 4096 /* or 4224, determined from status register */, + .page_size = 512 /* or 528, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, - .voltage = {2700, 3600}, + .block_erasers = + { + { + .eraseblocks = { {512, 8192} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 512, 8192/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 512, 1}, + {120 * 512, 1}, + {128 * 512, 63}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, /* has a 2nd status register */ + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ + .voltage = {2500, 3600}, /* 2.3-3.6V & 2.5-3.6V models available */ },
{ @@ -2376,14 +2566,39 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB642D, - .total_size = 8192 /* Size can only be determined from status register */, - .page_size = 1024 /* Size can only be determined from status register */, + .total_size = 8192 /* or 8448, determined from status register */, + .page_size = 1024 /* or 1056, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {1024, 8192} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 1024, 8192/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 1024, 1}, + {248 * 1024, 1}, + {256 * 1024, 31}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {8192 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is asserted. */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* also fast read 0x0B */ .voltage = {2700, 3600}, },
diff --git a/flashchips.h b/flashchips.h index 1a0696f..e965909 100644 --- a/flashchips.h +++ b/flashchips.h @@ -169,6 +169,7 @@ #define ATMEL_AT45DB021A /* No ID available */ #define ATMEL_AT45DB021B /* No ID available */ #define ATMEL_AT45DB021D 0x2300 +#define ATMEL_AT45DB021E /* same as above but with EDI 0x0100 */ #define ATMEL_AT45DB041A /* No ID available */ #define ATMEL_AT45DB041D 0x2400 #define ATMEL_AT45DB081A /* No ID available */ @@ -176,9 +177,11 @@ #define ATMEL_AT45DB161 /* No ID available */ #define ATMEL_AT45DB161B /* No ID available */ #define ATMEL_AT45DB161D 0x2600 +#define ATMEL_AT45DB161E /* same as above but with EDI 0x0100 */ #define ATMEL_AT45DB321 /* No ID available */ #define ATMEL_AT45DB321B /* No ID available */ #define ATMEL_AT45DB321C 0x2700 +#define ATMEL_AT45DB321E /* same as above but with EDI 0x0100 */ #define ATMEL_AT45DB321D 0x2701 /* Buggy data sheet */ #define ATMEL_AT45DB642 /* No ID available */ #define ATMEL_AT45DB642D 0x2800 diff --git a/serprog.c b/serprog.c index c36c93d..946f7a2 100644 --- a/serprog.c +++ b/serprog.c @@ -915,8 +915,7 @@ static int serprog_spi_send_command(struct flashctx *flash, /* FIXME: This function is optimized so that it does not split each transaction * into chip page_size long blocks unnecessarily like spi_read_chunked. This has * the advantage that it is much faster for most chips, but breaks those with - * non-contiguous address space (like AT45DB161D). When spi_read_chunked is - * fixed this method can be removed. */ + * non-continuous reads. When spi_read_chunked is fixed this method can be removed. */ static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { diff --git a/spi25_statusreg.c b/spi25_statusreg.c index c089157..e9cb890 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -230,7 +230,7 @@ static void spi_prettyprint_status_register_bp(uint8_t status, int bp) }
/* Unnamed bits. */ -static void spi_prettyprint_status_register_bit(uint8_t status, int bit) +void spi_prettyprint_status_register_bit(uint8_t status, int bit) { msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); }