Re: [flashrom] [PATCH] Intel 28F001BX fix

[Carl-Daniel Hailfinger]

On 20.03.2010 03:56, Sean Nelson wrote:
> {
>    	.vendor		= "Intel",
>    	.name		= "28F004S5",
>    	.bustype	= CHIP_BUSTYPE_PARALLEL,
>    	.manufacture_id	= INTEL_ID,
>    	.model_id	= E_28F004S5,
>    	.total_size	= 512,
>    	.page_size	= 256,
> .feature_bits	= FEATURE_REGISTERMAP,
> .tested		= TEST_UNTESTED,
> .probe		= probe_82802ab,
> .probe_timing	= TIMING_ZERO,	/* Datasheet has no timing info specified */
> .block_erasers	=
> {
> 	{
> 		.eraseblocks = { {64 * 1024, 8} },
> 		.block_erase = erase_block_82802ab,
> 	},
> },
> .unlock		= unlock_82802ab,

According to my datasheet, 28F004S5 can do locking, but it does _not_
use registers in a separate address space. Besides that, chips on a
Parallel Bus can't do register accesses anyway because the high address
bits are not passed through.

Regards,
Carl-Daniel