Kill global variables, constants and functions if local scope suffices. Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Kill some dead code. Rename global variables with namespace-polluting names.
This is needed for libflashrom.
Some of the const pointer to const changes may be excessive. Comments welcome.
Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: flashrom-explicit_init/flash.h =================================================================== --- flashrom-explicit_init/flash.h (Revision 1066) +++ flashrom-explicit_init/flash.h (Arbeitskopie) @@ -300,7 +300,7 @@ int (*enable) (void); };
-extern struct board_pciid_enable board_pciid_enables[]; +extern const struct board_pciid_enable board_pciid_enables[];
struct board_info { const char *vendor; @@ -335,15 +335,15 @@ const char *vendor_name; const char *device_name; }; -uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs); -uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf); +uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, const struct pcidev_status *devs); +uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, const struct pcidev_status *devs, char *pcidev_bdf); #endif
/* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); #if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 -void print_supported_pcidevs(struct pcidev_status *devs); +void print_supported_pcidevs(const struct pcidev_status *devs); #endif void print_supported_wiki(void);
@@ -463,7 +463,7 @@ int nic3com_shutdown(void); void nic3com_chip_writeb(uint8_t val, chipaddr addr); uint8_t nic3com_chip_readb(const chipaddr addr); -extern struct pcidev_status nics_3com[]; +extern const struct pcidev_status nics_3com[]; #endif
/* gfxnvidia.c */ @@ -472,7 +472,7 @@ int gfxnvidia_shutdown(void); void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr); uint8_t gfxnvidia_chip_readb(const chipaddr addr); -extern struct pcidev_status gfx_nvidia[]; +extern const struct pcidev_status gfx_nvidia[]; #endif
/* drkaiser.c */ @@ -481,7 +481,7 @@ int drkaiser_shutdown(void); void drkaiser_chip_writeb(uint8_t val, chipaddr addr); uint8_t drkaiser_chip_readb(const chipaddr addr); -extern struct pcidev_status drkaiser_pcidev[]; +extern const struct pcidev_status drkaiser_pcidev[]; #endif
/* nicrealtek.c */ @@ -491,8 +491,8 @@ int nicrealtek_shutdown(void); void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); uint8_t nicrealtek_chip_readb(const chipaddr addr); -extern struct pcidev_status nics_realtek[]; -extern struct pcidev_status nics_realteksmc1211[]; +extern const struct pcidev_status nics_realtek[]; +extern const struct pcidev_status nics_realteksmc1211[]; #endif
/* nicnatsemi.c */ @@ -501,7 +501,7 @@ int nicnatsemi_shutdown(void); void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr); uint8_t nicnatsemi_chip_readb(const chipaddr addr); -extern struct pcidev_status nics_natsemi[]; +extern const struct pcidev_status nics_natsemi[]; #endif
/* satasii.c */ @@ -510,7 +510,7 @@ int satasii_shutdown(void); void satasii_chip_writeb(uint8_t val, chipaddr addr); uint8_t satasii_chip_readb(const chipaddr addr); -extern struct pcidev_status satas_sii[]; +extern const struct pcidev_status satas_sii[]; #endif
/* atahpt.c */ @@ -519,7 +519,7 @@ int atahpt_shutdown(void); void atahpt_chip_writeb(uint8_t val, chipaddr addr); uint8_t atahpt_chip_readb(const chipaddr addr); -extern struct pcidev_status ata_hpt[]; +extern const struct pcidev_status ata_hpt[]; #endif
/* ft2232_spi.c */ @@ -572,7 +572,7 @@ extern char *programmer_param; extern unsigned long flashbase; extern int verbose; -extern const char *flashrom_version; +extern const char * const flashrom_version; extern char *chip_to_probe; void map_flash_registers(struct flashchip *flash); int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); @@ -671,7 +671,6 @@
extern enum spi_controller spi_controller; extern const struct spi_programmer spi_programmer[]; -extern void *spibar; int spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int spi_send_multicommand(struct spi_command *cmds); @@ -683,6 +682,7 @@ /* ichspi.c */ extern int ichspi_lock; extern uint32_t ichspi_bbar; +extern void *ich_spibar; int ich_init_opcodes(void); int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); Index: flashrom-explicit_init/drkaiser.c =================================================================== --- flashrom-explicit_init/drkaiser.c (Revision 1066) +++ flashrom-explicit_init/drkaiser.c (Arbeitskopie) @@ -26,12 +26,12 @@ #define PCI_MAGIC_DRKAISER_ADDR 0x50 #define PCI_MAGIC_DRKAISER_VALUE 0xa971
-struct pcidev_status drkaiser_pcidev[] = { +const struct pcidev_status drkaiser_pcidev[] = { {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"}, {}, };
-uint8_t *drkaiser_bar; +static uint8_t *drkaiser_bar;
int drkaiser_init(void) { Index: flashrom-explicit_init/it87spi.c =================================================================== --- flashrom-explicit_init/it87spi.c (Revision 1066) +++ flashrom-explicit_init/it87spi.c (Arbeitskopie) @@ -36,7 +36,7 @@
uint16_t it8716f_flashport = 0; /* use fast 33MHz SPI (<>0) or slow 16MHz (0) */ -int fast_spi = 1; +static int fast_spi = 1;
/* Helper functions for most recent ITE IT87xx Super I/O chips */ #define CHIP_ID_BYTE1_REG 0x20 Index: flashrom-explicit_init/pcidev.c =================================================================== --- flashrom-explicit_init/pcidev.c (Revision 1066) +++ flashrom-explicit_init/pcidev.c (Arbeitskopie) @@ -25,11 +25,11 @@
uint32_t io_base_addr; struct pci_access *pacc; -struct pci_filter filter; +static struct pci_filter filter; struct pci_dev *pcidev_dev = NULL;
uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, - struct pcidev_status *devs) + const struct pcidev_status *devs) { int i; /* FIXME: 64 bit memory BARs need a 64 bit addr. */ @@ -79,7 +79,7 @@ }
uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, - struct pcidev_status *devs, char *pcidev_bdf) + const struct pcidev_status *devs, char *pcidev_bdf) { struct pci_dev *dev; char *msg = NULL; @@ -125,7 +125,7 @@ return curaddr; }
-void print_supported_pcidevs(struct pcidev_status *devs) +void print_supported_pcidevs(const struct pcidev_status *devs) { int i;
Index: flashrom-explicit_init/gfxnvidia.c =================================================================== --- flashrom-explicit_init/gfxnvidia.c (Revision 1066) +++ flashrom-explicit_init/gfxnvidia.c (Arbeitskopie) @@ -27,7 +27,7 @@
uint8_t *nvidia_bar;
-struct pcidev_status gfx_nvidia[] = { +const struct pcidev_status gfx_nvidia[] = { {0x10de, 0x0010, NT, "NVIDIA", "Mutara V08 [NV2]" }, {0x10de, 0x0018, NT, "NVIDIA", "RIVA 128" }, {0x10de, 0x0020, NT, "NVIDIA", "RIVA TNT" }, Index: flashrom-explicit_init/nicrealtek.c =================================================================== --- flashrom-explicit_init/nicrealtek.c (Revision 1066) +++ flashrom-explicit_init/nicrealtek.c (Arbeitskopie) @@ -29,12 +29,12 @@ #define BIOS_ROM_ADDR 0xD4 #define BIOS_ROM_DATA 0xD7
-struct pcidev_status nics_realtek[] = { +const struct pcidev_status nics_realtek[] = { {0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"}, {}, };
-struct pcidev_status nics_realteksmc1211[] = { +const struct pcidev_status nics_realteksmc1211[] = { {0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */ {}, }; Index: flashrom-explicit_init/nic3com.c =================================================================== --- flashrom-explicit_init/nic3com.c (Revision 1066) +++ flashrom-explicit_init/nic3com.c (Arbeitskopie) @@ -31,10 +31,10 @@
#define PCI_VENDOR_ID_3COM 0x10b7
-uint32_t internal_conf; -uint16_t id; +static uint32_t internal_conf; +static uint16_t id;
-struct pcidev_status nics_3com[] = { +const struct pcidev_status nics_3com[] = { /* 3C90xB */ {0x10b7, 0x9055, OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, {0x10b7, 0x9001, NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, Index: flashrom-explicit_init/spi.c =================================================================== --- flashrom-explicit_init/spi.c (Revision 1066) +++ flashrom-explicit_init/spi.c (Arbeitskopie) @@ -28,7 +28,6 @@ #include "spi.h"
enum spi_controller spi_controller = SPI_CONTROLLER_NONE; -void *spibar = NULL;
void spi_prettyprint_status_register(struct flashchip *flash);
Index: flashrom-explicit_init/satasii.c =================================================================== --- flashrom-explicit_init/satasii.c (Revision 1066) +++ flashrom-explicit_init/satasii.c (Arbeitskopie) @@ -28,7 +28,7 @@ uint8_t *sii_bar; uint16_t id;
-struct pcidev_status satas_sii[] = { +const struct pcidev_status satas_sii[] = { {0x1095, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, {0x1095, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"}, {0x1095, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, Index: flashrom-explicit_init/ft2232_spi.c =================================================================== --- flashrom-explicit_init/ft2232_spi.c (Revision 1066) +++ flashrom-explicit_init/ft2232_spi.c (Arbeitskopie) @@ -47,7 +47,7 @@
static struct ftdi_context ftdic_context;
-int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) +static int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) { int r; r = ftdi_write_data(ftdic, (unsigned char *) buf, size); @@ -59,7 +59,7 @@ return 0; }
-int get_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) +static int get_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) { int r; r = ftdi_read_data(ftdic, (unsigned char *) buf, size); Index: flashrom-explicit_init/chipset_enable.c =================================================================== --- flashrom-explicit_init/chipset_enable.c (Revision 1066) +++ flashrom-explicit_init/chipset_enable.c (Arbeitskopie) @@ -417,10 +417,10 @@ /* Do we really need no write enable? */ mmio_base = (pci_read_long(dev, 0xbc)) << 8; msg_pdbg("MMIO base at = 0x%x\n", mmio_base); - spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); + ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70);
msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n", - mmio_readw(spibar + 0x6c)); + mmio_readw(ich_spibar + 0x6c));
/* Not sure if it speaks all these bus protocols. */ buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI; @@ -450,7 +450,7 @@ int rwperms = ((ICH_BRWA(frap) & (1 << i)) << 1) | ((ICH_BRRA(frap) & (1 << i)) << 0); int offset = 0x54 + i * 4; - uint32_t freg = mmio_readl(spibar + offset), base, limit; + uint32_t freg = mmio_readl(ich_spibar + offset), base, limit;
msg_pdbg("0x%02X: 0x%08x (FREG%i: %s)\n", offset, freg, i, region_names[i]); @@ -536,50 +536,50 @@ msg_pdbg("SPIBAR = 0x%x + 0x%04x\n", tmp, spibar_offset);
/* Assign Virtual Address */ - spibar = rcrb + spibar_offset; + ich_spibar = rcrb + spibar_offset;
switch (spi_controller) { case SPI_CONTROLLER_ICH7: msg_pdbg("0x00: 0x%04x (SPIS)\n", - mmio_readw(spibar + 0)); + mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", - mmio_readw(spibar + 2)); + mmio_readw(ich_spibar + 2)); msg_pdbg("0x04: 0x%08x (SPIA)\n", - mmio_readl(spibar + 4)); + mmio_readl(ich_spibar + 4)); for (i = 0; i < 8; i++) { int offs; offs = 8 + (i * 8); msg_pdbg("0x%02x: 0x%08x (SPID%d)\n", offs, - mmio_readl(spibar + offs), i); + mmio_readl(ich_spibar + offs), i); msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4, - mmio_readl(spibar + offs + 4), i); + mmio_readl(ich_spibar + offs + 4), i); } - ichspi_bbar = mmio_readl(spibar + 0x50); + ichspi_bbar = mmio_readl(ich_spibar + 0x50); msg_pdbg("0x50: 0x%08x (BBAR)\n", ichspi_bbar); msg_pdbg("0x54: 0x%04x (PREOP)\n", - mmio_readw(spibar + 0x54)); + mmio_readw(ich_spibar + 0x54)); msg_pdbg("0x56: 0x%04x (OPTYPE)\n", - mmio_readw(spibar + 0x56)); + mmio_readw(ich_spibar + 0x56)); msg_pdbg("0x58: 0x%08x (OPMENU)\n", - mmio_readl(spibar + 0x58)); + mmio_readl(ich_spibar + 0x58)); msg_pdbg("0x5c: 0x%08x (OPMENU+4)\n", - mmio_readl(spibar + 0x5c)); + mmio_readl(ich_spibar + 0x5c)); for (i = 0; i < 4; i++) { int offs; offs = 0x60 + (i * 4); msg_pdbg("0x%02x: 0x%08x (PBR%d)\n", offs, - mmio_readl(spibar + offs), i); + mmio_readl(ich_spibar + offs), i); } msg_pdbg("\n"); - if (mmio_readw(spibar) & (1 << 15)) { + if (mmio_readw(ich_spibar) & (1 << 15)) { msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } ich_init_opcodes(); break; case SPI_CONTROLLER_ICH9: - tmp2 = mmio_readw(spibar + 4); + tmp2 = mmio_readw(ich_spibar + 4); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); msg_pdbg("FLOCKDN %i, ", (tmp2 >> 15 & 1)); msg_pdbg("FDV %i, ", (tmp2 >> 14) & 1); @@ -590,7 +590,7 @@ msg_pdbg("FCERR %i, ", (tmp2 >> 1) & 1); msg_pdbg("FDONE %i\n", (tmp2 >> 0) & 1);
- tmp = mmio_readl(spibar + 0x50); + tmp = mmio_readl(ich_spibar + 0x50); msg_pdbg("0x50: 0x%08x (FRAP)\n", tmp); msg_pdbg("BMWAG 0x%02x, ", ICH_BMWAG(tmp)); msg_pdbg("BMRAG 0x%02x, ", ICH_BMRAG(tmp)); @@ -602,30 +602,30 @@ do_ich9_spi_frap(tmp, i);
msg_pdbg("0x74: 0x%08x (PR0)\n", - mmio_readl(spibar + 0x74)); + mmio_readl(ich_spibar + 0x74)); msg_pdbg("0x78: 0x%08x (PR1)\n", - mmio_readl(spibar + 0x78)); + mmio_readl(ich_spibar + 0x78)); msg_pdbg("0x7C: 0x%08x (PR2)\n", - mmio_readl(spibar + 0x7C)); + mmio_readl(ich_spibar + 0x7C)); msg_pdbg("0x80: 0x%08x (PR3)\n", - mmio_readl(spibar + 0x80)); + mmio_readl(ich_spibar + 0x80)); msg_pdbg("0x84: 0x%08x (PR4)\n", - mmio_readl(spibar + 0x84)); + mmio_readl(ich_spibar + 0x84)); msg_pdbg("0x90: 0x%08x (SSFS, SSFC)\n", - mmio_readl(spibar + 0x90)); + mmio_readl(ich_spibar + 0x90)); msg_pdbg("0x94: 0x%04x (PREOP)\n", - mmio_readw(spibar + 0x94)); + mmio_readw(ich_spibar + 0x94)); msg_pdbg("0x96: 0x%04x (OPTYPE)\n", - mmio_readw(spibar + 0x96)); + mmio_readw(ich_spibar + 0x96)); msg_pdbg("0x98: 0x%08x (OPMENU)\n", - mmio_readl(spibar + 0x98)); + mmio_readl(ich_spibar + 0x98)); msg_pdbg("0x9C: 0x%08x (OPMENU+4)\n", - mmio_readl(spibar + 0x9C)); - ichspi_bbar = mmio_readl(spibar + 0xA0); + mmio_readl(ich_spibar + 0x9C)); + ichspi_bbar = mmio_readl(ich_spibar + 0xA0); msg_pdbg("0xA0: 0x%08x (BBAR)\n", ichspi_bbar); msg_pdbg("0xB0: 0x%08x (FDOC)\n", - mmio_readl(spibar + 0xB0)); + mmio_readl(ich_spibar + 0xB0)); if (tmp2 & (1 << 15)) { msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; Index: flashrom-explicit_init/flashrom.c =================================================================== --- flashrom-explicit_init/flashrom.c (Revision 1066) +++ flashrom-explicit_init/flashrom.c (Arbeitskopie) @@ -34,7 +34,7 @@ #include "flash.h" #include "flashchips.h"
-const char *flashrom_version = FLASHROM_VERSION; +const char * const flashrom_version = FLASHROM_VERSION; char *chip_to_probe = NULL; int verbose = 0;
@@ -89,26 +89,23 @@ ; #endif
+/* programmer_param is programmer-specific, but it MUST NOT be initialized in + * programmer_init() because it is initialized in the command line parser. + */ char *programmer_param = NULL;
-/** - * flashrom defaults to Parallel/LPC/FWH flash devices. If a known host - * controller is found, the init routine sets the buses_supported bitfield to - * contain the supported buses for that controller. - */ -enum chipbustype buses_supported = CHIP_BUSTYPE_NONSPI; +/* Supported buses for the current programmer. */ +enum chipbustype buses_supported;
/** * Programmers supporting multiple buses can have differing size limits on * each bus. Store the limits for each bus in a common struct. */ -struct decode_sizes max_rom_decode = { - .parallel = 0xffffffff, - .lpc = 0xffffffff, - .fwh = 0xffffffff, - .spi = 0xffffffff -}; +struct decode_sizes max_rom_decode;
+/* If nonzero, used as the start address of bottom-aligned flash. */ +unsigned long flashbase; + const struct programmer_entry programmer_table[] = { #if CONFIG_INTERNAL == 1 { @@ -428,6 +425,21 @@
int programmer_init(void) { + /* Initialize all programmer specific data. */ + /* Default to unlimited decode sizes. */ + max_rom_decode = (const struct decode_sizes) { + .parallel = 0xffffffff, + .lpc = 0xffffffff, + .fwh = 0xffffffff, + .spi = 0xffffffff + }; + /* Default to Parallel/LPC/FWH flash devices. If a known host controller + * is found, the init routine sets the buses_supported bitfield. + */ + buses_supported = CHIP_BUSTYPE_NONSPI; + /* Default to top aligned flash at 4 GB. */ + flashbase = 0; + return programmer_table[programmer].init(); }
@@ -437,6 +449,7 @@
for (i = shutdown_fn_count - 1; i >= 0; i--) shutdown_fn[i].func(shutdown_fn[i].data); + /* FIXME: Clear the shutdown function array on shutdown or startup? */ return programmer_table[programmer].shutdown(); }
@@ -512,8 +525,6 @@ return 0; }
-unsigned long flashbase = 0; - int min(int a, int b) { return (a < b) ? a : b; Index: flashrom-explicit_init/layout.c =================================================================== --- flashrom-explicit_init/layout.c (Revision 1066) +++ flashrom-explicit_init/layout.c (Arbeitskopie) @@ -28,7 +28,7 @@ char *mainboard_vendor = NULL; char *mainboard_part = NULL; #endif -int romimages = 0; +static int romimages = 0;
#define MAX_ROMLAYOUT 16
@@ -39,7 +39,7 @@ char name[256]; } romlayout_t;
-romlayout_t rom_entries[MAX_ROMLAYOUT]; +static romlayout_t rom_entries[MAX_ROMLAYOUT];
#if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ static char *def_name = "DEFAULT"; Index: flashrom-explicit_init/ichspi.c =================================================================== --- flashrom-explicit_init/ichspi.c (Revision 1066) +++ flashrom-explicit_init/ichspi.c (Arbeitskopie) @@ -105,6 +105,8 @@
uint32_t ichspi_bbar = 0;
+void *ich_spibar = NULL; + typedef struct _OPCODE { uint8_t opcode; //This commands spi opcode uint8_t spi_type; //This commands spi type @@ -134,17 +136,17 @@ /* HW access functions */ static uint32_t REGREAD32(int X) { - return mmio_readl(spibar + X); + return mmio_readl(ich_spibar + X); }
static uint16_t REGREAD16(int X) { - return mmio_readw(spibar + X); + return mmio_readw(ich_spibar + X); }
-#define REGWRITE32(X,Y) mmio_writel(Y, spibar+X) -#define REGWRITE16(X,Y) mmio_writew(Y, spibar+X) -#define REGWRITE8(X,Y) mmio_writeb(Y, spibar+X) +#define REGWRITE32(X,Y) mmio_writel(Y, ich_spibar+X) +#define REGWRITE16(X,Y) mmio_writew(Y, ich_spibar+X) +#define REGWRITE8(X,Y) mmio_writeb(Y, ich_spibar+X)
/* Common SPI functions */ static int find_opcode(OPCODES *op, uint8_t opcode); @@ -161,7 +163,7 @@ };
/* List of opcodes which need preopcodes and matching preopcodes. Unused. */ -struct preop_opcode_pair pops[] = { +const struct preop_opcode_pair pops[] = { {JEDEC_WREN, JEDEC_BYTE_PROGRAM}, {JEDEC_WREN, JEDEC_SE}, /* sector erase */ {JEDEC_WREN, JEDEC_BE_52}, /* block erase */ @@ -177,7 +179,7 @@ /* Reasonable default configuration. Needs ad-hoc modifications if we * encounter unlisted opcodes. Fun. */ -OPCODES O_ST_M25P = { +static OPCODES O_ST_M25P = { { JEDEC_WREN, JEDEC_EWSR, @@ -194,7 +196,7 @@ } };
-OPCODES O_EXISTING = {}; +static OPCODES O_EXISTING = {};
static int find_opcode(OPCODES *op, uint8_t opcode) { @@ -337,15 +339,15 @@ { switch (spi_controller) { case SPI_CONTROLLER_ICH7: - mmio_writel(minaddr, spibar + 0x50); - ichspi_bbar = mmio_readl(spibar + 0x50); + mmio_writel(minaddr, ich_spibar + 0x50); + ichspi_bbar = mmio_readl(ich_spibar + 0x50); /* We don't have any option except complaining. */ if (ichspi_bbar != minaddr) msg_perr("Setting BBAR failed!\n"); break; case SPI_CONTROLLER_ICH9: - mmio_writel(minaddr, spibar + 0xA0); - ichspi_bbar = mmio_readl(spibar + 0xA0); + mmio_writel(minaddr, ich_spibar + 0xA0); + ichspi_bbar = mmio_readl(ich_spibar + 0xA0); /* We don't have any option except complaining. */ if (ichspi_bbar != minaddr) msg_perr("Setting BBAR failed!\n"); Index: flashrom-explicit_init/print_wiki.c =================================================================== --- flashrom-explicit_init/print_wiki.c (Revision 1066) +++ flashrom-explicit_init/print_wiki.c (Arbeitskopie) @@ -26,7 +26,7 @@ #include "flash.h" #include "flashchips.h"
-const char *wiki_header = "= Supported devices =\n\n\ +static const char * const wiki_header = "= Supported devices =\n\n\ <div style="margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ background-color:#eeeeee; align:right; border:1px solid #aabbcc;"><small>\n\ Please do '''not''' edit these tables in the wiki directly, they are \ @@ -34,16 +34,16 @@ '''Last update:''' %s(generated by flashrom %s)\n</small></div>\n";
#if CONFIG_INTERNAL == 1 -const char *chipset_th = "{| border="0" style="font-size: smaller"\n\ +static const char * const chipset_th = "{| border="0" style="font-size: smaller"\n\ |- bgcolor="#6699dd"\n! align="left" | Vendor\n\ ! align="left" | Southbridge\n! align="left" | PCI IDs\n\ ! align="left" | Status\n\n";
-const char *board_th = "{| border="0" style="font-size: smaller" \ +static const char * const board_th = "{| border="0" style="font-size: smaller" \ valign="top"\n|- bgcolor="#6699dd"\n! align="left" | Vendor\n\ ! align="left" | Mainboard\n! align="left" | Required option\n! align="left" | Status\n\n";
-const char *board_intro = "\ +static const char * const board_intro = "\ \n== Supported mainboards ==\n\n\ In general, it is very likely that flashrom works out of the box even if your \ mainboard is not listed below.\n\nThis is a list of mainboards where we have \ @@ -56,14 +56,14 @@ mainboards on the [[Mailinglist|mailing list]].\n"; #endif
-const char *chip_th = "{| border="0" style="font-size: smaller" \ +static const char * const chip_th = "{| border="0" style="font-size: smaller" \ valign="top"\n|- bgcolor="#6699dd"\n! align="left" | Vendor\n\ ! align="left" | Device\n! align="left" | Size / KB\n\ ! align="left" | Type\n! align="left" colspan="4" | Status\n\n\ |- bgcolor="#6699ff"\n| colspan="4" | \n\ | Probe\n| Read\n| Erase\n| Write\n\n";
-const char *programmer_section = "\ +static const char * const programmer_section = "\ \n== Supported programmers ==\n\nThis is a list \ of supported PCI devices flashrom can use as programmer:\n\n{| border="0" \ valign="top"\n| valign="top"|\n\n{| border="0" style="font-size: \ @@ -72,7 +72,7 @@ ! align="left" | Status\n\n";
#if CONFIG_INTERNAL == 1 -const char *laptop_intro = "\n== Supported laptops/notebooks ==\n\n\ +static const char * const laptop_intro = "\n== Supported laptops/notebooks ==\n\n\ In general, flashing laptops is more difficult because laptops\n\n\ * often use the flash chip for stuff besides the BIOS,\n\ * often have special protection stuff which has to be handled by flashrom,\n\ @@ -124,7 +124,7 @@ int num_notes = 0; char *notes = calloc(1, 1); char tmp[900 + 1]; - struct board_pciid_enable *b = board_pciid_enables; + const struct board_pciid_enable *b = board_pciid_enables;
for (i = 0; boards[i].vendor != NULL; i++) { if (boards[i].working) @@ -245,7 +245,7 @@ printf("\n|}\n\n|}\n"); }
-static void print_supported_pcidevs_wiki(struct pcidev_status *devs) +static void print_supported_pcidevs_wiki(const struct pcidev_status *devs) { int i = 0; static int c = 0; Index: flashrom-explicit_init/udelay.c =================================================================== --- flashrom-explicit_init/udelay.c (Revision 1066) +++ flashrom-explicit_init/udelay.c (Arbeitskopie) @@ -26,7 +26,7 @@ #include "flash.h"
/* loops per microsecond */ -unsigned long micro = 1; +static unsigned long micro = 1;
__attribute__ ((noinline)) void myusec_delay(int usecs) { Index: flashrom-explicit_init/nicnatsemi.c =================================================================== --- flashrom-explicit_init/nicnatsemi.c (Revision 1066) +++ flashrom-explicit_init/nicnatsemi.c (Arbeitskopie) @@ -28,7 +28,7 @@ #define BOOT_ROM_ADDR 0x50 #define BOOT_ROM_DATA 0x54
-struct pcidev_status nics_natsemi[] = { +const struct pcidev_status nics_natsemi[] = { {0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"}, {0x100b, 0x0022, NT, "National Semiconductor", "DP83820"}, {}, Index: flashrom-explicit_init/print.c =================================================================== --- flashrom-explicit_init/print.c (Revision 1066) +++ flashrom-explicit_init/print.c (Arbeitskopie) @@ -173,7 +173,7 @@ const char *devicetype) { int i, j, boardcount_good = 0, boardcount_bad = 0; - struct board_pciid_enable *b = board_pciid_enables; + const struct board_pciid_enable *b = board_pciid_enables;
for (i = 0; boards[i].vendor != NULL; i++) { if (boards[i].working) Index: flashrom-explicit_init/dediprog.c =================================================================== --- flashrom-explicit_init/dediprog.c (Revision 1066) +++ flashrom-explicit_init/dediprog.c (Arbeitskopie) @@ -24,19 +24,21 @@ #include "spi.h"
#define DEFAULT_TIMEOUT 3000 -usb_dev_handle *dediprog_handle; +static usb_dev_handle *dediprog_handle;
-int dediprog_do_stuff(void); - -void print_hex(void *buf, size_t len) +#if 0 +/* Might be useful for other pieces of code as well. */ +static void print_hex(void *buf, size_t len) { size_t i;
for (i = 0; i < len; i++) msg_pdbg(" %02x", ((uint8_t *)buf)[i]); } +#endif
-struct usb_device *get_device_by_vid_pid(uint16_t vid, uint16_t pid) +/* Might be useful for other USB devices as well. static for now. */ +static struct usb_device *get_device_by_vid_pid(uint16_t vid, uint16_t pid) { struct usb_bus *bus; struct usb_device *dev; @@ -323,10 +325,11 @@ return 0; }
+#if 0 /* Leftovers from reverse engineering. Keep for documentation purposes until * completely understood. */ -int dediprog_do_stuff(void) +static int dediprog_do_stuff(void) { char buf[0x4]; /* SPI command processing starts here. */ @@ -341,7 +344,6 @@ return 1; msg_pdbg("Receiving response: "); print_hex(buf, JEDEC_RDID_INSIZE); -#if 0 /* URB 14-27 are more SPI commands. */ /* URB 28. Command Set SPI Voltage. */ if (dediprog_set_spi_voltage(0x0)) @@ -369,12 +371,10 @@ /* Command I is probably Start Bulk Read. Data is u16 blockcount, u16 blocksize. */ /* Command J is probably Start Bulk Write. Data is u16 blockcount, u16 blocksize. */ /* Bulk transfer sizes for Command I/J are always 512 bytes, rest is filled with 0xff. */ -#endif
- msg_pinfo("All probes will fail because this driver is not hooked up " - "to the SPI infrastructure yet."); return 0; } +#endif
int dediprog_shutdown(void) { Index: flashrom-explicit_init/board_enable.c =================================================================== --- flashrom-explicit_init/board_enable.c (Revision 1066) +++ flashrom-explicit_init/board_enable.c (Arbeitskopie) @@ -1577,7 +1577,7 @@ */
/* Please keep this list alphabetically ordered by vendor/board name. */ -struct board_pciid_enable board_pciid_enables[] = { +const struct board_pciid_enable board_pciid_enables[] = {
/* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ #if defined(__i386__) || defined(__x86_64__) @@ -1661,11 +1661,11 @@ * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -static struct board_pciid_enable *board_match_coreboot_name(const char *vendor, +static const struct board_pciid_enable *board_match_coreboot_name(const char *vendor, const char *part) { - struct board_pciid_enable *board = board_pciid_enables; - struct board_pciid_enable *partmatch = NULL; + const struct board_pciid_enable *board = board_pciid_enables; + const struct board_pciid_enable *partmatch = NULL;
for (; board->vendor_name; board++) { if (vendor && (!board->lb_vendor @@ -1714,9 +1714,9 @@ * Match boards on PCI IDs and subsystem IDs. * Second set of IDs can be main only or missing completely. */ -static struct board_pciid_enable *board_match_pci_card_ids(void) +const static struct board_pciid_enable *board_match_pci_card_ids(void) { - struct board_pciid_enable *board = board_pciid_enables; + const struct board_pciid_enable *board = board_pciid_enables;
for (; board->vendor_name; board++) { if ((!board->first_card_vendor || !board->first_card_device) && @@ -1762,7 +1762,7 @@
int board_flash_enable(const char *vendor, const char *part) { - struct board_pciid_enable *board = NULL; + const struct board_pciid_enable *board = NULL; int ret = 0;
if (part)