Re: [flashrom] [PATCH] SPI bitbanging core fixups

[Carl-Daniel Hailfinger]

On 17.07.2010 12:47, Michael Karcher wrote:
> Rebase to r1084 and this is
>
> Acked-by: Michael Karcher

Change the SPI bitbanging core to fix a subtle bug (which had no effect
so far) and to make integration of the RayeR SPIPGM and Nvidia
MCP6x/MCP7x SPI patches easier.

A big thank you to Johannes Sjölund for testing the code as part of the
Nvidia MCP6x/MCP7x SPI bitbanging patch.

This is the common part of the RayeR/Nvidia SPI patch. Tested on a dozen
machines, works fine.

Signed-off-by: Carl-Daniel Hailfinger

Index: flashrom-bitbang_spi_fixup/flash.h
===================================================================
--- flashrom-bitbang_spi_fixup/flash.h	(Revision 1084)
+++ flashrom-bitbang_spi_fixup/flash.h	(Arbeitskopie)
@@ -133,8 +133,6 @@

extern const int bitbang_spi_master_count;

-extern enum bitbang_spi_master bitbang_spi_master;
-
 struct bitbang_spi_master_entry {
    void (*set_cs) (int val);
    void (*set_sck) (int val);
@@ -535,7 +533,7 @@
 /* bitbang_spi.c */
 extern int bitbang_spi_half_period;
 extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
-int bitbang_spi_init(void);
+int bitbang_spi_init(enum bitbang_spi_master master);
 int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
 int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
 int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
Index: flashrom-bitbang_spi_fixup/hwaccess.h
===================================================================
--- flashrom-bitbang_spi_fixup/hwaccess.h	(Revision 1084)
+++ flashrom-bitbang_spi_fixup/hwaccess.h	(Arbeitskopie)
@@ -176,6 +176,10 @@
 #define __DARWIN__
 #endif

+/* Clarification about OUTB/OUTW/OUTL argument order:
+ * OUT[BWL](val, port)
+ */
+
 #if defined(__FreeBSD__) || defined(__DragonFly__)
   #include <machine/cpufunc.h>
   #define off64_t off_t
Index: flashrom-bitbang_spi_fixup/bitbang_spi.c
===================================================================
--- flashrom-bitbang_spi_fixup/bitbang_spi.c	(Revision 1084)
+++ flashrom-bitbang_spi_fixup/bitbang_spi.c	(Arbeitskopie)
@@ -26,10 +26,10 @@
 #include "chipdrivers.h"
 #include "spi.h"

-/* Length of half a clock period in usecs */
-int bitbang_spi_half_period = 0;
+/* Length of half a clock period in usecs. Default to 1 (500 kHz). */
+int bitbang_spi_half_period = 1;

-enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID;
+static enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID;

const struct bitbang_spi_master_entry bitbang_spi_master_table[] = {
    {}, /* This entry corresponds to BITBANG_SPI_INVALID. */
@@ -37,6 +37,7 @@

const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table);

+/* Note that CS# is active low, so val=0 means the chip is active. */
 void bitbang_spi_set_cs(int val)
 {
    bitbang_spi_master_table[bitbang_spi_master].set_cs(val);
@@ -57,11 +58,18 @@
    return bitbang_spi_master_table[bitbang_spi_master].get_miso();
 }

-int bitbang_spi_init(void)
+int bitbang_spi_init(enum bitbang_spi_master master)
 {
+	bitbang_spi_master = master;
+
+	if (bitbang_spi_master == BITBANG_SPI_INVALID) {
+		msg_perr("Invalid bitbang SPI master. \n"
+			 "Please report a bug at [e-mail]\n");
+		return 1;
+	}
    bitbang_spi_set_cs(1);
    bitbang_spi_set_sck(0);
-	buses_supported = CHIP_BUSTYPE_SPI;
+	bitbang_spi_set_mosi(0);
    return 0;
 }