Re: [flashrom] [PATCH] Refactor/fix read-to-file

[Carl-Daniel Hailfinger]

On 14.07.2010 01:39, [e-mail] wrote:
> Acked-By: Stephen Kou
>
> Dump to show (expected) failure:
>
> flashrom v0.9.2-r1075
> Calibrating delay loop... OS timer resolution is 1 usecs, 1810M loops
> per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 992 us,
> 10000 myus = 9995 us, 4 myus = 4 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "                                "
> DMI string system-product-name: "                                "
> DMI string system-version: "                        "
> DMI string baseboard-manufacturer: "Intel Corporation"
> DMI string baseboard-product-name: "DX58SO"
> DMI string baseboard-version: "AAE29331-404"
> DMI string chassis-type: "Unknown"
> Found chipset "Intel ICH10R", enabling flash write... chipset PCI ID is
> 8086:3a16, 
> BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is
> 0xa
> tried to set 0xdc to 0xb on ICH10R failed (WARNING ONLY)
> GCS = 0x2e0445: BIOS Interface Lock-Down: enabled, BOOT BIOS Straps:
> 0x1 (SPI)
> WARNING: SPI Configuration Lockdown activated.
> Reading OPCODES... done
> SPI Read Configuration: prefetching enabled, caching enabled, FAILED!
> This chipset supports the following protocols: FWH,SPI.
> Found chip "Winbond W25x16" (2048 KB, SPI) at physical address
> 0xffe00000.
> Reading flash... Invalid OPCODE 0x03
> Read operation failed!
> FAILED.

Thanks, committed in r1079.

Regards,
Carl-Daniel