On 16.06.2010 23:07, Daniel Flinkmann wrote:
Am 16.06.2010 um 17:00 schrieb Carl-Daniel Hailfinger:
The used computer which is running flashrom and using the Bus Pirate is an Atom D330 running 64bit Ubuntu Lucid Lynx and is normally just a TimeMachine/Fileserver, but was idling all the time.
Hm. Are you running the machine with HZ=100 or HZ=100? HZ=1000 could in theory improve flash access speed (due to scheduler side effects).
I have no idea what is the default, as I haven't add any special commands to change that.
I think it is possible to specify HZ=1000 in the bootloader, but it has been a few years since I looked at that. Anyway, for us this might not be as important as I thought.
It would be nice if you could measure read timing with unmodified flashrom and with my protocol violation hack.
As promised: here is the reading test. first: standard SVN 1048, second: added your buspirate patch, third: added buspirate patch and no_delay patch.
And sorry adding so much text to this email, but I am not sure if there is any important stuff for you inside.
Thanks, those are very detailed results and very helpful.
flashrom without Speed-Update: 46 min 42 sec
# flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r readtest -V Wed Jun 16 20:41:08 CEST 2010 flashrom v0.9.2-r1048 on Linux 2.6.32-22-server (x86_64), built with libpci 3.0.0, GCC 4.4.3, little endian Initializing buspirate_spi programmer Probing for Atmel AT25DF021, 256 KB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x00, id2 0x00 Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xbf, id2 0x258e Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0xbf, id2 0x258e Chip status register is 1c Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is set Chip status register: Bit 3 / Block Protect 1 (BP1) is set Chip status register: Bit 2 / Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "SST SST25VF080B" (1024 KB, SPI) at physical address 0xfff00000. Reading flash... done. Bus Pirate shutdown completed. Wed Jun 16 21:27:50 CEST 2010
46 minutes instead of the theoretical minimum of 9 minutes. Bad. Maybe the kernel usbserial driver is really crappy.
flashrom with Buspirate-3x-patch published today: 15 min 49 sec
# flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r readtest2 -V flashrom v0.9.2-r1048-with-3xspeed-bp-patch on Linux 2.6.32-22-server (x86_64), built with libpci 3.0.0, GCC 4.4.3, little endian Initializing buspirate_spi programmer Probing for Atmel AT25DF021, 256 KB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x00, id2 0x00 Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xbf, id2 0x258e Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0xbf, id2 0x258e Chip status register is 1c Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is set Chip status register: Bit 3 / Block Protect 1 (BP1) is set Chip status register: Bit 2 / Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "SST SST25VF080B" (1024 KB, SPI) at physical address 0xfff00000. Reading flash... done. Bus Pirate shutdown completed.
15 minutes instead of the theoretical minimum of 3 minutes. Still bad, but at least we got the expected speedup from my patch.
flashrom with Buspirate-3x-patch and the no_delay_patch: 15 min 36 sec
# flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r readtest3 -V Wed Jun 16 22:42:51 CEST 2010 flashrom v0.9.2-r1048-with-3xspeed-bp-patch-with-spi_nodelay-patch on Linux 2.6.32-22-server (x86_64), built with libpci 3.0.0, GCC 4.4.3, little endian Initializing buspirate_spi programmer Probing for Atmel AT25DF021, 256 KB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x00, id2 0x00 Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xbf, id2 0x258e Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0xbf, id2 0x258e Chip status register is 1c Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is set Chip status register: Bit 3 / Block Protect 1 (BP1) is set Chip status register: Bit 2 / Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "SST SST25VF080B" (1024 KB, SPI) at physical address 0xfff00000. Reading flash... done. Bus Pirate shutdown completed.
No additional speedup as I expected.
Could you try erase with my 3x speedup patch? It should not take longer than read. If it takes significantly longer, please test with 3x speedup and no_delay as well.
There still is a bug with the first transmitted SPI command. It seems we always send garbage or we always read garbage. Not sure. I bet that if you run
flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -c AT25DF041A -V
you will see a RDID byte 0 parity violation again. In fact, this will probably happen with every SPI chip you can specify. If I'm right, we either have a Bus Pirate bug or a flashrom bug.
Regards, Carl-Daniel