Hello developers,
this is from Code found in the BIOS.
Enable bitbanging SPI interface: - ISA brigde (10de:0548, at 00:01.0) needs 8A.6 set and 8A.5 cleared - SMBus controller (10de:0542, at 00:01.1, so same chip) contains base address of something at register 0x74 (DWORD). Bitbanging register is at 0x530 inside that block. The base address has been seen as 0xfec80000 on one board.
To select the BIOS ROM: - Set bit 0 in the bitbang register - Wait for bit 8 to be set (this is the *only* word access to the bitbang register, everything els is bytewise) - Clear bit 1 in the bitbang register
To deselect the BIOS ROM: - Set bit 1 in the bitbang register - Clear bit 0 in the bitbang register
To do SPI transfers: - bit 2 is clock (read/write) - bit 3 is MOSI (to flash) - bit 4 is MISO (from flash)
That's basically everything. No warranty that this doesn't interfere with anything ACPI-like while the system is running, of course.
Regards, Michael Karcher