Hi Iain,
thanks for your mail.
On 29.09.2010 19:49, Iain wrote:
Idwer Vollering wrote:
Patch please :) run: svn diff > flashrom_r1182_intel_i82571ei_808610b9.patch and reply with that patch and a sign-off: http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure
I'd love to, especially as it really is a one-liner. However I can't meet the requirements in the sign-off procedure. If you're wondering why, it's due to an employment contract that forces a contribution to any open source project through a legal review, even if the contribution was made on my own time. The review itself probably wouldn't be an issue, but someone has to pay for it and that's where the problems start.
It is very appreciated that you read the signoff procedure details, and gave us detailed info about the reasons you can't signoff. May we credit you for reporting with your full name?
I'm quite happy to give the required information for someone else to create a patch and to test the result. Which sort of makes a mockery of the whole review thing, but it is what it is, and I can't afford to lose the job right now :)
And the info you provided is sufficient for us to create a patch. Thanks.
Idwer, could you please whip up a patch and credit Iain with a Reported-by: line?
PROBE, READ and WRITE have proved to work, can you try ERASE (-E) as well and mark that chip tested as such ? See flashchips.c to do that.
I've not looked closely at what -E actually does, but I'd be surprised and rather worried if it was anything different from the erase that gets done automatically prior to the write from the previous log. Anyway, the output with -VE is on the end of the mail.
The implicit erase-in-write is identical to the separate erase, but the point is that if the chip was previously empty, the first erase will always succeed (empty means already erased). A separate erase (or a second write) usually are sufficient to test erase functionality, unless a large portion of the written image contains 0xff.
flashrom v0.9.2-r1182 on Linux 2.6.35-dt (x86_64), built with libpci 3.1.4, GCC 4.4.3, little endian Calibrating delay loop... OK. Initializing nicintel_spi programmer Found "Intel 82572EI Gigabit Ethernet Controller" (8086:10b9, BDF 03:00.0). Requested BAR is MEM, 32bit, not prefetchable Probing for Winbond W25x10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3011 Chip status register is 00 Found chip "Winbond W25x10" (128 KB, SPI) at physical address 0xfffe0000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, 0x001000-0x001fff, 0x002000-0x002fff, 0x003000-0x003fff, 0x004000-0x004fff, 0x005000-0x005fff, 0x006000-0x006fff, 0x007000-0x007fff, 0x008000-0x008fff, 0x009000-0x009fff, 0x00a000-0x00afff, 0x00b000-0x00bfff, 0x00c000-0x00cfff, 0x00d000-0x00dfff, 0x00e000-0x00efff, 0x00f000-0x00ffff, 0x010000-0x010fff, 0x011000-0x011fff, 0x012000-0x012fff, 0x013000-0x013fff, 0x014000-0x014fff, 0x015000-0x015fff, 0x016000-0x016fff, 0x017000-0x017fff, 0x018000-0x018fff, 0x019000-0x019fff, 0x01a000-0x01afff, 0x01b000-0x01bfff, 0x01c000-0x01cfff, 0x01d000-0x01dfff, 0x01e000-0x01efff, 0x01f000-0x01ffff, SUCCESS.
Regards, Carl-Daniel