Hello flashrom developers,
(obtained from reversing the vendor update tool)
Supported IDs (names stolen from pci.ids, the double 372N is not my fault): 1103:0004 HPT366/368/370/370A/372/372N 1103:0005 HPT372A/372N 1103:0006 HPT302/302N
Flash enable at 58L.24 (setpci syntax), set to enable flash writing Flash interface select at 70B, 1 = mmapped in ROM addr space, 0 = io mapped
IO-mapped access: (BAR4)+0x90 -> DWORD Address (BAR4)+0x94 -> BYTE/WORD/DWORD data access.
memmapped chip access was not shown in the tool, but the flash disable code disables the extension ROM BAR. So probably its just mmapped read/write in that area. Maximum Chip size supported by the vendor tool: 128K
Regards, Michael Karcher