Apologies Stefan, attached and below is the -VV output. I do not have an external flash programmer but I am interested in resolving this issue and am willing to invest in figuring it out. Let me know what the -VV output indicates the next steps should be. Thanks, Robert
robert@LenovoT500:~$ sudo flashrom -p internal:laptop=force_I_want_a_brick -VV [sudo] password for robert: flashrom v0.9.6.1-r1563 on Linux 3.5.0-19-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org
flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (3 args): flashrom -p internal:laptop=force_I_want_a_brick -VV Calibrating delay loop... OS timer resolution is 1 usecs, 2381M loops per second, 10 myus = 11 us, 100 myus = 113 us, 1000 myus = 1022 us, 10000 myus = 10057 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "LENOVO" DMI string system-product-name: "2241W3V" DMI string system-version: "ThinkPad T500" DMI string baseboard-manufacturer: "LENOVO" DMI string baseboard-product-name: "2241W3V" DMI string baseboard-version: "Not Available" DMI string chassis-type: "Notebook" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details.
If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Proceeding anyway because user forced us to. Found chipset "Intel ICH9M-E" with PCI ID 8086:2917. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x0 0xffe00000/0xffa00000 FWH IDSEL: 0x0 0xffd80000/0xff980000 FWH IDSEL: 0x0 0xffd00000/0xff900000 FWH IDSEL: 0x0 0xffc80000/0xff880000 FWH IDSEL: 0x0 0xffc00000/0xff800000 FWH IDSEL: 0x0 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x400000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS)
-----Original Message----- From: Stefan Tauner [mailto:stefan.tauner@student.tuwien.ac.at] Sent: Friday, January 18, 2013 7:30 PM To: Robert S. Done, Ph.D. Cc: flashrom@flashrom.org Subject: Re: [flashrom] 2009 era -L output
On Tue, 15 Jan 2013 20:05:09 -0700 "Robert S. Done, Ph.D." rdone@cox.net wrote:
FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. FREG2: WARNING: Management Engine region (0x00001000-0x005f5fff) is locked. PR0: WARNING: 0x007e0000-0x01ffffff is read-only. PR4: WARNING: 0x005f8000-0x005fffff is locked.
It's a bit complicated... access to the flash chip is locked down by the chipset. This can not be circumvented easily (you do not own an external flash programmer i presume?). 'locked' means neither write nor read access. The hex numbers are the address ranges involved. If the parts you want to modify are inside the writeable area then flashrom can be used by adding a few patches which were not committed to our repository yet. Without them flashrom can only do partial writes (but not reads which is needed to be any useful in this case).
The patches can be found here: http://patchwork.coreboot.org/user/bundle/37/ They are most probably outdated and wont apply to the current code, but you can either apply them to the old revision or ask me to update them if you really want to continue (there is probably a bit of additional work to do and things to learn for you if you are not familiar with software management etc).
PS: I told you to use -VV. That would be way more verbose and show you and me the complete configuration (i.a. the address range of the BIOS region which probably contains the computrace stuff). -- Kind regards/Mit freundlichen Gr en, Stefan Tauner