This patch adds support for - Pm25LD256C - Pm25LD512(C) - Pm25LD010(C) - Pm25LD020(C) - Pm25LD040(C)
These seem to be the successors of the Pm25LV series. The main difference seems to be the dual I/O and additional erase opcodes. Some support an additional, complex locking register (maybe all of the above, but available datahsheets do not indicate it for all).
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- flashchips.c | 189 +++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 7 +- spi25_statusreg.c | 1 + 3 files changed, 196 insertions(+), 1 deletion(-)
diff --git a/flashchips.c b/flashchips.c index 342fcea..37167e6 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6562,6 +6562,195 @@ const struct flashchip flashchips[] = {
{ .vendor = "PMC", + .name = "Pm25LD256C", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD256C, + .total_size = 32, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 8} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 1} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, + }, + { + .vendor = "PMC", + .name = "Pm25LD512(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2300, 3600}, + }, + + { + .vendor = "PMC", + .name = "Pm25LD010(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD010, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, /* 2.3-3.6V for Pm25LD010 */ + }, + + { + .vendor = "PMC", + .name = "Pm25LD020(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD020, + .total_size = 256, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, /* 2.3-3.6V for Pm25LD020 */ + }, + + { + .vendor = "PMC", + .name = "Pm25LD040(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LV040, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, /* 2.3-3.6V for Pm25LD040 */ + }, + + { + .vendor = "PMC", .name = "Pm25LV512", .bustype = BUS_SPI, .manufacture_id = PMC_ID_NOPREFIX, diff --git a/flashchips.h b/flashchips.h index bbad7ec..4da4868 100644 --- a/flashchips.h +++ b/flashchips.h @@ -450,13 +450,18 @@ /* * Programmable Micro Corp is listed in JEP106W in bank 2, so it should * have a 0x7F continuation code prefix. + * Apparently this name is owned by "Chingis Technology Corporation" http://www.chingistek.com. */ #define PMC_ID 0x7F9D /* PMC */ #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */ +#define PMC_PM25LD256C 0x2F +#define PMC_PM25LD512 0x20 /* Same as Pm25LD512C, but the latter has more locking options. */ +#define PMC_PM25LD010 0x21 /* Same as Pm25LD010C, but the latter has more locking options. */ +#define PMC_PM25LD020 0x22 /* Same as Pm25LD020C, but the latter has more locking options. */ #define PMC_PM25LV512 0x7B /* Same as Pm25LV512A, but the latter does not support any sane probing. */ #define PMC_PM25LV010 0x7C /* Same as Pm25LV010A, but the latter uses the continuation prefix. */ #define PMC_PM25LV020 0x7D -#define PMC_PM25LV040 0x7E +#define PMC_PM25LV040 0x7E /* Same as PM25LD040(C), but the latter supports more features. */ #define PMC_PM25LV080B 0x13 #define PMC_PM25LV016B 0x14 #define PMC_PM29F002T 0x1D diff --git a/spi25_statusreg.c b/spi25_statusreg.c index c089157..53952fe 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -262,6 +262,7 @@ int spi_prettyprint_status_register_default_bp1(struct flashctx *flash)
/* Works for many chips of the * AMIC A25L series + * PMC Pm25LD series */ int spi_prettyprint_status_register_default_bp2(struct flashctx *flash) {