On Thu, 26 Dec 2013 16:33:01 +0100 "Gelip" mrgelip@gmail.com wrote:
Also enable program chip like this:
(PCI word register b2) setpci -s 00:07.0 b2.w=e000
or
(PCI byte register b3) setpci -s 00:07.0 b3.b=e0
e0h = 224DEC = 11100000 binary (bits 5, 6, 7)
Please help add or fix code to make flashrom program.
Hi Gelip,
I have tried to explain this a few times already to you and this will be the last time. Flashrom is not broken but your coreboot port for that board is. There is only one bit that should be changed and that is the very last of that word/byte (called GENCFG in the datasheet), i.e. setpci -s 00:07.0 b2.w=8000 should work too. But a correct port should do that at boot time already, and hence we will not change flashrom's behavior (soon or at all). Please ask the coreboot guys for help if you dont know how to fix the GENCFG value in coreboot.