Follow the style used from ICH7 onwards to pass ich_generation parameter to lower-level functions on older ICH chipsets too.
Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- chipset_enable.c | 74 ++++++++++++++++++++++++++++++++++++++------------------ programmer.h | 6 ++++- 2 files changed, 56 insertions(+), 24 deletions(-)
diff --git a/chipset_enable.c b/chipset_enable.c index b17b295..d1e4658 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -314,13 +314,8 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ return 0; }
-static int enable_flash_ich_4e(struct pci_dev *dev, const char *name) +static int enable_flash_ich0(struct pci_dev *dev, const char *name) { - /* - * Note: ICH5 has registers similar to FWH_SEL1, FWH_SEL2 and - * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and - * FB_DEC_EN2. - */ internal_buses_supported = BUS_FWH; return enable_flash_ich(dev, name, 0x4e); } @@ -441,7 +436,35 @@ idsel_garbage_out: return 0; }
-static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) +static int enable_flash_ich_4e(struct pci_dev *dev, const char *name, + enum ich_chipset ich_generation) +{ + /* + * Note: ICH5 has registers similar to FWH_SEL1, FWH_SEL2 and + * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and + * FB_DEC_EN2. + */ + internal_buses_supported = BUS_FWH; + return enable_flash_ich(dev, name, 0x4e); +} + +static int enable_flash_ich3(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_4e(dev, name, CHIPSET_ICH3); +} + +static int enable_flash_ich4(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_4e(dev, name, CHIPSET_ICH4); +} + +static int enable_flash_ich5(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_4e(dev, name, CHIPSET_ICH5); +} + +static int enable_flash_ich_dc(struct pci_dev *dev, const char *name, + enum ich_chipset ich_generation) { int err;
@@ -456,6 +479,11 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) return enable_flash_ich(dev, name, 0xdc); }
+static int enable_flash_ich6(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc(dev, name, CHIPSET_ICH6); +} + static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) { uint16_t old, new; @@ -562,7 +590,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, }
/* Enable Flash Writes */ - ret = enable_flash_ich_dc(dev, name); + ret = enable_flash_ich_dc(dev, name, ich_generation); if (ret == ERROR_FATAL) return ret;
@@ -1426,21 +1454,21 @@ const struct penable chipset_enables[] = { {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, - {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, - {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, - {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, - {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, - {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, - {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, - {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, - {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, - {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, - {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, - {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, - {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, + {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, + {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich0}, + {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich0}, + {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich0}, + {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich0}, + {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich3}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich3}, + {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich4}, + {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich4}, + {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich5}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich5}, + {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich6}, + {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich6}, + {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich6}, + {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich6}, {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, diff --git a/programmer.h b/programmer.h index 51a8c80..ea7d456 100644 --- a/programmer.h +++ b/programmer.h @@ -540,7 +540,11 @@ int register_spi_programmer(const struct spi_programmer *programmer); /* The following enum is needed by ich_descriptor_tool and ich* code. */ enum ich_chipset { CHIPSET_ICH_UNKNOWN, - CHIPSET_ICH7 = 7, + CHIPSET_ICH3 = 3, + CHIPSET_ICH4, + CHIPSET_ICH5, + CHIPSET_ICH6, + CHIPSET_ICH7, CHIPSET_ICH8, CHIPSET_ICH9, CHIPSET_ICH10,