On Tue, 5 Aug 2014 15:41:03 -0400 TR Reardon thomas_reardon@hotmail.com wrote:
Got it, thanks all for the quick responses.
I take it that read-protection of non-described areas (ie where there are gaps in the described regions) is done _implicitly_ by the ICH SPI controller?
exactly. all addresses that are not described in the descriptor are implicitly read-/write-protected. IIRC this is not documented in any public intel datasheet
In the case of Winbond 25Q64 chips, I saw only write-protection in the datasheet, no chip-level read-protection.
Yes, read protections are not that common (yet) for basic flash chips. The are very common where companies think they have to hide their data and/or algorithms (FPGA code, industrial/automotive microcontrollers), and X86 is moving towards this area pretty fast right now. :(