Hi John,
On 30.03.2010 07:42, john warwick wrote:
I was looking at Intel ICH SPI specs, and saw that there are a few registers on hardware sequencing. I was hence thinking on the feasibility of hardware sequencing.
But then I saw that for hardware sequencing, I cannot find any registers where I can input opcodes like reading/writing to status registers. This is unlike software sequencing, where there is actually pre-op (06h) and other opcodes like 01h (writing status register) and 05h (reading status register).
Exactly. With hardware sequencing, the opcodes are not really your choice anymore.
So I was thinking if the host CPU/Bios Master can actually still do flashing of the Bios itself using hardware sequencing, without the need of pre-op such as 06h?
The chipset has to be preprogrammed in a way that issues the correct preops and ops automatically. Good BIOSes will do that for you, but such programming is incorrect once you change the flash chip to another model.
Hardware sequencing is hard, and you have to hack around these limitations if you want to use flashrom as is. IMHO a good start would be to extend descriptor mode printing in flashrom (e.g. number of valid descriptors, access rights, ranges...)
Regards, Carl-Daniel