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[RFC] JEDEC refactor w/ conversion notes and file eliminations
by Sean Nelson 04 Jan '10

04 Jan '10

This patch demonstrates how we could refactor the jedec code. After the refactor we can delete these: * am29f040b * en29f002a -> file_not_used * m29f002 * mx29f002 * pm29f002 * sst49lf040 * w49f002u These files can be deleted if we *could* find a way to integrate the problems into jedec.c: * w29ee011 -> checks specifically for w29ee011 * w39v040c -> checks for lock in probe: address 0xfff2 * pm49fl00x -> uses chip protect code * m29f002 -> block based writing * m29f400bt -> block based writing I was looking through these two files and saw that they used variable block sizes for writing sectors, maybe we can do something simpler to block_erasers: * m29f002 * m29f400bt There are a few files that performs another map_flash_registers() after successful probe, I was wondering if we could add the re-mapping to probe_jedec_common or if its safe to omit the function call: * pm49fl00x * stm50flw0x0x * w39v080fa List of chips that use a specific addressing for command codes: 0x2AA based chips: * am29f040b * mx29f002 * pm29f002 0xAAA based chips: * m29f002 * m29f400bt 0x2AAA based chips: * pm49fl00x * sst49lf040 * stm50flw0x0x * w29ee011 * w39v040c * w39v080fa * w49f002u If you want I can send my full notes so you can see what each file's functions can be converted to, on request. I don't know if my methods for the address mask is proper. If you can think of a better way, I'm all ears. Yes, I did work on this all Christmas Eve.

3 14

[commit] r828 - trunk
by svn＠flashrom.org 04 Jan '10

04 Jan '10

Author: snelson Date: 2010-01-04 18:15:23 +0100 (Mon, 04 Jan 2010) New Revision: 828 Modified: trunk/chipdrivers.h trunk/flash.h trunk/flashchips.c trunk/jedec.c trunk/pm49fl00x.c trunk/sst49lf040.c trunk/sst_fwhub.c trunk/w39v040c.c trunk/w39v080fa.c trunk/w49f002u.c Log: The patch converts jedec functions into mask-based generics which can be used for many chip provided the only changes are the addresses are converted from 0x5555/0x2AAA to 0x555/0x2AA or similar. The patch mostly changes jedec.c, but a few other files are changed because they use the jedec functions within their own functions. The patch also adds a copyright line to flashchips.c because of my recent work in converting AMD and Atmel chips to use struct erase_block. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h =================================================================== --- trunk/chipdrivers.h 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/chipdrivers.h 2010-01-04 17:15:23 UTC (rev 828) @@ -76,7 +76,6 @@ uint8_t oddparity(uint8_t val); void toggle_ready_jedec(chipaddr dst); void data_polling_jedec(chipaddr dst, uint8_t data); -void start_program_jedec(chipaddr bios); int write_byte_program_jedec(chipaddr bios, uint8_t *src, chipaddr dst); int probe_jedec(struct flashchip *flash); @@ -86,8 +85,7 @@ int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize); int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize); int erase_chip_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize); -int write_sector_jedec(chipaddr bios, uint8_t *src, - chipaddr dst, unsigned int page_size); +int write_sector_jedec_common(struct flashchip *flash, uint8_t *src, chipaddr dst, unsigned int page_size, unsigned int mask); /* m29f002.c */ int erase_m29f002(struct flashchip *flash); Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/flash.h 2010-01-04 17:15:23 UTC (rev 828) @@ -144,6 +144,9 @@ */ #define NUM_ERASEFUNCTIONS 5 +#define FEATURE_REGISTERMAP (1 << 0) +#define FEATURE_BYTEWRITES (1 << 1) + struct flashchip { const char *vendor; const char *name; @@ -160,6 +163,7 @@ int total_size; int page_size; + int feature_bits; /* * Indicate if flashrom has been tested with this flash chip and if Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/flashchips.c 2010-01-04 17:15:23 UTC (rev 828) @@ -5,6 +5,7 @@ * Copyright (C) 2004 Tyan Corp * Copyright (C) 2005-2008 coresystems GmbH <stepan(a)openbios.org> * Copyright (C) 2006-2009 Carl-Daniel Hailfinger + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/jedec.c 2010-01-04 17:15:23 UTC (rev 828) @@ -5,6 +5,7 @@ * Copyright (C) 2006 Giampiero Giancipoli <gianci(a)email.it> * Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de> * Copyright (C) 2007 Carl-Daniel Hailfinger + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -24,6 +25,8 @@ #include "flash.h" #define MAX_REFLASH_TRIES 0x10 +#define MASK_FULL 0xffff +#define MASK_2AA 0x7ff /* Check one byte for odd parity */ uint8_t oddparity(uint8_t val) @@ -87,14 +90,16 @@ printf_debug("%s: excessive loops, i=0x%x\n", __func__, i); } -void start_program_jedec(chipaddr bios) +void start_program_jedec_common(struct flashchip *flash, unsigned int mask) { - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); + chipaddr bios = flash->virtual_memory; + chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(0xA0, bios + (0x5555 & mask)); } -int probe_jedec(struct flashchip *flash) +int probe_jedec_common(struct flashchip *flash, + unsigned int mask, int long_reset) { chipaddr bios = flash->virtual_memory; uint8_t id1, id2; @@ -118,13 +123,13 @@ } /* Issue JEDEC Product ID Entry command */ - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(0xAA, bios + (0x5555 & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(0x55, bios + (0x2AAA & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(0x90, bios + 0x5555); + chip_writeb(0x90, bios + (0x5555 & mask)); if (probe_timing_enter) programmer_delay(probe_timing_enter); @@ -147,14 +152,17 @@ } /* Issue JEDEC Product ID Exit command */ - chip_writeb(0xAA, bios + 0x5555); + if (long_reset) + { + chip_writeb(0xAA, bios + (0x5555 & mask)); + if (probe_timing_exit) + programmer_delay(10); + chip_writeb(0x55, bios + (0x2AAA & mask)); + if (probe_timing_exit) + programmer_delay(10); + } + chip_writeb(0xF0, bios + (0x5555 & mask)); if (probe_timing_exit) - programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - if (probe_timing_exit) - programmer_delay(10); - chip_writeb(0xF0, bios + 0x5555); - if (probe_timing_exit) programmer_delay(probe_timing_exit); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2); @@ -184,24 +192,28 @@ if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id) return 1; + if (flash->feature_bits & FEATURE_REGISTERMAP) + map_flash_registers(flash); + return 0; } -int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize) +int erase_sector_jedec_common(struct flashchip *flash, unsigned int page, + unsigned int pagesize, unsigned int mask) { chipaddr bios = flash->virtual_memory; /* Issue the Sector Erase command */ - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(0xAA, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(0x55, bios + (0x2AAA & mask)); programmer_delay(10); - chip_writeb(0x80, bios + 0x5555); + chip_writeb(0x80, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(0xAA, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(0x55, bios + (0x2AAA & mask)); programmer_delay(10); chip_writeb(0x30, bios + page); programmer_delay(10); @@ -216,21 +228,22 @@ return 0; } -int erase_block_jedec(struct flashchip *flash, unsigned int block, unsigned int blocksize) +int erase_block_jedec_common(struct flashchip *flash, unsigned int block, + unsigned int blocksize, unsigned int mask) { chipaddr bios = flash->virtual_memory; /* Issue the Sector Erase command */ - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(0xAA, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(0x55, bios + (0x2AAA & mask)); programmer_delay(10); - chip_writeb(0x80, bios + 0x5555); + chip_writeb(0x80, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(0xAA, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(0x55, bios + (0x2AAA & mask)); programmer_delay(10); chip_writeb(0x50, bios + block); programmer_delay(10); @@ -245,35 +258,24 @@ return 0; } -/* erase chip with block_erase() prototype */ -int erase_chip_block_jedec(struct flashchip *flash, unsigned int addr, unsigned int blocksize) +int erase_chip_jedec_common(struct flashchip *flash, unsigned int mask) { - if ((addr != 0) || (blocksize != flash->total_size * 1024)) { - fprintf(stderr, "%s called with incorrect arguments\n", - __func__); - return -1; - } - return erase_chip_jedec(flash); -} - -int erase_chip_jedec(struct flashchip *flash) -{ int total_size = flash->total_size * 1024; chipaddr bios = flash->virtual_memory; /* Issue the JEDEC Chip Erase command */ - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(0xAA, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(0x55, bios + (0x2AAA & mask)); programmer_delay(10); - chip_writeb(0x80, bios + 0x5555); + chip_writeb(0x80, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(0xAA, bios + (0x5555 & mask)); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(0x55, bios + (0x2AAA & mask)); programmer_delay(10); - chip_writeb(0x10, bios + 0x5555); + chip_writeb(0x10, bios + (0x5555 & mask)); programmer_delay(10); toggle_ready_jedec_slow(bios); @@ -285,50 +287,12 @@ return 0; } -int write_page_write_jedec(struct flashchip *flash, uint8_t *src, - int start, int page_size) +int write_byte_program_jedec_common(struct flashchip *flash, uint8_t *src, + chipaddr dst, unsigned int mask) { - int i, tried = 0, failed; - uint8_t *s = src; + int tried = 0, failed = 0; chipaddr bios = flash->virtual_memory; - chipaddr dst = bios + start; - chipaddr d = dst; -retry: - /* Issue JEDEC Data Unprotect comand */ - start_program_jedec(bios); - - /* transfer data from source to destination */ - for (i = 0; i < page_size; i++) { - /* If the data is 0xFF, don't program it */ - if (*src != 0xFF) - chip_writeb(*src, dst); - dst++; - src++; - } - - toggle_ready_jedec(dst - 1); - - dst = d; - src = s; - failed = verify_range(flash, src, start, page_size, NULL); - - if (failed && tried++ < MAX_REFLASH_TRIES) { - fprintf(stderr, "retrying.\n"); - goto retry; - } - if (failed) { - fprintf(stderr, " page 0x%lx failed!\n", - (d - bios) / page_size); - } - return failed; -} - -int write_byte_program_jedec(chipaddr bios, uint8_t *src, - chipaddr dst) -{ - int tried = 0, failed = 0; - /* If the data is 0xFF, don't program it and don't complain. */ if (*src == 0xFF) { return 0; @@ -336,7 +300,7 @@ retry: /* Issue JEDEC Byte Program command */ - start_program_jedec(bios); + start_program_jedec_common(flash, mask); /* transfer data from source to destination */ chip_writeb(*src, dst); @@ -352,15 +316,15 @@ return failed; } -int write_sector_jedec(chipaddr bios, uint8_t *src, - chipaddr dst, unsigned int page_size) +int write_sector_jedec_common(struct flashchip *flash, uint8_t *src, + chipaddr dst, unsigned int page_size, unsigned int mask) { int i, failed = 0; chipaddr olddst; olddst = dst; for (i = 0; i < page_size; i++) { - if (write_byte_program_jedec(bios, src, dst)) + if (write_byte_program_jedec_common(flash, src, dst, mask)) failed = 1; dst++, src++; } @@ -370,6 +334,45 @@ return failed; } +int write_page_write_jedec_common(struct flashchip *flash, uint8_t *src, + int start, int page_size, unsigned int mask) +{ + int i, tried = 0, failed; + uint8_t *s = src; + chipaddr bios = flash->virtual_memory; + chipaddr dst = bios + start; + chipaddr d = dst; + +retry: + /* Issue JEDEC Start Program comand */ + start_program_jedec_common(flash, mask); + + /* transfer data from source to destination */ + for (i = 0; i < page_size; i++) { + /* If the data is 0xFF, don't program it */ + if (*src != 0xFF) + chip_writeb(*src, dst); + dst++; + src++; + } + + toggle_ready_jedec(dst - 1); + + dst = d; + src = s; + failed = verify_range(flash, src, start, page_size, NULL); + + if (failed && tried++ < MAX_REFLASH_TRIES) { + fprintf(stderr, "retrying.\n"); + goto retry; + } + if (failed) { + fprintf(stderr, " page 0x%lx failed!\n", + (d - bios) / page_size); + } + return failed; +} + int write_jedec(struct flashchip *flash, uint8_t *buf) { int i, failed = 0; @@ -384,8 +387,8 @@ printf("Programming page: "); for (i = 0; i < total_size / page_size; i++) { printf("%04d at address: 0x%08x", i, i * page_size); - if (write_page_write_jedec(flash, buf + i * page_size, - i * page_size, page_size)) + if (write_page_write_jedec_common(flash, buf + i * page_size, + i * page_size, page_size, MASK_FULL)) failed = 1; printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } @@ -411,7 +414,7 @@ if ((i & 0x3) == 0) printf("address: 0x%08lx", (unsigned long)i * 1024); - write_sector_jedec(bios, buf + i * 1024, dst + i * 1024, 1024); + write_sector_jedec_common(flash, buf + i * 1024, dst + i * 1024, 1024, MASK_FULL); if ((i & 0x3) == 0) printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); @@ -420,3 +423,35 @@ printf("\n"); return 0; } + +/* erase chip with block_erase() prototype */ +int erase_chip_block_jedec(struct flashchip *flash, unsigned int addr, + unsigned int blocksize) +{ + if ((addr != 0) || (blocksize != flash->total_size * 1024)) { + fprintf(stderr, "%s called with incorrect arguments\n", + __func__); + return -1; + } + return erase_chip_jedec_common(flash, MASK_FULL); +} + +int probe_jedec(struct flashchip *flash) +{ + return probe_jedec_common(flash, MASK_FULL, 1); +} + +int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int size) +{ + return erase_sector_jedec_common(flash, page, size, MASK_FULL); +} + +int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int size) +{ + return erase_block_jedec_common(flash, page, size, MASK_FULL); +} + +int erase_chip_jedec(struct flashchip *flash) +{ + return erase_chip_jedec_common(flash, MASK_FULL); +} Modified: trunk/pm49fl00x.c =================================================================== --- trunk/pm49fl00x.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/pm49fl00x.c 2010-01-04 17:15:23 UTC (rev 828) @@ -101,8 +101,8 @@ /* write to the sector */ printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); + write_sector_jedec_common(flash, buf + i * page_size, + bios + i * page_size, page_size, 0xffff); printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); fflush(stdout); } Modified: trunk/sst49lf040.c =================================================================== --- trunk/sst49lf040.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/sst49lf040.c 2010-01-04 17:15:23 UTC (rev 828) @@ -59,8 +59,8 @@ if (i % 10 == 0) printf("%04d at address: 0x%08x ", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); + write_sector_jedec_common(flash, buf + i * page_size, + bios + i * page_size, page_size, 0xffff); if (i % 10 == 0) printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); Modified: trunk/sst_fwhub.c =================================================================== --- trunk/sst_fwhub.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/sst_fwhub.c 2010-01-04 17:15:23 UTC (rev 828) @@ -157,8 +157,8 @@ page_size); if (rc) return 1; - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); + write_sector_jedec_common(flash, buf + i * page_size, + bios + i * page_size, page_size, 0xffff); } printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } Modified: trunk/w39v040c.c =================================================================== --- trunk/w39v040c.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/w39v040c.c 2010-01-04 17:15:23 UTC (rev 828) @@ -80,8 +80,8 @@ printf("Programming page: "); for (i = 0; i < total_size / page_size; i++) { printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); + write_sector_jedec_common(flash, buf + i * page_size, + bios + i * page_size, page_size, 0xffff); printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); Modified: trunk/w39v080fa.c =================================================================== --- trunk/w39v080fa.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/w39v080fa.c 2010-01-04 17:15:23 UTC (rev 828) @@ -182,7 +182,7 @@ printf("Programming: "); for (i = 0; i < total_size; i += flash->page_size) { printf("0x%08x\b\b\b\b\b\b\b\b\b\b", i); - write_sector_jedec(bios, buf + i, bios + i, flash->page_size); + write_sector_jedec_common(flash, buf + i, bios + i, flash->page_size, 0xffff); } printf("\n"); Modified: trunk/w49f002u.c =================================================================== --- trunk/w49f002u.c 2010-01-03 23:50:28 UTC (rev 827) +++ trunk/w49f002u.c 2010-01-04 17:15:23 UTC (rev 828) @@ -36,8 +36,8 @@ for (i = 0; i < total_size / page_size; i++) { printf("%04d at address: 0x%08x ", i, i * page_size); /* Byte-wise writing of 'page_size' bytes. */ - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); + write_sector_jedec_common(flash, buf + i * page_size, + bios + i * page_size, page_size, 0xffff); printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); fflush(stdout); }

1 0

[PATCH] cleanup README
by Stefan Reinauer 04 Jan '10

04 Jan '10

see patch -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

2 2

[commit] r827 - trunk
by svn＠flashrom.org 04 Jan '10

04 Jan '10

Author: stepan Date: 2010-01-04 00:50:28 +0100 (Mon, 04 Jan 2010) New Revision: 827 Modified: trunk/README Log: Drop multiple forwards to man page and add a single one more prominently. Drop usage information that is already mentioned in the man page. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/README =================================================================== --- trunk/README 2010-01-03 15:09:17 UTC (rev 826) +++ trunk/README 2010-01-03 23:50:28 UTC (rev 827) @@ -11,7 +11,9 @@ It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, or SPI. +Please see the flashrom(8) manpage. + Packaging --------- @@ -89,37 +91,6 @@ by adding sudo in front of the commands above. -Usage / Options ---------------- - -Please see the flashrom(8) manpage. - - -Exit status ------------ - -Please see the flashrom(8) manpage. - - -coreboot Table and Mainboard Identification --------------------------------------------- - -Please see the flashrom(8) manpage. - - -ROM Layout Support ------------------- - -Please see the flashrom(8) manpage. - - -Supported Flash Chips / Chipsets / Mainboards ---------------------------------------------- - -Please check the output of 'flashrom -L' for the list of supported -flash chips, chipsets/southbridges, mainboards, and flash programmers. - - Contact -------

1 0

Fix FWH decode size.
by Michael Karcher 04 Jan '10

04 Jan '10

Fix logic error in determining the decode size of the Intel FWH bridge chip. Signed-Off-By: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Index: chipset_enable.c =================================================================== --- chipset_enable.c (Revision 824) +++ chipset_enable.c (Arbeitskopie) @@ -364,7 +364,7 @@ (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp ? "en" : "dis"); - if ((tmp == 0) && contiguous) { + if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x80000; } else { contiguous = 0; @@ -376,7 +376,7 @@ (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp ? "en" : "dis"); - if ((tmp == 0) && contiguous) { + if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x100000; } else { contiguous = 0;

2 2

ss50 files
by Val Fucich 03 Jan '10

03 Jan '10

Board is FS50V1.3 Bios location...http://image.shuttle.com/ResourceCenter/download_file.jsp?file_i…

1 0

[commit] r826 - trunk
by svn＠flashrom.org 03 Jan '10

03 Jan '10

Author: mkarcher Date: 2010-01-03 16:09:17 +0100 (Sun, 03 Jan 2010) New Revision: 826 Modified: trunk/chipset_enable.c Log: Fix Intel FWH decode size Fixes wrong detection of area decoded to the FWH interfaces. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2010-01-03 14:40:30 UTC (rev 825) +++ trunk/chipset_enable.c 2010-01-03 15:09:17 UTC (rev 826) @@ -364,7 +364,7 @@ (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp ? "en" : "dis"); - if ((tmp == 0) && contiguous) { + if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x80000; } else { contiguous = 0; @@ -376,7 +376,7 @@ (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp ? "en" : "dis"); - if ((tmp == 0) && contiguous) { + if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x100000; } else { contiguous = 0;

1 0

[commit] r825 - trunk
by svn＠flashrom.org 03 Jan '10

03 Jan '10

Author: stepan Date: 2010-01-03 15:40:30 +0100 (Sun, 03 Jan 2010) New Revision: 825 Modified: trunk/flashrom.8 Log: drop known broken email addresses. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-12-24 16:54:21 UTC (rev 824) +++ trunk/flashrom.8 2010-01-03 14:40:30 UTC (rev 825) @@ -262,7 +262,7 @@ .br Dominik Geyer <dominik.geyer(a)kontron.com> .br -Eric Biederman <ebiederman(a)lnxi.com> +Eric Biederman .br Giampiero Giancipoli <gianci(a)email.it> .br @@ -292,9 +292,9 @@ .br Uwe Hermann <uwe(a)hermann-uwe.de> .br -Wang Qingpei <Qingpei.Wang(a)amd.com> +Wang Qingpei .br -Yinghai Lu <yinghai.lu(a)amd.com> +Yinghai Lu .br some others .PP

1 0

Cannot flash satabios (Sil3112)
by Benjamin 01 Jan '10

01 Jan '10

Hello, I was not capable to flash (in fact I only try to read for the moment) my SATABIOS Ctrl (Silicon Image 3112) on a Abit NF7-S (rev 2.0) ( http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA… ) Here is the log : # /usr/local/sbin/flashrom --programmer satasii --read CURRENT_SATABIOS.bin --verbose flashrom v0.9.1-r824 Found "Silicon Image SiI 3112 [SATALink/SATARaid] SATA Ctrl" (1095:3112, BDF 01:0b.0). Mapping SATA SIL registers at 0xe7002000, unaligned size 0x100. Warning: Flash seems unconnected. Calibrating delay loop... 634M loops per second, 100 myus = 139 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29F080B, 1024 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT49F002(N), 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMIC A49LF040A, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for EMST F49B002UA, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Eon EN25B05, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0x90, id2 0x90 Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0x90, id2 0x90 Probing for Intel 28F001BX-B, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Intel 28F001BX-T, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Intel 82802AB, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Intel 82802AC, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm29F002T, 256 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for PMC Pm29F002B, 256 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for PMC Pm39LV010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for PMC Pm49FL002, 256 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for PMC Pm49FL004, 512 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Sharp LHF00L04, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0x90, id2 0x90 Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST29EE020A, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST49LF002A/B, 256 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF003A/B, 384 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF004A/B, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF004C, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF008A, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF008C, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF016C, 2048 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF020, 256 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF020A, 256 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF040, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF040B, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF080A, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF160C, 2048 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for ST M25P05-A, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M29F002T/NT, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0x90, id2 0x90 Probing for ST M29W010B, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M29W040B, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M50FLW040A, 512 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW040B, 512 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW080A, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW080B, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FW002, 256 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50FW016, 2048 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50FW040, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50FW080, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50LPW116, 2048 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SyncMOS S29C31004T, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SyncMOS S29C51001T, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SyncMOS S29C51002T, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SyncMOS S29C51004T, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for TI TMS29F002RB, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for TI TMS29F002RT, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W25x10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x64, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W39V040B, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W39V040C, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W39V040FA, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Winbond W39V080A, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W49F002U, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W49V002A, 256 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W49V002FA, 256 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Winbond W39V080FA, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically.

4 7

MSI IM-945GSE-A testreport
by spam＠systol-ng.god.lan 31 Dec '09

31 Dec '09

Thanks for the great app! Just for reference I would like to report my results on a MSI mainboard: IM-945GSE-A see: http://www.msi.com/index.php?func=proddesc&maincat_no=388&prod_no=1693 /sys/devices/virtual/dmi/id/ board_vendor MSI board_name A9830IMS bios_vendor American Megatrends Inc. Bridge: ICH7M Flash chip: "Macronix MX25L4005" (512 KB, SPI) at physical address 0xfff80000 The bios write protect is located on GPIO 24 on the ICH7M according to the manual. But there's an easy way in BIOS to enable this. Reading flash is OK. Not tested writing yet, will test it with next bios upgrade. Below is a flashrom log attached. Many thanks again! Henk Vergonet ------------------------- flashrom log ------------------------- flashrom v0.9.1-r710 No coreboot table found. Found chipset "Intel ICH7M", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode disabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x130464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x0004 (SPIS) 0x02: 0x4140 (SPIC) 0x04: 0x00000000 (SPIA) 0x08: 0x000020c2 (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x00000000 (SPID2+4) 0x20: 0x00000000 (SPID3) 0x24: 0x00000000 (SPID3+4) 0x28: 0x00000000 (SPID4) 0x2c: 0x00000000 (SPID4+4) 0x30: 0x00000000 (SPID5) 0x34: 0x00000000 (SPID5+4) 0x38: 0x00000000 (SPID6) 0x3c: 0x00000000 (SPID6+4) 0x40: 0x00000000 (SPID7) 0x44: 0x00000000 (SPID7+4) 0x50: 0x00000000 (BBAR) 0x54: 0x0004 (PREOP) 0x56: 0x543b (OPTYPE) 0x58: 0x05d80302 (OPMENU) 0x5c: 0x0006019f (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) 0x6c: 0x00000000 (PBR3) Programming OPCODES... program_opcodes: preop=0006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: SPI. Calibrating delay loop... 793M loops per second, 100 myus = 199 us. OK. ... Probing for Macronix MX25L2005, 256 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L4005, 512 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L4005" (512 KB, SPI) at physical address 0xfff80000. Probing for Macronix MX25L8005, 1024 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 ... RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for EON unknown EON SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for Macronix unknown Macronix SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for PMC unknown PMC SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for SST unknown SST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for ST unknown ST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) No operations were specified.

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