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Re: [flashrom] ASUS A8N-VM CSM results (write/erase failed) / ASUS P2B-LS status?
by Keith Hui 19 Apr '10

19 Apr '10

> One note about the board testing Wiki page you may want to clarify: > > "To check if you can read the existing BIOS image from the chip, run flashrom > -r backup.bin. Make sure that backup.bin contains a useful BIOS image. (Some > chipsets will return 0xff for large areas of flash without any error > messages.)" > > For a BIOS newbie like me, the remark in parenthesis doesn't tell much - is it > a good or a bad sign if a chipset returns 0xff for large areas of flash > without any error messages? (Bad, I guess ;)) While booted with factory BIOS, make note of the BIOS version you currently have. Compare the backup image with a copy downloaded from ASUS. If they are mostly the same with only configuration store areas differing, you should be fine. --- By the way, what is the status of ASUS P2B-LS support? I reported here earlier that the same support mechanisms for P2B-F also work for the LS. And I have successfully flashed multiple times on a SST 39SF020 chip. Thanks Keith

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SST25VF016B flash chip is not respondin in INTEL EP80579 PROCESSOR using Flashrom utility
by sougata barik 15 Apr '10

15 Apr '10

Hi, I am unable to use flashrom utility in my system. I am using EP80579 processor by Intel ans having one flashchip SST25VF061B which is connected to the processor by SPI interface. > [root@localhost flashrom-0.9.0]# ./flashrom -V > Calibrating delay loop... 339M loops per second, 100 myus = 198 us. OK. > No coreboot table found. > Found chipset "Intel EP80579", enabling flash write... > BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 > > Root Complex Register Block address = 0xfed1c000 > GCS = 0xd70260: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x0 (SPI) > Top Swap : not enabled > SPIBAR = 0xfed1c000 + 0x3020 > 0x00: 0x800c (SPIS) > 0x02: 0x4140 (SPIC) > 0x04: 0x00000000 (SPIA) > 0x08: 0x0000411c (SPID0) > 0x0c: 0x00000000 (SPID0+4) > 0x10: 0x00000000 (SPID1) > 0x14: 0x00000000 (SPID1+4) > 0x18: 0x00000000 (SPID2) > 0x1c: 0x00000000 (SPID2+4) > 0x20: 0x00000000 (SPID3) > 0x24: 0x00000000 (SPID3+4) > 0x28: 0x00000000 (SPID4) > 0x2c: 0x00000000 (SPID4+4) > 0x30: 0x00000000 (SPID5) > 0x34: 0x00000000 (SPID5+4) > 0x38: 0x00000000 (SPID6) > 0x3c: 0x00000000 (SPID6+4) > 0x40: 0x00000000 (SPID7) > 0x44: 0x00000000 (SPID7+4) > 0x50: 0x00e00000 (BBAR) > 0x54: 0x5006 (PREOP) > 0x56: 0x163b (OPTYPE) > 0x58: 0x05200302 (OPMENU) > 0x5c: 0x00016090 (OPMENU+4) > 0x60: 0x00000000 (PBR0) > 0x64: 0x00000000 (PBR1) > 0x68: 0x00000000 (PBR2) > 0x6c: 0x00000000 (PBR3) > > WARNING: SPI Configuration Lockdown activated. > Generating OPCODES... done > SPI Read Configuration: prefetching disabled, caching enabled, OK. > Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0x00, id2 0x00 > Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff > Probing for AMD Am29F080B, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff > Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff > Probing for ASD AE49F2008, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Atmel AT25DF021, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25DF041A, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25DF081, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25DF161, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25DF321, 4096 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25DF321A, 4096 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25DF641, 8192 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25F512B, 64 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25FS010, 128 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT25FS040, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT26DF041, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT26DF081A, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT26DF161, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT26DF161A, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT26F004, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Atmel AT45CS1282, 16896 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB011D, 128 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB021D, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB041D, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB081D, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB161D, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB321C, 4224 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB321D, 4096 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT45DB642D, 8192 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Atmel AT49F002(N), 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for AMIC A25L40P, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0x00, id2 0x00 > Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0x00, id2 0x00 > Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff > Probing for AMIC A49LF040A, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for EMST F49B002UA, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff > Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff > Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff > Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff > Probing for Macronix MX25L512, 64 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L1005, 128 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L2005, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L4005, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L8005, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L1605, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L1635D, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L3205, 4096 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L3235D, 4096 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L6405, 8192 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX25L12805, 16384 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0x00, id2 0x00 > Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0x00, id2 0x00 > Probing for Macronix MX29LV040C, 512 KB: probe_29f002: id1 0xff, id2 0xff > Probing for Numonyx M25PE10, 128 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Numonyx M25PE20, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Numonyx M25PE40, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Numonyx M25PE80, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Numonyx M25PE16, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC Pm25LV010, 128 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC Pm25LV016B, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC Pm25LV020, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC Pm25LV040, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC Pm25LV080B, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC Pm25LV512, 64 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC Pm49FL002, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for PMC Pm49FL004, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff > Probing for Spansion S25FL016A, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST SST25VF016B, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST SST25VF032B, 4096 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST SST25VF040B, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST SST25VF040.REMS, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST SST25VF040B.REMS, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST SST25VF080B, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff > Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xea, id2 0xd0 > Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xea, id2 0xd0 > Probing for SST SST29EE020A, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xea, id2 0xd0 > Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0x0b, id2 0x72 > Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xea, id2 0xd0 > Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST49LF002A/B, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SST SST49LF003A/B, 384 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST49LF004A/B, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff > Probing for SST SST49LF008A, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff > Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0x00, id2 0x00 > Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST49LF040B, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST49LF080A, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0x00, id2 0x00 > Probing for ST M25P05-A, 64 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P10-A, 128 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P20, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P40, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P40-old, 512 KB: Transaction error! > run OPCODE 0x90 failed > Invalid OPCODE 0xab > Probing for ST M25P80, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P16, 2048 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P32, 4096 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P64, 8192 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M25P128, 16384 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST M29F002B, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for ST M29F002T/NT, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff > Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff > Probing for ST M29W010B, 128 KB: probe_jedec: id1 0xea, id2 0xd0 > Probing for ST M29W040B, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff > Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff > Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff > Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff > Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x00, id2 0x00 > Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0x00, id2 0x00 > Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff > Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff > Probing for ST M50LPW116, 2048 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SyncMOS S29C31004T, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for SyncMOS S29C51001T, 128 KB: probe_jedec: id1 0xea, id2 0xd0 > Probing for SyncMOS S29C51002T, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for SyncMOS S29C51004T, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Winbond W25x10, 128 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Winbond W25x20, 256 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Winbond W25x40, 512 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Winbond W25x80, 1024 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Winbond W29C011, 128 KB: probe_jedec: id1 0xea, id2 0xd0 > Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Winbond W29EE011, 128 KB: > === > Probing disabled for Winbond W29EE011 because the probing sequence puts the > AMIC A49LF040A in a funky state. > Use 'flashrom -c W29EE011' if you have a board with this chip. > === > Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xff, id2 0xff, id1 parity violation > Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation > Probing for Winbond W49F002U, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Winbond W49V002FA, 256 KB: probe_jedec: id1 0x00, id2 0x00, id1 parity violation > Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: vid 0xff, did 0xff > Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: vid 0xff, did 0xff > Probing for Atmel unknown Atmel SPI chip, 0 KB: Transaction error! > run OPCODE 0x90 failed > Probing for EON unknown EON SPI chip, 0 KB: Transaction error! > run OPCODE 0x90 failed > Probing for Macronix unknown Macronix SPI chip, 0 KB: Transaction error! > run OPCODE 0x90 failed > Probing for PMC unknown PMC SPI chip, 0 KB: Transaction error! > run OPCODE 0x90 failed > Probing for SST unknown SST SPI chip, 0 KB: Transaction error! > run OPCODE 0x90 failed > Probing for ST unknown ST SPI chip, 0 KB: Transaction error! > run OPCODE 0x90 failed > No EEPROM/flash device found. > If you know which flash chip you have, and if this version of flashrom > supports a similar flash chip, you can try to force read your chip. Run: > flashrom -f -r -c similar_supported_flash_chip filename > > Note: flashrom can never write when the flash chip isn't found automatically. > [root@localhost flashrom-0.9.0]# > > [root@localhost flashrom-0.9.0]# ./flashrom > Calibrating delay loop... OK. > No coreboot table found. > Found chipset "Intel EP80579", enabling flash write... WARNING: SPI Configuration Lockdown activated. > OK. > No EEPROM/flash device found. > If you know which flash chip you have, and if this version of flashrom > supports a similar flash chip, you can try to force read your chip. Run: > flashrom -f -r -c similar_supported_flash_chip filename > > Note: flashrom can never write when the flash chip isn't found automatically. > [root@localhost flashrom-0.9.0]# please tell me what should I change to work this utility. Regards Sougata Please do not print this email unless it is absolutely necessary. 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2 1

Board enable needed for MS-6309 Lite
by Milan Prvulovic 14 Apr '10

14 Apr '10

Exact name of my board is MSI MS-6309 Lite PCB revision 2.0 overview page - http://www.msi.com/index.php?func=proddesc&maincat_no=1&cat2_no=&cat3_no=&p… BIOS download page - http://www.msi.com/index.php?func=downloaddetail&type=bios&maincat_no=1&pro…

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Re: [flashrom] [PATCH] Board enable (EC sleep) for Acer Ferrari 3400
by Michael Karcher 12 Apr '10

12 Apr '10

Am Montag, den 12.04.2010, 02:35 +0200 schrieb Magnus Alm: > OK, I got a problem now, tested "flashrom -EV", bad idea it seems, now > I cant write the BACKUP.ROM back. Oh, this looks like you *really* have a problem now. I'm sorry I didn't think of this case beforehand, but I seriously doubt that it is possible to fix the situation from within the running system. The problem on your system (which carldani correctly recognized) is the following. The data flow to the ROM chip is like Processor --HT--> Southbridge --LPC/FWH--> Embedded Controller --FWH--> Flash chip The embedded controller uses parts of the flash contents as instructions. There is one magic instruction (or two in your case) that make the EC spin in an idle loop that doesn't access the flash chip. In this configuration, the processor can access the flash chip as it likes to. But this idle loop drops all EC functionality like keyboard, mouse, fan control, brightness control, temperature monitoring and so on, so you should only use it for limited amounts of time. When the processor is finished with updating the flash chip, it sends a magic "exit the idle loop" instruction to the EC. Now, after you used flashrom -E on your flash chip, the EC program crashes when it tries to resume. On your system, it seemed to have the EC crashed so hard, that it doesn't pass the flash commands from the south bridge to the flash chip. As fan control is done by EC code in some systems, your situation might even cause overheating of the whole system until thermal breakdown. If your system is not damaged by heat, it is now in a configuration it is directly after manufacturing the board - so there definitely *is* a way to rewrite the flash chip in system, as vendors usually don't pre-program the flash chips before assembling the board. But this way might include special vendor tools in hardware (like test pins contacting the board on special position) or software (like a special protocal over JEDEC pins) we don't have. As your system is bricked anyway now, you could open it up and try to find the EC (a bigger chip, but not the northbridge, southbridge, graphics chip, LAN chip or audio chip) and check whether there is a usable datasheet for it. > Note: flashrom can never write when the flash chip isn't found automatically. And that is for a reason. If the flash chip is not found automatically, it means we didn't get the probe command to the chip. In times before we had these SPI firewalling chipsets (you don't have one), this was a clear indication that we also can't get erase or write commands to the chip. So erasing/writing if detection of a known chip fails is generally futile. I am sorry that I didn't think about the danger beforehands. I will definitely think about a protection mechanism that prevents this happening again before the patch goes into main flashrom. Regards, Michael Karcher

1 0

Acer Ferrari 3400 doesn't work with Flashrom
by Magnus Alm 12 Apr '10

12 Apr '10

When running "sudo flashrom" I gett the following output: flashrom v0.9.1-r946 No coreboot table found. ======================================================================== WARNING! You seem to be running flashrom on a laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. ======================================================================== Found chipset "VIA VT8235", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST39SF040" (512 KB, Parallel) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified. After this the keyboard and touchpad stops working. Also one of the thermal sensors stops working too. Plugging in a usb mouse allows me to shut down the laptop nicely tho. >From syslog after: Apr 11 10:13:33 Ferry kernel: [ 488.402186] __ratelimit: 21 callbacks suppressed Apr 11 10:13:33 Ferry kernel: [ 488.402190] atkbd.c: Spurious ACK on isa0060/serio0. Some program might be trying access hardware directly. Apr 11 10:13:36 Ferry kernel: [ 490.588044] ACPI Exception: AE_TIME, Returned by Handler for [EmbeddedControl] (20090903/evregion-424) Apr 11 10:13:36 Ferry kernel: [ 490.588076] ACPI Error (psparse-0537): Method parse/execution failed [\_TZ_.THRM._TMP] (Node f7010a50), AE_TIME Apr 11 10:13:36 Ferry kernel: [ 491.272032] ACPI: EC: input buffer is not empty, aborting transaction Apr 11 10:13:36 Ferry kernel: [ 491.272048] ACPI Exception: AE_TIME, Returned by Handler for [EmbeddedControl] (20090903/evregion-424) Apr 11 10:13:36 Ferry kernel: [ 491.272076] ACPI Error (psparse-0537): Method parse/execution failed [\_TZ_.THRM._TMP] (Node f7010a50), AE_TIME Apr 11 10:13:38 Ferry kernel: [ 492.588031] ACPI: EC: input buffer is not empty, aborting transaction Running "sudo flashrom" once more after reboot will cause the laptop to reboot immediately. Shutting down and removing power cable and battery resets the condition so "sudo flashrom" just disables keyboard/touchpad. Running "sudo flashrom -r backup.rom" will cause the laptop to shut down immediately. I read some abut making support for a laptop but it seemed a bit complicated for me. /Magnus

3 5

PROBLEM, was stupid and tested "flashrom -EV", cant flash now.
by Magnus Alm 12 Apr '10

12 Apr '10

Argh! sudo flashrom -f -c SST39SF040 -w BACKUP2.rom flashrom v0.9.1-r993 on Linux 2.6.32-19-generic (i686), built with libpci 3.0.0, GCC 4.4.3 No coreboot table found. ======================================================================== WARNING! You seem to be running flashrom on a laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. ======================================================================== Found chipset "VIA VT8235", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Disabling flash write protection for board "Acer Ferrari 3400"... OK. Calibrating delay loop... OK. No EEPROM/flash device found. But a forced read works: sudo flashrom -f -r -c SST39SF040 crap.rom flashrom v0.9.1-r993 on Linux 2.6.32-19-generic (i686), built with libpci 3.0.0, GCC 4.4.3 No coreboot table found. ======================================================================== WARNING! You seem to be running flashrom on a laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. ======================================================================== Found chipset "VIA VT8235", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Disabling flash write protection for board "Acer Ferrari 3400"... OK. Calibrating delay loop... OK. No EEPROM/flash device found. Force read (-f -r -c) requested, forcing chip probe success: Found chip "SST SST39SF040" (512 KB, Parallel) at physical address 0xfff80000. Please note that forced reads most likely contain garbage. Reading flash... done. I need a function added to flashrom so I can specify chip and address to write to. /Magnus

2 1

Re: [flashrom] [PATCH] Board enable (EC sleep) for Acer Ferrari 3400
by Magnus Alm 12 Apr '10

12 Apr '10

HI! "sudo flashrom" doesn't cause any problems now. "sudo flashrom -r BACKUP.ROM" works also tho the created file is smaller than the downloaded file. -rw-r--r-- 1 root root 524288 2010-04-12 00:36 BACKUP.ROM -rw-r--r-- 1 magnus magnus 525894 2004-10-19 09:32 ZI5_3C23.WPH That might not be so strange if the downloaded file also contains information about "magic bits". /Magnus 2010/4/12 Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de>: > BE WARNED: FLASHROM COMES WITH NO WARRANTY! THIS IS ESPECIALLY TRUE FOR > LAPTOPS, AND ESPECIALLY ESPECIALLY TRUE FOR LAPTOPS WITH SHARED EC. > Nevertheless, I think that trying to *read* flash contents with this patch > is not more unsafe than reading without this patch. Be warned that a crashed > EC might mean no fan control. Don't even *THINK* about erase/write until > read works fine! > > This is the first system with EC sleep support in flashrom, and the first > user of the register_shutdown infrastructure. > > PCI match uses one out of many chips with subsystem ID Acer:0x0057, and > also the northbridge (with bogus subsystem ID). DMI match added just for > safety, as fiddling with the KBC is dangerous. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > board_enable.c | 100 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 100 insertions(+), 0 deletions(-) > > diff --git a/board_enable.c b/board_enable.c > index f1f7953..ce82131 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -29,6 +29,66 @@ > #include "flash.h" > > /* > + * Functions for EC/KBC communication > + * port = 0x60 for KBC, port = 0x62 (typically) for EC > + */ > +static int wait_uc_writebuf_empty(uint16_t port) > +{ > + int count; > + for (count = 0; count < 50; count++) > + { > + /* quit if OBF bit clear */ > + if (!(INB(port + 4) & 2)) > + return 0; > + usleep(10000); > + } > + return -1; > +} > + > +static int wait_uc_readbuf_full(uint16_t port) > +{ > + int count; > + for (count = 0; count < 50; count++) > + { > + /* quit if IBF bit set */ > + if (INB(port + 4) & 1) > + return 0; > + usleep(10000); > + } > + return -1; > +} > + > +static int uc_send_command(uint16_t port, uint8_t command) > +{ > + if (wait_uc_writebuf_empty(port) != 0) > + return -1; > + OUTB(command, port + 4); > + return 0; > +} > + > +#if 0 > +static int uc_send_data(uint16_t port, uint8_t command) > +{ > + if (wait_uc_writebuf_empty(port) != 0) > + return -1; > + OUTB(command, port); > + return 0; > +} > +#endif > + > +static int uc_read_data(uint16_t port) > +{ > + if (wait_uc_readbuf_full(port) != 0) > + return -1; > + return INB(port); > +} > + > +static void uc_flush_data(uint16_t port) > +{ > + INB(port); > +} > + > +/* > * Helper functions for many Winbond Super I/Os of the W836xx range. > */ > /* Enter extended functions */ > @@ -1307,6 +1367,45 @@ static int it8712f_gpio3_1_raise(const char *name) > return it8712f_gpio_set(32, 1); > } > > +static void send_kbc_command(void * cmdptr) > +{ > + uc_send_command(0x60, *(uint8_t*)cmdptr); > +} > + > +static int board_acer_ferrari3400(const char *name) > +{ > + static uint8_t enable_command = 0xAA; > + uint16_t pmio_base; > + struct pci_dev * dev; > + > + dev = pci_dev_find(0x1106, 0x3177); > + if (!dev) > + { > + fprintf(stderr, "ERROR: %s - Can't find VT8235\n", name); > + return -1; > + } > + pmio_base = pci_read_word(dev, 0x88) & 0xFF80; > + if (pmio_base == 0 || pmio_base == 0xFF80) > + { > + fprintf(stderr, "ERROR: %s - invalid PMIO base %04x\n", > + name, pmio_base); > + return -1; > + } > + > + usleep(100000); /* Give the user a fair chance to release enter > + before killing keyboard/mouse */ > + > + uc_flush_data(0x60); > + register_shutdown(send_kbc_command, &enable_command); > + if (INB(pmio_base + 4) & 1) > + uc_send_command(0x60, 0xE5); /* ACPI mode */ > + else > + uc_send_command(0x60, 0xD8); /* APM/legacy mode */ > + > + uc_read_data(0x60); /* wait for EC shutdown */ > + return 0; > +} > + > /** > * Below is the list of boards which need a special "board enable" code in > * flashrom before their ROM chip can be accessed/written to. > @@ -1356,6 +1455,7 @@ struct board_pciid_enable board_pciid_enables[] = { > {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, > {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, "Abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, > {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, > + {0x1106, 0x3177, 0x1025, 0x0057, 0x1106, 0x3188, 0x1106, 0x3188, "^Ferrari 3400", NULL, NULL, "Acer", "Ferrari 3400", 0, OK, board_acer_ferrari3400}, > {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, > {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, > {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, > -- > 1.7.0 > >

2 2

Re: [flashrom] [PATCH] Add board enable for ABit NF7-S
by Uwe Hermann 12 Apr '10

12 Apr '10

On Sun, Apr 11, 2010 at 02:26:58PM +0200, Michael Karcher wrote: > V2.0 has been killed from the strings. The V2.0 and V1.0 differences > are unknown. It's the same mainboard page, but different BIOS > downloads. Both BIOSses have the same board enable, though, so I don't > care if this also matches V1.0. If it does not match V1.0 and we > encounter that board, we just have to add another line. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Acked-by: Tom Brand <worntreads(a)sbcglobal.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://www.hermann-uwe.de | http://www.randomprojects.org http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 1

[commit] r993 - trunk
by repository service 11 Apr '10

11 Apr '10

Author: mkarcher Date: Sun Apr 11 23:01:06 2010 New Revision: 993 URL: http://flashrom.org/trac/coreboot/changeset/993 Log: Add board enable for ABit NF7-S Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Tom Brand <worntreads(a)sbcglobal.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/print_wiki.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Apr 9 02:02:38 2010 (r992) +++ trunk/board_enable.c Sun Apr 11 23:01:06 2010 (r993) @@ -578,6 +578,14 @@ } /** + * Suited for Abit NF7-S: NVIDIA CK804. + */ +static int nvidia_mcp_gpio8_raise(const char *name) +{ + return nvidia_mcp_gpio_set(0x08, 1); +} + +/** * Suited for ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04. */ static int nvidia_mcp_gpio10_raise(const char *name) @@ -1346,6 +1354,7 @@ {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, + {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, "Abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Fri Apr 9 02:02:38 2010 (r992) +++ trunk/print_wiki.c Sun Apr 11 23:01:06 2010 (r993) @@ -215,6 +215,7 @@ { "Abit", "VT6X4", "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Sl…" }, { "Abit", "IP35", "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LG…" }, { "Abit", "IP35 Pro", "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?fMTYPE=LG…" }, + { "Abit", "NF7-S", "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=So…"}, { "Acorp", "6A815EPD", "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.…" }, { "agami", "Aruma", "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-600…" }, { "Albatron", "PM266A Pro", "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview…" }, /* FIXME */

1 0

Re: [flashrom] [PATCH] Add board enable for ABit NF7-S
by Benjamin BELLEC 11 Apr '10

11 Apr '10

As I can see here http://www.ocmodshop.com/default.aspx?a=144 differences between v1 and v2 are : /This motherboard is the NF7-S rev 2.0 which is the newest revision, revision 2.0 features the new crush 18D nvidia chipset which should allow for better overclocking a a few new features./ Le 11/04/2010 14:26, Michael Karcher a écrit : > V2.0 has been killed from the strings. The V2.0 and V1.0 differences > are unknown. It's the same mainboard page, but different BIOS > downloads. Both BIOSses have the same board enable, though, so I don't > care if this also matches V1.0. If it does not match V1.0 and we > encounter that board, we just have to add another line. >

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