flashrom

flashrom@flashrom.org

5 participants
9161 discussions

Request support for Zotac GeForce 9300-ITX WIFI. (MCP7A)
by Serge Blais 03 Dec '10

03 Dec '10

Here included is the output of flashrom -V The flash is on a socket and if it gets borked, I can reprogram it using a flashrom/FT2232H programmer I can assemble quickly. Thanks.

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Re: [flashrom] [PATCH] Add support for the Open Graphics Project card as a programmer
by Carl-Daniel Hailfinger 03 Dec '10

03 Dec '10

On 03.12.2010 14:00, Mark Marshall wrote: > You're right, the naming in the first patch was a little off. > The problem is that I'm not really sure what name to use - OGP > is the project, OGD1 is the first development card and OGA1 is > the first real card (which is still in the future). I've moved > to calling it OGP - in the scope of flashrom this seems like > the best choice. IF we have multiple different cards then I can > add a parameter to choose between them. > > I've also folded in your changes, and written a short entry > for the man page. > Thanks for incorporating the review comments! > Signed-off-by: Mark Marshall > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> and committed with minor changes (cosmetics) in r1241. Regards, Carl-Daniel > On 01.12.2010 19:12, Mark Marshall wrote: > >> The attached patch adds support for the Open Graphics Project >> development card, OGD1, as a SPI flash programmer. The project is in >> the the process of designing and making a complete, open source, >> graphics card. Check out http://wiki.opengraphics.org. >> >> The first development card is a PCI add in card containing a couple of >> FPGAs and a couple of serial flash chips (amongst other things). The >> FPGA's are called XP10 and S3 (their part numbers). The XP10 contains >> it's own flash and does not need to be programmed by flashrom - it >> ensures that the device can enumerate on the PCI bus without needing >> further configuration. >> >> The larger FPGA is the S3. This is configured from a large serial >> flash (2M bytes). The second serial flash is used to store the VGA >> BIOS. It is smaller (128K bytes). >> >> The attached patch adds support for programming either of the two >> serial flash chips. They are both serial SPI devices. >> >> The programmer device takes one configuration option which selects >> which of the two flash chips is accessed. This must be set to either >> "cprom" or "bprom". (The project refers to the two chips as "cprom" / >> "bprom", "s3" and "bios" are more readable alternatives). >> -- http://www.hailfinger.org/

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[commit] r1241 - trunk
by repository service 03 Dec '10

03 Dec '10

Author: hailfinger Date: Fri Dec 3 15:48:11 2010 New Revision: 1241 URL: http://flashrom.org/trac/flashrom/changeset/1241 Log: Add support for the Open Graphics Project development card, OGD1, as a SPI flash programmer. The project is in the the process of designing and making a complete, open source, graphics card. More info at http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Signed-off-by: Mark Marshall <mark.marshall(a)csr.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: trunk/ogp_spi.c Modified: trunk/Makefile trunk/flashchips.c trunk/flashrom.8 trunk/flashrom.c trunk/print.c trunk/print_wiki.c trunk/programmer.h trunk/spi.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/Makefile Fri Dec 3 15:48:11 2010 (r1241) @@ -146,6 +146,9 @@ # Always enable SPI on Intel NICs for now. CONFIG_NICINTEL_SPI ?= yes +# Always enable SPI on OGP cards for now. +CONFIG_OGP_SPI ?= yes + # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATE_SPI ?= yes @@ -165,10 +168,14 @@ ifeq ($(CONFIG_NICINTEL_SPI), yes) override CONFIG_BITBANG_SPI = yes else +ifeq ($(CONFIG_OGP_SPI), yes) +override CONFIG_BITBANG_SPI = yes +else CONFIG_BITBANG_SPI ?= no endif endif endif +endif ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' @@ -258,6 +265,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_OGP_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_OGP_SPI=1' +PROGRAMMER_OBJS += ogp_spi.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_BUSPIRATE_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_BUSPIRATE_SPI=1' PROGRAMMER_OBJS += buspirate_spi.o Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/flashchips.c Fri Dec 3 15:48:11 2010 (r1241) @@ -4897,13 +4897,42 @@ { .vendor = "SST", + .name = "SST25VF010.REMS", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST25VF010_REMS, + .total_size = 128, + .page_size = 256, + .tested = TEST_OK_PREW, + .probe = probe_spi_rems, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_1, + .read = spi_chip_read, + }, + + { + .vendor = "SST", .name = "SST25VF016B", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = SST_ID, .model_id = SST_SST25VF016B, .total_size = 2048, .page_size = 256, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/flashrom.8 Fri Dec 3 15:48:11 2010 (r1241) @@ -198,6 +198,9 @@ .BR "* nicintel_spi" " (for SPI flash ROMs attached to an Intel Gigabit \ network cards)" .sp +.BR "* ogp_spi" " (for SPI flash ROMs attached to an Open Graphics Project \ +graphics card)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER SPECIFIC INFO @@ -432,6 +435,34 @@ .sp More information about the hardware is available at http://rayer.ic.cz/elektro/spipgm.htm +.TP +.BR "ogp_spi " programmer +The FLASH ROM chip to access must be specified with the +.B rom +parameter. +.sp +.B " flashrom \-p ogp_spi:rom=name" +.sp +Where +.B name +is either +.B cprom +or +.B s3 +for the configuration ROM and +.B bprom +or +.B bios +for the BIOS ROM. If more than one card supported by the ogp_spi programmer +is installed in your system, you have to specify the PCI address of the card +you want to use with the +.B pci= +parameter as explained in the +.B nic3com +section above. +.sp +More information about the hardware is available at +http://wiki.opengraphics.org .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails. @@ -480,6 +511,9 @@ can be run as normal user on most operating systems if appropriate device permissions are set. .sp +.B ogp +needs PCI configuration space read access and raw memory access. +.sp On OpenBSD, you can obtain raw access permission by setting securelevel=-1 in /etc/rc.securelevel and rebooting, or rebooting into single user mode. @@ -538,6 +572,8 @@ .br Li-Ta Lo .br +Mark Marshall +.br Markus Boas .br Mattias Mattsson Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/flashrom.c Fri Dec 3 15:48:11 2010 (r1241) @@ -52,7 +52,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI > 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all programmers except one. #endif enum programmer programmer = @@ -96,6 +96,9 @@ #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI #endif +#if CONFIG_OGP_SPI == 1 + PROGRAMMER_OGP_SPI +#endif ; #endif @@ -428,6 +431,25 @@ .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, .chip_readb = noop_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = noop_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + +#if CONFIG_OGP_SPI == 1 + { + .name = "ogp_spi", + .init = ogp_spi_init, + .shutdown = ogp_spi_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = noop_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, .chip_readn = fallback_chip_readn, Added: trunk/ogp_spi.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/ogp_spi.c Fri Dec 3 15:48:11 2010 (r1241) @@ -0,0 +1,145 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Mark Marshall + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include "flash.h" +#include "programmer.h" + +#define PCI_VENDOR_ID_OGP 0x1227 + +/* These are the register addresses for the OGD1 / OGA1. If they are + * different for later versions of the hardware then we will need + * logic to select between the different hardware versions. */ +#define OGA1_XP10_BPROM_SI 0x0040 /* W */ +#define OGA1_XP10_BPROM_SO 0x0040 /* R */ +#define OGA1_XP10_BPROM_CE_BAR 0x0044 /* W */ +#define OGA1_XP10_BPROM_SCK 0x0048 /* W */ +#define OGA1_XP10_BPROM_REG_SEL 0x004C /* W */ +#define OGA1_XP10_CPROM_SI 0x0050 /* W */ +#define OGA1_XP10_CPROM_SO 0x0050 /* R */ +#define OGA1_XP10_CPROM_CE_BAR 0x0054 /* W */ +#define OGA1_XP10_CPROM_SCK 0x0058 /* W */ +#define OGA1_XP10_CPROM_REG_SEL 0x005C /* W */ + +static uint8_t *ogp_spibar; + +static uint32_t ogp_reg_sel; +static uint32_t ogp_reg_siso; +static uint32_t ogp_reg__ce; +static uint32_t ogp_reg_sck; + +const struct pcidev_status ogp_spi[] = { + {PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"}, + {}, +}; + +static void ogp_request_spibus(void) +{ + pci_mmio_writel(1, ogp_spibar + ogp_reg_sel); +} + +static void ogp_release_spibus(void) +{ + pci_mmio_writel(0, ogp_spibar + ogp_reg_sel); +} + +static void ogp_bitbang_set_cs(int val) +{ + pci_mmio_writel(val, ogp_spibar + ogp_reg__ce); +} + +static void ogp_bitbang_set_sck(int val) +{ + pci_mmio_writel(val, ogp_spibar + ogp_reg_sck); +} + +static void ogp_bitbang_set_mosi(int val) +{ + pci_mmio_writel(val, ogp_spibar + ogp_reg_siso); +} + +static int ogp_bitbang_get_miso(void) +{ + uint32_t tmp; + + tmp = pci_mmio_readl(ogp_spibar + ogp_reg_siso); + return tmp & 0x1; +} + +static const struct bitbang_spi_master bitbang_spi_master_ogp = { + .type = BITBANG_SPI_MASTER_OGP, + .set_cs = ogp_bitbang_set_cs, + .set_sck = ogp_bitbang_set_sck, + .set_mosi = ogp_bitbang_set_mosi, + .get_miso = ogp_bitbang_get_miso, + .request_bus = ogp_request_spibus, + .release_bus = ogp_release_spibus, +}; + +int ogp_spi_init(void) +{ + char *type; + + type = extract_programmer_param("rom"); + + if (!type) { + msg_perr("Please use flashrom -p ogp_spi:rom=... to specify " + "which flashchip you want to access.\n"); + return 1; + } else if (!strcasecmp(type, "bprom") || !strcasecmp(type, "bios")) { + ogp_reg_sel = OGA1_XP10_BPROM_REG_SEL; + ogp_reg_siso = OGA1_XP10_BPROM_SI; + ogp_reg__ce = OGA1_XP10_BPROM_CE_BAR; + ogp_reg_sck = OGA1_XP10_BPROM_SCK; + } else if (!strcasecmp(type, "cprom") || !strcasecmp(type, "s3")) { + ogp_reg_sel = OGA1_XP10_CPROM_REG_SEL; + ogp_reg_siso = OGA1_XP10_CPROM_SI; + ogp_reg__ce = OGA1_XP10_CPROM_CE_BAR; + ogp_reg_sck = OGA1_XP10_CPROM_SCK; + } else { + msg_perr("Invalid or missing rom= parameter.\n"); + return 1; + } + + get_io_perms(); + + io_base_addr = pcidev_init(PCI_VENDOR_ID_OGP, PCI_BASE_ADDRESS_0, + ogp_spi); + + ogp_spibar = physmap("OGP registers", io_base_addr, 4096); + + /* no delay for now. */ + if (bitbang_spi_init(&bitbang_spi_master_ogp, 0)) + return 1; + + buses_supported = CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_OGP; + + return 0; +} + +int ogp_spi_shutdown(void) +{ + physunmap(ogp_spibar, 4096); + pci_cleanup(pacc); + release_io_perms(); + + return 0; +} Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/print.c Fri Dec 3 15:48:11 2010 (r1241) @@ -312,6 +312,11 @@ programmer_table[PROGRAMMER_NICINTEL_SPI].name); print_supported_pcidevs(nics_intel_spi); #endif +#if CONFIG_OGP_SPI == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_OGP_SPI].name); + print_supported_pcidevs(ogp_spi); +#endif } #if CONFIG_INTERNAL == 1 Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/print_wiki.c Fri Dec 3 15:48:11 2010 (r1241) @@ -299,6 +299,9 @@ #if CONFIG_NICINTEL_SPI == 1 print_supported_pcidevs_wiki(nics_intel_spi); #endif +#if CONFIG_OGP_SPI == 1 + print_supported_pcidevs_wiki(ogp_spi); +#endif printf("\n|}\n"); } Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/programmer.h Fri Dec 3 15:48:11 2010 (r1241) @@ -76,6 +76,9 @@ #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI, #endif +#if CONFIG_OGP_SPI == 1 + PROGRAMMER_OGP_SPI, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -121,6 +124,9 @@ BITBANG_SPI_MASTER_MCP, #endif #endif +#if CONFIG_OGP_SPI == 1 + BITBANG_SPI_MASTER_OGP, +#endif }; struct bitbang_spi_master { @@ -221,7 +227,7 @@ #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -402,6 +408,13 @@ extern const struct pcidev_status nics_intel_spi[]; #endif +/* ogp_spi.c */ +#if CONFIG_OGP_SPI == 1 +int ogp_spi_init(void); +int ogp_spi_shutdown(void); +extern const struct pcidev_status ogp_spi[]; +#endif + /* satasii.c */ #if CONFIG_SATASII == 1 int satasii_init(void); @@ -523,6 +536,9 @@ #if CONFIG_NICINTEL_SPI == 1 SPI_CONTROLLER_NICINTEL, #endif +#if CONFIG_OGP_SPI == 1 + SPI_CONTROLLER_OGP, +#endif SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/spi.c Fri Dec 3 15:48:11 2010 (r1241) @@ -146,6 +146,15 @@ }, #endif +#if CONFIG_OGP_SPI == 1 + { /* SPI_CONTROLLER_OGP */ + .command = bitbang_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = bitbang_spi_read, + .write_256 = bitbang_spi_write_256, + }, +#endif + {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ };

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[PATCH] Add support for the Open Graphics Project card as a programmer
by Mark Marshall 03 Dec '10

03 Dec '10

Hi. The attached patch adds support for the Open Graphics Project development card, OGD1, as a SPI flash programmer. The project is in the the process of designing and making a complete, open source, graphics card. Check out http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGA's are called XP10 and S3 (their part numbers). The XP10 contains it's own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large serial flash (2M bytes). The second serial flash is used to store the VGA BIOS. It is smaller (128K bytes). The attached patch adds support for programming either of the two serial flash chips. They are both serial SPI devices. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). I have also attached a log of the modified flashrom talking to both devices. I can read, erase, write and verify to both. The chips installed on my card are a SST25VF010 and a SST25VF016B. I have added a section to flashchips.c for the former. I have modified the flags of the later to say that writing works. Signed-off-by: Mark Marshall <mark.marshall(a)csr.com> Thanks, MM

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[PATCH] Do not crash with forced chips
by Carl-Daniel Hailfinger 02 Dec '10

02 Dec '10

Avoid printing the chip locks if chip detection was forced because lock access may involve flash chip registers which will not be mapped. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-no_force_register_access/flashrom.c =================================================================== --- flashrom-no_force_register_access/flashrom.c (Revision 1238) +++ flashrom-no_force_register_access/flashrom.c (Arbeitskopie) @@ -1163,8 +1163,12 @@ flash->vendor, flash->name, flash->total_size, flashbuses_to_text(flash->bustype), base); - if (flash->printlock) - flash->printlock(flash); + /* Flash registers will not be mapped if the chip was forced. Lock info + * may be stored in registers, so avoid lock info printing. + */ + if (!force) + if (flash->printlock) + flash->printlock(flash); return flash; } -- http://www.hailfinger.org/

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[commit] r1240 - trunk
by repository service 02 Dec '10

02 Dec '10

Author: hailfinger Date: Thu Dec 2 22:59:42 2010 New Revision: 1240 URL: http://flashrom.org/trac/flashrom/changeset/1240 Log: Avoid printing the chip locks if chip detection was forced because lock access may involve flash chip registers which will not be mapped. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.c Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Thu Dec 2 22:57:42 2010 (r1239) +++ trunk/flashrom.c Thu Dec 2 22:59:42 2010 (r1240) @@ -1163,8 +1163,12 @@ flash->vendor, flash->name, flash->total_size, flashbuses_to_text(flash->bustype), base); - if (flash->printlock) - flash->printlock(flash); + /* Flash registers will not be mapped if the chip was forced. Lock info + * may be stored in registers, so avoid lock info printing. + */ + if (!force) + if (flash->printlock) + flash->printlock(flash); return flash; }

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[PATCH] Add a board-enable for the MSI MS-6391 (845 Pro4)
by Uwe Hermann 02 Dec '10

02 Dec '10

See patch. Will send logs and lspci/superiotool later, don't have them here right now. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r1239 - trunk
by repository service 02 Dec '10

02 Dec '10

Author: uwe Date: Thu Dec 2 22:57:42 2010 New Revision: 1239 URL: http://flashrom.org/trac/flashrom/changeset/1239 Log: Add a board-enable for the MSI MS-6391 (845 Pro4). I found this via educated guessing and trial-and-error. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Thu Dec 2 03:41:55 2010 (r1238) +++ trunk/board_enable.c Thu Dec 2 22:57:42 2010 (r1239) @@ -1494,6 +1494,7 @@ * - Dell PowerEdge 1850: Intel PPGA604 + E7520 + ICH5R * - ASRock P4i65GV: Intel Socket478 + 865GV + ICH5R * - ASRock 775i65G: Intel LGA 775 + 865G + ICH5 + * - MSI MS-6391 (845 Pro4): Intel Socket478 + 845 + ICH2 */ static int intel_ich_gpio23_raise(void) { @@ -1963,6 +1964,7 @@ {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, {0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, + {0x8086, 0x244b, 0x1462, 0x3910, 0x8086, 0x2442, 0x1462, 0x3910, NULL, NULL, NULL, "MSI", "MS-6391 (845 Pro4)", 0, OK, intel_ich_gpio23_raise}, {0x1106, 0x3149, 0x1462, 0x7061, 0x1106, 0x3227, 0, 0, NULL, NULL, NULL, "MSI", "MS-7061 (KM4M-V/KM4AM-V)", 0, OK, w836xx_memw_enable_2e}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio44_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, "MSI", "MS-7207 (K8NGM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Dec 2 03:41:55 2010 (r1238) +++ trunk/print.c Thu Dec 2 22:57:42 2010 (r1239) @@ -506,6 +506,7 @@ B("MSI", "MS-6163 (MS-6163 Pro)",1, "http://www.msi.com/index.php?func=proddesc&prod_no=340", NULL), B("MSI", "MS-6178", 0, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=343", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>."), B("MSI", "MS-6330 (K7T Turbo)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=327", NULL), + B("MSI", "MS-6391 (845 Pro4)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=293", NULL), B("MSI", "MS-6561 (745 Ultra)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=274", NULL), B("MSI", "MS-6570 (K7N2)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=519", NULL), B("MSI", "MS-6577 (Xenon)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=e…", "This is an OEM board from HP, the HP name is Xenon."),

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Zotac MAG
by Saul A Peebsen 02 Dec '10

02 Dec '10

mythtv ~ # flashrom -V flashrom v0.9.2-r1001 on Linux 2.6.36-gentoo-r3 (x86_64), built with libpci 3.1.7, GCC 4.5.1 flashrom is free software, get the source code at http://www.flashrom.org Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "To Be Filled By O.E.M." DMI string system-product-name: "To Be Filled By O.E.M." DMI string system-version: "To Be Filled By O.E.M." DMI string baseboard-manufacturer: "To be filled by O.E.M." DMI string baseboard-product-name: "To be filled by O.E.M." DMI string baseboard-version: "To be filled by O.E.M." DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP79", enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Guessed flash bus type is SPI Found SMBus device 10de:0aa2 at 00:03:2 SPI BAR is at 0xfae80000, after clearing low bits BAR is at 0xfae80000 Mapping MCP67 SPI at 0xfae80000, unaligned size 0x544. SPI control is 0xc05a, enable=0, idle=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. SPI on this chipset is not supported yet. OK. This chipset supports the following protocols: None. Calibrating delay loop... 399M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1082 us, 10000 myus = 10100 us, OK. -- Thanks, Saul

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NVIDIA MCP65
by Mario Köhn 02 Dec '10

02 Dec '10

Hello, to help you finishing your on chipset MCP65 here is the output of 'flashrom -V' (it is also attached as plain text-file. flashrom v0.9.2-r1001 on Linux 2.6.36-ARCH (x86_64), built with libpci 3.1.7, GCC 4.5.0 20100520 (prerelease) flashrom is free software, get the source code at http://www.flashrom.org Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "MSI" DMI string system-product-name: "MS-7369" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "MSI" DMI string baseboard-product-name: "MS-7369" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP65", enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Guessed flash bus type is SPI Found SMBus device 10de:0446 at 00:01:1 SPI BAR is at 0xfec80000, after clearing low bits BAR is at 0xfec80000 Mapping MCP67 SPI at 0xfec80000, unaligned size 0x544. SPI control is 0x000a, enable=0, idle=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. SPI on this chipset is not supported yet. OK. This chipset supports the following protocols: None. Calibrating delay loop... 315M loops per second, 10 myus = 11 us, 100 myus = 96 us, 1000 myus = 982 us, 10000 myus = 9538 us, OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for ASD AE49F2008, 256 KB: skipped. Probing for Atmel AT25DF021, 256 KB: skipped. Probing for Atmel AT25DF041A, 512 KB: skipped. Probing for Atmel AT25DF081, 1024 KB: skipped. Probing for Atmel AT25DF161, 2048 KB: skipped. Probing for Atmel AT25DF321, 4096 KB: skipped. Probing for Atmel AT25DF321A, 4096 KB: skipped. Probing for Atmel AT25DF641, 8192 KB: skipped. Probing for Atmel AT25F512B, 64 KB: skipped. Probing for Atmel AT25FS010, 128 KB: skipped. Probing for Atmel AT25FS040, 512 KB: skipped. Probing for Atmel AT26DF041, 512 KB: skipped. Probing for Atmel AT26DF081A, 1024 KB: skipped. Probing for Atmel AT26DF161, 2048 KB: skipped. Probing for Atmel AT26DF161A, 2048 KB: skipped. Probing for Atmel AT26F004, 512 KB: skipped. Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: skipped. Probing for Atmel AT45DB011D, 128 KB: skipped. Probing for Atmel AT45DB021D, 256 KB: skipped. Probing for Atmel AT45DB041D, 512 KB: skipped. Probing for Atmel AT45DB081D, 1024 KB: skipped. Probing for Atmel AT45DB161D, 2048 KB: skipped. Probing for Atmel AT45DB321C, 4224 KB: skipped. Probing for Atmel AT45DB321D, 4096 KB: skipped. Probing for Atmel AT45DB642D, 8192 KB: skipped. Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: skipped. Probing for AMIC A25L40PU, 512 KB: skipped. Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: skipped. Probing for EMST F49B002UA, 256 KB: skipped. Probing for Eon EN25B05, 64 KB: skipped. Probing for Eon EN25B05T, 64 KB: skipped. Probing for Eon EN25B10, 128 KB: skipped. Probing for Eon EN25B10T, 128 KB: skipped. Probing for Eon EN25B20, 256 KB: skipped. Probing for Eon EN25B20T, 256 KB: skipped. Probing for Eon EN25B40, 512 KB: skipped. Probing for Eon EN25B40T, 512 KB: skipped. Probing for Eon EN25B80, 1024 KB: skipped. Probing for Eon EN25B80T, 1024 KB: skipped. Probing for Eon EN25B16, 2048 KB: skipped. Probing for Eon EN25B16T, 2048 KB: skipped. Probing for Eon EN25B32, 4096 KB: skipped. Probing for Eon EN25B32T, 4096 KB: skipped. Probing for Eon EN25B64, 8192 KB: skipped. Probing for Eon EN25B64T, 8192 KB: skipped. Probing for Eon EN25D16, 2048 KB: skipped. Probing for Eon EN25F05, 64 KB: skipped. Probing for Eon EN25F10, 128 KB: skipped. Probing for Eon EN25F20, 256 KB: skipped. Probing for Eon EN25F40, 512 KB: skipped. Probing for Eon EN25F80, 1024 KB: skipped. Probing for Eon EN25F16, 2048 KB: skipped. Probing for Eon EN25F32, 4096 KB: skipped. Probing for Eon EN29F010, 128 KB: skipped. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Intel 28F001BX-B, 128 KB: skipped. Probing for Intel 28F001BX-T, 128 KB: skipped. Probing for Intel 28F004S5, 512 KB: skipped. Probing for Intel 28F004BV/BE-B, 512 KB: skipped. Probing for Intel 28F004BV/BE-T, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: skipped. Probing for Intel 82802AC, 1024 KB: skipped. Probing for Macronix MX25L512, 64 KB: skipped. Probing for Macronix MX25L1005, 128 KB: skipped. Probing for Macronix MX25L2005, 256 KB: skipped. Probing for Macronix MX25L4005, 512 KB: skipped. Probing for Macronix MX25L8005, 1024 KB: skipped. Probing for Macronix MX25L1605, 2048 KB: skipped. Probing for Macronix MX25L1635D, 2048 KB: skipped. Probing for Macronix MX25L3205, 4096 KB: skipped. Probing for Macronix MX25L3235D, 4096 KB: skipped. Probing for Macronix MX25L6405, 8192 KB: skipped. Probing for Macronix MX25L12805, 16384 KB: skipped. Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for Numonyx M25PE10, 128 KB: skipped. Probing for Numonyx M25PE20, 256 KB: skipped. Probing for Numonyx M25PE40, 512 KB: skipped. Probing for Numonyx M25PE80, 1024 KB: skipped. Probing for Numonyx M25PE16, 2048 KB: skipped. Probing for PMC Pm25LV010, 128 KB: skipped. Probing for PMC Pm25LV016B, 2048 KB: skipped. Probing for PMC Pm25LV020, 256 KB: skipped. Probing for PMC Pm25LV040, 512 KB: skipped. Probing for PMC Pm25LV080B, 1024 KB: skipped. Probing for PMC Pm25LV512, 64 KB: skipped. Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: skipped. Probing for PMC Pm49FL004, 512 KB: skipped. Probing for Sanyo LF25FW203A, 2048 KB: skipped. Probing for Sharp LHF00L04, 1024 KB: skipped. Probing for Spansion S25FL008A, 1024 KB: skipped. Probing for Spansion S25FL016A, 2048 KB: skipped. Probing for SST SST25VF016B, 2048 KB: skipped. Probing for SST SST25VF032B, 4096 KB: skipped. Probing for SST SST25VF040.REMS, 512 KB: skipped. Probing for SST SST25VF040B, 512 KB: skipped. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Probing for SST SST25VF080B, 1024 KB: skipped. Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: skipped. Probing for SST SST49LF003A/B, 384 KB: skipped. Probing for SST SST49LF004A/B, 512 KB: skipped. Probing for SST SST49LF004C, 512 KB: skipped. Probing for SST SST49LF008A, 1024 KB: skipped. Probing for SST SST49LF008C, 1024 KB: skipped. Probing for SST SST49LF016C, 2048 KB: skipped. Probing for SST SST49LF020, 256 KB: skipped. Probing for SST SST49LF020A, 256 KB: skipped. Probing for SST SST49LF040, 512 KB: skipped. Probing for SST SST49LF040B, 512 KB: skipped. Probing for SST SST49LF080A, 1024 KB: skipped. Probing for SST SST49LF160C, 2048 KB: skipped. Probing for ST M25P05-A, 64 KB: skipped. Probing for ST M25P05.RES, 64 KB: skipped. Probing for ST M25P10-A, 128 KB: skipped. Probing for ST M25P10.RES, 128 KB: skipped. Probing for ST M25P20, 256 KB: skipped. Probing for ST M25P40, 512 KB: skipped. Probing for ST M25P40-old, 512 KB: skipped. Probing for ST M25P80, 1024 KB: skipped. Probing for ST M25P16, 2048 KB: skipped. Probing for ST M25P32, 4096 KB: skipped. Probing for ST M25P64, 8192 KB: skipped. Probing for ST M25P128, 16384 KB: skipped. Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: skipped. Probing for ST M50FLW040B, 512 KB: skipped. Probing for ST M50FLW080A, 1024 KB: skipped. Probing for ST M50FLW080B, 1024 KB: skipped. Probing for ST M50FW002, 256 KB: skipped. Probing for ST M50FW016, 2048 KB: skipped. Probing for ST M50FW040, 512 KB: skipped. Probing for ST M50FW080, 1024 KB: skipped. Probing for ST M50LPW116, 2048 KB: skipped. Probing for SyncMOS S29C31004T, 512 KB: skipped. Probing for SyncMOS S29C51001T, 128 KB: skipped. Probing for SyncMOS S29C51002T, 256 KB: skipped. Probing for SyncMOS S29C51004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: skipped. Probing for Winbond W25Q16, 2048 KB: skipped. Probing for Winbond W25Q32, 4096 KB: skipped. Probing for Winbond W25x10, 128 KB: skipped. Probing for Winbond W25x20, 256 KB: skipped. Probing for Winbond W25x40, 512 KB: skipped. Probing for Winbond W25x80, 1024 KB: skipped. Probing for Winbond W25x16, 2048 KB: skipped. Probing for Winbond W25x32, 4096 KB: skipped. Probing for Winbond W25x64, 8192 KB: skipped. Probing for Winbond W29C011, 128 KB: skipped. Probing for Winbond W29C020C, 256 KB: skipped. Probing for Winbond W29C040P, 512 KB: skipped. Probing for Winbond W29EE011, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: skipped. Probing for Winbond W39V040B, 512 KB: skipped. Probing for Winbond W39V040C, 512 KB: skipped. Probing for Winbond W39V040FA, 512 KB: skipped. Probing for Winbond W39V080A, 1024 KB: skipped. Probing for Winbond W49F002U, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: skipped. Probing for Winbond W49V002FA, 256 KB: skipped. Probing for Winbond W39V080FA, 1024 KB: skipped. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Probing for EON unknown EON SPI chip, 0 KB: skipped. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Probing for SST unknown SST SPI chip, 0 KB: skipped. Probing for ST unknown ST SPI chip, 0 KB: skipped. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. -- Diese Nachricht wurde mittels GPG unterschrieben. Um sicher zu stellen, dass die Nachricht nach dem Versand nicht verändert wurde, nutzen Sie bitte ein GPG-fähiges Mailprogramm. Informationen finden Sie unter: http://www.gnupg.org/index.de.html, und http://de.wikipedia.org/wiki/GNU_Privacy_Guard Für Windows gibt es hier ein umfangreiches und kostenloses Paket http://www.gpg4win.de/index-de.html

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