flashrom

flashrom@flashrom.org

7 participants
9163 discussions

bitfield checker
by Carl-Daniel Hailfinger 26 Sep '11

26 Sep '11

Not a patch, and unfinished... I'd be interested in results of non-gcc compilers and/or non-i386 platforms. Will rework this once I have some more spare time. Regards, Carl-Daniel -- http://www.hailfinger.org/

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NVidia MCP73
by Koen Rousseau 24 Sep '11

24 Sep '11

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Re: [flashrom] Macronix MX25L6445E
by Stefan Tauner 22 Sep '11

22 Sep '11

On Thu, 22 Sep 2011 09:40:22 +0200 "Wagner, Helge (GE Germany)" <Helge.Wagner(a)ge.com> wrote: > Hi all, > > did I miss your answer or didn't you write one yet? hello helge! our patch queue[1] is quite long and my summer work for flashrom made it even longer. your patch wont get lost, but it might take a while for it to be reviewed further and merged eventually, sorry. 1: http://patchwork.coreboot.org/project/flashrom/list/ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] Macronix MX25L6445E
by Wagner, Helge (GE Germany) 22 Sep '11

22 Sep '11

Hi all, did I miss your answer or didn't you write one yet? Regards, Helge -----Original Message----- From: flashrom-bounces(a)flashrom.org [mailto:flashrom-bounces@flashrom.org] On Behalf Of Wagner, Helge (GE Germany) Sent: Dienstag, 19. Juli 2011 10:57 To: Stefan Reinauer; Carl-Daniel Hailfinger Cc: flashrom(a)flashrom.org Subject: Re: [flashrom] Macronix MX25L6445E Stefan, Did you use my latest patch (at http://www.flashrom.org/pipermail/flashrom/2011-June/007013.html )? Carl-Daniel, > >> To be sure that the spi_block_erase_20 works for both the MX25L6405 > >> and the MX25L6445E, we could change the block erase size from 64K > >> to 4K. This should work even for the MX25L6405, but with the side > >> effect of the erase taking longer than needed. This was the comment for my first try. > Sorry, but AFAICS this will cause chip corruption. To be exact, > specifying a too small eraseblock size (4 kB instead of 64 kB) means > that flashrom will walk the device in 4 kB blocks, erase each block > and write to it. Now if the actual erase block size is bigger than the > specified block size, you'll get this: And exactly because of that I have reworked the patch (see above). Regards, Helge -----Original Message----- From: Stefan Reinauer [mailto:stefan.reinauer@coreboot.org] Sent: Montag, 18. Juli 2011 23:49 To: Carl-Daniel Hailfinger Cc: Wagner, Helge (GE Germany); flashrom(a)flashrom.org Subject: Re: [flashrom] Macronix MX25L6445E * Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> [110718 23:44]: > Am 18.07.2011 19:07 schrieb Stefan Reinauer: > > * Wagner, Helge (GE Intelligent Platforms) <Helge.Wagner(a)ge.com> [110527 15:46]: > > > >> To be sure that the spi_block_erase_20 works for both the MX25L6405 > >> and the MX25L6445E, we could change the block erase size from 64K > >> to 4K. This should work even for the MX25L6405, but with the side > >> effect of the erase taking longer than needed. > >> > >> > >> > >> Any comments? > >> > > > > works great for me! > > > > > >> Please find my patches included. > >> > >> Signed-off-by: Helge Wagner <helge.wagner(a)ge.com> > >> > > Acked-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> > > > > Sorry, but AFAICS this will cause chip corruption. To be exact, > specifying a too small eraseblock size (4 kB instead of 64 kB) means > that flashrom will walk the device in 4 kB blocks, erase each block > and write to it. Now if the actual erase block size is bigger than the > specified block size, you'll get this: Yes, I agree that changing the block erase size is risky. Good thing the patch does not change it, so it should be save to apply, plus it solves the problem. Stefan _______________________________________________ flashrom mailing list flashrom(a)flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom

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summary from EPoX EP-8KRAI-X
by Ben Taylor 22 Sep '11

22 Sep '11

Hello, stefanct requested I send this summary. My motherboard is a EPoX EP-8KRAI-X with a Winbond W49F002UP12B bios chip (with sticker "DP1"). http://paste.flashrom.org/view.php?id=834 As you can see, my eeprom is not detected. My goal is to update my bios with EPoX's latest version. I could provide that rom and EpoX's manual pdf if that would help you. Thanks, Ben Taylor (MacGuges)

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Re: [flashrom] ReportFlashrom
by Stefan Tauner 20 Sep '11

20 Sep '11

On Wed, 14 Sep 2011 21:48:57 +0800 Boris Klimenko <bdostuk(a)gmail.com> wrote: > DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." > DMI string system-product-name: "P67A-UD3P" > DMI string system-version: " " > DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." > DMI string baseboard-product-name: "P67A-UD3P" > DMI string baseboard-version: "x.x" > DMI string chassis-type: "Desktop" > Found ITE Super I/O, ID 0x8728 on port 0x2e > Found chipset "Intel P67" with PCI ID 8086:1c46. > This chipset is marked as untested. If you are using an up-to-date version > of flashrom please email a report to flashrom(a)flashrom.org including a > verbose (-V) log. Thank you! Hello Boris, Thanks for your report! I have marked the chipset and mainboard as tested and will commit that later. There are two almost identical revisions of the mainboard (1.0 and 1.1). Just for the record... do you happen to know which version you got? Thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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ECS P4VXMS (V1.0A) - OK
by Marcos Felipe Rasia de Mello 19 Sep '11

19 Sep '11

The flash chip is a Winbond W49F002U-12B. BIOS "vxmsv12c.BIN" from: http://www.ecs.com.tw/ECSWebSite/Downloads/Downloads_Driver_Detail.aspx?det… Attached the verbose logs and lspci output. Marcos

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Re: [flashrom] [PATCH] Unsignify lengths and addresses in chip functions and structs
by Carl-Daniel Hailfinger 19 Sep '11

19 Sep '11

Am 23.08.2011 17:12 schrieb Stefan Tauner: > compile tested with gcc 4.4.5 and clang 2.8 I agree with the idea and support it. However, I don't know how supportable this is on 16 bit platforms with 16 bit int. We need at least 24 bits to handle flash addresses, and we could either create a new typedef chipoffset_t or specify uint32_t explicitly. I favor a new typedef because it will make auditing easier if we ever run on 16 bit programmers. > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> A comment about the typedef idea would be appreciated. Anyway, this is (even if you reject the explicit type idea) Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1450 - trunk
by repository service 19 Sep '11

19 Sep '11

Author: stefanct Date: Mon Sep 19 00:42:18 2011 New Revision: 1450 URL: http://flashrom.org/trac/flashrom/changeset/1450 Log: Revert "Unsignify lengths and addresses in chip functions and structs" - probe_timing was changed to unsigned although we use negative values for special cases - some code was not changed along hence did no longer compile: * dediprog's read and write functions * linux_spi's read and write functions - it introduced a number of new sign conversion warnings (http://paste.flashrom.org/view.php?id=832) To be safe this patch reverts all changes made in r1448, a corrected patch will follow later. Thanks to idwer for pointing out the problem first! Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/82802ab.c trunk/chipdrivers.h trunk/dummyflasher.c trunk/flash.h trunk/flashrom.c trunk/it87spi.c trunk/jedec.c trunk/m29f400bt.c trunk/programmer.h trunk/serprog.c trunk/spi.c trunk/spi25.c trunk/sst28sf040.c trunk/wbsio_spi.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/82802ab.c Mon Sep 19 00:42:18 2011 (r1450) @@ -141,7 +141,7 @@ } /* chunksize is 1 */ -int write_82802ab(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_82802ab(struct flashchip *flash, uint8_t *src, int start, int len) { int i; chipaddr dst = flash->virtual_memory + start; Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/chipdrivers.h Mon Sep 19 00:42:18 2011 (r1450) @@ -41,9 +41,9 @@ int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen); -int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_read(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len); +int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, int start, int len); +int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); +int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); int spi_write_status_register(struct flashchip *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); @@ -51,12 +51,12 @@ void spi_prettyprint_status_register_welwip(uint8_t status); int spi_prettyprint_status_register(struct flashchip *flash); int spi_disable_blockprotect(struct flashchip *flash); -int spi_byte_program(unsigned int addr, uint8_t databyte); -int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_nbyte_read(unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_read_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); -int spi_write_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); -int spi_aai_write(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_byte_program(int addr, uint8_t databyte); +int spi_nbyte_program(int addr, uint8_t *bytes, int len); +int spi_nbyte_read(int addr, uint8_t *bytes, int len); +int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); +int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); +int spi_aai_write(struct flashchip *flash, uint8_t *buf, int start, int len); /* a25.c */ int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash); @@ -81,7 +81,7 @@ uint8_t wait_82802ab(struct flashchip *flash); int probe_82802ab(struct flashchip *flash); int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize); -int write_82802ab(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int write_82802ab(struct flashchip *flash, uint8_t *buf, int start, int len); void print_status_82802ab(uint8_t status); int unlock_82802ab(struct flashchip *flash); int unlock_28f004s5(struct flashchip *flash); @@ -94,8 +94,8 @@ int write_byte_program_jedec(chipaddr bios, uint8_t *src, chipaddr dst); int probe_jedec(struct flashchip *flash); -int write_jedec(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); -int write_jedec_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int write_jedec(struct flashchip *flash, uint8_t *buf, int start, int len); +int write_jedec_1(struct flashchip *flash, uint8_t *buf, int start, int len); int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize); int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize); int erase_chip_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize); @@ -104,7 +104,7 @@ int probe_m29f400bt(struct flashchip *flash); int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len); int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len); -int write_m29f400bt(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int write_m29f400bt(struct flashchip *flash, uint8_t *buf, int start, int len); void protect_m29f400bt(chipaddr bios); /* pm49fl00x.c */ @@ -114,7 +114,7 @@ /* sst28sf040.c */ int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size); -int write_28sf040(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int write_28sf040(struct flashchip *flash, uint8_t *buf, int start, int len); int unprotect_28sf040(struct flashchip *flash); int protect_28sf040(struct flashchip *flash); Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/dummyflasher.c Mon Sep 19 00:42:18 2011 (r1450) @@ -63,7 +63,7 @@ static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, - unsigned int start, unsigned int len); + int start, int len); static const struct spi_programmer spi_programmer_dummyflasher = { .type = SPI_CONTROLLER_DUMMY, @@ -528,7 +528,7 @@ } static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, - unsigned int start, unsigned int len) + int start, int len) { return spi_write_chunked(flash, buf, start, len, spi_write_256_chunksize); Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/flash.h Mon Sep 19 00:42:18 2011 (r1450) @@ -108,9 +108,9 @@ uint32_t model_id; /* Total chip size in kilobytes */ - unsigned int total_size; + int total_size; /* Chip page size in bytes */ - unsigned int page_size; + int page_size; int feature_bits; /* @@ -122,7 +122,7 @@ int (*probe) (struct flashchip *flash); /* Delay after "enter/exit ID mode" commands in microseconds. */ - unsigned int probe_timing; + int probe_timing; /* * Erase blocks and associated erase function. Any chip erase function @@ -143,8 +143,8 @@ int (*printlock) (struct flashchip *flash); int (*unlock) (struct flashchip *flash); - int (*write) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); - int (*read) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); + int (*write) (struct flashchip *flash, uint8_t *buf, int start, int len); + int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len); struct { uint16_t min; uint16_t max; @@ -202,7 +202,7 @@ extern const char flashrom_version[]; extern char *chip_to_probe; void map_flash_registers(struct flashchip *flash); -int read_memmapped(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); int erase_flash(struct flashchip *flash); int probe_flash(int startchip, struct flashchip *fill_flash, int force); int read_flash_to_file(struct flashchip *flash, const char *filename); @@ -210,7 +210,7 @@ int max(int a, int b); void tolower_string(char *str); char *extract_param(char **haystack, const char *needle, const char *delim); -int verify_range(struct flashchip *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message); +int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, const char *message); int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran); char *strcat_realloc(char *dest, const char *src); void print_version(void); Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/flashrom.c Mon Sep 19 00:42:18 2011 (r1450) @@ -564,7 +564,7 @@ flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size); } -int read_memmapped(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len) +int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len) { chip_readn(buf, flash->virtual_memory + start, len); @@ -710,7 +710,7 @@ * @message string to print in the "FAILED" message * @return 0 for success, -1 for failure */ -int verify_range(struct flashchip *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, +int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, const char *message) { int i; Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/it87spi.c Mon Sep 19 00:42:18 2011 (r1450) @@ -106,9 +106,9 @@ static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, - unsigned int start, unsigned int len); + int start, int len); static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, - unsigned int start, unsigned int len); + int start, int len); static const struct spi_programmer spi_programmer_it87xx = { .type = SPI_CONTROLLER_IT87XX, @@ -340,7 +340,7 @@ * Need to read this big flash using firmware cycles 3 byte at a time. */ static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, - unsigned int start, unsigned int len) + int start, int len) { fast_spi = 0; @@ -358,7 +358,7 @@ } static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, - unsigned int start, unsigned int len) + int start, int len) { /* * IT8716F only allows maximum of 512 kb SPI chip size for memory Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/jedec.c Mon Sep 19 00:42:18 2011 (r1450) @@ -355,7 +355,7 @@ } /* chunksize is 1 */ -int write_jedec_1(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_jedec_1(struct flashchip *flash, uint8_t *src, int start, int len) { int i, failed = 0; chipaddr dst = flash->virtual_memory + start; @@ -376,7 +376,7 @@ return failed; } -int write_page_write_jedec_common(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int page_size) +int write_page_write_jedec_common(struct flashchip *flash, uint8_t *src, int start, int page_size) { int i, tried = 0, failed; uint8_t *s = src; @@ -424,7 +424,7 @@ * This function is a slightly modified copy of spi_write_chunked. * Each page is written separately in chunks with a maximum size of chunksize. */ -int write_jedec(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len) +int write_jedec(struct flashchip *flash, uint8_t *buf, int start, int len) { int i, starthere, lenhere; /* FIXME: page_size is the wrong variable. We need max_writechunk_size Modified: trunk/m29f400bt.c ============================================================================== --- trunk/m29f400bt.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/m29f400bt.c Mon Sep 19 00:42:18 2011 (r1450) @@ -28,7 +28,7 @@ functions. */ /* chunksize is 1 */ -int write_m29f400bt(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_m29f400bt(struct flashchip *flash, uint8_t *src, int start, int len) { int i; chipaddr bios = flash->virtual_memory; Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/programmer.h Mon Sep 19 00:42:18 2011 (r1450) @@ -556,23 +556,23 @@ #define MAX_DATA_WRITE_UNLIMITED 256 struct spi_programmer { enum spi_controller type; - unsigned int max_data_read; - unsigned int max_data_write; + int max_data_read; + int max_data_write; int (*command)(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int (*multicommand)(struct spi_command *cmds); /* Optimized functions for this programmer */ - int (*read)(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); - int (*write_256)(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); + int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len); + int (*write_256)(struct flashchip *flash, uint8_t *buf, int start, int len); }; extern const struct spi_programmer *spi_programmer; int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int default_spi_send_multicommand(struct spi_command *cmds); -int default_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); -int default_spi_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); +int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); void register_spi_programmer(const struct spi_programmer *programmer); /* ichspi.c */ @@ -610,7 +610,7 @@ void serprog_delay(int delay); int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int serprog_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +int serprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); #endif /* serial.c */ Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/serprog.c Mon Sep 19 00:42:18 2011 (r1450) @@ -795,7 +795,7 @@ * the advantage that it is much faster for most chips, but breaks those with * non-contiguous address space (like AT45DB161D). When spi_read_chunked is * fixed this method can be removed. */ -int serprog_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +int serprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int i; int cur_len; Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/spi.c Mon Sep 19 00:42:18 2011 (r1450) @@ -97,9 +97,9 @@ return result; } -int default_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - unsigned int max_data = spi_programmer->max_data_read; + int max_data = spi_programmer->max_data_read; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI read chunk size not defined " "on this hardware. Please report a bug at " @@ -109,9 +109,9 @@ return spi_read_chunked(flash, buf, start, len, max_data); } -int default_spi_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - unsigned int max_data = spi_programmer->max_data_write; + int max_data = spi_programmer->max_data_write; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI write chunk size not defined " "on this hardware. Please report a bug at " @@ -121,7 +121,7 @@ return spi_write_chunked(flash, buf, start, len, max_data); } -int spi_chip_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int addrbase = 0; if (!spi_programmer->read) { @@ -160,7 +160,7 @@ * .write_256 = spi_chip_write_1 */ /* real chunksize is up to 256, logical chunksize is 256 */ -int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { if (!spi_programmer->write_256) { msg_perr("%s called, but SPI page write is unsupported on this " Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/spi25.c Mon Sep 19 00:42:18 2011 (r1450) @@ -844,7 +844,7 @@ return ret; } -int spi_byte_program(unsigned int addr, uint8_t databyte) +int spi_byte_program(int addr, uint8_t databyte) { int result; struct spi_command cmds[] = { @@ -879,7 +879,7 @@ return result; } -int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len) +int spi_nbyte_program(int addr, uint8_t *bytes, int len) { int result; /* FIXME: Switch to malloc based on len unless that kills speed. */ @@ -954,7 +954,7 @@ return 0; } -int spi_nbyte_read(unsigned int address, uint8_t *bytes, unsigned int len) +int spi_nbyte_read(int address, uint8_t *bytes, int len) { const unsigned char cmd[JEDEC_READ_OUTSIZE] = { JEDEC_READ, @@ -972,7 +972,7 @@ * FIXME: Use the chunk code from Michael Karcher instead. * Each page is read separately in chunks with a maximum size of chunksize. */ -int spi_read_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) +int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize) { int rc = 0; int i, j, starthere, lenhere; @@ -1012,7 +1012,7 @@ * FIXME: Use the chunk code from Michael Karcher instead. * Each page is written separately in chunks with a maximum size of chunksize. */ -int spi_write_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) +int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize) { int rc = 0; int i, j, starthere, lenhere; @@ -1061,7 +1061,7 @@ * (e.g. due to size constraints in IT87* for over 512 kB) */ /* real chunksize is 1, logical chunksize is 1 */ -int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, int start, int len) { int i, result = 0; @@ -1076,7 +1076,7 @@ return 0; } -int spi_aai_write(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_aai_write(struct flashchip *flash, uint8_t *buf, int start, int len) { uint32_t pos = start; int result; Modified: trunk/sst28sf040.c ============================================================================== --- trunk/sst28sf040.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/sst28sf040.c Mon Sep 19 00:42:18 2011 (r1450) @@ -76,7 +76,7 @@ } /* chunksize is 1 */ -int write_28sf040(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_28sf040(struct flashchip *flash, uint8_t *src, int start, int len) { int i; chipaddr bios = flash->virtual_memory; Modified: trunk/wbsio_spi.c ============================================================================== --- trunk/wbsio_spi.c Sun Sep 18 17:15:31 2011 (r1449) +++ trunk/wbsio_spi.c Mon Sep 19 00:42:18 2011 (r1450) @@ -62,7 +62,7 @@ static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len); +static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); static const struct spi_programmer spi_programmer_wbsio = { .type = SPI_CONTROLLER_WBSIO, @@ -194,7 +194,7 @@ return 0; } -static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len) +static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { return read_memmapped(flash, buf, start, len); }

1 0

Re: [flashrom] [PATCH 5/8] ichspi: add support for Intel Hardware Sequencing
by Carl-Daniel Hailfinger 18 Sep '11

18 Sep '11

Am 20.08.2011 12:39 schrieb Stefan Tauner: > todo: > - revise hwseq activation: when should hwseq be used, when swseq? > in the current version i have added a programmer parameter to tell flashrom when one > wants to use hwseq _if it is available_ (i.e. descriptor valid), example: > flashrom -p internal:laptop=force_I_want_a_brick,hwseq=yes -VV > this needs to be documented in the man page if it gets merged like that. > - commit message (is a link to my blog post a good idea (additionally)?) We have no limits for the commit message size, but maybe we should start to package additional documentation with flashrom? > - revise (levels of) prints > - revise timeout values (for optimal performance) > - build upon the upcoming opaque interface framework instead I see all those TODOs, and most of them should be addressed before enabling the code. That's why I'd like to get most of this patch merged really soon except for the few places where the new code is hooked up. That way we get a much smaller remaining patch and the discussion about user interfaces and infrastructure are not attached to a megapatch, but rather to a small "hook up hwseq" patch. > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipdrivers.h | 6 + > flashchips.c | 23 ++++- > flashchips.h | 2 + > ich_descriptors.c | 35 +++++ > ich_descriptors.h | 3 +- > ichspi.c | 357 +++++++++++++++++++++++++++++++++++++++++++++++++++-- > programmer.h | 1 + > 7 files changed, 414 insertions(+), 13 deletions(-) > > diff --git a/chipdrivers.h b/chipdrivers.h > index 3f5b503..f3781ae 100644 > --- a/chipdrivers.h > +++ b/chipdrivers.h > @@ -86,6 +86,12 @@ void print_status_82802ab(uint8_t status); > int unlock_82802ab(struct flashchip *flash); > int unlock_28f004s5(struct flashchip *flash); > > +/* ichspi.c */ > +int ich_hwseq_probe(struct flashchip *flash); > +int ich_hwseq_read(struct flashchip *flash, uint8_t *buf, int start, int len); > +int ich_hwseq_block_erase(struct flashchip *flash, unsigned int addr, unsigned int blocklen); > +int ich_hwseq_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); Postpone this hunk for the hookup patch. > + > /* jedec.c */ > uint8_t oddparity(uint8_t val); > void toggle_ready_jedec(chipaddr dst); > diff --git a/flashchips.c b/flashchips.c > index 4d741a0..20f7197 100644 > --- a/flashchips.c > +++ b/flashchips.c > @@ -8782,7 +8782,27 @@ const struct flashchip flashchips[] = { > .read = read_memmapped, > .voltage = {3000, 3600}, /* Also has 12V fast program */ > }, > - > +#if defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) > + { > + .vendor = "Intel", > + .name = "Hardware Sequencing", > + .bustype = BUS_SPI, > + .manufacture_id = INTEL_ID, > + .model_id = INTEL_HWSEQ, > + .total_size = 0, > + .page_size = 256, > + .tested = TEST_OK_PREW, > + .probe = ich_hwseq_probe, > + .block_erasers = > + { > + { /* erase blocks will be set by the probing function */ > + .block_erase = ich_hwseq_block_erase, > + } > + }, > + .write = ich_hwseq_write_256, > + .read = ich_hwseq_read, > + }, > +#endif // defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) Postpone this hunk for the hookup patch. > { > .vendor = "AMIC", > .name = "unknown AMIC SPI chip", > @@ -8915,6 +8935,7 @@ const struct flashchip flashchips[] = { > .probe = probe_spi_rdid, > .write = NULL, > }, > + > { > .vendor = "Generic", > .name = "unknown SPI chip (REMS)", > diff --git a/flashchips.h b/flashchips.h > index ff49d31..1374b2f 100644 > --- a/flashchips.h > +++ b/flashchips.h > @@ -346,6 +346,8 @@ > #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ > #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ > > +#define INTEL_HWSEQ 0xFFFE /* dummy ID for hardware sequencing */ Postpone... > + > #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */ > > /* > diff --git a/ich_descriptors.c b/ich_descriptors.c > index ce40d9f..8076b09 100644 > --- a/ich_descriptors.c > +++ b/ich_descriptors.c > @@ -214,6 +214,41 @@ void prettyprint_ich_descriptor_master(const struct ich_desc_master *mstr) > msg_pdbg2("\n"); > } > > +/** Returns the integer representation of the component density with index > +idx in bytes or 0 if a correct size can not be determined. */ > +int getFCBA_component_density(uint8_t idx, const struct ich_descriptors *desc) I'd prefer to have the order (desc, idx) for the parameters here. > +{ > + uint8_t size_enc; > + static const int const dec_mem[6] = { > + 512 * 1024, > + 1 * 1024 * 1024, > + 2 * 1024 * 1024, > + 4 * 1024 * 1024, > + 8 * 1024 * 1024, > + 16 * 1024 * 1024, > + }; Kill dec_mem and replace dec_mem[size_enc] with (1<<(19+size_enc)). > + > + switch(idx) { > + case 0: > + size_enc = desc->component.comp1_density; > + break; > + case 1: > + if (desc->content.NC == 0) If NC is shorthand for "not connected", this looks like inverted logic. > + return 0; > + size_enc = desc->component.comp2_density; > + break; > + default: > + msg_perr("Only component index 0 or 1 are supported yet.\n"); More specific error message: "Only ICH SPI component..." > + return 0; > + } > + if (size_enc > 5) { > + msg_perr("Density of component with index %d is invalid. " Same error message change here. > + "Encoded density is 0x%x.\n", idx, size_enc); > + return 0; > + } > + return dec_mem[size_enc]; > +} > + > static uint32_t read_descriptor_reg(uint8_t section, uint16_t offset, void *spibar) > { > uint32_t control = 0; > diff --git a/ich_descriptors.h b/ich_descriptors.h > index b1da914..8ab798f 100644 > --- a/ich_descriptors.h > +++ b/ich_descriptors.h > @@ -255,7 +255,8 @@ void prettyprint_ich_descriptor_region(const struct ich_descriptors *desc); > void prettyprint_ich_descriptor_master(const struct ich_desc_master *master); > > int read_ich_descriptors_via_fdo(void *spibar, struct ich_descriptors *desc); > - > +int getFCBA_component_density(uint8_t idx, const struct ich_descriptors *desc); > + > #endif /* BITFIELDS == 1 */ > #endif /* __ICH_DESCRIPTORS_H__ */ > #endif /* defined(__i386__) || defined(__x86_64__) */ > diff --git a/ichspi.c b/ichspi.c > index 2e25d34..61c0825 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -26,7 +26,10 @@ > #if defined(__i386__) || defined(__x86_64__) > > #include <string.h> > +#include <stdlib.h> > #include "flash.h" > +#include "flashchips.h" > +#include "chipdrivers.h" Including flashchips.h or chipdrivers.h from a programmer driver is a sign that something went wrong during the design phase. > #include "programmer.h" > #include "spi.h" > #include "ich_descriptors.h" > @@ -1084,6 +1087,298 @@ static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, > return result; > } > > +static struct hwseq { > + uint32_t size_comp0; > + uint32_t size_comp1; > +} hwseq; > + > +static void ich_hwseq_set_addr(uint32_t addr) > +{ > + uint32_t addr_old = REGREAD32(ICH9_REG_FADDR) & ~0x01FFFFFF; > + REGWRITE32(ICH9_REG_FADDR, (addr & 0x01FFFFFF) | addr_old); Can this write fail somehow? > +} > + > +/* Sets FADDR.FLA to 'addr' and returns the erase block size in bytes > + * of the block containing this address. */ Is it really possible to encode per-region block sizes in a descriptor? > +static uint32_t ich_hwseq_get_erase_block_size(unsigned int addr) > +{ > + uint8_t enc_berase; > + static const uint32_t const dec_berase[4] = { decode_ instead of dec_. dec_ sounds too much like decrement. Or you pick a completely different name, e.g. eraseblock_sizes. > + 256, > + 4 * 1024, > + 8 * 1024, > + 64 * 1024 > + }; > + > + ich_hwseq_set_addr(addr); > + enc_berase = (REGREAD16(ICH9_REG_HSFS) & HSFS_BERASE) >> HSFS_BERASE only has two adjacent bits set, correct? > + HSFS_BERASE_OFF; > + return dec_berase[enc_berase]; > +} > + > +/* Polls for Cycle Done Status, Flash Cycle Error or timeout in 10 us intervals. Not something to be addressed in this patch, but we should really think about exponential backoff with maximum wait for such wait-for-hardware calls. > + Resets all error flags in HSFS. > + Returns 0 if the cycle completes successfully without errors within > + timeout us, 1 on errors. */ > +static int ich_hwseq_wait_for_cycle_complete(unsigned int timeout, Can we specify the timeout in usecs instead and use programmer_delay(8) to avoid division overhead (use shift instead)? > + unsigned int len) > +{ > + uint16_t hsfs; > + uint32_t addr; > + > + while ((((hsfs = REGREAD16(ICH9_REG_HSFS)) & > + (HSFS_FDONE | HSFS_FCERR)) == 0) && Can we really ignore AEL here? > + --timeout) { > + programmer_delay(10); > + } > + REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS)); This clears all errors. OK. > + if (!timeout) { > + addr = REGREAD32(ICH9_REG_FADDR) & 0x01FFFFFF; > + msg_perr("Timeout error between offset 0x%08x and " > + "0x%08x + %d (=0x%08x)!\n", Please don't mix hex and decimal encoding. > + addr, addr, len - 1, addr + len - 1); > + prettyprint_ich9_reg_hsfs(hsfs); > + prettyprint_ich9_reg_hsfc(REGREAD16(ICH9_REG_HSFC)); > + return 1; > + } > + > + if (hsfs & HSFS_FCERR) { > + addr = REGREAD32(ICH9_REG_FADDR) & 0x01FFFFFF; > + msg_perr("Transaction error between offset 0x%08x and " > + "0x%08x (=0x%08x + %d)!\n", hex/decimal mixture. > + addr, addr + len - 1, addr, len - 1); > + prettyprint_ich9_reg_hsfs(hsfs); > + prettyprint_ich9_reg_hsfc(REGREAD16(ICH9_REG_HSFC)); > + return 1; > + } > + return 0; > +} > + ich_hwseq_probe, ich_hwseq_send_command, ich_hwseq_block_erase, ich_hwseq_read and ich_hwseq_write256 use an interface which does not fit well with flashrom. Could you cut out those functions and post them separately, preferably as part of the hookup patch I mentioned above? > +int ich_hwseq_probe(struct flashchip *flash) > +{ > + uint32_t total_size, boundary; > + uint32_t erase_size_low, size_low, erase_size_high, size_high; > + struct block_eraser *eraser; > + > + if (flash->manufacture_id != INTEL_ID || > + flash->model_id != INTEL_HWSEQ) { > + msg_cerr("This chip (%s) is not supported in hardware" > + "sequencing mode and should never have been probed.\n", > + flash->name); > + msg_cerr("%s: Please report a bug at flashrom(a)flashrom.org\n", > + __func__); > + return 0; > + } > + > + msg_cdbg("Prerequisites for Intel Hardware Sequencing are "); > + if (spi_programmer->type != SPI_CONTROLLER_ICH_HWSEQ) { > + msg_cdbg("not met.\n"); > + return 0; > + } > + msg_cdbg("met.\n"); > + > + total_size = hwseq.size_comp0 + hwseq.size_comp1; > + msg_cdbg("Found %d attached SPI flash chip", > + (hwseq.size_comp1 != 0) ? 2 : 1); > + if (hwseq.size_comp1 != 0) > + msg_cdbg("s with a combined"); > + else > + msg_cdbg(" with a"); > + msg_cdbg(" density of %d kB.\n", total_size / 1024); > + flash->total_size = total_size / 1024; > + > + eraser = &(flash->block_erasers[0]); > + boundary = (REGREAD32(ICH9_REG_FPB) & FPB_FPBA) << 12; > + size_high = total_size - boundary; > + erase_size_high = ich_hwseq_get_erase_block_size(boundary); > + > + if (boundary == 0) { > + msg_cdbg("There is only one partition containing the whole " > + "address space (0x%06x - 0x%06x).\n", 0, size_high-1); > + eraser->eraseblocks[0].size = erase_size_high; > + eraser->eraseblocks[0].count = size_high / erase_size_high; > + msg_cdbg("There are %d erase blocks with %d B each.\n", > + size_high / erase_size_high, erase_size_high); > + } else { > + msg_cdbg("The flash address space (0x%06x - 0x%06x) is divided " > + "at address 0x%06x in two partitions.\n", > + 0, size_high-1, boundary); > + size_low = total_size - size_high; > + erase_size_low = ich_hwseq_get_erase_block_size(0); > + > + eraser->eraseblocks[0].size = erase_size_low; > + eraser->eraseblocks[0].count = size_low / erase_size_low; > + msg_cdbg("The first partition ranges from 0x%06x to 0x%06x.\n", > + 0, size_low-1); > + msg_cdbg("In that range are %d erase blocks with %d B each.\n", > + size_low / erase_size_low, erase_size_low); > + > + eraser->eraseblocks[1].size = erase_size_high; > + eraser->eraseblocks[1].count = size_high / erase_size_high; > + msg_cdbg("The second partition ranges from 0x%06x to 0x%06x.\n", > + boundary, size_high-1); > + msg_cdbg("In that range are %d erase blocks with %d B each.\n", > + size_high / erase_size_high, erase_size_high); > + } > + return 1; > +} > + > +static int ich_hwseq_send_command(unsigned int writecnt, > + unsigned int readcnt, > + const unsigned char *writearr, > + unsigned char *readarr) > +{ > + msg_pdbg("skipped. Intel Hardware Sequencing does not support sending " > + "arbitrary commands."); > + return -1; > +} > + > +int ich_hwseq_block_erase(struct flashchip *flash, > + unsigned int addr, > + unsigned int len) > +{ > + uint32_t erase_block; > + uint16_t hsfc; > + uint32_t timeout = 5000 * 1000; /* 5 s for max 64 kB */ > + > + if (flash->manufacture_id != INTEL_ID || > + flash->model_id != INTEL_HWSEQ) { > + msg_perr("This chip (%s) is not supported in hardware" > + "sequencing mode\n", flash->name); > + return -1; > + } > + > + erase_block = ich_hwseq_get_erase_block_size(addr); > + if (len != erase_block) { > + msg_cerr("Erase block size for address 0x%06x is %d B, " > + "but requested erase block size is %d B. " > + "Not erasing anything.\n", addr, erase_block, len); > + return -1; > + } > + > + /* Although the hardware supports this (it would erase the whole block > + * containing the address) we play safe here. */ > + if (addr % erase_block != 0) { > + msg_cerr("Erase address 0x%06x is not aligned to the erase " > + "block boundary (any multiple of %d). " > + "Not erasing anything.\n", addr, erase_block); > + return -1; > + } > + > + if (addr + len > flash->total_size * 1024) { > + msg_perr("Request to erase some inaccessible memory address(es)" > + " (addr=0x%x, len=%d). " > + "Not erasing anything.\n", addr, len); > + return -1; > + } > + > + msg_pdbg("Erasing %d bytes starting at 0x%06x.\n", len, addr); > + > + /* make sure FDONE, FCERR, AEL are cleared by writing 1 to them */ > + REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS)); > + > + hsfc = REGREAD16(ICH9_REG_HSFC); > + hsfc &= ~HSFC_FCYCLE; /* clear operation */ > + hsfc |= (0x3 << HSFC_FCYCLE_OFF); /* set erase operation */ > + hsfc |= HSFC_FGO; /* start */ > + msg_pdbg("HSFC used for block erasing: "); > + prettyprint_ich9_reg_hsfc(hsfc); > + REGWRITE16(ICH9_REG_HSFC, hsfc); > + > + if (ich_hwseq_wait_for_cycle_complete(timeout, len)) > + return -1; > + return 0; > +} > + > +int ich_hwseq_read(struct flashchip *flash, uint8_t *buf, int addr, int len) > +{ > + uint16_t hsfc; > + uint16_t timeout = 100 * 60; > + uint8_t block_len; > + > + if (flash->manufacture_id != INTEL_ID || > + flash->model_id != INTEL_HWSEQ) { > + msg_perr("This chip (%s) is not supported in hardware" > + "sequencing mode.\n", flash->name); > + return -1; > + } > + > + if (addr < 0 || addr + len > flash->total_size * 1024) { > + msg_perr("Request to read from an inaccessible memory address " > + "(addr=0x%x, len=%d).\n", addr, len); > + return -1; > + } > + > + msg_pdbg("Reading %d bytes starting at 0x%06x.\n", len, addr); > + /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ > + REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS)); > + > + while (len > 0) { > + block_len = min(len, spi_programmer->max_data_read); > + ich_hwseq_set_addr(addr); > + hsfc = REGREAD16(ICH9_REG_HSFC); > + hsfc &= ~HSFC_FCYCLE; /* set read operation */ > + hsfc &= ~HSFC_FDBC; /* clear byte count */ > + /* set byte count */ > + hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); > + hsfc |= HSFC_FGO; /* start */ > + REGWRITE16(ICH9_REG_HSFC, hsfc); > + > + if (ich_hwseq_wait_for_cycle_complete(timeout, block_len)) > + return 1; > + ich_read_data(buf, block_len, ICH9_REG_FDATA0); > + addr += block_len; > + buf += block_len; > + len -= block_len; > + } > + return 0; > +} > + > +int ich_hwseq_write_256(struct flashchip *flash, uint8_t *buf, int addr, int len) > +{ > + uint16_t hsfc; > + uint16_t timeout = 100 * 60; > + uint8_t block_len; > + > + if (flash->manufacture_id != INTEL_ID || > + flash->model_id != INTEL_HWSEQ) { > + msg_perr("This chip (%s) is not supported in hardware" > + "sequencing mode\n", flash->name); > + return -1; > + } > + > + if (addr < 0 || addr + len > flash->total_size * 1024) { > + msg_perr("Request to write to an inaccessible memory address " > + "(addr=0x%x, len=%d).\n", addr, len); > + return -1; > + } > + > + msg_pdbg("Writing %d bytes starting at 0x%06x.\n", len, addr); > + /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ > + REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS)); > + > + while (len > 0) { > + ich_hwseq_set_addr(addr); > + block_len = min(len, spi_programmer->max_data_write); > + ich_fill_data(buf, block_len, ICH9_REG_FDATA0); > + hsfc = REGREAD16(ICH9_REG_HSFC); > + hsfc &= ~HSFC_FCYCLE; /* clear operation */ > + hsfc |= (0x2 << HSFC_FCYCLE_OFF); /* set write operation */ > + hsfc &= ~HSFC_FDBC; /* clear byte count */ > + /* set byte count */ > + hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); > + hsfc |= HSFC_FGO; /* start */ > + REGWRITE16(ICH9_REG_HSFC, hsfc); > + > + if (ich_hwseq_wait_for_cycle_complete(timeout, block_len)) > + return -1; > + addr += block_len; > + buf += block_len; > + len -= block_len; > + } > + return 0; > +} > + > static int ich_spi_send_multicommand(struct spi_command *cmds) > { > int ret = 0; > @@ -1207,6 +1502,16 @@ static const struct spi_programmer spi_programmer_ich9 = { > .write_256 = default_spi_write_256, > }; > > +static const struct spi_programmer spi_programmer_ich_hwseq = { > + .type = SPI_CONTROLLER_ICH_HWSEQ, > + .max_data_read = 64, > + .max_data_write = 64, > + .command = ich_hwseq_send_command, > + .multicommand = default_spi_send_multicommand, > + .read = ich_hwseq_read, > + .write_256 = ich_hwseq_write_256, > +}; Move the hunk above to the hookup patch as well. > + > int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > int ich_generation) > { > @@ -1214,21 +1519,20 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > uint8_t old, new; > uint16_t spibar_offset, tmp2; > uint32_t tmp; > + char *arg; > int ichspi_desc = 0; > + int hwseq_en = 0; > > switch (ich_generation) { > case 7: > - register_spi_programmer(&spi_programmer_ich7); > spibar_offset = 0x3020; > break; > case 8: > - register_spi_programmer(&spi_programmer_ich9); > spibar_offset = 0x3020; > break; > case 9: > case 10: > default: /* Future version might behave the same */ > - register_spi_programmer(&spi_programmer_ich9); > spibar_offset = 0x3800; > break; > } > @@ -1239,8 +1543,8 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > /* Assign Virtual Address */ > ich_spibar = rcrb + spibar_offset; > > - switch (spi_programmer->type) { > - case SPI_CONTROLLER_ICH7: > + switch (ich_generation) { > + case 7: Please make sure the VIA driver doesn't explode with this. > msg_pdbg("0x00: 0x%04x (SPIS)\n", > mmio_readw(ich_spibar + 0)); > msg_pdbg("0x02: 0x%04x (SPIC)\n", > @@ -1277,9 +1581,21 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > ichspi_lock = 1; > } > ich_set_bbar(ich_generation, 0); > + register_spi_programmer(&spi_programmer_ich7); > ich_init_opcodes(); > break; > - case SPI_CONTROLLER_ICH9: > + case 8: > + case 9: > + case 10: > + default: /* Future version might behave the same */ OK until here. > + arg = extract_programmer_param("hwseq"); > + if (arg && !strcmp(arg, "yes")) > + hwseq_en = 1; > + else if (arg && !strlen(arg)) > + msg_pinfo("Missing argument for hwseq.\n"); > + else if (arg) > + msg_pinfo("Unknown argument for hwseq: %s\n", arg); > + free(arg); Please move the programmer parameter evaluation to the hookup patch. > tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS); > msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); > prettyprint_ich9_reg_hsfs(tmp2); > @@ -1363,18 +1679,37 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > > msg_pdbg("\n"); > #if BITFIELDS == 1 #if BITFIELDS needs to die. > + { /* to be able to declare desc here and avoid another > + * "#if BITFIELDS == 1" on top > + */ > + struct ich_descriptors desc = {{ 0 }}; > if (ichspi_desc) { Maybe rename ichspi_desc to ichspi_desc_active or ichspi_desc_enabled. > - struct ich_descriptors desc = {{ 0 }}; > if (read_ich_descriptors_via_fdo(ich_spibar, &desc) == > RET_OK) > prettyprint_ich_descriptors(CHIPSET_ICH_UNKNOWN, > &desc); > + /* If the descriptor is valid and indicates multiple > + * flash devices we need to use hwseq to be able to > + * access the second flash device. > + */ > + if (desc.content.NC != 0) > + hwseq_en = 1; > + } else > + hwseq_en = 0; /* disable it even if the user said yes */ This case needs at least a msg_pinfo, maybe even msg_perr. We act contrary to the wishes of the user. > + > + if (hwseq_en > 0) { > + hwseq.size_comp0 = getFCBA_component_density(0, &desc); > + hwseq.size_comp1 = getFCBA_component_density(1, &desc); > + register_spi_programmer(&spi_programmer_ich_hwseq); Please move register_spi_programmer to the hookup patch. The rest of the code of this hunk should stay in this patch. > + } else { > + register_spi_programmer(&spi_programmer_ich9); > + ich_init_opcodes(); > } > -#endif /* BITFIELDS == 1 */ > + } > +#else /* BITFIELDS == 1 */ Once you remove the #ifdef, the hunk below will probably die completely. > + register_spi_programmer(&spi_programmer_ich9); > ich_init_opcodes(); > - break; > - default: > - /* Nothing */ > +#endif /* BITFIELDS == 1 */ > break; > } > > diff --git a/programmer.h b/programmer.h > index 6a28dbe..6e316d1 100644 > --- a/programmer.h > +++ b/programmer.h > @@ -517,6 +517,7 @@ enum spi_controller { > #if defined(__i386__) || defined(__x86_64__) > SPI_CONTROLLER_ICH7, > SPI_CONTROLLER_ICH9, > + SPI_CONTROLLER_ICH_HWSEQ, Please move this to the hookup patch. > SPI_CONTROLLER_IT85XX, > SPI_CONTROLLER_IT87XX, > SPI_CONTROLLER_SB600, Regards, Carl-Daniel -- http://www.hailfinger.org/

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