flashrom

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[commit] r1571 - in trunk: . Documentation
by repository service 13 Aug '12

13 Aug '12

Author: stefanct Date: Mon Aug 13 18:33:04 2012 New Revision: 1571 URL: http://flashrom.org/trac/flashrom/changeset/1571 Log: serprog: Add support for setting the SPI frequency. Introduce a new opcode (0x14) that sends the requested frequency as a 32b long value in Hertz to the programmer and receives the frequency eventually chosen by the programmer. The user can specify this with the programmer parameter "spispeed" (named after the similar parameter for the buspirate) including an optional suffix of 'M' or 'k' for specifying megahertz or kilohertz respectively (lowercase suffixes are also accepted). Thanks to Idwer and Uwe (and maybe others) for their feedback especially regarding the unit of frequency to use. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Documentation/serprog-protocol.txt trunk/flashrom.8 trunk/serprog.c Modified: trunk/Documentation/serprog-protocol.txt ============================================================================== --- trunk/Documentation/serprog-protocol.txt Mon Aug 13 10:45:13 2012 (r1570) +++ trunk/Documentation/serprog-protocol.txt Mon Aug 13 18:33:04 2012 (r1571) @@ -33,6 +33,7 @@ 0x12 Set used bustype 8-bit flags (as with 0x05) ACK / NAK 0x13 Perform SPI operation 24-bit slen + 24-bit rlen ACK + rlen bytes of data / NAK + slen bytes of data +0x14 Set SPI clock frequency in Hz 32-bit requested frequency ACK + 32-bit set frequency / NAK 0x?? unimplemented command - invalid. @@ -73,6 +74,14 @@ Maximum slen is Q_WRNMAXLEN in case Q_BUSTYPE returns SPI only or S_BUSTYPE was used to set SPI exclusively before. Same for rlen and Q_RDNMAXLEN. This operation is immediate, meaning it doesnt use the operation buffer. + 0x14 (S_SPI_FREQ): + Set the SPI clock frequency. The 32-bit value indicates the + requested frequency in Hertz. Value 0 is reserved and should + be NAKed by the programmer. The requested frequency should be + mapped by the programmer software to a supported frequency + lower than the one requested. If there is no lower frequency + available the lowest possible should be used. The value + chosen is sent back in the reply with an ACK. About mandatory commands: The only truly mandatory commands for any device are 0x00, 0x01, 0x02 and 0x10, but one can't really do anything with these commands. @@ -107,3 +116,4 @@ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ #define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ +#define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Mon Aug 13 10:45:13 2012 (r1570) +++ trunk/flashrom.8 Mon Aug 13 18:33:04 2012 (r1571) @@ -598,7 +598,17 @@ .sp .B " flashrom \-p serprog:ip=ipaddr:port" .sp -instead. More information about serprog is available in +instead. In case the device supports it, you can set the SPI clock frequency +with the optional +.B spispeed +parameter. The frequency is parsed as Hertz, unless an +.BR M ", or " k +suffix is given, then megahertz or kilohertz are used respectively. +Example that sets the frequency to 2 MHz: +.sp +.B "flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M" +.sp +More information about serprog is available in .B serprog-protocol.txt in the source distribution. .SS Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Mon Aug 13 10:45:13 2012 (r1570) +++ trunk/serprog.c Mon Aug 13 18:33:04 2012 (r1571) @@ -69,6 +69,7 @@ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ #define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ +#define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ static uint16_t sp_device_serbuf_size = 16; static uint16_t sp_device_opbuf_size = 300; @@ -482,6 +483,7 @@ /* Check for the minimum operational set of commands. */ if (serprog_buses_supported & BUS_SPI) { uint8_t bt = BUS_SPI; + char *spispeed; if (sp_check_commandavail(S_CMD_O_SPIOP) == 0) { msg_perr("Error: SPI operation not supported while the " "bustype is SPI\n"); @@ -513,6 +515,51 @@ spi_programmer_serprog.max_data_read = v; msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", v); } + spispeed = extract_programmer_param("spispeed"); + if (spispeed && strlen(spispeed)) { + uint32_t f_spi_req, f_spi; + uint8_t buf[4]; + char *f_spi_suffix; + + errno = 0; + f_spi_req = strtol(spispeed, &f_spi_suffix, 0); + if (errno != 0 || spispeed == f_spi_suffix) { + msg_perr("Error: Could not convert 'spispeed'.\n"); + return 1; + } + if (strlen(f_spi_suffix) == 1) { + if (!strcasecmp(f_spi_suffix, "M")) + f_spi_req *= 1000000; + else if (!strcasecmp(f_spi_suffix, "k")) + f_spi_req *= 1000; + else { + msg_perr("Error: Garbage following 'spispeed' value.\n"); + return 1; + } + } else if (strlen(f_spi_suffix) > 1) { + msg_perr("Error: Garbage following 'spispeed' value.\n"); + return 1; + } + + buf[0] = (f_spi_req >> (0 * 8)) & 0xFF; + buf[1] = (f_spi_req >> (1 * 8)) & 0xFF; + buf[2] = (f_spi_req >> (2 * 8)) & 0xFF; + buf[3] = (f_spi_req >> (3 * 8)) & 0xFF; + + if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0) + msg_perr(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); + else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) + == 0) { + f_spi = buf[0]; + f_spi |= buf[1] << (1 * 8); + f_spi |= buf[2] << (2 * 8); + f_spi |= buf[3] << (3 * 8); + msg_pdbg(MSGHEADER "Requested to set SPI clock frequency to %u Hz. " + "It was actually set to %u Hz\n", f_spi_req, f_spi); + } else + msg_pdbg(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); + } + free(spispeed); bt = serprog_buses_supported; if (sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL)) return 1;

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[patch] board enable for ASUS P4P800-X (with erasing/writing SST SST49LF003A/B)
by Idwer Vollering 13 Aug '12

13 Aug '12

Enable writing/erasing on the ASUS P4P800-X, tested by mindcat on IRC. This board enable is inspired by the board enable for the ASUS P4P800-VM. As a bonus, testin the erasing/writing functionality on the SST SST49LF003A/B chip is now known to work. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- Before (r1205/v0.9.3): Write report: http://paste.flashrom.org/view.php?id=465 Write report: http://paste.flashrom.org/view.php?id=466 After (r1285): Erase report: http://paste.flashrom.org/view.php?id=467

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[commit] r1570 - in trunk: . util/ich_descriptors_tool
by repository service 13 Aug '12

13 Aug '12

Author: stefanct Date: Mon Aug 13 10:45:13 2012 New Revision: 1570 URL: http://flashrom.org/trac/flashrom/changeset/1570 Log: Clean up ICH descriptor code. - allows for compilation with -Werror=shadow, - use extended line limit to fix the most awful line breaks. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/ich_descriptors.c trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Modified: trunk/ich_descriptors.c ============================================================================== --- trunk/ich_descriptors.c Sat Aug 11 18:07:08 2012 (r1569) +++ trunk/ich_descriptors.c Mon Aug 13 10:45:13 2012 (r1570) @@ -85,26 +85,16 @@ msg_pdbg2("\n"); msg_pdbg2("--- Details ---\n"); - msg_pdbg2("NR (Number of Regions): %5d\n", - cont->NR + 1); - msg_pdbg2("FRBA (Flash Region Base Address): 0x%03x\n", - getFRBA(cont)); - msg_pdbg2("NC (Number of Components): %5d\n", - cont->NC + 1); - msg_pdbg2("FCBA (Flash Component Base Address): 0x%03x\n", - getFCBA(cont)); - msg_pdbg2("ISL (ICH/PCH Strap Length): %5d\n", - cont->ISL); - msg_pdbg2("FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x%03x\n", - getFISBA(cont)); - msg_pdbg2("NM (Number of Masters): %5d\n", - cont->NM + 1); - msg_pdbg2("FMBA (Flash Master Base Address): 0x%03x\n", - getFMBA(cont)); - msg_pdbg2("MSL/PSL (MCH/PROC Strap Length): %5d\n", - cont->MSL); - msg_pdbg2("FMSBA (Flash MCH/PROC Strap Base Address): 0x%03x\n", - getFMSBA(cont)); + msg_pdbg2("NR (Number of Regions): %5d\n", cont->NR + 1); + msg_pdbg2("FRBA (Flash Region Base Address): 0x%03x\n", getFRBA(cont)); + msg_pdbg2("NC (Number of Components): %5d\n", cont->NC + 1); + msg_pdbg2("FCBA (Flash Component Base Address): 0x%03x\n", getFCBA(cont)); + msg_pdbg2("ISL (ICH/PCH Strap Length): %5d\n", cont->ISL); + msg_pdbg2("FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x%03x\n", getFISBA(cont)); + msg_pdbg2("NM (Number of Masters): %5d\n", cont->NM + 1); + msg_pdbg2("FMBA (Flash Master Base Address): 0x%03x\n", getFMBA(cont)); + msg_pdbg2("MSL/PSL (MCH/PROC Strap Length): %5d\n", cont->MSL); + msg_pdbg2("FMSBA (Flash MCH/PROC Strap Base Address): 0x%03x\n", getFMSBA(cont)); msg_pdbg2("\n"); } @@ -520,8 +510,8 @@ msg_pdbg2("Integrated Clocking Configuration used: %d\n", s->cougar.ICC_SEL); - msg_pdbg2("PCH Signal CL_RST1# does %sassert when Intel ME performs a " - "reset.\n", s->ibex.MER_CL1 ? "" : "not "); + msg_pdbg2("PCH Signal CL_RST1# does %sassert when Intel ME performs a reset.\n", + s->ibex.MER_CL1 ? "" : "not "); msg_pdbg2("ICC Profile is selected by %s.\n", s->cougar.ICC_PRO_SEL ? "Softstraps" : "BIOS"); msg_pdbg2("Deep SX is %ssupported on the platform.\n", @@ -538,8 +528,7 @@ s->cougar.IWL_EN ? "en" : "dis"); msg_pdbg2("Chipset configuration Softstrap 5: %d\n", s->cougar.cs_ss5); msg_pdbg2("SMLink1 provides temperature from %s.\n", - s->cougar.SMLINK1_THERM_SEL ? - "PCH only" : "the CPU, PCH and DIMMs"); + s->cougar.SMLINK1_THERM_SEL ? "PCH only" : "the CPU, PCH and DIMMs"); msg_pdbg2("GPIO29 is used as %s.\n", s->cougar.SLP_LAN_GP29_SEL ? "general purpose output" : "SLP_LAN#"); @@ -552,32 +541,32 @@ void prettyprint_ich_descriptor_straps(enum ich_chipset cs, const struct ich_descriptors *desc) { - unsigned int i, max; + unsigned int i, max_count; msg_pdbg2("=== Softstraps ===\n"); if (sizeof(desc->north.STRPs) / 4 + 1 < desc->content.MSL) { - max = sizeof(desc->north.STRPs) / 4 + 1; - msg_pdbg2("MSL (%u) is greater than the current maximum of %u " - "entries.\n", desc->content.MSL, max + 1); - msg_pdbg2("Only the first %u entries will be printed.\n", max); + max_count = sizeof(desc->north.STRPs) / 4 + 1; + msg_pdbg2("MSL (%u) is greater than the current maximum of %u entries.\n", + desc->content.MSL, max_count + 1); + msg_pdbg2("Only the first %u entries will be printed.\n", max_count); } else - max = desc->content.MSL; + max_count = desc->content.MSL; - msg_pdbg2("--- North/MCH/PROC (%d entries) ---\n", max); - for (i = 0; i < max; i++) + msg_pdbg2("--- North/MCH/PROC (%d entries) ---\n", max_count); + for (i = 0; i < max_count; i++) msg_pdbg2("STRP%-2d = 0x%08x\n", i, desc->north.STRPs[i]); msg_pdbg2("\n"); if (sizeof(desc->south.STRPs) / 4 < desc->content.ISL) { - max = sizeof(desc->south.STRPs) / 4; - msg_pdbg2("ISL (%u) is greater than the current maximum of %u " - "entries.\n", desc->content.ISL, max); - msg_pdbg2("Only the first %u entries will be printed.\n", max); + max_count = sizeof(desc->south.STRPs) / 4; + msg_pdbg2("ISL (%u) is greater than the current maximum of %u entries.\n", + desc->content.ISL, max_count); + msg_pdbg2("Only the first %u entries will be printed.\n", max_count); } else - max = desc->content.ISL; + max_count = desc->content.ISL; - msg_pdbg2("--- South/ICH/PCH (%d entries) ---\n", max); - for (i = 0; i < max; i++) + msg_pdbg2("--- South/ICH/PCH (%d entries) ---\n", max_count); + for (i = 0; i < max_count; i++) msg_pdbg2("STRP%-2d = 0x%08x\n", i, desc->south.STRPs[i]); msg_pdbg2("\n"); @@ -608,8 +597,7 @@ case CHIPSET_ICH_UNKNOWN: break; default: - msg_pdbg2("The meaning of the descriptor straps are unknown " - "yet.\n\n"); + msg_pdbg2("The meaning of the descriptor straps are unknown yet.\n\n"); break; } } @@ -634,8 +622,7 @@ msg_pdbg2("\n"); msg_pdbg2("VSCC Table: %d entries\n", umap->VTL/2); - for (i = 0; i < umap->VTL/2; i++) - { + for (i = 0; i < umap->VTL/2; i++) { uint32_t jid = umap->vscc_table[i].JID; uint32_t vscc = umap->vscc_table[i].VSCC; msg_pdbg2(" JID%d = 0x%08x\n", i, jid); @@ -651,7 +638,7 @@ /* len is the length of dump in bytes */ int read_ich_descriptors_from_dump(const uint32_t *dump, unsigned int len, struct ich_descriptors *desc) { - unsigned int i, max; + unsigned int i, max_count; uint8_t pch_bug_offset = 0; if (dump == NULL || desc == NULL) @@ -708,10 +695,8 @@ return ICH_RET_OOB; for (i = 0; i < desc->upper.VTL/2; i++) { - desc->upper.vscc_table[i].JID = - dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 0]; - desc->upper.vscc_table[i].VSCC = - dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 1]; + desc->upper.vscc_table[i].JID = dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 0]; + desc->upper.vscc_table[i].VSCC = dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 1]; } /* MCH/PROC (aka. North) straps */ @@ -719,20 +704,18 @@ return ICH_RET_OOB; /* limit the range to be written */ - max = min(sizeof(desc->north.STRPs) / 4, desc->content.MSL); - for (i = 0; i < max; i++) - desc->north.STRPs[i] = - dump[(getFMSBA(&desc->content) >> 2) + i]; + max_count = min(sizeof(desc->north.STRPs) / 4, desc->content.MSL); + for (i = 0; i < max_count; i++) + desc->north.STRPs[i] = dump[(getFMSBA(&desc->content) >> 2) + i]; /* ICH/PCH (aka. South) straps */ if (len < getFISBA(&desc->content) + desc->content.ISL * 4) return ICH_RET_OOB; /* limit the range to be written */ - max = min(sizeof(desc->south.STRPs) / 4, desc->content.ISL); - for (i = 0; i < max; i++) - desc->south.STRPs[i] = - dump[(getFISBA(&desc->content) >> 2) + i]; + max_count = min(sizeof(desc->south.STRPs) / 4, desc->content.ISL); + for (i = 0; i < max_count; i++) + desc->south.STRPs[i] = dump[(getFISBA(&desc->content) >> 2) + i]; return ICH_RET_OK; } @@ -755,13 +738,12 @@ size_enc = desc->component.comp2_density; break; default: - msg_perr("Only ICH SPI component index 0 or 1 are supported " - "yet.\n"); + msg_perr("Only ICH SPI component index 0 or 1 are supported yet.\n"); return 0; } if (size_enc > 5) { - msg_perr("Density of ICH SPI component with index %d is " - "invalid. Encoded density is 0x%x.\n", idx, size_enc); + msg_perr("Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x.\n", + idx, size_enc); return 0; } return (1 << (19 + size_enc)); @@ -804,8 +786,7 @@ return ICH_RET_ERR; } - msg_pdbg2("Reading flash descriptors " - "mapped by the chipset via FDOC/FDOD..."); + msg_pdbg2("Reading flash descriptors mapped by the chipset via FDOC/FDOD..."); /* content section */ desc->content.FLVALSIG = read_descriptor_reg(0, 0, spibar); desc->content.FLMAP0 = read_descriptor_reg(0, 1, spibar); Modified: trunk/util/ich_descriptors_tool/ich_descriptors_tool.c ============================================================================== --- trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Sat Aug 11 18:07:08 2012 (r1569) +++ trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Mon Aug 13 10:45:13 2012 (r1570) @@ -40,7 +40,7 @@ #include <sys/mman.h> #endif -static void dump_file(const char *basename, const uint32_t *dump, unsigned int len, struct ich_desc_region *reg, unsigned int i) +static void dump_file(const char *prefix, const uint32_t *dump, unsigned int len, struct ich_desc_region *reg, unsigned int i) { int ret; char *fn; @@ -54,8 +54,7 @@ reg_name = region_names[i]; if (base > limit) { - printf("The %s region is unused and thus not dumped.\n", - reg_name); + printf("The %s region is unused and thus not dumped.\n", reg_name); return; } @@ -68,13 +67,13 @@ return; } - fn = malloc(strlen(basename) + strlen(reg_name) + strlen(".bin") + 2); + fn = malloc(strlen(prefix) + strlen(reg_name) + strlen(".bin") + 2); if (!fn) { fprintf(stderr, "Out of memory!\n"); exit(1); } - snprintf(fn, strlen(basename) + strlen(reg_name) + strlen(".bin") + 2, - "%s.%s.bin", basename, reg_name); + snprintf(fn, strlen(prefix) + strlen(reg_name) + strlen(".bin") + 2, + "%s.%s.bin", prefix, reg_name); printf("Dumping %u bytes of the %s region from 0x%08x-0x%08x to %s... ", file_len, region_names[i], base, limit, fn); int fh = open(fn, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); @@ -95,12 +94,12 @@ close(fh); } -void dump_files(const char *n, const uint32_t *buf, unsigned int len, struct ich_desc_region *reg) +void dump_files(const char *name, const uint32_t *buf, unsigned int len, struct ich_desc_region *reg) { unsigned int i; printf("=== Dumping region files ===\n"); for (i = 0; i < 5; i++) - dump_file(n, buf, len, reg, i); + dump_file(name, buf, len, reg, i); printf("\n"); } @@ -157,8 +156,7 @@ } } if (fn == NULL) - usage(argv, - "Need a file name of a descriptor image to read from."); + usage(argv, "Need the file name of a descriptor image to read from."); fd = open(fn, O_RDONLY); if (fd < 0) @@ -209,8 +207,7 @@ printf("Image not in descriptor mode.\n"); exit(1); case ICH_RET_OOB: - printf("Tried to access a location out of bounds of the image. " - "- Corrupt image?\n"); + printf("Tried to access a location out of bounds of the image. - Corrupt image?\n"); exit(1); default: printf("Unhandled return value at %s:%u, please report this.\n",

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Re: [flashrom] [PATCH] Move show_id to where it belongs.
by Carl-Daniel Hailfinger 13 Aug '12

13 Aug '12

Am 11.08.2012 04:56 schrieb Stefan Tauner: > And remove the unused force parameter. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > i forgot to move the declaration in the header, and i noticed that the > force parameter is useless because we use the global variable instead. > this should actually change eventually, but for now just kill the > parameter because it is doubtful that it will be part of the solution. Can you please rename show_id to check_image_matches_hardware or something like that (e.g. check_image_matches_cbtable_id)? show_id is a totally misleading name. AFAICS the rest is a pure code move, and makes a lot of sense. Oh, and please downgrade the following message to pdbg: msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); Maybe downgrade the following message as well: msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 2

[commit] r1569 - trunk
by repository service 11 Aug '12

11 Aug '12

Author: stefanct Date: Sat Aug 11 18:07:08 2012 New Revision: 1569 URL: http://flashrom.org/trac/flashrom/changeset/1569 Log: Move show_id to where it belongs. And remove the unused force parameter. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/cbtable.c trunk/flashrom.c trunk/layout.c trunk/programmer.h Modified: trunk/cbtable.c ============================================================================== --- trunk/cbtable.c Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/cbtable.c Sat Aug 11 18:07:08 2012 (r1569) @@ -25,6 +25,7 @@ #include <unistd.h> #include <stdio.h> #include <stdlib.h> +#include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" @@ -32,6 +33,9 @@ char *lb_part = NULL, *lb_vendor = NULL; int partvendor_from_cbtable = 0; +static char *def_name = "DEFAULT"; +static char *mainboard_vendor = NULL; +static char *mainboard_part = NULL; /* Parse the [<vendor>:]<board> string specified by the user as part of * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part @@ -56,6 +60,82 @@ free(tempstr); } +int show_id(uint8_t *bios, int size) +{ + unsigned int *walk; + unsigned int mb_part_offset, mb_vendor_offset; + char *mb_part, *mb_vendor; + + mainboard_vendor = def_name; + mainboard_part = def_name; + + walk = (unsigned int *)(bios + size - 0x10); + walk--; + + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { + /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ + walk = (unsigned int *)(bios + size - 0x80); + walk--; + } + + /* + * Check if coreboot last image size is 0 or not a multiple of 1k or + * bigger than the chip or if the pointers to vendor ID or mainboard ID + * are outside the image of if the start of ID strings are nonsensical + * (nonprintable and not \0). + */ + mb_part_offset = *(walk - 1); + mb_vendor_offset = *(walk - 2); + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || + mb_part_offset > size || mb_vendor_offset > size) { + msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + return 0; + } + + mb_part = (char *)(bios + size - mb_part_offset); + mb_vendor = (char *)(bios + size - mb_vendor_offset); + if (!isprint((unsigned char)*mb_part) || + !isprint((unsigned char)*mb_vendor)) { + msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + return 0; + } + + msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); + + mainboard_part = strdup(mb_part); + mainboard_vendor = strdup(mb_vendor); + msg_pdbg("Manufacturer: %s\n", mainboard_vendor); + msg_pdbg("Mainboard ID: %s\n", mainboard_part); + + /* If these are not set, the coreboot table was not found. */ + if (!lb_vendor || !lb_part) { + msg_pinfo("Note: If the following flash access fails, try " + "-p internal:mainboard=<vendor>:<mainboard>.\n"); + return 0; + } + + /* These comparisons are case insensitive to make things a little less user^Werror prone. */ + if (!strcasecmp(mainboard_vendor, lb_vendor) && + !strcasecmp(mainboard_part, lb_part)) { + msg_pdbg("This firmware image matches this mainboard.\n"); + } else { + if (force_boardmismatch) { + msg_pinfo("WARNING: This firmware image does not " + "seem to fit to this machine - forcing it.\n"); + } else { + msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s)\n\n" + "Override with -p internal:boardmismatch=force to ignore the board name\n" + "in the firmware image or override the detected mainboard with\n" + "-p internal:mainboard=<vendor>:<mainboard>.\n\n", + mainboard_vendor, mainboard_part, lb_vendor, lb_part); + return 1; + } + } + + return 0; +} + static unsigned long compute_checksum(void *addr, unsigned long length) { uint8_t *ptr; Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/flashrom.c Sat Aug 11 18:07:08 2012 (r1569) @@ -1815,7 +1815,7 @@ #if CONFIG_INTERNAL == 1 if (programmer == PROGRAMMER_INTERNAL) - if (show_id(newcontents, size, force)) { + if (show_id(newcontents, size)) { ret = 1; goto out; } Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/layout.c Sat Aug 11 18:07:08 2012 (r1569) @@ -21,15 +21,10 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <ctype.h> #include <limits.h> #include "flash.h" #include "programmer.h" -#if CONFIG_INTERNAL == 1 -char *mainboard_vendor = NULL; -char *mainboard_part = NULL; -#endif static int romimages = 0; #define MAX_ROMLAYOUT 32 @@ -49,102 +44,6 @@ static int num_include_args = 0; /* the number of valid entries. */ static romlayout_t rom_entries[MAX_ROMLAYOUT]; -#if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ -static char *def_name = "DEFAULT"; - -int show_id(uint8_t *bios, int size, int force) -{ - unsigned int *walk; - unsigned int mb_part_offset, mb_vendor_offset; - char *mb_part, *mb_vendor; - - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); - walk--; - - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID - * information at a different location. - */ - walk = (unsigned int *)(bios + size - 0x80); - walk--; - } - - /* - * Check if coreboot last image size is 0 or not a multiple of 1k or - * bigger than the chip or if the pointers to vendor ID or mainboard ID - * are outside the image of if the start of ID strings are nonsensical - * (nonprintable and not \0). - */ - mb_part_offset = *(walk - 1); - mb_vendor_offset = *(walk - 2); - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || - mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. " - "Disabling coreboot-related checks.\n"); - return 0; - } - - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); - if (!isprint((unsigned char)*mb_part) || - !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location." - " Disabling checks.\n"); - return 0; - } - - msg_pdbg("coreboot last image size " - "(not ROM size) is %d bytes.\n", *walk); - - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); - - /* - * If lb_vendor is not set, the coreboot table was - * not found. Nor was -p internal:mainboard=VENDOR:PART specified. - */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); - return 0; - } - - /* These comparisons are case insensitive to make things - * a little less user^Werror prone. - */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); - } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not " - "appear to\n" - " be correct for the detected " - "mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=" - "force to ignore the board name in the\n" - "firmware image or override the detected " - "mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>." - "\n\n", - mainboard_vendor, mainboard_part, lb_vendor, - lb_part); - return 1; - } - } - - return 0; -} -#endif - #ifndef __LIBPAYLOAD__ int read_romlayout(char *name) { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/programmer.h Sat Aug 11 18:07:08 2012 (r1569) @@ -274,6 +274,7 @@ /* cbtable.c */ void lb_vendor_dev_from_string(const char *boardstring); +int show_id(uint8_t *bios, int size); int coreboot_init(void); extern char *lb_part, *lb_vendor; extern int partvendor_from_cbtable; @@ -478,9 +479,6 @@ int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(const char *param_name); -/* layout.c */ -int show_id(uint8_t *bios, int size, int force); - /* spi.c */ enum spi_controller { SPI_CONTROLLER_NONE,

1 0

[PATCH] Move show_id to where it belongs.
by Stefan Tauner 11 Aug '12

11 Aug '12

And remove the unused force parameter. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- i forgot to move the declaration in the header, and i noticed that the force parameter is useless because we use the global variable instead. this should actually change eventually, but for now just kill the parameter because it is doubtful that it will be part of the solution. cbtable.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++ flashrom.c | 2 +- layout.c | 101 ---------------------------------------------------------- programmer.h | 4 +-- 4 files changed, 82 insertions(+), 105 deletions(-) diff --git a/cbtable.c b/cbtable.c index b4fb809..dde12ac 100644 --- a/cbtable.c +++ b/cbtable.c @@ -25,6 +25,7 @@ #include <unistd.h> #include <stdio.h> #include <stdlib.h> +#include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" @@ -32,6 +33,9 @@ char *lb_part = NULL, *lb_vendor = NULL; int partvendor_from_cbtable = 0; +static char *def_name = "DEFAULT"; +static char *mainboard_vendor = NULL; +static char *mainboard_part = NULL; /* Parse the [<vendor>:]<board> string specified by the user as part of * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part @@ -56,6 +60,82 @@ void lb_vendor_dev_from_string(const char *boardstring) free(tempstr); } +int show_id(uint8_t *bios, int size) +{ + unsigned int *walk; + unsigned int mb_part_offset, mb_vendor_offset; + char *mb_part, *mb_vendor; + + mainboard_vendor = def_name; + mainboard_part = def_name; + + walk = (unsigned int *)(bios + size - 0x10); + walk--; + + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { + /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ + walk = (unsigned int *)(bios + size - 0x80); + walk--; + } + + /* + * Check if coreboot last image size is 0 or not a multiple of 1k or + * bigger than the chip or if the pointers to vendor ID or mainboard ID + * are outside the image of if the start of ID strings are nonsensical + * (nonprintable and not \0). + */ + mb_part_offset = *(walk - 1); + mb_vendor_offset = *(walk - 2); + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || + mb_part_offset > size || mb_vendor_offset > size) { + msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + return 0; + } + + mb_part = (char *)(bios + size - mb_part_offset); + mb_vendor = (char *)(bios + size - mb_vendor_offset); + if (!isprint((unsigned char)*mb_part) || + !isprint((unsigned char)*mb_vendor)) { + msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + return 0; + } + + msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); + + mainboard_part = strdup(mb_part); + mainboard_vendor = strdup(mb_vendor); + msg_pdbg("Manufacturer: %s\n", mainboard_vendor); + msg_pdbg("Mainboard ID: %s\n", mainboard_part); + + /* If these are not set, the coreboot table was not found. */ + if (!lb_vendor || !lb_part) { + msg_pinfo("Note: If the following flash access fails, try " + "-p internal:mainboard=<vendor>:<mainboard>.\n"); + return 0; + } + + /* These comparisons are case insensitive to make things a little less user^Werror prone. */ + if (!strcasecmp(mainboard_vendor, lb_vendor) && + !strcasecmp(mainboard_part, lb_part)) { + msg_pdbg("This firmware image matches this mainboard.\n"); + } else { + if (force_boardmismatch) { + msg_pinfo("WARNING: This firmware image does not " + "seem to fit to this machine - forcing it.\n"); + } else { + msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s)\n\n" + "Override with -p internal:boardmismatch=force to ignore the board name\n" + "in the firmware image or override the detected mainboard with\n" + "-p internal:mainboard=<vendor>:<mainboard>.\n\n", + mainboard_vendor, mainboard_part, lb_vendor, lb_part); + return 1; + } + } + + return 0; +} + static unsigned long compute_checksum(void *addr, unsigned long length) { uint8_t *ptr; diff --git a/flashrom.c b/flashrom.c index a925379..9544155 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1815,7 +1815,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, #if CONFIG_INTERNAL == 1 if (programmer == PROGRAMMER_INTERNAL) - if (show_id(newcontents, size, force)) { + if (show_id(newcontents, size)) { ret = 1; goto out; } diff --git a/layout.c b/layout.c index 0512638..8663402 100644 --- a/layout.c +++ b/layout.c @@ -21,15 +21,10 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <ctype.h> #include <limits.h> #include "flash.h" #include "programmer.h" -#if CONFIG_INTERNAL == 1 -char *mainboard_vendor = NULL; -char *mainboard_part = NULL; -#endif static int romimages = 0; #define MAX_ROMLAYOUT 32 @@ -49,102 +44,6 @@ static char *include_args[MAX_ROMLAYOUT]; static int num_include_args = 0; /* the number of valid entries. */ static romlayout_t rom_entries[MAX_ROMLAYOUT]; -#if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ -static char *def_name = "DEFAULT"; - -int show_id(uint8_t *bios, int size, int force) -{ - unsigned int *walk; - unsigned int mb_part_offset, mb_vendor_offset; - char *mb_part, *mb_vendor; - - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); - walk--; - - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID - * information at a different location. - */ - walk = (unsigned int *)(bios + size - 0x80); - walk--; - } - - /* - * Check if coreboot last image size is 0 or not a multiple of 1k or - * bigger than the chip or if the pointers to vendor ID or mainboard ID - * are outside the image of if the start of ID strings are nonsensical - * (nonprintable and not \0). - */ - mb_part_offset = *(walk - 1); - mb_vendor_offset = *(walk - 2); - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || - mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. " - "Disabling coreboot-related checks.\n"); - return 0; - } - - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); - if (!isprint((unsigned char)*mb_part) || - !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location." - " Disabling checks.\n"); - return 0; - } - - msg_pdbg("coreboot last image size " - "(not ROM size) is %d bytes.\n", *walk); - - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); - - /* - * If lb_vendor is not set, the coreboot table was - * not found. Nor was -p internal:mainboard=VENDOR:PART specified. - */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); - return 0; - } - - /* These comparisons are case insensitive to make things - * a little less user^Werror prone. - */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); - } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not " - "appear to\n" - " be correct for the detected " - "mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=" - "force to ignore the board name in the\n" - "firmware image or override the detected " - "mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>." - "\n\n", - mainboard_vendor, mainboard_part, lb_vendor, - lb_part); - return 1; - } - } - - return 0; -} -#endif - #ifndef __LIBPAYLOAD__ int read_romlayout(char *name) { diff --git a/programmer.h b/programmer.h index 723374d..7d06be3 100644 --- a/programmer.h +++ b/programmer.h @@ -274,6 +274,7 @@ void cleanup_cpu_msr(void); /* cbtable.c */ void lb_vendor_dev_from_string(const char *boardstring); +int show_id(uint8_t *bios, int size); int coreboot_init(void); extern char *lb_part, *lb_vendor; extern int partvendor_from_cbtable; @@ -478,9 +479,6 @@ void check_chip_supported(const struct flashctx *flash); int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(const char *param_name); -/* layout.c */ -int show_id(uint8_t *bios, int size, int force); - /* spi.c */ enum spi_controller { SPI_CONTROLLER_NONE, -- Kind regards, Stefan Tauner

1 0

[commit] r1568 - trunk
by repository service 11 Aug '12

11 Aug '12

Author: stefanct Date: Sat Aug 11 04:33:20 2012 New Revision: 1568 URL: http://flashrom.org/trac/flashrom/changeset/1568 Log: Fix broken board enables. abit KN8 Ultra, agami/island aruma and IWILL DK8-HTX had no secondary PCI IDs which complicates things. Some google foo discovered some appropriate IDs, but they are all untested. Let's pretend this breaks nothing. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Aug 10 01:34:41 2012 (r1567) +++ trunk/board_enable.c Sat Aug 11 04:33:20 2012 (r1568) @@ -2309,13 +2309,13 @@ {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, P3, "abit", "IC7", 0, NT, intel_ich_gpio23_raise}, {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, P3, "abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, P3, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, - {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, P3, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, + {0x10de, 0x0050, 0x147b, 0x1c1a, 0x10de, 0x0052, 0x147b, 0x1c1a, NULL, NULL, NULL, P3, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, P3, "abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0260, 0x147b, 0x1c26, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, "(VA6)$", NULL, NULL, P3, "abit", "VA6", 0, OK, via_apollo_gpo4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", P3, "abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, P3, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", P3, "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, + {0x1022, 0x746B, 0, 0, 0x1022, 0x7460, 0, 0, NULL, "AGAMI", "ARUMA", P3, "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, P3, "Albatron", "PM266A Pro", 0, OK, w836xx_memw_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", P3, "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", P3, "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, @@ -2404,7 +2404,7 @@ {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, P3, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, P3, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, P3, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", P3, "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, + {0x1022, 0x7468, 0, 0, 0x1022, 0x7460, 0, 0, NULL, "iwill", "dk8_htx", P3, "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", P3, "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, P3, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x8086, 0x8186, 0x8086, 0x8186, 0x8086, 0x8800, 0x0000, 0x0000, "^MSC Vertriebs GmbH$", NULL, NULL, P2, "MSC", "Q7-TCTC", 0, OK, p2_not_a_laptop},

1 0

[PATCH] Move showid to where it belongs.
by Stefan Tauner 11 Aug '12

11 Aug '12

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- cbtable.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++ layout.c | 101 ------------------------------------------------------------- 2 files changed, 80 insertions(+), 101 deletions(-) diff --git a/cbtable.c b/cbtable.c index 4495d9d..5fdb841 100644 --- a/cbtable.c +++ b/cbtable.c @@ -25,6 +25,7 @@ #include <unistd.h> #include <stdio.h> #include <stdlib.h> +#include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" @@ -32,6 +33,9 @@ char *lb_part = NULL, *lb_vendor = NULL; int partvendor_from_cbtable = 0; +static char *def_name = "DEFAULT"; +static char *mainboard_vendor = NULL; +static char *mainboard_part = NULL; /* Parse the [<vendor>:]<board> string specified by the user as part of * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part @@ -56,6 +60,82 @@ void lb_vendor_dev_from_string(const char *boardstring) free(tempstr); } +int show_id(uint8_t *bios, int size, int force) +{ + unsigned int *walk; + unsigned int mb_part_offset, mb_vendor_offset; + char *mb_part, *mb_vendor; + + mainboard_vendor = def_name; + mainboard_part = def_name; + + walk = (unsigned int *)(bios + size - 0x10); + walk--; + + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { + /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ + walk = (unsigned int *)(bios + size - 0x80); + walk--; + } + + /* + * Check if coreboot last image size is 0 or not a multiple of 1k or + * bigger than the chip or if the pointers to vendor ID or mainboard ID + * are outside the image of if the start of ID strings are nonsensical + * (nonprintable and not \0). + */ + mb_part_offset = *(walk - 1); + mb_vendor_offset = *(walk - 2); + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || + mb_part_offset > size || mb_vendor_offset > size) { + msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + return 0; + } + + mb_part = (char *)(bios + size - mb_part_offset); + mb_vendor = (char *)(bios + size - mb_vendor_offset); + if (!isprint((unsigned char)*mb_part) || + !isprint((unsigned char)*mb_vendor)) { + msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + return 0; + } + + msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); + + mainboard_part = strdup(mb_part); + mainboard_vendor = strdup(mb_vendor); + msg_pdbg("Manufacturer: %s\n", mainboard_vendor); + msg_pdbg("Mainboard ID: %s\n", mainboard_part); + + /* If these are not set, the coreboot table was not found. */ + if (!lb_vendor || !lb_part) { + msg_pinfo("Note: If the following flash access fails, try " + "-p internal:mainboard=<vendor>:<mainboard>.\n"); + return 0; + } + + /* These comparisons are case insensitive to make things a little less user^Werror prone. */ + if (!strcasecmp(mainboard_vendor, lb_vendor) && + !strcasecmp(mainboard_part, lb_part)) { + msg_pdbg("This firmware image matches this mainboard.\n"); + } else { + if (force_boardmismatch) { + msg_pinfo("WARNING: This firmware image does not " + "seem to fit to this machine - forcing it.\n"); + } else { + msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s)\n\n" + "Override with -p internal:boardmismatch=force to ignore the board name\n" + "in the firmware image or override the detected mainboard with\n" + "-p internal:mainboard=<vendor>:<mainboard>.\n\n", + mainboard_vendor, mainboard_part, lb_vendor, lb_part); + return 1; + } + } + + return 0; +} + static unsigned long compute_checksum(void *addr, unsigned long length) { uint8_t *ptr; diff --git a/layout.c b/layout.c index 0512638..8663402 100644 --- a/layout.c +++ b/layout.c @@ -21,15 +21,10 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <ctype.h> #include <limits.h> #include "flash.h" #include "programmer.h" -#if CONFIG_INTERNAL == 1 -char *mainboard_vendor = NULL; -char *mainboard_part = NULL; -#endif static int romimages = 0; #define MAX_ROMLAYOUT 32 @@ -49,102 +44,6 @@ static char *include_args[MAX_ROMLAYOUT]; static int num_include_args = 0; /* the number of valid entries. */ static romlayout_t rom_entries[MAX_ROMLAYOUT]; -#if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ -static char *def_name = "DEFAULT"; - -int show_id(uint8_t *bios, int size, int force) -{ - unsigned int *walk; - unsigned int mb_part_offset, mb_vendor_offset; - char *mb_part, *mb_vendor; - - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); - walk--; - - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID - * information at a different location. - */ - walk = (unsigned int *)(bios + size - 0x80); - walk--; - } - - /* - * Check if coreboot last image size is 0 or not a multiple of 1k or - * bigger than the chip or if the pointers to vendor ID or mainboard ID - * are outside the image of if the start of ID strings are nonsensical - * (nonprintable and not \0). - */ - mb_part_offset = *(walk - 1); - mb_vendor_offset = *(walk - 2); - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || - mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. " - "Disabling coreboot-related checks.\n"); - return 0; - } - - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); - if (!isprint((unsigned char)*mb_part) || - !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location." - " Disabling checks.\n"); - return 0; - } - - msg_pdbg("coreboot last image size " - "(not ROM size) is %d bytes.\n", *walk); - - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); - - /* - * If lb_vendor is not set, the coreboot table was - * not found. Nor was -p internal:mainboard=VENDOR:PART specified. - */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); - return 0; - } - - /* These comparisons are case insensitive to make things - * a little less user^Werror prone. - */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); - } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not " - "appear to\n" - " be correct for the detected " - "mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=" - "force to ignore the board name in the\n" - "firmware image or override the detected " - "mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>." - "\n\n", - mainboard_vendor, mainboard_part, lb_vendor, - lb_part); - return 1; - } - } - - return 0; -} -#endif - #ifndef __LIBPAYLOAD__ int read_romlayout(char *name) { -- Kind regards, Stefan Tauner

1 0

Output Aspire R3610 (MCP79)
by Andrea De Pirro 10 Aug '12

10 Aug '12

flashrom v0.9.5.2-r1517 on Linux 3.2.0-29-generic (x86_64), built with libpci 3.1.8, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 397M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 994 us, 10000 myus = 9974 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Acer" DMI string system-product-name: "Aspire R3610" DMI string system-version: " " DMI string baseboard-manufacturer: "Acer" DMI string baseboard-product-name: "FMCP7A-ION" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8720 on port 0x2e Found chipset "NVIDIA MCP79" with PCI ID 10de:0aad. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:0aa2 at 00:03:2 MCP SPI BAR is at 0xfae80000 Mapping NVIDIA MCP6x SPI at 0xfae80000, unaligned size 0x544. SPI control is 0xc052, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. No IT87* serial flash segment enabled. The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x13 Found Macronix flash chip "MX25L8005" (1024 kB, SPI). -- Andrea De Pirro http://vizualize.me/andreadepirro +34 672438825 Skype: andrea.pirro.newshore LinkedIn: http://www.linkedin.com/in/andreadepirro If you are not the intended recipient, please notify the sender immediately. Please consider the environment before printing this e-mail.

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Re: [flashrom] [PATCH 2/2] Add board enable for Biostar M7VIQ.
by Luc Verhaegen 10 Aug '12

10 Aug '12

On Sat, Apr 28, 2012 at 01:30:53AM +0200, Stefan Tauner wrote: > The PCI IDs are generic VIA IDs. Only Biostar IDs are those of the LOM, but > that would not be a good choice for ID. Accept the generic IDs (+ DMI string) > for now because this will be generic soonish(tm) anyway. > + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", NULL, NULL, P3, "Biostar", "M7VIQ", 0, OK, w83697xx_memw_enable_2e}, "KM266-8235" is "VIA Northbridge marketing name"-"VIA Southbridge marketing name with VT removed". This DMI string is not unique at all. Luc Verhaegen.

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