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9186 discussions

Flashrom Update Failure
by Will Choe 05 Jun '14

05 Jun '14

Hi, Flashrom update failed due to sudden network interruption. After then, when I try the flashrom, following message appears: flashrom v0.9.7-r1711 on Linux 2.6.32-431.5.1.el6.x86_64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. sh: dmidecode: command not found dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel ICH10R". Enabling flash write... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. How do I make the flashrom to force rewrite the rom? Thanks in advance. Will

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Re: [flashrom] ft2232_spi:type=jtagkey
by Stefan Tauner 05 Jun '14

05 Jun '14

On Tue, 3 Jun 2014 19:48:12 +0700 Alfin Cahya <alfincp(a)gmail.com> wrote: > Hello Stefan, > > Thanks for your response. I have connected all the pins (CLK,DI,DO,CS) > and 3.3v to VCC, HOLD, WP. > IC type is EN25QH128A-HIP ( 4 pins ). > Try using Arduino Duemilanove (serprog:dev=/dev/ttyUSB0:2000000) > result remains the same. Then it may be one of the problems listed here: http://flashrom.org/ISP Could you please post a complete verbose log? Is the chip always detected? If you read the chip multiple times, is the content read always the same? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Try to add support for LE25FW106/1Mbit spi flash
by The Raven 04 Jun '14

04 Jun '14

Hello, i am trying to add this chip (ID 0x62 0x15). It works so far, but erase function 1 is not working. The datasheet tells that it supports 2K small sector, 32K sector and chip erase. 2K Small Sector and chip erase works. But 32K not. And i don't know why. Please have a look: .vendor = "Sanyo", .name = "LE25FW106", .bustype = BUS_SPI, .manufacture_id = SANYO_ID, .model_id = SANYO_LE25FW106, .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, .block_erasers = { { // .eraseblocks = { {2 * 1024, 64} }, //ok // .block_erase = spi_block_erase_d7, // }, { .eraseblocks = { {32 * 1024, 4} }, //not ok .block_erase = spi_block_erase_d8, // }, { // .eraseblocks = { {128 * 1024, 1} }, //ok // .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_plain, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, I am also not sure if "FEATURE_WRSR_WREN" is correct. The code is taken from "LE25FW406A" chip and changed to fit the "LE25FW106". This is the error: Found Sanyo flash chip "LE25FW106" (128 kB, SPI). Erasing and writing flash chip... Trying erase function 0... 0x000000-0x007fff:E, 0x008000-0x00ffff:EError: invalid response 0xAF from device spi_block_erase_d8 failed during command execution at address 0x8000 Looking for another erase function. No usable erase functions left. FAILED! Attention: It tells function 0, but this is because i have removed the other functions for testing. ;-) BTW: Chips was found an a 2.5" hitachi harddisk. Chip is a "T" model (MSOP8).

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[commit] r1818 - trunk
by repository service 04 Jun '14

04 Jun '14

Author: stefanct Date: Wed Jun 4 18:17:03 2014 New Revision: 1818 URL: http://flashrom.org/trac/flashrom/changeset/1818 Log: Add support for Sanyo LE25FW106. Also, add spi_disable_blockprotect_bp1_srwd(). Originally written and tested by The Raven <originalraven(a)hotmail.com>. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/chipdrivers.h Wed Jun 4 18:17:03 2014 (r1818) @@ -73,6 +73,7 @@ int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash); int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); +int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/flashchips.c Wed Jun 4 18:17:03 2014 (r1818) @@ -9153,6 +9153,37 @@ { .vendor = "Sanyo", + .name = "LE25FW106", + .bustype = BUS_SPI, + .manufacture_id = SANYO_ID, + .model_id = SANYO_LE25FW106, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {2 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp1_srwd, /* FIXME: Add ERSER error flag. */ + .unlock = spi_disable_blockprotect_bp1_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Sanyo", .name = "LE25FW406A", .bustype = BUS_SPI, .manufacture_id = SANYO_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/flashchips.h Wed Jun 4 18:17:03 2014 (r1818) @@ -537,6 +537,7 @@ #define SANYO_ID 0x62 /* Sanyo */ #define SANYO_LE25FW203A 0x1600 #define SANYO_LE25FW403A 0x1100 +#define SANYO_LE25FW106 0x15 #define SANYO_LE25FW406 0x07 /* RES2 */ #define SANYO_LE25FW418A 0x10 /* RES2 and some weird 1 byte RDID variant */ #define SANYO_LE25FW406A 0x1A /* RES2, no datasheet */ Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/spi25_statusreg.c Wed Jun 4 18:17:03 2014 (r1818) @@ -196,6 +196,13 @@ return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF); } +/* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and + * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */ +int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF); +} + /* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly * non-0). */

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[PATCH 2/2] Remove MCP6/7/8 SPI log requests.
by Stefan Tauner 03 Jun '14

03 Jun '14

We got enough (and no one is looking at them for the time being anyway). Also, return an error code in the case no bus type could be detected. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipset_enable.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 40761d2..ec3c12c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1244,8 +1244,6 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) int ret = 0, want_spi = 0; uint8_t val; - msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); - /* dev is the ISA bridge. No idea what the stuff below does. */ val = pci_read_byte(dev, 0x8a); msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " @@ -1264,17 +1262,15 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) */ internal_buses_supported = BUS_NONE; msg_pdbg("Flash bus type is SPI\n"); - msg_pinfo("SPI on this chipset is WIP. Please report any " - "success or failure by mailing us the verbose " - "output to flashrom(a)flashrom.org, thanks!\n"); break; default: /* Should not happen. */ internal_buses_supported = BUS_NONE; - msg_pdbg("Flash bus type is unknown (none)\n"); - msg_pinfo("Something went wrong with bus type detection.\n"); - goto out_msg; - break; + msg_pwarn("Flash bus type is unknown (none)\n"); + msg_pinfo("Please send the log files created by \"flashrom -p internal -o logfile\" to \n" + "flashrom(a)flashrom.org with \"your board name: flashrom -V\" as the subject to\n" + "help us finish support for your chipset. Thanks.\n"); + return ERROR_NONFATAL; } /* Force enable SPI and disable LPC? Not a good idea. */ @@ -1287,11 +1283,6 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) if (mcp6x_spi_init(want_spi)) ret = 1; -out_msg: - msg_pinfo("Please send the output of \"flashrom -V -p internal\" to flashrom(a)flashrom.org\n" - "with \"your board name: flashrom -V\" as the subject to help us finish support\n" - "for your chipset. Thanks.\n"); - return ret; } -- Kind regards, Stefan Tauner

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[PATCH 1/2] Remove W836xx log requests.
by Stefan Tauner 03 Jun '14

03 Jun '14

We got enough (and no one is looking at them for the time being anyway). Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- board_enable.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/board_enable.c b/board_enable.c index 2cf6776..782db35 100644 --- a/board_enable.c +++ b/board_enable.c @@ -333,12 +333,9 @@ void probe_superio_winbond(void) continue; } } - msg_pinfo("Active config mode, unknown reg 0x20 ID: %02x.\n", model); - msg_pinfo("Please send the output of \"flashrom -V -p internal\" to \n" - "flashrom(a)flashrom.org with W836xx: your board name: flashrom -V\n" - "as the subject to help us finish support for your Super I/O. Thanks.\n"); + msg_pdbg("Active config mode, unknown reg 0x20 ID: %02x.\n", model); continue; - } + } /* The Super I/O reacts to W836xx enter and exit config mode, it's probably Winbond. */ w836xx_ext_enter(s.port); s.model = sio_read(s.port, 0x20); -- Kind regards, Stefan Tauner

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Re: [flashrom] ft2232_spi:type=jtagkey
by Stefan Tauner 03 Jun '14

03 Jun '14

Hello Alfin, thanks for your report. Have you connected all input pins of the flash chip to the programmer? The behavior shown in the log extract could be coming from a floating write protection pin. That's pin #9 (diagonally opposite to the pin #1 marker on the 16-pin sop/soic package). I'd check if that pin is pulled-high towards VCC (pin #2). Likewise all other *input* pins should be driven - either statically to GND or VCC (ideally by resistors), or dynamically by the programmer's clock and data out pins. HTH -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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W836xx: J1800N-D2H: flashrom -V
by Maarten Wouters 03 Jun '14

03 Jun '14

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Re: [flashrom] Add PICkit2 as an SPI programmer
by Stefan Tauner 03 Jun '14

03 Jun '14

On Mon, 2 Jun 2014 21:43:09 -0400 Justin Chevrier <jchevrier(a)gmail.com> wrote: > +.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)" > +.sp > +.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)" > +.sp Hi, thanks for your updated patch! You seem to have mixed up a few bits while rebasing. I could clear that up too, but if you beat me at it, I'd feel lucky ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] Add PICkit2 as an SPI programmer
by Justin Chevrier 03 Jun '14

03 Jun '14

On Mon, Jun 2, 2014 at 9:43 PM, Justin Chevrier <jchevrier(a)gmail.com> wrote: > Hi Stefan, > > Attached is a second revision of my patch. Hopefully it addresses > everything you pointed out previously! Keep me posted if more work > needs to be done. > > I have attached a log of a write as well. > > Thanks again, > > Justin > > On Fri, May 30, 2014 at 8:27 PM, Stefan Tauner > <stefan.tauner(a)alumni.tuwien.ac.at> wrote: >> On Thu, 1 May 2014 13:39:44 -0400 >> Justin Chevrier <jchevrier(a)gmail.com> wrote: >> >>> Very sorry for not replying to your email (thanks for the review by the way). >>> >>> I do have a newer patch that fixes most if not all of the points you >>> made, but I've been slacking in going over it one last time and >>> getting it sent in. I had someone contact me directly around December >>> and they successfully used this updated patch on their hardware. >>> >>> I'll see if I can get the patch brushed up and sent in shortly. >>> >>> Thanks for the reminder (ugh, can't believe it's been over one year). >> >> Hi Justin, >> >> this is just a friendly ping. I am planning to do a stable release in >> the not too distant future (next few weeks) and would like to include >> your module if it gets ready by then. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner Ugh, sorry for the top post and the flashrom.8 junk in the patch. New version attached. Justin

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