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EN25Q128 (Thomson TG582n router) flash problem?
by Adrian Graham 12 Mar '16

12 Mar '16

Hi, I'm trying to re-flash this 16mb chip with the original contents I dumped before attempting to flash a new bootloader for OpenWRT installation, all the flashing of various CFE bootloaders was successful and the last erase I did was also successful. However this happens when I try to re-flash: pi@raspberrypi ~ $ flashrom -p linux_spi:dev=/dev/spidev0.0 -c"EN25Q128" -w EN25Q128_flash.bin --verbose flashrom v0.9.8-r1888 on Linux 4.1.18-v7+ (armv7l) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.1, GCC 4.9.2, little endian Command line (6 args): flashrom -p linux_spi:dev=/dev/spidev0.0 -cEN25Q128 -w EN25Q128_flash.bin --verbose Calibrating delay loop... OS timer resolution is 3 usecs, 297M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1011 us, 10000 myus = 10067 us, 12 myus = 13 us, OK. Initializing linux_spi programmer Using device /dev/spidev0.0 The following protocols are supported: SPI. Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3018 Found Eon flash chip "EN25Q128" (16384 kB, SPI) on linux_spi. Chip status register is 0x00. This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:W, 0x001000-0x001fff:W, 0x002000-0x002fff:S, 0x003000-0x003fff:W, 0x004000-0x004fff:W, 0x005000-0x005fff:W, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:W, . . . {Snip} . . . 0xff3000-0xff3fff:S, 0xff4000-0xff4fff:S, 0xff5000-0xff5fff:S, 0xff6000-0xff6fff:S, 0xff7000-0xff7fff:S, 0xff8000-0xff8fff:S, 0xff9000-0xff9fff:S, 0xffa000-0xffafff:S, 0xffb000-0xffbfff:S, 0xffc000-0xffcfff:S, 0xffd000-0xffdfff:S, 0xffe000-0xffefff:S, 0xfff000-0xffffff:S Erase/write done. Verifying flash... FAILED at 0x0019f8d1! Expected=0x92, Found=0x85, failed byte count from 0x00000000-0x00ffffff: 0x898 Your flash chip is in an unknown state. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks! pi@raspberrypi ~ $ This is version 0.9.8 if you guys are still out there. Thanks! -- Adrian/Witchy Binary Dinosaurs creator/curator Www.binarydinosaurs.co.uk - the UK's biggest private home computer collection?

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Re: [flashrom] Supermicro X9SRH-7F/7TF
by Stefan Tauner 12 Mar '16

12 Mar '16

On Fri, 11 Mar 2016 08:25:16 -0800 Eric Donaldson <eric(a)zadarastorage.com> wrote: > Sorry about that, thought I had included the command I was running. I was > just running the probe on it to figure out if I was going to be able to > read and write to flash, then it said to run it verbosely and submit it. > `flashrom -p internal:pci=01:00.0` I think you are confusing the internal programmer with nicintel_spi (etc). The internal programmer is actually used to access the flash chip of the mainboard containing the firmware of the board and possibly its on-board peripherals. Thus it *might* contain the PXE firmware as well but there is no easy way to prepare images for that. However, from what you wrote so far I think you want to use nicintel_spi and friends to access the boot flash of dedicated NICs. For them the pci parameter makes way more sense as well :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] Supermicro X9SRH-7F/7TF
by Stefan Tauner 11 Mar '16

11 Mar '16

On Thu, 10 Mar 2016 10:53:29 -0800 Eric Donaldson <eric(a)zadarastorage.com> wrote: > Was poking around at messing with the NIC ROMs, recieved the recommendation > to send an email with the verbose output. > Thanks for the log. However, I am not entirely sure why it was recommended to you to send it in without further explanation. Did you try to write to the flash? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Supermicro X9SRH-7F/7TF
by Eric Donaldson 10 Mar '16

10 Mar '16

Was poking around at messing with the NIC ROMs, recieved the recommendation to send an email with the verbose output. *Eric Donaldson* *DevOps Engineer**Zadara Storage* eric(a)zadarastorage.com Skype: eric_zadara Twitter: @ZadaraStorage Website <http://www.zadarastorage.com/> | Blog <http://www.zadarastorage.com/blog/> | LinkedIn <http://www.linkedin.com/company/zadara-storage/> | Facebook <http://www.facebook.com/ZadaraStorage.VPSA> | Twitter <http://twitter.com/zadaraStorage> | YouTube <http://www.youtube.com/playlist?list=PLZHbMSlUCWob2xFDopFs10UiEwEF8CHg_>

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Re: [flashrom] problems with flashrom
by ryzomone＠gmail.com 09 Mar '16

09 Mar '16

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Re: [flashrom] [PATCH] Add support for GNU Hurd.
by François Revol 09 Mar '16

09 Mar '16

On 06/03/2016 04:57, Stefan Tauner wrote: > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> > --- > hwaccess.c | 8 +++++++- > os.h | 3 +++ > 2 files changed, 10 insertions(+), 1 deletion(-) > Damn, I really need to finish Haiku support before someone sends a patch for Minix :D François.

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hi need help EFI unlock
by edival lopes 08 Mar '16

08 Mar '16

hi there. my mac is locked i need help to unlock the efi password what i meed to do. and what i use for it? thanks Sent from my iPhone

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[PATCH] Add support for SST39LF010, SST39LF020 and SST39LF040
by Hatim Kanchwala 07 Mar '16

07 Mar '16

Hello, I am learning about parallel flash chips. My approach is to go through datasheets of chips supported by flashrom and then add support for other member chips of the family. AFAIK, following three chips differ from VF variants only in voltage range. I was able to find very little about parallel flash on the internet, so I will continue with this approach (what do you guys think? :P). If you have any resources or any particular parallel chip family in mind, please let me know (via mail or IRC ;)). Thanks! :) Signed-off-by: Hatim Kanchwala <hatim(a)hatimak.me> --- flashchips.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 6 ++--- 2 files changed, 84 insertions(+), 3 deletions(-) diff --git a/flashchips.c b/flashchips.c index 0fc1b7a..b8fff3c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -12862,26 +12862,107 @@ const struct flashchip flashchips[] = { { { .eraseblocks = { {256 * 1024, 1} }, .block_erase = erase_chip_block_jedec, } }, .write = write_jedec, .read = read_memmapped, .voltage = {3000, 3600}, }, { .vendor = "SST", + .name = "SST39LF010", + .bustype = BUS_PARALLEL, + .manufacture_id = SST_ID, + .model_id = SST_SST39VF010, + .total_size = 128, + .page_size = 4096, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = 1, /* 150 ns */ + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {3000, 3600}, + }, + + { + .vendor = "SST", + .name = "SST39LF020", + .bustype = BUS_PARALLEL, + .manufacture_id = SST_ID, + .model_id = SST_SST39VF020, + .total_size = 256, + .page_size = 4096, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = 1, /* 150 ns */ + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {3000, 3600}, + }, + + { + .vendor = "SST", + .name = "SST39LF040", + .bustype = BUS_PARALLEL, + .manufacture_id = SST_ID, + .model_id = SST_SST39VF040, + .total_size = 512, + .page_size = 4096, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = 1, /* 150 ns */ + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {3000, 3600}, + }, + + { + .vendor = "SST", .name = "SST39SF512", .bustype = BUS_PARALLEL, .manufacture_id = SST_ID, .model_id = SST_SST39SF512, .total_size = 64, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = { { diff --git a/flashchips.h b/flashchips.h index 9ffb30f..3d61ad1 100644 --- a/flashchips.h +++ b/flashchips.h @@ -709,29 +709,29 @@ #define SST_SST29EE010 0x07 #define SST_SST29LE010 0x08 /* Same as SST29VE010 */ #define SST_SST29EE020A 0x10 /* Same as SST29EE020 */ #define SST_SST29LE020 0x12 /* Same as SST29VE020 */ #define SST_SST29SF020 0x24 #define SST_SST29VF020 0x25 #define SST_SST29SF040 0x13 #define SST_SST29VF040 0x14 #define SST_SST39SF512 0xB4 #define SST_SST39SF010 0xB5 #define SST_SST39SF020 0xB6 /* Same as 39SF020A */ #define SST_SST39SF040 0xB7 #define SST_SST39VF512 0xD4 -#define SST_SST39VF010 0xD5 -#define SST_SST39VF020 0xD6 /* Same as 39LF020 */ -#define SST_SST39VF040 0xD7 /* Same as 39LF040 */ +#define SST_SST39VF010 0xD5 /* Same as SST39LF010 */ +#define SST_SST39VF020 0xD6 /* Same as SST39LF020 */ +#define SST_SST39VF040 0xD7 /* Same as SST39LF040 */ #define SST_SST39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */ #define SST_SST45VF512 0x41 /* REMS, read opcode 0xFF */ #define SST_SST45LF010 0x42 /* REMS, read opcode 0xFF, 'funny' other opcodes */ #define SST_SST45VF010 0x45 /* REMS, read opcode 0xFF */ #define SST_SST45VF020 0x43 /* REMS, read opcode 0xFF */ #define SST_SST49LF040B 0x50 #define SST_SST49LF040 0x51 #define SST_SST49LF020 0x61 #define SST_SST49LF020A 0x52 #define SST_SST49LF030A 0x1C #define SST_SST49LF080A 0x5B #define SST_SST49LF002A 0x57 #define SST_SST49LF003A 0x1B -- Regards, Hatim Kanchwala http://hatimak.me B. Tech. Electrical Engineering Indian Institute of Technology Patna

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Re: [flashrom] [PATCH] Add support for GNU Hurd.
by Carl-Daniel Hailfinger 06 Mar '16

06 Mar '16

On 06.03.2016 16:32, Stefan Tauner wrote: > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> > --- > > New version avoiding breaking any other platform by guarding the inclusion > of sys/io.h as it should have been in the first place. > I have actually tested this with the internal programmer within a VirtualBox > VM and it worked as expected (i.e. not really but it did not explode either). So forced read did turn up the vbox BIOS? If yes, this is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel

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[commit] r1948 - trunk
by repository service 06 Mar '16

06 Mar '16

Author: stefanct Date: Sun Mar 6 23:32:16 2016 New Revision: 1948 URL: http://flashrom.org/trac/flashrom/changeset/1948 Log: Add support for GNU Hurd. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/hwaccess.c trunk/os.h Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Sun Mar 6 15:33:49 2016 (r1947) +++ trunk/hwaccess.c Sun Mar 6 23:32:16 2016 (r1948) @@ -33,12 +33,17 @@ #include "flash.h" #include "hwaccess.h" -#if !(IS_LINUX || IS_MACOSX || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined(__sun)) +#if !(IS_LINUX || IS_MACOSX || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined(__sun) || defined(__gnu_hurd__)) #error "Unknown operating system" #endif #define USE_IOPL (IS_LINUX || IS_MACOSX || defined(__NetBSD__) || defined(__OpenBSD__)) #define USE_DEV_IO (defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)) +#define USE_IOPERM (defined(__gnu_hurd__)) + +#if USE_IOPERM +#include <sys/io.h> +#endif #if IS_X86 && USE_DEV_IO int io_fd; @@ -82,6 +87,8 @@ sysi86(SI86V86, V86SC_IOPL, 0); #elif USE_DEV_IO close(io_fd); +#elif USE_IOPERM + ioperm(0, 65536, 0); #elif USE_IOPL iopl(0); #endif @@ -97,6 +104,8 @@ if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif USE_DEV_IO if ((io_fd = open("/dev/io", O_RDWR)) < 0) { +#elif USE_IOPERM + if (ioperm(0, 65536, 1) != 0) { #elif USE_IOPL if (iopl(3) != 0) { #endif Modified: trunk/os.h ============================================================================== --- trunk/os.h Sun Mar 6 15:33:49 2016 (r1947) +++ trunk/os.h Sun Mar 6 23:32:16 2016 (r1948) @@ -56,6 +56,9 @@ // libpayload #elif defined(__LIBPAYLOAD__) #define __FLASHROM_OS__ "libpayload" +// GNU Hurd +#elif defined(__gnu_hurd__) +#define __FLASHROM_OS__ "Hurd" // Linux #elif defined(__linux__) // There are various flags in use on Android apparently. __ANDROID__ seems to be the most trustworthy.

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