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Re: [flashrom] ENE KB9012 patches: new test results
by Paul Kocialkowski 01 Oct '16

01 Oct '16

Hi, I got your emails just fine, I just didn't have time to sit down and write a proper reply but I'm very enthusiasic about working with you ! Cheers, Paul Kocialkowski Le vendredi 23 septembre 2016 à 03:16 +0300, mikeb mikeb a écrit : > Good day! I just tried reading from KB9012 and encountered exactly the same > problem as Joerg Albert has ( https://www.flashrom.org/pipermail/flashrom/2016 > -May/014653.html ) - chip is detected only every second time. This is not > caused by cabling. While it is recommended for SPI that the wires should be > shorter than 20cm, my wires are 11 cm: 8 cm of which is 12 strands high > quality copper and only 3 cm are ordinary aluminium inside the 30 pin 0.5mm > pitch keyboard-like connector This is interesting! I still haven't been able to reproduce the issue (but haven't tried so hard either). Could you indicate whether you are: * grounding pin 42 to go into test mode * powering the mainboard Thanks! > NOTE: it was much easier and safer to solder 1P wires to this connector rather > than to motherboard, and you could remove/insert it at any time - what a great > convenience! The only 1P wire I had to solder to motherboard is to > motherboard's ground, - to make it possible to unite three grounds > (motherboard s, KB9012 s and programmer s) - and that was really easy because > at least one of these orange circle grounds has a great distance between it > and motherboard's elements so it is difficult to screw up there :) Going to > share photos and write some manuals about connectivity, hopefully helpful to > the people like me who want to participate in Origami EC project - creation of > open source firmware for KB9012 which in case of success will be a HUGE step > towards Lenovo G505S liberation (AMD laptop with coreboot support) . > Discovered Paul's presentation talk by pure accident - > https://www.youtube.com/watch?v=B708jdCiW7o > > So I tried using two SPI programmers: 1) CH341A . 2) Bus Pirate v4 . The only > observed difference is a speed: for CH341A read takes 13-14 minutes, while for > BPv4 - despite the latest 7.0 firmware with level 3 optimizations ( http://dan > gerousprototypes.com/docs/Bus_Pirate#Download ) and SPI speed is 8 MHz - it > takes 40 minutes to read! Checksums of the files are the same and the files > have almost the same contains as KB9012 image for LA-A091P G505S that I found > online (same except the area 0x1d000 - 0x1e0f0, their image is filled with > 0xff there, mine has many 0x00 with a few 0xff and also data - probably > encoded serial number and similar stuff) , so I am pretty sure these > programmers both are reading without errors in my setup, just at the different > speeds for some weird reason > > Patches applied before testing: > 1) https://patchwork.coreboot.org/patch/4412/ > 2) https://patchwork.coreboot.org/patch/4413/ > 3) https://patchwork.coreboot.org/patch/4414/ > > This problem with 1/2 detection rate is not a blocker, more like a small > inconvenience, so I strongly believe that these patches should be merged as > soon as possible! Paul Kocialkowski has committed them almost a year ago, such > a major feature and still not merged?? > > Below you could see some -VVV detection logs. > > After reading this really inspiring article ( http://code.paulk.fr/article25/a > n-incentive-for-liberating-computers-my-own-use-case ) I guess that Paul's > motherboard is LA-A092P, very similar to LA-A091P but no extra GPU. Could that > be a reason he is not getting a detection problem? Just a wild guess... > > Yours sincerely, > Mikeb > > 1) Common part of "2) and "3)" - CH341A tries to detect: > sudo ./flashrom -p ch341a_spi -c "KB9012 (EDI)" -VVV > flashrom v0.9.9-r1954 on Linux 4.4.0-36-generic (x86_64) > flashrom is free software, get the source code at https://flashrom.org > flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian > Command line (5 args): ./flashrom -p ch341a_spi -c KB9012 (EDI) -VVV > > 2) FAIL: > Calibrating delay loop... OS timer resolution is 1 usecs, 578M loops per > second, 10 myus = 11 us, 100 myus = 92 us, 1000 myus = 914 us, 10000 myus = > 9661 us, 4 myus = 5 us, OK. > Initializing ch341a_spi programmer, Device revision is 3.0.4 > Wrote 3 bytes: aa 61 00 > Wrote 4 bytes: ab b7 7f 20 > The following protocols are supported: SPI. > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > Read 7 bytes: ff ff ff ff 00 00 00 > programmer_unmap_flash_region: unmapped 0x0000000000000000 > No EEPROM/flash device found. > Note: flashrom can never write if the flash chip isn't found automatically. > Wrote 4 bytes: ab b7 40 20 > > 3) SUCCESS: > Calibrating delay loop... OS timer resolution is 1 usecs, 629M loops per > second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 994 us, 10000 myus = > 9974 us, 4 myus = 4 us, OK. > Initializing ch341a_spi programmer, Device revision is 3.0.4 > Wrote 3 bytes: aa 61 00 > Wrote 4 bytes: ab b7 7f 20 > The following protocols are supported: SPI. > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a c3 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 24 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a 20 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a 00 > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 80 > Read 5 bytes: 00 00 00 00 00 > Found ENE flash chip "KB9012 (EDI)" (128 kB, SPI) on ch341a_spi. > programmer_unmap_flash_region: unmapped 0x0000000000000000 > No operations were specified. > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a 80 > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 00 > Read 5 bytes: 00 00 00 00 00 > Wrote 34 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 cf > Read 1 bytes: 00 > Wrote 4 bytes: ab b7 40 20 > > 4) Small part of Bus Pirate v4 reading log: > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 > 0xfe 0xab, receiving 0x01 0x5f 0x50 0x90 > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xa8 0xc6, receiving 0x01 > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xac 0x03, receiving 0x01 > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 > 0xfe 0xab, receiving 0x01 0x5f 0x50 0xec > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xa8 0xc7, receiving 0x01 > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xac 0x03, receiving 0x01 > > 5) Small part of CH341A reading log: > Read 5 bytes: 00 00 00 00 00 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a ff > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 15 fb > Read 5 bytes: 00 00 00 00 00 > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 35 c0 > Read 5 bytes: 00 00 00 00 00 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > -- Paul Kocialkowski, developer of low-level free software for embedded devices Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/ -- Envoyé de mon appareil Android avec K-9 Mail. Veuillez excuser ma brièveté.

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Flashrom error with request to report
by Thomas Köhn 29 Sep '16

29 Sep '16

Calibrating delay loop... OK. Found Spansion flash chip "S25FL164K" (8192 kB, SPI) on ft2232_spi. Reading old flash chip contents... done. Erasing and writing flash chip... FAILED at 0x00000000! Expected=0xff, Found=0xbd, failed byte count from 0x00000000-0x00000fff: 0x2fb ERASE FAILED! Reading current flash chip contents... ftdi_write_data: -110, usb bulk write failed send_buf failed at end: 1 Can't read anymore! Aborting. FAILED! Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... ftdi_write_data: -110, usb bulk write failed send_buf failed at end: 1 Can't even read anymore! Your flash chip is in an unknown state. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks!

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acer aspire 7750g
by Torsten Heins 28 Sep '16

28 Sep '16

At acer aspire 7750g flashrom doesn't function.

2 1

Flashrom try while logged in
by john 25 Sep '16

25 Sep '16

I tried the flashEROm for an older computer A7V266, at the moment it has the 1011 flash installed, I am intending to try the 1015: only to see if there are any features that provide more options, such as boot from USB or set NUMLOCK, which at the moment it does have for either one (USB or NUMLOCK) The last flash offer available from global server, not the USA support site, although the link was provided for other locations..

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ENE KB9012 patches: new test results
by mikeb mikeb 23 Sep '16

23 Sep '16

Good day! I just tried reading from KB9012 and encountered exactly the same problem as Joerg Albert has ( https://www.flashrom.org/pipermail/flashrom/2016-May/014653.html ) - chip is detected only every second time. This is not caused by cabling. While it is recommended for SPI that the wires should be shorter than 20cm, my wires are 11 cm: 8 cm of which is 12 strands high quality copper and only 3 cm are ordinary aluminium inside the 30 pin 0.5mm pitch keyboard-like connector NOTE: it was much easier and safer to solder 1P wires to this connector rather than to motherboard, and you could remove/insert it at any time - what a great convenience! The only 1P wire I had to solder to motherboard is to motherboard's ground, - to make it possible to unite three grounds (motherboard s, KB9012 s and programmer s) - and that was really easy because at least one of these orange circle grounds has a great distance between it and motherboard's elements so it is difficult to screw up there :) Going to share photos and write some manuals about connectivity, hopefully helpful to the people like me who want to participate in Origami EC project - creation of open source firmware for KB9012 which in case of success will be a HUGE step towards Lenovo G505S liberation (AMD laptop with coreboot support) . Discovered Paul's presentation talk by pure accident - https://www.youtube.com/watch?v=B708jdCiW7o So I tried using two SPI programmers: 1) CH341A . 2) Bus Pirate v4 . The only observed difference is a speed: for CH341A read takes 13-14 minutes, while for BPv4 - despite the latest 7.0 firmware with level 3 optimizations ( http://dangerousprototypes.com/docs/Bus_Pirate#Download ) and SPI speed is 8 MHz - it takes 40 minutes to read! Checksums of the files are the same and the files have almost the same contains as KB9012 image for LA-A091P G505S that I found online (same except the area 0x1d000 - 0x1e0f0, their image is filled with 0xff there, mine has many 0x00 with a few 0xff and also data - probably encoded serial number and similar stuff) , so I am pretty sure these programmers both are reading without errors in my setup, just at the different speeds for some weird reason Patches applied before testing: 1) https://patchwork.coreboot.org/patch/4412/ 2) https://patchwork.coreboot.org/patch/4413/ 3) https://patchwork.coreboot.org/patch/4414/ This problem with 1/2 detection rate is not a blocker, more like a small inconvenience, so I strongly believe that these patches should be merged as soon as possible! Paul Kocialkowski has committed them almost a year ago, such a major feature and still not merged?? Below you could see some -VVV detection logs. After reading this really inspiring article ( http://code.paulk.fr/article25/an-incentive-for-liberating-computers-my-own… ) I guess that Paul's motherboard is LA-A092P, very similar to LA-A091P but no extra GPU. Could that be a reason he is not getting a detection problem? Just a wild guess... Yours sincerely, Mikeb 1) Common part of "2) and "3)" - CH341A tries to detect: sudo ./flashrom -p ch341a_spi -c "KB9012 (EDI)" -VVV flashrom v0.9.9-r1954 on Linux 4.4.0-36-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian Command line (5 args): ./flashrom -p ch341a_spi -c KB9012 (EDI) -VVV 2) FAIL: Calibrating delay loop... OS timer resolution is 1 usecs, 578M loops per second, 10 myus = 11 us, 100 myus = 92 us, 1000 myus = 914 us, 10000 myus = 9661 us, 4 myus = 5 us, OK. Initializing ch341a_spi programmer, Device revision is 3.0.4 Wrote 3 bytes: aa 61 00 Wrote 4 bytes: ab b7 7f 20 The following protocols are supported: SPI. Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff Read 7 bytes: ff ff ff ff 00 00 00 programmer_unmap_flash_region: unmapped 0x0000000000000000 No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Wrote 4 bytes: ab b7 40 20 3) SUCCESS: Calibrating delay loop... OS timer resolution is 1 usecs, 629M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 994 us, 10000 myus = 9974 us, 4 myus = 4 us, OK. Initializing ch341a_spi programmer, Device revision is 3.0.4 Wrote 3 bytes: aa 61 00 Wrote 4 bytes: ab b7 7f 20 The following protocols are supported: SPI. Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a c3 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 24 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a 20 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a 00 Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 80 Read 5 bytes: 00 00 00 00 00 Found ENE flash chip "KB9012 (EDI)" (128 kB, SPI) on ch341a_spi. programmer_unmap_flash_region: unmapped 0x0000000000000000 No operations were specified. Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a 80 Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 00 Read 5 bytes: 00 00 00 00 00 Wrote 34 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 cf Read 1 bytes: 00 Wrote 4 bytes: ab b7 40 20 4) Small part of Bus Pirate v4 reading log: buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 0xfe 0xab, receiving 0x01 0x5f 0x50 0x90 buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xa8 0xc6, receiving 0x01 buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xac 0x03, receiving 0x01 buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 0xfe 0xab, receiving 0x01 0x5f 0x50 0xec buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xa8 0xc7, receiving 0x01 buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xac 0x03, receiving 0x01 5) Small part of CH341A reading log: Read 5 bytes: 00 00 00 00 00 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a ff Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 15 fb Read 5 bytes: 00 00 00 00 00 Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 35 c0 Read 5 bytes: 00 00 00 00 00 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff

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Re: [flashrom] Issue programming SPI flash
by Stefan Tauner 21 Sep '16

21 Sep '16

On Tue, 20 Sep 2016 23:00:15 +0000 Steve Burks <steve.burks(a)us.kontron.com> wrote: > Hi, > I have been flashing Macronix SPI with device ID MX25L12805D. We now have a new Numonyx SPI with device ID N25Q128..3E. However, when I try to flash the device it says that no flash device was found. But when I do the -p internal it clearly shows the device ID N25Q128..3E > > I have attached the verbose output from when I ran the command. I appreciate any assistance that you can provide. > > Thank you. > > Stephen Burks Hi Stephen, you have a Winbond W25Q128 there. All of these three are interchangeable so I guess someone swapped it without telling you :) In any case you should not use the -c parameter unless you have to and really know what chip is on there. Without it flashrom will find the right chip itself if it can. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Issue programming SPI flash
by Steve Burks 21 Sep '16

21 Sep '16

Hi, I have been flashing Macronix SPI with device ID MX25L12805D. We now have a new Numonyx SPI with device ID N25Q128..3E. However, when I try to flash the device it says that no flash device was found. But when I do the -p internal it clearly shows the device ID N25Q128..3E I have attached the verbose output from when I ran the command. I appreciate any assistance that you can provide. Thank you. Stephen Burks Manager, Manufacturing Engineering - USA Manufacturing Engineering and Material Data Management Kontron 14118 Stowe Drive | Poway, CA 92064 | USA P: + 1 (858) 677-0877 x3266 | M: + 1 (858) 699-4690 Steve.Burks(a)us.kontron.com<mailto:Steve.Burks@us.kontron.com> Website<http://www.kontron.com/> | Blog<http://blog.kontron.com/> | Twitter<https://twitter.com/Kontron> | LinkedIn<https://www.linkedin.com/company/kontron> | YouTube<https://www.youtube.com/channel/UCXkp_1gJbG0Um1vzdowlqww> | Facebook<https://www.facebook.com/kontron> Kontron America Please find our mandatory legal statements here<http://www.kontron.com/additional/disclaimer>. By opening this email you are agreeing to Kontron's Electronic Communications Policy<http://www.kontron.com/additional/legal-and-copyright-information>.

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[PATCH] add board enable for apple iMac5,2
by Arthur Heymans 19 Sep '16

19 Sep '16

Hi This patch adds the apple iMac5,2 to board enable. The hardware is very similar to the apple macbook2,1.

2 4

untested chipset intel
by Jan van Roessel 19 Sep '16

19 Sep '16

Marked as untested chipset Intel NUC, see attached log Met vriendelijke groet, Jan van Roessel

1 0

testing my A7V333
by Elmar Stellnberger 17 Sep '16

17 Sep '16

Today I have also tested my A7V333 mainboard with the latest flashrom from svn; and see it could read an image (log in the attachement). It said that write and erase would still need to be tested; however the following message does not raise my confidence: Changing lock bits failed at 0xb7305002! New value: 0xff. Basically I would also be ready to test erase & write on this board though it would likely be a good idea to have the error/log messages checked first.

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