- flashrom - mail.coreboot.org

[PATCH] Clean up board enable matching
by Carl-Daniel Hailfinger 13 Aug '12

13 Aug '12

This is an update of a really old patch. User-visible changes: You have to specify vendor+mainboard for the internal:mainboard= parameter. The vendor name is no longer optional. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-cbtable_matching_cleanup/board_enable.c =================================================================== --- flashrom-cbtable_matching_cleanup/board_enable.c (Revision 1567) +++ flashrom-cbtable_matching_cleanup/board_enable.c (Arbeitskopie) @@ -2447,37 +2447,50 @@ * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -static const struct board_match *board_match_cbname(const char *vendor, - const char *part) +static const struct board_match *board_match_cbname(const char *vendor, const char *part) { const struct board_match *board = board_matches; const struct board_match *partmatch = NULL; + /* If a board uses coreboot, we have full vendor+part name. + * If a board doesn't use coreboot, we have DMI. + * If a board has no useful DMI and no coreboot table and no subsystem IDs, the user should specify + * full board vendor+part name. + */ + if ((!vendor && part) || (vendor && !part)) { + msg_pinfo("Please supply board vendor and part name.\n"); + return NULL; + } + if (!vendor && !part) + return NULL; + for (; board->vendor_name; board++) { - if (vendor && (!board->lb_vendor - || strcasecmp(board->lb_vendor, vendor))) + if (!board->lb_vendor || strcasecmp(board->lb_vendor, vendor)) continue; if (!board->lb_part || strcasecmp(board->lb_part, part)) continue; - if (!pci_dev_find(board->first_vendor, board->first_device)) + if (!pci_dev_find(board->first_vendor, board->first_device)) { + msg_pdbg("Odd. coreboot name \"%s\":\"%s\" matches, but first PCI device %04x:%04x " + "doesn't.\n", vendor, part, board->first_vendor, board->first_device); continue; + } + /* FIXME: Once the entries for agami Aruma and IWILL DK8-HTX are fixed to have a second PCI + * device, we can run pci_dev_find unconditionally. + */ if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) + !pci_dev_find(board->second_vendor, board->second_device)) { + msg_pdbg("Odd. coreboot name \"%s\":\"%s\" matches, but second PCI device %04x:%04x " + "doesn't.\n", vendor, part, board->second_vendor, board->second_device); continue; + } - if (vendor) - return board; - if (partmatch) { - /* a second entry has a matching part name */ - msg_pinfo("AMBIGUOUS BOARD NAME: %s\n", part); - msg_pinfo("At least vendors '%s' and '%s' match.\n", - partmatch->lb_vendor, board->lb_vendor); - msg_perr("Please use the full -p internal:mainboard=" - "vendor:part syntax.\n"); + /* More than one entry has a matching name. */ + msg_perr("Board name \"%s\":\"%s\" and PCI IDs matched more than one board enable " + "entry. Please report a bug at flashrom(a)flashrom.org\n", part, vendor); return NULL; } partmatch = board; @@ -2487,12 +2500,10 @@ return partmatch; if (!partvendor_from_cbtable) { - /* Only warn if the mainboard type was not gathered from the - * coreboot table. If it was, the coreboot implementor is - * expected to fix flashrom, too. + /* Only warn if the mainboard type was not gathered from the coreboot table. If it was, the + * coreboot implementor is expected to fix flashrom, too. */ - msg_perr("\nUnknown vendor:board from -p internal:mainboard=" - " programmer parameter:\n%s:%s\n\n", + msg_perr("\nUnknown vendor:board from -p internal:mainboard= programmer parameter:\n%s:%s\n\n", vendor, part); } return NULL; -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] serprog: Add support for setting the SPI frequency.
by Stefan Tauner 13 Aug '12

13 Aug '12

On Fri, 3 Feb 2012 23:14:43 +0100 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Introduce a new opcode (0x14) that sends the requested frequency as a 32b > long value in Hertz to the programmer and receives the frequency eventually > chosen by the programmer. The user can specify this with the programmer > parameter "spispeed" (named after the similar parameter for the buspirate) > including an optional suffix of 'M' or 'k' for specifying megahertz or kilohertz > respectively (lowercase suffixes are also accepted). > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Self-acked and committed after small refinements in r1571. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1571 - in trunk: . Documentation
by repository service 13 Aug '12

13 Aug '12

Author: stefanct Date: Mon Aug 13 18:33:04 2012 New Revision: 1571 URL: http://flashrom.org/trac/flashrom/changeset/1571 Log: serprog: Add support for setting the SPI frequency. Introduce a new opcode (0x14) that sends the requested frequency as a 32b long value in Hertz to the programmer and receives the frequency eventually chosen by the programmer. The user can specify this with the programmer parameter "spispeed" (named after the similar parameter for the buspirate) including an optional suffix of 'M' or 'k' for specifying megahertz or kilohertz respectively (lowercase suffixes are also accepted). Thanks to Idwer and Uwe (and maybe others) for their feedback especially regarding the unit of frequency to use. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Documentation/serprog-protocol.txt trunk/flashrom.8 trunk/serprog.c Modified: trunk/Documentation/serprog-protocol.txt ============================================================================== --- trunk/Documentation/serprog-protocol.txt Mon Aug 13 10:45:13 2012 (r1570) +++ trunk/Documentation/serprog-protocol.txt Mon Aug 13 18:33:04 2012 (r1571) @@ -33,6 +33,7 @@ 0x12 Set used bustype 8-bit flags (as with 0x05) ACK / NAK 0x13 Perform SPI operation 24-bit slen + 24-bit rlen ACK + rlen bytes of data / NAK + slen bytes of data +0x14 Set SPI clock frequency in Hz 32-bit requested frequency ACK + 32-bit set frequency / NAK 0x?? unimplemented command - invalid. @@ -73,6 +74,14 @@ Maximum slen is Q_WRNMAXLEN in case Q_BUSTYPE returns SPI only or S_BUSTYPE was used to set SPI exclusively before. Same for rlen and Q_RDNMAXLEN. This operation is immediate, meaning it doesnt use the operation buffer. + 0x14 (S_SPI_FREQ): + Set the SPI clock frequency. The 32-bit value indicates the + requested frequency in Hertz. Value 0 is reserved and should + be NAKed by the programmer. The requested frequency should be + mapped by the programmer software to a supported frequency + lower than the one requested. If there is no lower frequency + available the lowest possible should be used. The value + chosen is sent back in the reply with an ACK. About mandatory commands: The only truly mandatory commands for any device are 0x00, 0x01, 0x02 and 0x10, but one can't really do anything with these commands. @@ -107,3 +116,4 @@ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ #define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ +#define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Mon Aug 13 10:45:13 2012 (r1570) +++ trunk/flashrom.8 Mon Aug 13 18:33:04 2012 (r1571) @@ -598,7 +598,17 @@ .sp .B " flashrom \-p serprog:ip=ipaddr:port" .sp -instead. More information about serprog is available in +instead. In case the device supports it, you can set the SPI clock frequency +with the optional +.B spispeed +parameter. The frequency is parsed as Hertz, unless an +.BR M ", or " k +suffix is given, then megahertz or kilohertz are used respectively. +Example that sets the frequency to 2 MHz: +.sp +.B "flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M" +.sp +More information about serprog is available in .B serprog-protocol.txt in the source distribution. .SS Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Mon Aug 13 10:45:13 2012 (r1570) +++ trunk/serprog.c Mon Aug 13 18:33:04 2012 (r1571) @@ -69,6 +69,7 @@ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ #define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ +#define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ static uint16_t sp_device_serbuf_size = 16; static uint16_t sp_device_opbuf_size = 300; @@ -482,6 +483,7 @@ /* Check for the minimum operational set of commands. */ if (serprog_buses_supported & BUS_SPI) { uint8_t bt = BUS_SPI; + char *spispeed; if (sp_check_commandavail(S_CMD_O_SPIOP) == 0) { msg_perr("Error: SPI operation not supported while the " "bustype is SPI\n"); @@ -513,6 +515,51 @@ spi_programmer_serprog.max_data_read = v; msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", v); } + spispeed = extract_programmer_param("spispeed"); + if (spispeed && strlen(spispeed)) { + uint32_t f_spi_req, f_spi; + uint8_t buf[4]; + char *f_spi_suffix; + + errno = 0; + f_spi_req = strtol(spispeed, &f_spi_suffix, 0); + if (errno != 0 || spispeed == f_spi_suffix) { + msg_perr("Error: Could not convert 'spispeed'.\n"); + return 1; + } + if (strlen(f_spi_suffix) == 1) { + if (!strcasecmp(f_spi_suffix, "M")) + f_spi_req *= 1000000; + else if (!strcasecmp(f_spi_suffix, "k")) + f_spi_req *= 1000; + else { + msg_perr("Error: Garbage following 'spispeed' value.\n"); + return 1; + } + } else if (strlen(f_spi_suffix) > 1) { + msg_perr("Error: Garbage following 'spispeed' value.\n"); + return 1; + } + + buf[0] = (f_spi_req >> (0 * 8)) & 0xFF; + buf[1] = (f_spi_req >> (1 * 8)) & 0xFF; + buf[2] = (f_spi_req >> (2 * 8)) & 0xFF; + buf[3] = (f_spi_req >> (3 * 8)) & 0xFF; + + if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0) + msg_perr(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); + else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) + == 0) { + f_spi = buf[0]; + f_spi |= buf[1] << (1 * 8); + f_spi |= buf[2] << (2 * 8); + f_spi |= buf[3] << (3 * 8); + msg_pdbg(MSGHEADER "Requested to set SPI clock frequency to %u Hz. " + "It was actually set to %u Hz\n", f_spi_req, f_spi); + } else + msg_pdbg(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); + } + free(spispeed); bt = serprog_buses_supported; if (sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL)) return 1;

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[patch] board enable for ASUS P4P800-X (with erasing/writing SST SST49LF003A/B)
by Idwer Vollering 13 Aug '12

13 Aug '12

Enable writing/erasing on the ASUS P4P800-X, tested by mindcat on IRC. This board enable is inspired by the board enable for the ASUS P4P800-VM. As a bonus, testin the erasing/writing functionality on the SST SST49LF003A/B chip is now known to work. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- Before (r1205/v0.9.3): Write report: http://paste.flashrom.org/view.php?id=465 Write report: http://paste.flashrom.org/view.php?id=466 After (r1285): Erase report: http://paste.flashrom.org/view.php?id=467

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[commit] r1570 - in trunk: . util/ich_descriptors_tool
by repository service 13 Aug '12

13 Aug '12

Author: stefanct Date: Mon Aug 13 10:45:13 2012 New Revision: 1570 URL: http://flashrom.org/trac/flashrom/changeset/1570 Log: Clean up ICH descriptor code. - allows for compilation with -Werror=shadow, - use extended line limit to fix the most awful line breaks. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/ich_descriptors.c trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Modified: trunk/ich_descriptors.c ============================================================================== --- trunk/ich_descriptors.c Sat Aug 11 18:07:08 2012 (r1569) +++ trunk/ich_descriptors.c Mon Aug 13 10:45:13 2012 (r1570) @@ -85,26 +85,16 @@ msg_pdbg2("\n"); msg_pdbg2("--- Details ---\n"); - msg_pdbg2("NR (Number of Regions): %5d\n", - cont->NR + 1); - msg_pdbg2("FRBA (Flash Region Base Address): 0x%03x\n", - getFRBA(cont)); - msg_pdbg2("NC (Number of Components): %5d\n", - cont->NC + 1); - msg_pdbg2("FCBA (Flash Component Base Address): 0x%03x\n", - getFCBA(cont)); - msg_pdbg2("ISL (ICH/PCH Strap Length): %5d\n", - cont->ISL); - msg_pdbg2("FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x%03x\n", - getFISBA(cont)); - msg_pdbg2("NM (Number of Masters): %5d\n", - cont->NM + 1); - msg_pdbg2("FMBA (Flash Master Base Address): 0x%03x\n", - getFMBA(cont)); - msg_pdbg2("MSL/PSL (MCH/PROC Strap Length): %5d\n", - cont->MSL); - msg_pdbg2("FMSBA (Flash MCH/PROC Strap Base Address): 0x%03x\n", - getFMSBA(cont)); + msg_pdbg2("NR (Number of Regions): %5d\n", cont->NR + 1); + msg_pdbg2("FRBA (Flash Region Base Address): 0x%03x\n", getFRBA(cont)); + msg_pdbg2("NC (Number of Components): %5d\n", cont->NC + 1); + msg_pdbg2("FCBA (Flash Component Base Address): 0x%03x\n", getFCBA(cont)); + msg_pdbg2("ISL (ICH/PCH Strap Length): %5d\n", cont->ISL); + msg_pdbg2("FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x%03x\n", getFISBA(cont)); + msg_pdbg2("NM (Number of Masters): %5d\n", cont->NM + 1); + msg_pdbg2("FMBA (Flash Master Base Address): 0x%03x\n", getFMBA(cont)); + msg_pdbg2("MSL/PSL (MCH/PROC Strap Length): %5d\n", cont->MSL); + msg_pdbg2("FMSBA (Flash MCH/PROC Strap Base Address): 0x%03x\n", getFMSBA(cont)); msg_pdbg2("\n"); } @@ -520,8 +510,8 @@ msg_pdbg2("Integrated Clocking Configuration used: %d\n", s->cougar.ICC_SEL); - msg_pdbg2("PCH Signal CL_RST1# does %sassert when Intel ME performs a " - "reset.\n", s->ibex.MER_CL1 ? "" : "not "); + msg_pdbg2("PCH Signal CL_RST1# does %sassert when Intel ME performs a reset.\n", + s->ibex.MER_CL1 ? "" : "not "); msg_pdbg2("ICC Profile is selected by %s.\n", s->cougar.ICC_PRO_SEL ? "Softstraps" : "BIOS"); msg_pdbg2("Deep SX is %ssupported on the platform.\n", @@ -538,8 +528,7 @@ s->cougar.IWL_EN ? "en" : "dis"); msg_pdbg2("Chipset configuration Softstrap 5: %d\n", s->cougar.cs_ss5); msg_pdbg2("SMLink1 provides temperature from %s.\n", - s->cougar.SMLINK1_THERM_SEL ? - "PCH only" : "the CPU, PCH and DIMMs"); + s->cougar.SMLINK1_THERM_SEL ? "PCH only" : "the CPU, PCH and DIMMs"); msg_pdbg2("GPIO29 is used as %s.\n", s->cougar.SLP_LAN_GP29_SEL ? "general purpose output" : "SLP_LAN#"); @@ -552,32 +541,32 @@ void prettyprint_ich_descriptor_straps(enum ich_chipset cs, const struct ich_descriptors *desc) { - unsigned int i, max; + unsigned int i, max_count; msg_pdbg2("=== Softstraps ===\n"); if (sizeof(desc->north.STRPs) / 4 + 1 < desc->content.MSL) { - max = sizeof(desc->north.STRPs) / 4 + 1; - msg_pdbg2("MSL (%u) is greater than the current maximum of %u " - "entries.\n", desc->content.MSL, max + 1); - msg_pdbg2("Only the first %u entries will be printed.\n", max); + max_count = sizeof(desc->north.STRPs) / 4 + 1; + msg_pdbg2("MSL (%u) is greater than the current maximum of %u entries.\n", + desc->content.MSL, max_count + 1); + msg_pdbg2("Only the first %u entries will be printed.\n", max_count); } else - max = desc->content.MSL; + max_count = desc->content.MSL; - msg_pdbg2("--- North/MCH/PROC (%d entries) ---\n", max); - for (i = 0; i < max; i++) + msg_pdbg2("--- North/MCH/PROC (%d entries) ---\n", max_count); + for (i = 0; i < max_count; i++) msg_pdbg2("STRP%-2d = 0x%08x\n", i, desc->north.STRPs[i]); msg_pdbg2("\n"); if (sizeof(desc->south.STRPs) / 4 < desc->content.ISL) { - max = sizeof(desc->south.STRPs) / 4; - msg_pdbg2("ISL (%u) is greater than the current maximum of %u " - "entries.\n", desc->content.ISL, max); - msg_pdbg2("Only the first %u entries will be printed.\n", max); + max_count = sizeof(desc->south.STRPs) / 4; + msg_pdbg2("ISL (%u) is greater than the current maximum of %u entries.\n", + desc->content.ISL, max_count); + msg_pdbg2("Only the first %u entries will be printed.\n", max_count); } else - max = desc->content.ISL; + max_count = desc->content.ISL; - msg_pdbg2("--- South/ICH/PCH (%d entries) ---\n", max); - for (i = 0; i < max; i++) + msg_pdbg2("--- South/ICH/PCH (%d entries) ---\n", max_count); + for (i = 0; i < max_count; i++) msg_pdbg2("STRP%-2d = 0x%08x\n", i, desc->south.STRPs[i]); msg_pdbg2("\n"); @@ -608,8 +597,7 @@ case CHIPSET_ICH_UNKNOWN: break; default: - msg_pdbg2("The meaning of the descriptor straps are unknown " - "yet.\n\n"); + msg_pdbg2("The meaning of the descriptor straps are unknown yet.\n\n"); break; } } @@ -634,8 +622,7 @@ msg_pdbg2("\n"); msg_pdbg2("VSCC Table: %d entries\n", umap->VTL/2); - for (i = 0; i < umap->VTL/2; i++) - { + for (i = 0; i < umap->VTL/2; i++) { uint32_t jid = umap->vscc_table[i].JID; uint32_t vscc = umap->vscc_table[i].VSCC; msg_pdbg2(" JID%d = 0x%08x\n", i, jid); @@ -651,7 +638,7 @@ /* len is the length of dump in bytes */ int read_ich_descriptors_from_dump(const uint32_t *dump, unsigned int len, struct ich_descriptors *desc) { - unsigned int i, max; + unsigned int i, max_count; uint8_t pch_bug_offset = 0; if (dump == NULL || desc == NULL) @@ -708,10 +695,8 @@ return ICH_RET_OOB; for (i = 0; i < desc->upper.VTL/2; i++) { - desc->upper.vscc_table[i].JID = - dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 0]; - desc->upper.vscc_table[i].VSCC = - dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 1]; + desc->upper.vscc_table[i].JID = dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 0]; + desc->upper.vscc_table[i].VSCC = dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 1]; } /* MCH/PROC (aka. North) straps */ @@ -719,20 +704,18 @@ return ICH_RET_OOB; /* limit the range to be written */ - max = min(sizeof(desc->north.STRPs) / 4, desc->content.MSL); - for (i = 0; i < max; i++) - desc->north.STRPs[i] = - dump[(getFMSBA(&desc->content) >> 2) + i]; + max_count = min(sizeof(desc->north.STRPs) / 4, desc->content.MSL); + for (i = 0; i < max_count; i++) + desc->north.STRPs[i] = dump[(getFMSBA(&desc->content) >> 2) + i]; /* ICH/PCH (aka. South) straps */ if (len < getFISBA(&desc->content) + desc->content.ISL * 4) return ICH_RET_OOB; /* limit the range to be written */ - max = min(sizeof(desc->south.STRPs) / 4, desc->content.ISL); - for (i = 0; i < max; i++) - desc->south.STRPs[i] = - dump[(getFISBA(&desc->content) >> 2) + i]; + max_count = min(sizeof(desc->south.STRPs) / 4, desc->content.ISL); + for (i = 0; i < max_count; i++) + desc->south.STRPs[i] = dump[(getFISBA(&desc->content) >> 2) + i]; return ICH_RET_OK; } @@ -755,13 +738,12 @@ size_enc = desc->component.comp2_density; break; default: - msg_perr("Only ICH SPI component index 0 or 1 are supported " - "yet.\n"); + msg_perr("Only ICH SPI component index 0 or 1 are supported yet.\n"); return 0; } if (size_enc > 5) { - msg_perr("Density of ICH SPI component with index %d is " - "invalid. Encoded density is 0x%x.\n", idx, size_enc); + msg_perr("Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x.\n", + idx, size_enc); return 0; } return (1 << (19 + size_enc)); @@ -804,8 +786,7 @@ return ICH_RET_ERR; } - msg_pdbg2("Reading flash descriptors " - "mapped by the chipset via FDOC/FDOD..."); + msg_pdbg2("Reading flash descriptors mapped by the chipset via FDOC/FDOD..."); /* content section */ desc->content.FLVALSIG = read_descriptor_reg(0, 0, spibar); desc->content.FLMAP0 = read_descriptor_reg(0, 1, spibar); Modified: trunk/util/ich_descriptors_tool/ich_descriptors_tool.c ============================================================================== --- trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Sat Aug 11 18:07:08 2012 (r1569) +++ trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Mon Aug 13 10:45:13 2012 (r1570) @@ -40,7 +40,7 @@ #include <sys/mman.h> #endif -static void dump_file(const char *basename, const uint32_t *dump, unsigned int len, struct ich_desc_region *reg, unsigned int i) +static void dump_file(const char *prefix, const uint32_t *dump, unsigned int len, struct ich_desc_region *reg, unsigned int i) { int ret; char *fn; @@ -54,8 +54,7 @@ reg_name = region_names[i]; if (base > limit) { - printf("The %s region is unused and thus not dumped.\n", - reg_name); + printf("The %s region is unused and thus not dumped.\n", reg_name); return; } @@ -68,13 +67,13 @@ return; } - fn = malloc(strlen(basename) + strlen(reg_name) + strlen(".bin") + 2); + fn = malloc(strlen(prefix) + strlen(reg_name) + strlen(".bin") + 2); if (!fn) { fprintf(stderr, "Out of memory!\n"); exit(1); } - snprintf(fn, strlen(basename) + strlen(reg_name) + strlen(".bin") + 2, - "%s.%s.bin", basename, reg_name); + snprintf(fn, strlen(prefix) + strlen(reg_name) + strlen(".bin") + 2, + "%s.%s.bin", prefix, reg_name); printf("Dumping %u bytes of the %s region from 0x%08x-0x%08x to %s... ", file_len, region_names[i], base, limit, fn); int fh = open(fn, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); @@ -95,12 +94,12 @@ close(fh); } -void dump_files(const char *n, const uint32_t *buf, unsigned int len, struct ich_desc_region *reg) +void dump_files(const char *name, const uint32_t *buf, unsigned int len, struct ich_desc_region *reg) { unsigned int i; printf("=== Dumping region files ===\n"); for (i = 0; i < 5; i++) - dump_file(n, buf, len, reg, i); + dump_file(name, buf, len, reg, i); printf("\n"); } @@ -157,8 +156,7 @@ } } if (fn == NULL) - usage(argv, - "Need a file name of a descriptor image to read from."); + usage(argv, "Need the file name of a descriptor image to read from."); fd = open(fn, O_RDONLY); if (fd < 0) @@ -209,8 +207,7 @@ printf("Image not in descriptor mode.\n"); exit(1); case ICH_RET_OOB: - printf("Tried to access a location out of bounds of the image. " - "- Corrupt image?\n"); + printf("Tried to access a location out of bounds of the image. - Corrupt image?\n"); exit(1); default: printf("Unhandled return value at %s:%u, please report this.\n",

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Re: [flashrom] [PATCH] Move show_id to where it belongs.
by Carl-Daniel Hailfinger 13 Aug '12

13 Aug '12

Am 11.08.2012 04:56 schrieb Stefan Tauner: > And remove the unused force parameter. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > i forgot to move the declaration in the header, and i noticed that the > force parameter is useless because we use the global variable instead. > this should actually change eventually, but for now just kill the > parameter because it is doubtful that it will be part of the solution. Can you please rename show_id to check_image_matches_hardware or something like that (e.g. check_image_matches_cbtable_id)? show_id is a totally misleading name. AFAICS the rest is a pure code move, and makes a lot of sense. Oh, and please downgrade the following message to pdbg: msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); Maybe downgrade the following message as well: msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1569 - trunk
by repository service 11 Aug '12

11 Aug '12

Author: stefanct Date: Sat Aug 11 18:07:08 2012 New Revision: 1569 URL: http://flashrom.org/trac/flashrom/changeset/1569 Log: Move show_id to where it belongs. And remove the unused force parameter. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/cbtable.c trunk/flashrom.c trunk/layout.c trunk/programmer.h Modified: trunk/cbtable.c ============================================================================== --- trunk/cbtable.c Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/cbtable.c Sat Aug 11 18:07:08 2012 (r1569) @@ -25,6 +25,7 @@ #include <unistd.h> #include <stdio.h> #include <stdlib.h> +#include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" @@ -32,6 +33,9 @@ char *lb_part = NULL, *lb_vendor = NULL; int partvendor_from_cbtable = 0; +static char *def_name = "DEFAULT"; +static char *mainboard_vendor = NULL; +static char *mainboard_part = NULL; /* Parse the [<vendor>:]<board> string specified by the user as part of * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part @@ -56,6 +60,82 @@ free(tempstr); } +int show_id(uint8_t *bios, int size) +{ + unsigned int *walk; + unsigned int mb_part_offset, mb_vendor_offset; + char *mb_part, *mb_vendor; + + mainboard_vendor = def_name; + mainboard_part = def_name; + + walk = (unsigned int *)(bios + size - 0x10); + walk--; + + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { + /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ + walk = (unsigned int *)(bios + size - 0x80); + walk--; + } + + /* + * Check if coreboot last image size is 0 or not a multiple of 1k or + * bigger than the chip or if the pointers to vendor ID or mainboard ID + * are outside the image of if the start of ID strings are nonsensical + * (nonprintable and not \0). + */ + mb_part_offset = *(walk - 1); + mb_vendor_offset = *(walk - 2); + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || + mb_part_offset > size || mb_vendor_offset > size) { + msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + return 0; + } + + mb_part = (char *)(bios + size - mb_part_offset); + mb_vendor = (char *)(bios + size - mb_vendor_offset); + if (!isprint((unsigned char)*mb_part) || + !isprint((unsigned char)*mb_vendor)) { + msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + return 0; + } + + msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); + + mainboard_part = strdup(mb_part); + mainboard_vendor = strdup(mb_vendor); + msg_pdbg("Manufacturer: %s\n", mainboard_vendor); + msg_pdbg("Mainboard ID: %s\n", mainboard_part); + + /* If these are not set, the coreboot table was not found. */ + if (!lb_vendor || !lb_part) { + msg_pinfo("Note: If the following flash access fails, try " + "-p internal:mainboard=<vendor>:<mainboard>.\n"); + return 0; + } + + /* These comparisons are case insensitive to make things a little less user^Werror prone. */ + if (!strcasecmp(mainboard_vendor, lb_vendor) && + !strcasecmp(mainboard_part, lb_part)) { + msg_pdbg("This firmware image matches this mainboard.\n"); + } else { + if (force_boardmismatch) { + msg_pinfo("WARNING: This firmware image does not " + "seem to fit to this machine - forcing it.\n"); + } else { + msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s)\n\n" + "Override with -p internal:boardmismatch=force to ignore the board name\n" + "in the firmware image or override the detected mainboard with\n" + "-p internal:mainboard=<vendor>:<mainboard>.\n\n", + mainboard_vendor, mainboard_part, lb_vendor, lb_part); + return 1; + } + } + + return 0; +} + static unsigned long compute_checksum(void *addr, unsigned long length) { uint8_t *ptr; Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/flashrom.c Sat Aug 11 18:07:08 2012 (r1569) @@ -1815,7 +1815,7 @@ #if CONFIG_INTERNAL == 1 if (programmer == PROGRAMMER_INTERNAL) - if (show_id(newcontents, size, force)) { + if (show_id(newcontents, size)) { ret = 1; goto out; } Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/layout.c Sat Aug 11 18:07:08 2012 (r1569) @@ -21,15 +21,10 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <ctype.h> #include <limits.h> #include "flash.h" #include "programmer.h" -#if CONFIG_INTERNAL == 1 -char *mainboard_vendor = NULL; -char *mainboard_part = NULL; -#endif static int romimages = 0; #define MAX_ROMLAYOUT 32 @@ -49,102 +44,6 @@ static int num_include_args = 0; /* the number of valid entries. */ static romlayout_t rom_entries[MAX_ROMLAYOUT]; -#if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ -static char *def_name = "DEFAULT"; - -int show_id(uint8_t *bios, int size, int force) -{ - unsigned int *walk; - unsigned int mb_part_offset, mb_vendor_offset; - char *mb_part, *mb_vendor; - - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); - walk--; - - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID - * information at a different location. - */ - walk = (unsigned int *)(bios + size - 0x80); - walk--; - } - - /* - * Check if coreboot last image size is 0 or not a multiple of 1k or - * bigger than the chip or if the pointers to vendor ID or mainboard ID - * are outside the image of if the start of ID strings are nonsensical - * (nonprintable and not \0). - */ - mb_part_offset = *(walk - 1); - mb_vendor_offset = *(walk - 2); - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || - mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. " - "Disabling coreboot-related checks.\n"); - return 0; - } - - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); - if (!isprint((unsigned char)*mb_part) || - !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location." - " Disabling checks.\n"); - return 0; - } - - msg_pdbg("coreboot last image size " - "(not ROM size) is %d bytes.\n", *walk); - - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); - - /* - * If lb_vendor is not set, the coreboot table was - * not found. Nor was -p internal:mainboard=VENDOR:PART specified. - */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); - return 0; - } - - /* These comparisons are case insensitive to make things - * a little less user^Werror prone. - */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); - } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not " - "appear to\n" - " be correct for the detected " - "mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=" - "force to ignore the board name in the\n" - "firmware image or override the detected " - "mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>." - "\n\n", - mainboard_vendor, mainboard_part, lb_vendor, - lb_part); - return 1; - } - } - - return 0; -} -#endif - #ifndef __LIBPAYLOAD__ int read_romlayout(char *name) { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sat Aug 11 04:33:20 2012 (r1568) +++ trunk/programmer.h Sat Aug 11 18:07:08 2012 (r1569) @@ -274,6 +274,7 @@ /* cbtable.c */ void lb_vendor_dev_from_string(const char *boardstring); +int show_id(uint8_t *bios, int size); int coreboot_init(void); extern char *lb_part, *lb_vendor; extern int partvendor_from_cbtable; @@ -478,9 +479,6 @@ int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(const char *param_name); -/* layout.c */ -int show_id(uint8_t *bios, int size, int force); - /* spi.c */ enum spi_controller { SPI_CONTROLLER_NONE,

1 0

[PATCH] Move show_id to where it belongs.
by Stefan Tauner 11 Aug '12

11 Aug '12

And remove the unused force parameter. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- i forgot to move the declaration in the header, and i noticed that the force parameter is useless because we use the global variable instead. this should actually change eventually, but for now just kill the parameter because it is doubtful that it will be part of the solution. cbtable.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++ flashrom.c | 2 +- layout.c | 101 ---------------------------------------------------------- programmer.h | 4 +-- 4 files changed, 82 insertions(+), 105 deletions(-) diff --git a/cbtable.c b/cbtable.c index b4fb809..dde12ac 100644 --- a/cbtable.c +++ b/cbtable.c @@ -25,6 +25,7 @@ #include <unistd.h> #include <stdio.h> #include <stdlib.h> +#include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" @@ -32,6 +33,9 @@ char *lb_part = NULL, *lb_vendor = NULL; int partvendor_from_cbtable = 0; +static char *def_name = "DEFAULT"; +static char *mainboard_vendor = NULL; +static char *mainboard_part = NULL; /* Parse the [<vendor>:]<board> string specified by the user as part of * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part @@ -56,6 +60,82 @@ void lb_vendor_dev_from_string(const char *boardstring) free(tempstr); } +int show_id(uint8_t *bios, int size) +{ + unsigned int *walk; + unsigned int mb_part_offset, mb_vendor_offset; + char *mb_part, *mb_vendor; + + mainboard_vendor = def_name; + mainboard_part = def_name; + + walk = (unsigned int *)(bios + size - 0x10); + walk--; + + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { + /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ + walk = (unsigned int *)(bios + size - 0x80); + walk--; + } + + /* + * Check if coreboot last image size is 0 or not a multiple of 1k or + * bigger than the chip or if the pointers to vendor ID or mainboard ID + * are outside the image of if the start of ID strings are nonsensical + * (nonprintable and not \0). + */ + mb_part_offset = *(walk - 1); + mb_vendor_offset = *(walk - 2); + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || + mb_part_offset > size || mb_vendor_offset > size) { + msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + return 0; + } + + mb_part = (char *)(bios + size - mb_part_offset); + mb_vendor = (char *)(bios + size - mb_vendor_offset); + if (!isprint((unsigned char)*mb_part) || + !isprint((unsigned char)*mb_vendor)) { + msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + return 0; + } + + msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); + + mainboard_part = strdup(mb_part); + mainboard_vendor = strdup(mb_vendor); + msg_pdbg("Manufacturer: %s\n", mainboard_vendor); + msg_pdbg("Mainboard ID: %s\n", mainboard_part); + + /* If these are not set, the coreboot table was not found. */ + if (!lb_vendor || !lb_part) { + msg_pinfo("Note: If the following flash access fails, try " + "-p internal:mainboard=<vendor>:<mainboard>.\n"); + return 0; + } + + /* These comparisons are case insensitive to make things a little less user^Werror prone. */ + if (!strcasecmp(mainboard_vendor, lb_vendor) && + !strcasecmp(mainboard_part, lb_part)) { + msg_pdbg("This firmware image matches this mainboard.\n"); + } else { + if (force_boardmismatch) { + msg_pinfo("WARNING: This firmware image does not " + "seem to fit to this machine - forcing it.\n"); + } else { + msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s)\n\n" + "Override with -p internal:boardmismatch=force to ignore the board name\n" + "in the firmware image or override the detected mainboard with\n" + "-p internal:mainboard=<vendor>:<mainboard>.\n\n", + mainboard_vendor, mainboard_part, lb_vendor, lb_part); + return 1; + } + } + + return 0; +} + static unsigned long compute_checksum(void *addr, unsigned long length) { uint8_t *ptr; diff --git a/flashrom.c b/flashrom.c index a925379..9544155 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1815,7 +1815,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, #if CONFIG_INTERNAL == 1 if (programmer == PROGRAMMER_INTERNAL) - if (show_id(newcontents, size, force)) { + if (show_id(newcontents, size)) { ret = 1; goto out; } diff --git a/layout.c b/layout.c index 0512638..8663402 100644 --- a/layout.c +++ b/layout.c @@ -21,15 +21,10 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <ctype.h> #include <limits.h> #include "flash.h" #include "programmer.h" -#if CONFIG_INTERNAL == 1 -char *mainboard_vendor = NULL; -char *mainboard_part = NULL; -#endif static int romimages = 0; #define MAX_ROMLAYOUT 32 @@ -49,102 +44,6 @@ static char *include_args[MAX_ROMLAYOUT]; static int num_include_args = 0; /* the number of valid entries. */ static romlayout_t rom_entries[MAX_ROMLAYOUT]; -#if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ -static char *def_name = "DEFAULT"; - -int show_id(uint8_t *bios, int size, int force) -{ - unsigned int *walk; - unsigned int mb_part_offset, mb_vendor_offset; - char *mb_part, *mb_vendor; - - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); - walk--; - - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID - * information at a different location. - */ - walk = (unsigned int *)(bios + size - 0x80); - walk--; - } - - /* - * Check if coreboot last image size is 0 or not a multiple of 1k or - * bigger than the chip or if the pointers to vendor ID or mainboard ID - * are outside the image of if the start of ID strings are nonsensical - * (nonprintable and not \0). - */ - mb_part_offset = *(walk - 1); - mb_vendor_offset = *(walk - 2); - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || - mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. " - "Disabling coreboot-related checks.\n"); - return 0; - } - - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); - if (!isprint((unsigned char)*mb_part) || - !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location." - " Disabling checks.\n"); - return 0; - } - - msg_pdbg("coreboot last image size " - "(not ROM size) is %d bytes.\n", *walk); - - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); - - /* - * If lb_vendor is not set, the coreboot table was - * not found. Nor was -p internal:mainboard=VENDOR:PART specified. - */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); - return 0; - } - - /* These comparisons are case insensitive to make things - * a little less user^Werror prone. - */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); - } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not " - "appear to\n" - " be correct for the detected " - "mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=" - "force to ignore the board name in the\n" - "firmware image or override the detected " - "mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>." - "\n\n", - mainboard_vendor, mainboard_part, lb_vendor, - lb_part); - return 1; - } - } - - return 0; -} -#endif - #ifndef __LIBPAYLOAD__ int read_romlayout(char *name) { diff --git a/programmer.h b/programmer.h index 723374d..7d06be3 100644 --- a/programmer.h +++ b/programmer.h @@ -274,6 +274,7 @@ void cleanup_cpu_msr(void); /* cbtable.c */ void lb_vendor_dev_from_string(const char *boardstring); +int show_id(uint8_t *bios, int size); int coreboot_init(void); extern char *lb_part, *lb_vendor; extern int partvendor_from_cbtable; @@ -478,9 +479,6 @@ void check_chip_supported(const struct flashctx *flash); int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(const char *param_name); -/* layout.c */ -int show_id(uint8_t *bios, int size, int force); - /* spi.c */ enum spi_controller { SPI_CONTROLLER_NONE, -- Kind regards, Stefan Tauner

1 0

[commit] r1568 - trunk
by repository service 11 Aug '12

11 Aug '12

Author: stefanct Date: Sat Aug 11 04:33:20 2012 New Revision: 1568 URL: http://flashrom.org/trac/flashrom/changeset/1568 Log: Fix broken board enables. abit KN8 Ultra, agami/island aruma and IWILL DK8-HTX had no secondary PCI IDs which complicates things. Some google foo discovered some appropriate IDs, but they are all untested. Let's pretend this breaks nothing. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Aug 10 01:34:41 2012 (r1567) +++ trunk/board_enable.c Sat Aug 11 04:33:20 2012 (r1568) @@ -2309,13 +2309,13 @@ {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, P3, "abit", "IC7", 0, NT, intel_ich_gpio23_raise}, {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, P3, "abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, P3, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, - {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, P3, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, + {0x10de, 0x0050, 0x147b, 0x1c1a, 0x10de, 0x0052, 0x147b, 0x1c1a, NULL, NULL, NULL, P3, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, P3, "abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0260, 0x147b, 0x1c26, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, "(VA6)$", NULL, NULL, P3, "abit", "VA6", 0, OK, via_apollo_gpo4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", P3, "abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, P3, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", P3, "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, + {0x1022, 0x746B, 0, 0, 0x1022, 0x7460, 0, 0, NULL, "AGAMI", "ARUMA", P3, "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, P3, "Albatron", "PM266A Pro", 0, OK, w836xx_memw_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", P3, "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", P3, "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, @@ -2404,7 +2404,7 @@ {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, P3, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, P3, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, P3, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", P3, "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, + {0x1022, 0x7468, 0, 0, 0x1022, 0x7460, 0, 0, NULL, "iwill", "dk8_htx", P3, "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", P3, "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, P3, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x8086, 0x8186, 0x8086, 0x8186, 0x8086, 0x8800, 0x0000, 0x0000, "^MSC Vertriebs GmbH$", NULL, NULL, P2, "MSC", "Q7-TCTC", 0, OK, p2_not_a_laptop},

1 0

[PATCH] Move showid to where it belongs.
by Stefan Tauner 11 Aug '12

11 Aug '12

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- cbtable.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++ layout.c | 101 ------------------------------------------------------------- 2 files changed, 80 insertions(+), 101 deletions(-) diff --git a/cbtable.c b/cbtable.c index 4495d9d..5fdb841 100644 --- a/cbtable.c +++ b/cbtable.c @@ -25,6 +25,7 @@ #include <unistd.h> #include <stdio.h> #include <stdlib.h> +#include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" @@ -32,6 +33,9 @@ char *lb_part = NULL, *lb_vendor = NULL; int partvendor_from_cbtable = 0; +static char *def_name = "DEFAULT"; +static char *mainboard_vendor = NULL; +static char *mainboard_part = NULL; /* Parse the [<vendor>:]<board> string specified by the user as part of * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part @@ -56,6 +60,82 @@ void lb_vendor_dev_from_string(const char *boardstring) free(tempstr); } +int show_id(uint8_t *bios, int size, int force) +{ + unsigned int *walk; + unsigned int mb_part_offset, mb_vendor_offset; + char *mb_part, *mb_vendor; + + mainboard_vendor = def_name; + mainboard_part = def_name; + + walk = (unsigned int *)(bios + size - 0x10); + walk--; + + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { + /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ + walk = (unsigned int *)(bios + size - 0x80); + walk--; + } + + /* + * Check if coreboot last image size is 0 or not a multiple of 1k or + * bigger than the chip or if the pointers to vendor ID or mainboard ID + * are outside the image of if the start of ID strings are nonsensical + * (nonprintable and not \0). + */ + mb_part_offset = *(walk - 1); + mb_vendor_offset = *(walk - 2); + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || + mb_part_offset > size || mb_vendor_offset > size) { + msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + return 0; + } + + mb_part = (char *)(bios + size - mb_part_offset); + mb_vendor = (char *)(bios + size - mb_vendor_offset); + if (!isprint((unsigned char)*mb_part) || + !isprint((unsigned char)*mb_vendor)) { + msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + return 0; + } + + msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); + + mainboard_part = strdup(mb_part); + mainboard_vendor = strdup(mb_vendor); + msg_pdbg("Manufacturer: %s\n", mainboard_vendor); + msg_pdbg("Mainboard ID: %s\n", mainboard_part); + + /* If these are not set, the coreboot table was not found. */ + if (!lb_vendor || !lb_part) { + msg_pinfo("Note: If the following flash access fails, try " + "-p internal:mainboard=<vendor>:<mainboard>.\n"); + return 0; + } + + /* These comparisons are case insensitive to make things a little less user^Werror prone. */ + if (!strcasecmp(mainboard_vendor, lb_vendor) && + !strcasecmp(mainboard_part, lb_part)) { + msg_pdbg("This firmware image matches this mainboard.\n"); + } else { + if (force_boardmismatch) { + msg_pinfo("WARNING: This firmware image does not " + "seem to fit to this machine - forcing it.\n"); + } else { + msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s)\n\n" + "Override with -p internal:boardmismatch=force to ignore the board name\n" + "in the firmware image or override the detected mainboard with\n" + "-p internal:mainboard=<vendor>:<mainboard>.\n\n", + mainboard_vendor, mainboard_part, lb_vendor, lb_part); + return 1; + } + } + + return 0; +} + static unsigned long compute_checksum(void *addr, unsigned long length) { uint8_t *ptr; diff --git a/layout.c b/layout.c index 0512638..8663402 100644 --- a/layout.c +++ b/layout.c @@ -21,15 +21,10 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <ctype.h> #include <limits.h> #include "flash.h" #include "programmer.h" -#if CONFIG_INTERNAL == 1 -char *mainboard_vendor = NULL; -char *mainboard_part = NULL; -#endif static int romimages = 0; #define MAX_ROMLAYOUT 32 @@ -49,102 +44,6 @@ static char *include_args[MAX_ROMLAYOUT]; static int num_include_args = 0; /* the number of valid entries. */ static romlayout_t rom_entries[MAX_ROMLAYOUT]; -#if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ -static char *def_name = "DEFAULT"; - -int show_id(uint8_t *bios, int size, int force) -{ - unsigned int *walk; - unsigned int mb_part_offset, mb_vendor_offset; - char *mb_part, *mb_vendor; - - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); - walk--; - - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID - * information at a different location. - */ - walk = (unsigned int *)(bios + size - 0x80); - walk--; - } - - /* - * Check if coreboot last image size is 0 or not a multiple of 1k or - * bigger than the chip or if the pointers to vendor ID or mainboard ID - * are outside the image of if the start of ID strings are nonsensical - * (nonprintable and not \0). - */ - mb_part_offset = *(walk - 1); - mb_vendor_offset = *(walk - 2); - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || - mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. " - "Disabling coreboot-related checks.\n"); - return 0; - } - - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); - if (!isprint((unsigned char)*mb_part) || - !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location." - " Disabling checks.\n"); - return 0; - } - - msg_pdbg("coreboot last image size " - "(not ROM size) is %d bytes.\n", *walk); - - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); - - /* - * If lb_vendor is not set, the coreboot table was - * not found. Nor was -p internal:mainboard=VENDOR:PART specified. - */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); - return 0; - } - - /* These comparisons are case insensitive to make things - * a little less user^Werror prone. - */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); - } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not " - "appear to\n" - " be correct for the detected " - "mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=" - "force to ignore the board name in the\n" - "firmware image or override the detected " - "mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>." - "\n\n", - mainboard_vendor, mainboard_part, lb_vendor, - lb_part); - return 1; - } - } - - return 0; -} -#endif - #ifndef __LIBPAYLOAD__ int read_romlayout(char *name) { -- Kind regards, Stefan Tauner

1 0

Output Aspire R3610 (MCP79)
by Andrea De Pirro 10 Aug '12

10 Aug '12

flashrom v0.9.5.2-r1517 on Linux 3.2.0-29-generic (x86_64), built with libpci 3.1.8, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 397M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 994 us, 10000 myus = 9974 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Acer" DMI string system-product-name: "Aspire R3610" DMI string system-version: " " DMI string baseboard-manufacturer: "Acer" DMI string baseboard-product-name: "FMCP7A-ION" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8720 on port 0x2e Found chipset "NVIDIA MCP79" with PCI ID 10de:0aad. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:0aa2 at 00:03:2 MCP SPI BAR is at 0xfae80000 Mapping NVIDIA MCP6x SPI at 0xfae80000, unaligned size 0x544. SPI control is 0xc052, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. No IT87* serial flash segment enabled. The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x13 Found Macronix flash chip "MX25L8005" (1024 kB, SPI). -- Andrea De Pirro http://vizualize.me/andreadepirro +34 672438825 Skype: andrea.pirro.newshore LinkedIn: http://www.linkedin.com/in/andreadepirro If you are not the intended recipient, please notify the sender immediately. Please consider the environment before printing this e-mail.

1 0

Re: [flashrom] [PATCH 2/2] Add board enable for Biostar M7VIQ.
by Luc Verhaegen 10 Aug '12

10 Aug '12

On Sat, Apr 28, 2012 at 01:30:53AM +0200, Stefan Tauner wrote: > The PCI IDs are generic VIA IDs. Only Biostar IDs are those of the LOM, but > that would not be a good choice for ID. Accept the generic IDs (+ DMI string) > for now because this will be generic soonish(tm) anyway. > + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", NULL, NULL, P3, "Biostar", "M7VIQ", 0, OK, w83697xx_memw_enable_2e}, "KM266-8235" is "VIA Northbridge marketing name"-"VIA Southbridge marketing name with VT removed". This DMI string is not unique at all. Luc Verhaegen.

2 5

[PATCH] Makefile OS-dependent fixes
by Carl-Daniel Hailfinger 10 Aug '12

10 Aug '12

Move Mac OS X IOKit/DirectHW availability checks from compiler check to pciutils check. Add DOS libpci includes only if a PCI-based programmer was requested. Cosmetic fixes (additional newlines) for consistency. This should fix "Checking for a C compiler...not found" if DirectHW was not installed on Mac OS X. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-makefile_pci_osx_dos_fixes/Makefile =================================================================== --- flashrom-makefile_pci_osx_dos_fixes/Makefile (Revision 1547) +++ flashrom-makefile_pci_osx_dos_fixes/Makefile (Arbeitskopie) @@ -55,20 +55,22 @@ ifeq ($(TARGET_OS), Darwin) CPPFLAGS += -I/opt/local/include -I/usr/local/include -# DirectHW framework can be found in the DirectHW library. -LDFLAGS += -framework IOKit -framework DirectHW -L/opt/local/lib -L/usr/local/lib +LDFLAGS += -L/opt/local/lib -L/usr/local/lib endif + ifeq ($(TARGET_OS), FreeBSD) CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif + ifeq ($(TARGET_OS), OpenBSD) CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif + ifeq ($(TARGET_OS), DOS) EXEC_SUFFIX := .exe -CPPFLAGS += -I../libgetopt -I../libpci/include +CPPFLAGS += -I../libgetopt # DJGPP has odd uint*_t definitions which cause lots of format string warnings. CPPFLAGS += -Wno-format # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt @@ -531,10 +533,19 @@ ifeq ($(TARGET_OS), OpenBSD) # For (i386|amd64)_iopl(2). LIBS += -l$(shell uname -m) +else +ifeq ($(TARGET_OS), Darwin) +# DirectHW framework can be found in the DirectHW library. +LIBS += -framework IOKit -framework DirectHW +else +ifeq ($(TARGET_OS), DOS) +CPPFLAGS += -I../libpci/include endif endif endif endif +endif +endif ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'CONFIG_PRINT_WIKI=1' -- http://www.hailfinger.org/

2 7

[commit] r1567 - in trunk: . util/ich_descriptors_tool
by repository service 10 Aug '12

10 Aug '12

Author: hailfinger Date: Fri Aug 10 01:34:41 2012 New Revision: 1567 URL: http://flashrom.org/trac/flashrom/changeset/1567 Log: Portability fixes and cleanups Move Mac OS X IOKit/DirectHW availability checks in the Makefile from compiler check to pciutils check. Print the compiler error messages for feature detection. Add DOS libpci in the Makefile includes only if a PCI-based programmer was requested. Restrict mmap usage in ich_descriptors_tool to Unix style systems. Build ich_descriptors_tool with the correct .exe extension on DOS/Windows. Build ich_descriptors_tool by default on x86. (Patch by Stefan Tauner) Print the Windows version instead of "unknown machine" on Windows. Don't #define our own __DARWIN__, use the standard OS X detection method. Update the README. Add more generated files to svn:ignore Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ (props changed) trunk/Makefile trunk/README trunk/cbtable.c trunk/flashrom.c trunk/hwaccess.h trunk/physmap.c trunk/programmer.h trunk/util/ich_descriptors_tool/ (props changed) trunk/util/ich_descriptors_tool/Makefile trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/Makefile Fri Aug 10 01:34:41 2012 (r1567) @@ -2,7 +2,7 @@ # This file is part of the flashrom project. # # Copyright (C) 2005 coresystems GmbH <stepan(a)coresystems.de> -# Copyright (C) 2009,2010 Carl-Daniel Hailfinger +# Copyright (C) 2009,2010,2012 Carl-Daniel Hailfinger # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -20,6 +20,12 @@ PROGRAM = flashrom +############################################################################### +# Defaults for the toolchain. + +# If you want to cross-compile, just run e.g. +# make CC=i586-pc-msdosdjgpp-gcc +# You may have to specify STRIP/AR/RANLIB as well. CC ?= gcc STRIP ?= strip INSTALL = install @@ -31,12 +37,17 @@ AR ?= ar RANLIB ?= ranlib +# If your compiler spits out excessive warnings, run make WARNERROR=no +# You shouldn't have to change this flag. WARNERROR ?= yes ifeq ($(WARNERROR), yes) CFLAGS += -Werror endif +############################################################################### +# General OS/architecture specific settings. + # HOST_OS is only used to work around local toolchain issues. HOST_OS ?= $(shell uname) ifeq ($(HOST_OS), MINGW32_NT-5.1) @@ -47,7 +58,7 @@ STRIP_ARGS = -s endif -# Determine the destination processor architecture. +# Determine the destination OS. # IMPORTANT: The following line must be placed before TARGET_OS is ever used # (of course), but should come after any lines setting CC because the line # below uses CC itself. @@ -55,25 +66,27 @@ ifeq ($(TARGET_OS), Darwin) CPPFLAGS += -I/opt/local/include -I/usr/local/include -# DirectHW framework can be found in the DirectHW library. -LDFLAGS += -framework IOKit -framework DirectHW -L/opt/local/lib -L/usr/local/lib +LDFLAGS += -L/opt/local/lib -L/usr/local/lib endif + ifeq ($(TARGET_OS), FreeBSD) CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif + ifeq ($(TARGET_OS), OpenBSD) CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif + ifeq ($(TARGET_OS), DOS) EXEC_SUFFIX := .exe -CPPFLAGS += -I../libgetopt -I../libpci/include +CPPFLAGS += -I../libgetopt # DJGPP has odd uint*_t definitions which cause lots of format string warnings. CPPFLAGS += -Wno-format # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt LIBS += ../libgetopt/libgetopt.a -# Bus Pirate, Serprog and Pony-SPI are not supported under DOS (missing serial support). +# Bus Pirate, Serprog and PonyProg are not supported under DOS (missing serial support). ifeq ($(CONFIG_BUSPIRATE_SPI), yes) UNSUPPORTED_FEATURES += CONFIG_BUSPIRATE_SPI=yes else @@ -263,18 +276,23 @@ endif endif +############################################################################### +# Flash chip drivers and bus support infrastructure. + CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o \ a25.o at25.o opaque.o sfdp.o en29lv640b.o -LIB_OBJS = layout.o +############################################################################### +# Library code. -CLI_OBJS = flashrom.o cli_classic.o cli_output.o print.o +LIB_OBJS = layout.o flashrom.o udelay.o programmer.o -PROGRAMMER_OBJS = udelay.o programmer.o +############################################################################### +# Frontend related stuff. -all: pciutils features $(PROGRAM)$(EXEC_SUFFIX) +CLI_OBJS = cli_classic.o cli_output.o print.o # Set the flashrom version string from the highest revision number # of the checked out flashrom files. @@ -375,6 +393,9 @@ endif endif +############################################################################### +# Programmer drivers and programmer support infrastructure. + ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o @@ -530,12 +551,19 @@ else ifeq ($(TARGET_OS), DOS) # FIXME There needs to be a better way to do this +CPPFLAGS += -I../libpci/include LIBS += ../libpci/lib/libpci.a else LIBS += -lpci ifeq ($(TARGET_OS), OpenBSD) # For (i386|amd64)_iopl(2). LIBS += -l$(shell uname -m) +else +ifeq ($(TARGET_OS), Darwin) +# DirectHW framework can be found in the DirectHW library. +LIBS += -framework IOKit -framework DirectHW +else +endif endif endif endif @@ -554,6 +582,11 @@ LIBFLASHROM_OBJS = $(CHIP_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) +all: pciutils features $(PROGRAM)$(EXEC_SUFFIX) +ifeq ($(ARCH), x86) + @+$(MAKE) -C util/ich_descriptors_tool/ TARGET_OS=$(TARGET_OS) EXEC_SUFFIX=$(EXEC_SUFFIX) +endif + $(PROGRAM)$(EXEC_SUFFIX): $(OBJS) $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJS) $(FEATURE_LIBS) $(LIBS) @@ -574,6 +607,7 @@ # We don't use EXEC_SUFFIX here because we want to clean everything. clean: rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d + @+$(MAKE) -C util/ich_descriptors_tool/ clean distclean: clean rm -f .features .libdeps @@ -597,7 +631,7 @@ compiler: featuresavailable @printf "Checking for a C compiler... " @echo "$$COMPILER_TEST" > .test.c - @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null 2>&1 && \ + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null && \ echo "found." || ( echo "not found."; \ rm -f .test.c .test$(EXEC_SUFFIX); exit 1) @rm -f .test.c .test$(EXEC_SUFFIX) @@ -631,17 +665,17 @@ pciutils: compiler @printf "Checking for libpci headers... " @echo "$$LIBPCI_TEST" > .test.c - @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ + @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci headers (package pciutils-devel)."; \ echo "See README for more information."; echo; \ rm -f .test.c .test.o; exit 1) @printf "Checking if libpci is present and sufficient... " @printf "" > .libdeps - @$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) >/dev/null && \ echo "yes." || ( echo "no."; \ printf "Checking if libz+libpci are present and sufficient..."; \ - $(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) -lz >/dev/null 2>&1 && \ + $(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) -lz >/dev/null && \ ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ echo "Please install libpci (package pciutils) and/or libz."; \ echo "See README for more information."; echo; \ @@ -657,10 +691,13 @@ # If a user does not explicitly request a non-working feature, we should # silently disable it. However, if a non-working (does not compile) feature # is explicitly requested, we should bail out with a descriptive error message. -ifeq ($(UNSUPPORTED_FEATURES), ) -featuresavailable: -else +# We also have to check that at least one programmer driver is enabled. featuresavailable: +ifeq ($(PROGRAMMER_OBJS),) + @echo "You have to enable at least one programmer driver!" + @false +endif +ifneq ($(UNSUPPORTED_FEATURES), ) @echo "The following features are unavailable on your machine: $(UNSUPPORTED_FEATURES)" @false endif Modified: trunk/README ============================================================================== --- trunk/README Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/README Fri Aug 10 01:34:41 2012 (r1567) @@ -93,14 +93,18 @@ To compile and run on Darwin/Mac OS X: Install DirectHW from coresystems GmbH. - DirectHW is available at http://www.coresystems.de/en/directhw . + DirectHW is available at http://www.coreboot.org/DirectHW . To cross-compile on Linux for DOS: - Get RPMs of the cross compiler from the DJGPP site and install them: + Get packages of the DJGPP cross compiler and install them: + djgpp-filesystem djgpp-gcc djgpp-cpp djgpp-runtime djgpp-binutils + As an alternative, the DJGPP web site offers packages for download as well: djcross-binutils-2.19.1-10ap.i386.rpm djcross-gcc-4.3.2-8ap.i686.rpm djcrx-2.04pre_20090725-13ap.i386.rpm + The cross toolchain packages for your distribution may have slightly different + names (look for packages named *djgpp*). Download pciutils 3.1.5 and apply http://assembler.cz/flashrom/pciutils.patch Download and compile http://assembler.cz/flashrom/libgetopt/ Compile pciutils, see README.DJGPP for instructions. @@ -108,7 +112,7 @@ ../libpci should contain pciutils source and binaries. ../libgetopt should contain getopt.a from libgetopt. Run either (change settings where appropriate) - make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip OS_ARCH=DOS + make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip or (above settings hardcoded) make djgpp-dos You might have to add WARNERROR=no to the make command line. @@ -116,17 +120,22 @@ http://homer.rice.edu/~sandmann/cwsdpmi/csdpmi7b.zip and make sure CWSDPMI.EXE is in the current directory. +To cross-compile on Linux for Windows: + + Get packages of the MinGW cross compiler and install them: + mingw32-filesystem mingw32-cross-cpp mingw32-cross-binutils mingw32-cross-gcc + mingw32-runtime mingw32-headers + The cross toolchain packages for your distribution may have slightly different + names (look for packages named *mingw*). + PCI-based programmers (internal etc.) are not supported on Windows. + Run (change CC= and STRIP= settings where appropriate) + make CC=i686-w64-mingw32-gcc STRIP=i686-w64-mingw32-strip + Processor architecture dependent features: - On non-x86 architectures you have to disable a few programmers because they - use port-based I/O which is not directly available on non-x86. Please add - CONFIG_RAYER_SPI=no CONFIG_NIC3COM=no CONFIG_ATAHPT=no CONFIG_NICREALTEK=no \ - CONFIG_NICNATSEMI=no - as parameters to the "make" invocation. - Besides that, the internal programmer is only supported on x86 and MIPS. On - other architectures, please add - CONFIG_INTERNAL=no - as parameter to the "make" invocation. + On non-x86 architectures a few programmers don't work (yet) because they + use port-based I/O which is not directly available on non-x86. Those + programmers will be disabled automatically if you run "make". Installation ------------ Modified: trunk/cbtable.c ============================================================================== --- trunk/cbtable.c Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/cbtable.c Fri Aug 10 01:34:41 2012 (r1567) @@ -211,7 +211,7 @@ struct lb_header *lb_table; struct lb_record *rec, *last; -#ifdef __DARWIN__ +#if defined(__MACH__) && defined(__APPLE__) /* This is a hack. DirectHW fails to map physical address 0x00000000. * Why? */ Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/flashrom.c Fri Aug 10 01:34:41 2012 (r1567) @@ -60,10 +60,6 @@ /* Is writing allowed with this programmer? */ int programmer_may_write; -#if CONFIG_INTERNAL+CONFIG_DUMMY+CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_PONY_SPI+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV+CONFIG_LINUX_SPI < 1 -#error You have to enable at least one programmer! -#endif - const struct programmer_entry programmer_table[] = { #if CONFIG_INTERNAL == 1 { @@ -1490,10 +1486,35 @@ void print_sysinfo(void) { -#if HAVE_UTSNAME == 1 +#ifdef _WIN32 + SYSTEM_INFO si; + OSVERSIONINFOEX osvi; + + memset(&si, 0, sizeof(SYSTEM_INFO)); + memset(&osvi, 0, sizeof(OSVERSIONINFOEX)); + msg_ginfo(" on Windows"); + /* Tell Windows which version of the structure we want. */ + osvi.dwOSVersionInfoSize = sizeof(OSVERSIONINFOEX); + if (GetVersionEx((OSVERSIONINFO*) &osvi)) + msg_ginfo(" %lu.%lu", osvi.dwMajorVersion, osvi.dwMinorVersion); + else + msg_ginfo(" unknown version"); + GetSystemInfo(&si); + switch (si.wProcessorArchitecture) { + case PROCESSOR_ARCHITECTURE_AMD64: + msg_ginfo(" (x86_64)"); + break; + case PROCESSOR_ARCHITECTURE_INTEL: + msg_ginfo(" (x86)"); + break; + default: + msg_ginfo(" (unknown arch)"); + break; + } +#elif HAVE_UTSNAME == 1 struct utsname osinfo; - uname(&osinfo); + uname(&osinfo); msg_ginfo(" on %s %s (%s)", osinfo.sysname, osinfo.release, osinfo.machine); #else Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/hwaccess.h Fri Aug 10 01:34:41 2012 (r1567) @@ -180,10 +180,6 @@ #include <asm/sunddi.h> #endif -#if (defined(__MACH__) && defined(__APPLE__)) -#define __DARWIN__ -#endif - /* Clarification about OUTB/OUTW/OUTL argument order: * OUT[BWL](val, port) */ @@ -203,7 +199,7 @@ #define INW(x) __extension__ ({ u_int inw_tmp = (x); inw(inw_tmp); }) #define INL(x) __extension__ ({ u_int inl_tmp = (x); inl(inl_tmp); }) #else -#if defined(__DARWIN__) +#if defined(__MACH__) && defined(__APPLE__) /* Header is part of the DirectHW library. */ #include <DirectHW/DirectHW.h> #define off64_t off_t @@ -303,7 +299,7 @@ #endif #endif -#if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__) +#if !(defined(__MACH__) && defined(__APPLE__)) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__) typedef struct { uint32_t hi, lo; } msr_t; msr_t rdmsr(int addr); int wrmsr(int addr, msr_t msr); Modified: trunk/physmap.c ============================================================================== --- trunk/physmap.c Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/physmap.c Fri Aug 10 01:34:41 2012 (r1567) @@ -129,7 +129,7 @@ void cleanup_cpu_msr(void) { } -#elif defined(__DARWIN__) +#elif defined(__MACH__) && defined(__APPLE__) #define MEM_DEV "DirectHW" @@ -468,7 +468,7 @@ #else -#ifdef __DARWIN__ +#if defined(__MACH__) && defined(__APPLE__) int setup_cpu_msr(int cpu) { // Always succeed for now Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/programmer.h Fri Aug 10 01:34:41 2012 (r1567) @@ -240,6 +240,7 @@ /* print.c */ #if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +/* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -637,7 +638,7 @@ #endif /* serial.c */ -#if _WIN32 +#ifdef _WIN32 typedef HANDLE fdtype; #else typedef int fdtype; Modified: trunk/util/ich_descriptors_tool/Makefile ============================================================================== --- trunk/util/ich_descriptors_tool/Makefile Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/util/ich_descriptors_tool/Makefile Fri Aug 10 01:34:41 2012 (r1567) @@ -15,11 +15,16 @@ CFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) +ifeq ($(TARGET_OS), DOS) +# DJGPP has odd uint*_t definitions which cause lots of format string warnings. +CFLAGS += -Wno-format +endif + OBJ = $(OBJATH)/$(SRC:%.c=%.o) SHAREDOBJ = $(OBJATH)/$(notdir $(SHAREDSRC:%.c=%.o)) -all:$(PROGRAM) +all:$(PROGRAM)$(EXEC_SUFFIX) $(OBJ): $(OBJATH)/%.o : %.c $(CC) $(CFLAGS) -o $@ -c $< @@ -29,11 +34,11 @@ $(SHAREDOBJ): $(OBJATH)/%.o : $(SHAREDSRCDIR)/%.c $(CC) $(CFLAGS) -o $@ -c $< -$(PROGRAM): $(OBJ) $(SHAREDOBJ) - $(CC) -o $(PROGRAM) $(OBJ) $(SHAREDOBJ) +$(PROGRAM)$(EXEC_SUFFIX): $(OBJ) $(SHAREDOBJ) + $(CC) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJ) $(SHAREDOBJ) clean: - rm -f $(PROGRAM) + rm -f $(PROGRAM) $(PROGRAM).exe rm -rf $(DEPPATH) $(OBJATH) # Include the dependency files. Modified: trunk/util/ich_descriptors_tool/ich_descriptors_tool.c ============================================================================== --- trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Fri Aug 10 01:25:27 2012 (r1566) +++ trunk/util/ich_descriptors_tool/ich_descriptors_tool.c Fri Aug 10 01:34:41 2012 (r1567) @@ -25,7 +25,6 @@ #include <stdio.h> #include <stdint.h> #include <stdlib.h> -#include <sys/mman.h> #include <sys/types.h> #include <sys/stat.h> #include <fcntl.h> @@ -33,6 +32,13 @@ #include <string.h> #include <errno.h> #include "ich_descriptors.h" +/* Some DJGPP builds define __unix__ although they don't support mmap(). + * Cygwin defines __unix__ and supports mmap(), but it does not work well. + */ +#if !defined(__MSDOS__) && !defined(_WIN32) && (defined(unix) || defined(__unix__) || defined(__unix)) || (defined(__MACH__) && defined(__APPLE__)) +#define HAVE_MMAP 1 +#include <sys/mman.h> +#endif static void dump_file(const char *basename, const uint32_t *dump, unsigned int len, struct ich_desc_region *reg, unsigned int i) { @@ -161,16 +167,17 @@ if (len < 0) usage(argv, "Seeking to the end of the file failed"); +#ifdef HAVE_MMAP buf = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0); - if (buf == (void *) -1) { + if (buf == (void *) -1) +#endif + { /* fallback for stupid OSes like cygwin */ - int ret; buf = malloc(len); if (!buf) usage(argv, "Could not allocate memory"); lseek(fd, 0, SEEK_SET); - ret = read(fd, buf, len); - if (ret != len) + if (len != read(fd, buf, len)) usage(argv, "Seeking to the end of the file failed"); } printf("The flash image has a size of %d [0x%x] bytes.\n", len, len);

1 0

[commit] r1566 - trunk
by repository service 10 Aug '12

10 Aug '12

Author: stefanct Date: Fri Aug 10 01:25:27 2012 New Revision: 1566 URL: http://flashrom.org/trac/flashrom/changeset/1566 Log: Add board enable for Biostar M7VIQ. The PCI IDs are generic VIA IDs. Only Biostar IDs are those of the LOM, but that would not be a good choice for ID. So autodetection has been disabled and the user needs to specify -p internal:mainboard=biostar:m7viq instead. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Thu Aug 9 23:09:51 2012 (r1565) +++ trunk/board_enable.c Fri Aug 10 01:25:27 2012 (r1566) @@ -554,6 +554,18 @@ /* * Suited for: + * - Biostar M7VIQ: VIA KM266 + VT8235 + */ +static int w83697xx_memw_enable_2e(void) +{ + w83697xx_memw_enable(0x2E); + + return 0; +} + + +/* + * Suited for: * - EPoX EP-8K5A2: VIA KT333 + VT8235 * - Albatron PM266A Pro: VIA P4M266A + VT8235 * - Shuttle AK31 (all versions): VIA KT266 + VT8233 @@ -2360,6 +2372,7 @@ {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x8249, "^P5N-E SLI$",NULL, NULL, P3, "ASUS", "P5N-E SLI", 0, NT, it8718f_gpio63_raise}, {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, NULL, NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e}, {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x10de, 0x03ea, 0x1019, 0x2602, 0x10de, 0x03e0, 0x1019, 0x2602, NULL, NULL, NULL, P3, "Elitegroup", "GeForce6100SM-M", 0, OK, board_ecs_geforce6100sm_m}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Aug 9 23:09:51 2012 (r1565) +++ trunk/print.c Fri Aug 10 01:25:27 2012 (r1566) @@ -749,7 +749,7 @@ B("Biostar", "H61MU3", BAD, NULL, "Probing works (Eon EN25Q32(A/B), 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Biostar", "M6TBA", BAD, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("Biostar", "M7NCD Pro", OK, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL), - B("Biostar", "M7VIQ", BAD, NULL, "Missing board enable (W83697HF/F/HG/G), see http://www.flashrom.org/pipermail/flashrom/2012-February/008863.html"), + B("Biostar", "M7VIQ", NT, NULL, NULL), B("Biostar", "N61PB-M2S", OK, NULL, NULL), B("Biostar", "N68S3+", OK, NULL, NULL), B("Biostar", "P4M80-M4", OK, "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),

1 0

ANNOUNCE: flashrom 0.9.6 is out
by Carl-Daniel Hailfinger 09 Aug '12

09 Aug '12

The flashrom developers are happy to announce the release of the flashrom 0.9.6 series. flashrom is a utility for reading, writing, erasing and verifying flash ROM chips. flashrom is designed to flash BIOS/[U]EFI/coreboot/firmware/optionROM images on mainboards, network/graphics/storage controller cards, and various programmer devices. It can do so without any special boot procedures and from your normal working environment. Highlights of flashrom ====================== * Parallel, LPC, FWH and SPI flash interfaces. * Support for onboard programming and external programmers. * 300 (+12 since 0.9.5) flash chip types/models some with a number of variants each. * 220 (+44 since 0.9.5) different chipsets, some with multiple flash controllers. * 401 (+27 since 0.9.5) mainboards verified to be working. * Flash chip package agnostic. DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32/40/48, BGA and more have all been verified to work. * 50 PCI devices, various USB and parallel port devices, and all external programmers compatible with serprog or SI Prog can be used for flashing. * No physical access needed. root access is sufficient. * No bootable floppy disk, bootable CD-ROM or other media needed. * No keyboard or monitor needed. Simply reflash remotely via SSH. * No instant reboot needed. Reflash your ROM in a running system, verify it, be happy. The new firmware will be present next time you boot. * Crossflashing and hotflashing is possible as long as the flash chips are electrically and logically compatible (same protocol). Great for recovery. * Scriptability. Reflash a whole pool of identical machines at the same time from the command line. It is recommended to check flashrom output and error codes. * Speed. flashrom is much faster than vendor flash tools. * Supports Linux, FreeBSD, NetBSD, DragonFly BSD, OpenBSD, Nexenta, Solaris, Mac OS X and DOS fully, Windows partially (no flashing of mainboards). Please refer to the README for build instructions. A list of new features can be found at http://flashrom.org/Flashrom/0.9.6 Please note that rewriting your flash chip can be dangerous and flashrom developers make no guarantees whatsoever. That said, many users have successfully replaced proprietary tools such as awdflash, amiflash and afudos with flashrom. Download ======== flashrom 0.9.6.1 can be downloaded in various ways: Anonymous checkout from the subversion repository at svn://flashrom.org/flashrom/tags/flashrom-0.9.6.1 A tarball is available for download at http://download.flashrom.org/releases/flashrom-0.9.6.1.tar.bz2 flashrom homepage with more info: http://flashrom.org/ Thanks ====== We wish to thank everyone who contributed to flashrom over the last eleven years. Patches, bug reports, tests, user support, community outreach, datasheet hunting, reverse engineering and other activities have made flashrom the universal and reliable tool it is today.

1 0

[PATCH 1/1] Simplify processor_enable.c
by Peter Lemenkov 09 Aug '12

09 Aug '12

Hello All. This patch simplifies processor_flash_enable function a bit by simplifying the structure of the processor_enable.c. At least this patch removes more lines than introdces w/o sacrificing the simplicity. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- processor_enable.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/processor_enable.c b/processor_enable.c index d680f97..d7f421d 100644 --- a/processor_enable.c +++ b/processor_enable.c @@ -24,19 +24,6 @@ #include "flash.h" #include "programmer.h" -#if defined(__i386__) || defined(__x86_64__) - -int processor_flash_enable(void) -{ - /* On x86, flash access is not processor specific except on - * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. - * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. - */ - return 0; -} - -#else - #if defined (__MIPSEL__) && defined (__linux) #include <stdio.h> #include <string.h> @@ -83,15 +70,20 @@ static int is_loongson(void) int processor_flash_enable(void) { + int ret = 1; /* FIXME: detect loongson on FreeBSD and OpenBSD as well. */ #if defined (__MIPSEL__) && defined (__linux) if (is_loongson()) { flashbase = 0x1fc00000; - return 0; + ret = 0; } +#elif defined(__i386__) || defined(__x86_64__) + /* On x86, flash access is not processor specific except on + * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. + * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. + */ + ret = 0; #endif /* Not implemented yet. Oh well. */ - return 1; + return ret; } - -#endif -- 1.7.9.3

2 1

[commit] r1565 - trunk
by repository service 09 Aug '12

09 Aug '12

Author: stefanct Date: Thu Aug 9 23:09:51 2012 New Revision: 1565 URL: http://flashrom.org/trac/flashrom/changeset/1565 Log: Simplify processor_enable.c. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/processor_enable.c Modified: trunk/processor_enable.c ============================================================================== --- trunk/processor_enable.c Wed Aug 8 02:14:58 2012 (r1564) +++ trunk/processor_enable.c Thu Aug 9 23:09:51 2012 (r1565) @@ -24,19 +24,6 @@ #include "flash.h" #include "programmer.h" -#if defined(__i386__) || defined(__x86_64__) - -int processor_flash_enable(void) -{ - /* On x86, flash access is not processor specific except on - * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. - * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. - */ - return 0; -} - -#else - #if defined (__MIPSEL__) && defined (__linux) #include <stdio.h> #include <string.h> @@ -71,10 +58,8 @@ while (*ptr && isspace((unsigned char)*ptr)) ptr++; fclose(cpuinfo); - return (strncmp(ptr, "ICT Loongson-2 V0.3", - strlen("ICT Loongson-2 V0.3")) == 0) - || (strncmp(ptr, "Godson2 V0.3 FPU V0.1", - strlen("Godson2 V0.3 FPU V0.1")) == 0); + return (strncmp(ptr, "ICT Loongson-2 V0.3", strlen("ICT Loongson-2 V0.3")) == 0) || + (strncmp(ptr, "Godson2 V0.3 FPU V0.1", strlen("Godson2 V0.3 FPU V0.1")) == 0); } fclose(cpuinfo); return 0; @@ -83,15 +68,21 @@ int processor_flash_enable(void) { + /* Default to 1 to catch not implemented architectures. */ + int ret = 1; + /* FIXME: detect loongson on FreeBSD and OpenBSD as well. */ #if defined (__MIPSEL__) && defined (__linux) if (is_loongson()) { flashbase = 0x1fc00000; - return 0; + ret = 0; } +#elif defined(__i386__) || defined(__x86_64__) + /* On x86, flash access is not processor specific except on + * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. + * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. + */ + ret = 0; #endif - /* Not implemented yet. Oh well. */ - return 1; + return ret; } - -#endif

1 0

Re: [flashrom] [SPAM_HEADER] - Re: Supermicro X9DR3 Intel X79: Untested chipset - Email found in subject
by Dominique Lecorre (Serviware Croissy) 09 Aug '12

09 Aug '12

Stefan, Thanks for the very detailed answer. Best Regards. DLC -----Original Message----- From: Stefan Tauner [mailto:stefan.tauner@student.tuwien.ac.at] Sent: Thu 8/9/2012 1:34 AM To: Dominique Lecorre (Serviware Croissy) Cc: flashrom(a)flashrom.org Subject: [SPAM_HEADER] - Re: [flashrom] Supermicro X9DR3 Intel X79: Untested chipset - Email found in subject On Sun, 5 Aug 2012 06:48:53 +0200 "Dominique Lecorre $Serviware Croissy$" <dlecorre(a)serviware.com> wrote: > > Hi, > Attached the flashrom -VV output on a Supermicro X9DR3 SandyBridge Patsburg Thanks Dominique! The board was already reported earlier (to be not working due to the locked region), see http://www.flashrom.org/pipermail/flashrom/2012-July/009522.html The chipset itself would most probably work, but we only mark it that way after successful writes (which is currently not possible on that board). And finally, the flash chip (Numonyx N25Q128) on that board is not fully supported yet, but would probably work well enough (with some generic code, namely SFDP). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[PATCH] Support chips MBM29F040 and W29EE512
by Andreas Seltenreich 09 Aug '12

09 Aug '12

Hi, I had to modify my copy a bit to use the PLCC chips I had salvaged somewhere as boot ROMs in Intel NICs. Patch attached. I'm not sure if the 512kB one qualifies as tested because the programmer only supports 128kB, and I had to --force it. regards, andreas

2 2

Re: [flashrom] ZOTAC H61ITX-A-E ( ZOTAC H61-ITX WiFi )
by Stefan Tauner 09 Aug '12

09 Aug '12

On Sun, 5 Aug 2012 12:53:41 +0200 crow <crow(a)linux.org.ba> wrote: > Hello, > Another locked board: > 0x5C: 0x01ff0001 FREG2: WARNING: Management Engine region > (0x00001000-0x001fffff) is locked. > > Board url: http://www.zotac.com/index.php?page=shop.product_details&flypage=flypage_im… > > Flashrom log attached. Thanks for your report, i have added the board to our list. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Supermicro X9DR3 Intel X79: Untested chipset
by Dominique Lecorre (Serviware Croissy) 09 Aug '12

09 Aug '12

Hi, Attached the flashrom -VV output on a Supermicro X9DR3 SandyBridge Patsburg Regards. DLC

2 1

[PATCH] Automatically release I/O permissions on shutdown
by Carl-Daniel Hailfinger 09 Aug '12

09 Aug '12

get_io_perms() is renamed to rget_io_perms() and automatically registers a function to release I/O permissions on shutdown. Actually release I/O permissions on Solaris and iopl()-supporting operating systems like Linux. This patch fixes quite a few programmers which forgot to release I/O permissions on shutdown, and it simplifies the shutdown and error handling code for all others. Note: The next steps will be to do the same with PCI init and /dev/mem accesses. That should make probably 3/4 of all explicit shutdown functions empty and obsolete. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-auto_release_io_perms/hwaccess.c =================================================================== --- flashrom-auto_release_io_perms/hwaccess.c (Revision 1547) +++ flashrom-auto_release_io_perms/hwaccess.c (Arbeitskopie) @@ -44,9 +44,25 @@ int io_fd; #endif -void get_io_perms(void) +int release_io_perms(void *p) { #if defined(__DJGPP__) || defined(__LIBPAYLOAD__) +#else +#if defined (__sun) && (defined(__i386) || defined(__amd64)) + sysi86(SI86V86, V86SC_IOPL, 0); +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__) + close(io_fd); +#else + iopl(0); +#endif +#endif + return 0; +} + +/* Get I/O permissions with automatic permission release on shutdown. */ +void rget_io_perms(void) +{ +#if defined(__DJGPP__) || defined(__LIBPAYLOAD__) /* We have full permissions by default. */ return; #else @@ -65,17 +81,12 @@ msg_perr("single user mode.\n"); #endif exit(1); + } else { + register_shutdown(release_io_perms, NULL); } #endif } -void release_io_perms(void) -{ -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) - close(io_fd); -#endif -} - #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) static inline void sync_primitive(void) @@ -88,15 +99,10 @@ } /* PCI port I/O is not yet implemented on PowerPC. */ -void get_io_perms(void) +void rget_io_perms(void) { } -/* PCI port I/O is not yet implemented on PowerPC. */ -void release_io_perms(void) -{ -} - #elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) /* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses @@ -107,29 +113,20 @@ } /* PCI port I/O is not yet implemented on MIPS. */ -void get_io_perms(void) +void rget_io_perms(void) { } -/* PCI port I/O is not yet implemented on MIPS. */ -void release_io_perms(void) -{ -} - #elif defined (__arm__) static inline void sync_primitive(void) { } -void get_io_perms(void) +void rget_io_perms(void) { } -void release_io_perms(void) -{ -} - #else #error Unknown architecture Index: flashrom-auto_release_io_perms/ogp_spi.c =================================================================== --- flashrom-auto_release_io_perms/ogp_spi.c (Revision 1547) +++ flashrom-auto_release_io_perms/ogp_spi.c (Arbeitskopie) @@ -98,7 +98,6 @@ { physunmap(ogp_spibar, 4096); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -128,7 +127,7 @@ return 1; } - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); Index: flashrom-auto_release_io_perms/drkaiser.c =================================================================== --- flashrom-auto_release_io_perms/drkaiser.c (Revision 1547) +++ flashrom-auto_release_io_perms/drkaiser.c (Arbeitskopie) @@ -59,7 +59,6 @@ physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); /* Flash write is disabled automatically by PCI restore. */ pci_cleanup(pacc); - release_io_perms(); return 0; }; @@ -67,7 +66,7 @@ { uint32_t addr; - get_io_perms(); + rget_io_perms(); addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); Index: flashrom-auto_release_io_perms/gfxnvidia.c =================================================================== --- flashrom-auto_release_io_perms/gfxnvidia.c (Revision 1547) +++ flashrom-auto_release_io_perms/gfxnvidia.c (Arbeitskopie) @@ -83,7 +83,6 @@ * by PCI restore. */ pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -91,7 +90,7 @@ { uint32_t reg32; - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); Index: flashrom-auto_release_io_perms/nicrealtek.c =================================================================== --- flashrom-auto_release_io_perms/nicrealtek.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicrealtek.c (Arbeitskopie) @@ -55,13 +55,12 @@ { /* FIXME: We forgot to disable software access again. */ pci_cleanup(pacc); - release_io_perms(); return 0; } int nicrealtek_init(void) { - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); Index: flashrom-auto_release_io_perms/satamv.c =================================================================== --- flashrom-auto_release_io_perms/satamv.c (Revision 1547) +++ flashrom-auto_release_io_perms/satamv.c (Arbeitskopie) @@ -60,7 +60,6 @@ { physunmap(mv_bar, 0x20000); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -85,7 +84,7 @@ uintptr_t addr; uint32_t tmp; - get_io_perms(); + rget_io_perms(); /* BAR0 has all internal registers memory mapped. */ /* No need to check for errors, pcidev_init() will not return in case @@ -161,7 +160,6 @@ error_out: pci_cleanup(pacc); - release_io_perms(); return 1; } Index: flashrom-auto_release_io_perms/internal.c =================================================================== --- flashrom-auto_release_io_perms/internal.c (Revision 1547) +++ flashrom-auto_release_io_perms/internal.c (Arbeitskopie) @@ -158,7 +158,6 @@ static int internal_shutdown(void *data) { - release_io_perms(); return 0; } @@ -225,7 +224,7 @@ } free(arg); - get_io_perms(); + rget_io_perms(); if (register_shutdown(internal_shutdown, NULL)) return 1; Index: flashrom-auto_release_io_perms/nicintel_spi.c =================================================================== --- flashrom-auto_release_io_perms/nicintel_spi.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicintel_spi.c (Arbeitskopie) @@ -158,7 +158,6 @@ physunmap(nicintel_spibar, 4096); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -167,7 +166,7 @@ { uint32_t tmp; - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); Index: flashrom-auto_release_io_perms/nicnatsemi.c =================================================================== --- flashrom-auto_release_io_perms/nicnatsemi.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicnatsemi.c (Arbeitskopie) @@ -53,13 +53,12 @@ static int nicnatsemi_shutdown(void *data) { pci_cleanup(pacc); - release_io_perms(); return 0; } int nicnatsemi_init(void) { - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi); Index: flashrom-auto_release_io_perms/rayer_spi.c =================================================================== --- flashrom-auto_release_io_perms/rayer_spi.c (Revision 1547) +++ flashrom-auto_release_io_perms/rayer_spi.c (Arbeitskopie) @@ -167,7 +167,7 @@ rayer_miso_bit = 4; } - get_io_perms(); + rget_io_perms(); /* Get the initial value before writing to any line. */ lpt_outbyte = INB(lpt_iobase); Index: flashrom-auto_release_io_perms/atahpt.c =================================================================== --- flashrom-auto_release_io_perms/atahpt.c (Revision 1547) +++ flashrom-auto_release_io_perms/atahpt.c (Arbeitskopie) @@ -59,7 +59,6 @@ { /* Flash access is disabled automatically by PCI restore. */ pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -67,7 +66,7 @@ { uint32_t reg32; - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); Index: flashrom-auto_release_io_perms/nic3com.c =================================================================== --- flashrom-auto_release_io_perms/nic3com.c (Revision 1547) +++ flashrom-auto_release_io_perms/nic3com.c (Arbeitskopie) @@ -81,13 +81,12 @@ } pci_cleanup(pacc); - release_io_perms(); return 0; } int nic3com_init(void) { - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); Index: flashrom-auto_release_io_perms/satasii.c =================================================================== --- flashrom-auto_release_io_perms/satasii.c (Revision 1547) +++ flashrom-auto_release_io_perms/satasii.c (Arbeitskopie) @@ -61,7 +61,6 @@ { physunmap(sii_bar, SATASII_MEMMAP_SIZE); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -70,7 +69,7 @@ uint32_t addr; uint16_t reg_offset; - get_io_perms(); + rget_io_perms(); pcidev_init(PCI_BASE_ADDRESS_0, satas_sii); Index: flashrom-auto_release_io_perms/nicintel.c =================================================================== --- flashrom-auto_release_io_perms/nicintel.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicintel.c (Arbeitskopie) @@ -63,7 +63,6 @@ physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -72,9 +71,9 @@ uintptr_t addr; /* Needed only for PCI accesses on some platforms. - * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + * FIXME: Refactor that into get_mem_perms/rget_io_perms/get_pci_perms? */ - get_io_perms(); + rget_io_perms(); /* No need to check for errors, pcidev_init() will not return in case * of errors. @@ -117,7 +116,6 @@ physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); error_out: pci_cleanup(pacc); - release_io_perms(); return 1; } Index: flashrom-auto_release_io_perms/programmer.h =================================================================== --- flashrom-auto_release_io_perms/programmer.h (Revision 1547) +++ flashrom-auto_release_io_perms/programmer.h (Arbeitskopie) @@ -300,8 +300,7 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); #endif -void get_io_perms(void); -void release_io_perms(void); +void rget_io_perms(void); #if CONFIG_INTERNAL == 1 extern int is_laptop; extern int laptop_ok; -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 2/3] Not for merge: Warn if we skipped all blocks
by Stefan Tauner 09 Aug '12

09 Aug '12

On Thu, 2 Aug 2012 15:51:32 +0200 Idwer Vollering <vidwer(a)gmail.com> wrote: > After considering the above comment: > > Acked-by: Idwer Vollering <vidwer(a)gmail.com> hmm... i am not really confident that this is a good implementation and/or should be merged. carl-daniel what do you think? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] ichspi: ignore bogus FREGs.
by Justin Bogner 09 Aug '12

09 Aug '12

Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> writes: > Some vendors forget to disable regions properly and set their FRAP bits > and FREG to 0. While not documented publicly this is being ignored by the > chipset(s)[1] and hence flashrom should do so too. Without this patch > flashrom prints a warning and disables writes. > The check for i (region index) excludes the descriptor region which should > not be becessary because specs suggest that the descriptor region should not > be locked, but if vendors would follow the specs this patch would not have > been necessary in the first place. > > [1]: http://www.flashrom.org/pipermail/flashrom/2012-May/009303.html > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > Justin, you could help testing this patch by applying it to the latest > development source from http://flashrom.org/Downloads and sending us > the flashrom output as before. I'll try this out in the next week or so. Thanks for looking into this.

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Re: [flashrom] How to reflash ROM file for Persimmon board
by Idwer Vollering 08 Aug '12

08 Aug '12

2012/8/7 Tung Hoang <tungh(a)techburgcorp.com>: > Hi all > I has a Persimmon board and I installed Ubuntu OS on it. > I build Coreboot with GRUB2 for my board ( output is new ROM file ) Starting grub2 as a payload might or might not work, can you troubleshoot your machine (= look at coreboot/the payload's console output) when it doesn't work as expected? Why did you choose grub2 over seabios? > Now, I intent use flashrom tool to flash new ROM file for my board. > But I'm not sure my new ROM file is work well or not. > As i understand, I can backup original ROM file of Persimmon board and using > flashrom tool to load new ROM file to my board ( flashrom is installed on > Ubuntu OS run on Persimmon board ) > My question is : > If my new ROM file is not working, How to reflash original ROM file ( which > i backup from Persimmon board ) ? > Can we use flashrom or other tool ? You certainly want to save the original rom content, maybe store it on another machine, or get a spare chip to program coreboot.rom to. If you prefer to use an external programmer for SPI chips I can recommend the buspirate: http://flashrom.org/Bus_Pirate and compatible soic8 clips, if the flash is soldered to the board, http://www.hmcelectronics.com/product/Pomona/5250 > > Thanks > -- > Hoang Tung (Mr) > > > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

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[PATCH] flashrom 0.9.6.1
by Carl-Daniel Hailfinger 08 Aug '12

08 Aug '12

Increase release number to 0.9.6.1 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-0.9.6.1-release/Makefile =================================================================== --- flashrom-0.9.6.1-release/Makefile (Revision 1562) +++ flashrom-0.9.6.1-release/Makefile (Arbeitskopie) @@ -282,7 +282,7 @@ # will not require subversion. The downloadable snapshots are already exported. SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) -RELEASE := 0.9.6 +RELEASE := 0.9.6.1 VERSION := $(RELEASE)-r$(SVNVERSION) RELEASENAME ?= $(VERSION) -- http://www.hailfinger.org/

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[commit] r1564 - tags/flashrom-0.9.6.1
by repository service 08 Aug '12

08 Aug '12

Author: hailfinger Date: Wed Aug 8 02:14:58 2012 New Revision: 1564 URL: http://flashrom.org/trac/flashrom/changeset/1564 Log: Tag flashrom 0.9.6.1 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Added: tags/flashrom-0.9.6.1/ - copied from r1563, trunk/

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[commit] r1563 - trunk
by repository service 08 Aug '12

08 Aug '12

Author: hailfinger Date: Wed Aug 8 02:13:10 2012 New Revision: 1563 URL: http://flashrom.org/trac/flashrom/changeset/1563 Log: Increase flashrom release number to 0.9.6.1 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Tue Aug 7 13:59:59 2012 (r1562) +++ trunk/Makefile Wed Aug 8 02:13:10 2012 (r1563) @@ -282,7 +282,7 @@ # will not require subversion. The downloadable snapshots are already exported. SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) -RELEASE := 0.9.6 +RELEASE := 0.9.6.1 VERSION := $(RELEASE)-r$(SVNVERSION) RELEASENAME ?= $(VERSION)

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[commit] r1562 - trunk
by repository service 07 Aug '12

07 Aug '12

Author: hailfinger Date: Tue Aug 7 13:59:59 2012 New Revision: 1562 URL: http://flashrom.org/trac/flashrom/changeset/1562 Log: Fix missing #include hwaccess.h In r1549 #include "hwaccess.h" was moved to individual drivers. Unfortunately, flashrom.c was forgotten. This caused flashrom to falsely report an unknown PCI library version and big-endianness on all platforms. Add #include "hwaccess.h". Explicitly check for __FLASHROM_BIG_ENDIAN__ Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashrom.c Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Aug 3 01:56:49 2012 (r1561) +++ trunk/flashrom.c Tue Aug 7 13:59:59 2012 (r1562) @@ -37,6 +37,7 @@ #include "flash.h" #include "flashchips.h" #include "programmer.h" +#include "hwaccess.h" const char flashrom_version[] = FLASHROM_VERSION; char *chip_to_probe = NULL; @@ -1529,8 +1530,10 @@ #endif #if defined (__FLASHROM_LITTLE_ENDIAN__) msg_gdbg(" little endian"); -#else +#elif defined (__FLASHROM_BIG_ENDIAN__) msg_gdbg(" big endian"); +#else +#error Endianness could not be determined #endif msg_gdbg("\n"); }

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How to reflash ROM file for Persimmon board
by Tung Hoang 07 Aug '12

07 Aug '12

Hi all I has a Persimmon board and I installed Ubuntu OS on it. I build Coreboot with GRUB2 for my board ( output is new ROM file ) Now, I intent use flashrom tool to flash new ROM file for my board. But I'm not sure my new ROM file is work well or not. As i understand, I can backup original ROM file of Persimmon board and using flashrom tool to load new ROM file to my board ( flashrom is installed on Ubuntu OS run on Persimmon board ) My question is : If my new ROM file is not working, How to reflash original ROM file ( which i backup from Persimmon board ) ? Can we use flashrom or other tool ? Thanks -- Hoang Tung (Mr)

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Re: [flashrom] Intel C602 support
by Stefan Tauner 06 Aug '12

06 Aug '12

On Thu, 2 Aug 2012 11:22:56 -0700 Greg Schardt <gschardt(a)ddn.com> wrote: > 0x5C: 0x07ff0020 FREG2: WARNING: Management Engine region (0x00020000-0x007fffff) is locked. Hello Greg, as i briefly mentioned in my previous mail, locked regions are a bit tricky and flashrom can not deal with them (i.e. unlock them). We are working on understanding how to unlock them, but intel does not provide us any documentation so please do not expect a solution soon. Since the SMBIOS information indicates that your company is assembling the firmware itself, maybe you could arrange that the ME region is not locked? As far as we know this is not a problem in everyday operation or for an update with flashrom (contrary to the scaring intel documentation that tries to convince you from the opposite). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] Fix missing #include hwaccess.h
by Carl-Daniel Hailfinger 05 Aug '12

05 Aug '12

In r1549 #include "hwaccess.h" was moved to individual drivers. Unfortunately, flashrom.c was forgotten. This caused flashrom to falsely report an unknown PCI library version and big-endianness on all platforms. Add #include "hwaccess.h". Explicitly check for __FLASHROM_BIG_ENDIAN__ Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-missing_hwaccess_h_include/flashrom.c =================================================================== --- flashrom-missing_hwaccess_h_include/flashrom.c (Revision 1561) +++ flashrom-missing_hwaccess_h_include/flashrom.c (Arbeitskopie) @@ -37,6 +37,7 @@ #include "flash.h" #include "flashchips.h" #include "programmer.h" +#include "hwaccess.h" const char flashrom_version[] = FLASHROM_VERSION; char *chip_to_probe = NULL; @@ -1529,8 +1530,10 @@ #endif #if defined (__FLASHROM_LITTLE_ENDIAN__) msg_gdbg(" little endian"); +#elif defined (__FLASHROM_BIG_ENDIAN__) + msg_gdbg(" big endian"); #else - msg_gdbg(" big endian"); +#error Endianness could not be determined #endif msg_gdbg("\n"); } -- http://www.hailfinger.org/

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ZOTAC H61ITX-A-E ( ZOTAC H61-ITX WiFi )
by crow 05 Aug '12

05 Aug '12

Hello, Another locked board: 0x5C: 0x01ff0001 FREG2: WARNING: Management Engine region (0x00001000-0x001fffff) is locked. Board url: http://www.zotac.com/index.php?page=shop.product_details&flypage=flypage_im… Flashrom log attached.

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Re: [flashrom] [PATCH 3/5] Rename AT25F512B-specific code.
by Stefan Tauner 03 Aug '12

03 Aug '12

On Wed, 15 Feb 2012 02:10:22 +0100 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > The AT25F512B is quite different from the other (older and yet > unsupported) chips in the AT25F* familiy, hence rename 512B-specific > stuff to make room for the generic AT25F* code i'd like to get in the remaining patches of this set rather sooner than later. imho they are pretty ready (i have at least added the voltage fields while rebasing and incorporated your earlier comments iirc), but maybe there are some small bits missing/wrong. but what i really would like to know is if you agree on the naming and code placement (especially spi_block_erase_62). if there is a general agreement on that i can self-review the details. i cant remember what i have done back then anyway :P -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 2/5] Refine messages of SPI block protection disables.
by Stefan Tauner 03 Aug '12

03 Aug '12

On Wed, 15 Feb 2012 02:10:21 +0100 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Make them real progress indicators with a final "done" message on success. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> self-acked and committed in r1561 (please see previous mail for a rationale). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1561 - trunk
by repository service 03 Aug '12

03 Aug '12

Author: stefanct Date: Fri Aug 3 01:56:49 2012 New Revision: 1561 URL: http://flashrom.org/trac/flashrom/changeset/1561 Log: Refine messages of SPI block protection disables. Make them real progress indicators with a final "done" message on success. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/at25.c trunk/spi25.c Modified: trunk/at25.c ============================================================================== --- trunk/at25.c Fri Aug 3 01:51:28 2012 (r1560) +++ trunk/at25.c Fri Aug 3 01:56:49 2012 (r1561) @@ -164,7 +164,7 @@ if ((status & (3 << 2)) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); if (status & (1 << 7)) { msg_cdbg("Need to disable Sector Protection Register Lock\n"); if ((status & (1 << 4)) == 0) { @@ -175,7 +175,7 @@ /* All bits except bit 7 (SPRL) are readonly. */ result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } @@ -183,7 +183,7 @@ /* Global unprotect. Make sure to mask SPRL as well. */ result = spi_write_status_register(flash, status & ~0xbc); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -191,6 +191,7 @@ msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; } @@ -219,20 +220,20 @@ if ((status & 0x6c) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); if (status & (1 << 7)) { msg_cdbg("Need to disable Status Register Write Protect\n"); /* Clear bit 7 (WPEN). */ result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } } /* Global unprotect. Make sure to mask WPEN as well. */ result = spi_write_status_register(flash, status & ~0xec); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -240,6 +241,7 @@ msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; } @@ -253,20 +255,20 @@ if ((status & 0x7c) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); if (status & (1 << 7)) { msg_cdbg("Need to disable Status Register Write Protect\n"); /* Clear bit 7 (WPEN). */ result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } } /* Global unprotect. Make sure to mask WPEN as well. */ result = spi_write_status_register(flash, status & ~0xfc); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -274,5 +276,6 @@ msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; } Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Fri Aug 3 01:51:28 2012 (r1560) +++ trunk/spi25.c Fri Aug 3 01:56:49 2012 (r1561) @@ -933,10 +933,10 @@ if ((status & 0x3c) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); result = spi_write_status_register(flash, status & ~0x3c); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -944,6 +944,7 @@ msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; }

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[commit] r1560 - trunk
by repository service 03 Aug '12

03 Aug '12

Author: stefanct Date: Fri Aug 3 01:51:28 2012 New Revision: 1560 URL: http://flashrom.org/trac/flashrom/changeset/1560 Log: Clean up a25.c, at25.c, spi25.c. - introduce spi_prettyprint_status_register_atmel_at25_wpen() - use spi_prettyprint_status_register_bit() where possible - generify spi_prettyprint_status_register_bp3210 and use it in at25.c too Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/a25.c trunk/at25.c trunk/chipdrivers.h trunk/spi25.c Modified: trunk/a25.c ============================================================================== --- trunk/a25.c Fri Aug 3 00:06:14 2012 (r1559) +++ trunk/a25.c Fri Aug 3 01:51:28 2012 (r1560) @@ -40,7 +40,7 @@ spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); spi_prettyprint_status_register_bit(status, 4); - spi_prettyprint_status_register_bp3210(status, 1); + spi_prettyprint_status_register_bp(status, 1); spi_prettyprint_status_register_welwip(status); return 0; } @@ -55,7 +55,7 @@ spi_prettyprint_status_register_amic_a25_srwd(status); spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); - spi_prettyprint_status_register_bp3210(status, 2); + spi_prettyprint_status_register_bp(status, 2); spi_prettyprint_status_register_welwip(status); return 0; } @@ -72,7 +72,7 @@ "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " "is %s\n", (status & (1 << 5)) ? "bottom" : "top"); - spi_prettyprint_status_register_bp3210(status, 2); + spi_prettyprint_status_register_bp(status, 2); spi_prettyprint_status_register_welwip(status); msg_cdbg("Chip status register 2 is NOT decoded!\n"); return 0; @@ -90,7 +90,7 @@ "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " "is %s\n", (status & (1 << 5)) ? "bottom" : "top"); - spi_prettyprint_status_register_bp3210(status, 2); + spi_prettyprint_status_register_bp(status, 2); spi_prettyprint_status_register_welwip(status); msg_cdbg("Chip status register 2 is NOT decoded!\n"); return 0; Modified: trunk/at25.c ============================================================================== --- trunk/at25.c Fri Aug 3 00:06:14 2012 (r1559) +++ trunk/at25.c Fri Aug 3 01:51:28 2012 (r1560) @@ -23,6 +23,12 @@ /* Prettyprint the status register. Works for Atmel A25/A26 series. */ +static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status) +{ + msg_cdbg("Chip status register: Write Protect Enable (WPEN) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); +} + static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status) { msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) " @@ -91,10 +97,7 @@ spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_atmel_at25_epewpp(status); spi_prettyprint_status_register_bit(status, 3); - msg_cdbg("Chip status register: Block Protect 0 (BP0) is " - "%sset, %s sectors are protected\n", - (status & (1 << 2)) ? "" : "not ", - (status & (1 << 2)) ? "all" : "no"); + spi_prettyprint_status_register_bp(status, 0); spi_prettyprint_status_register_welwip(status); return 0; } @@ -106,14 +109,12 @@ status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " - "is %sset\n", (status & (1 << 7)) ? "" : "not "); + spi_prettyprint_status_register_atmel_at25_wpen(status); msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " "%sset\n", (status & (1 << 6)) ? "" : "not "); msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " "%sset\n", (status & (1 << 5)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 4 is " - "%sset\n", (status & (1 << 4)) ? "" : "not "); + spi_prettyprint_status_register_bit(status, 4); msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " "%sset\n", (status & (1 << 3)) ? "" : "not "); msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " @@ -130,18 +131,8 @@ status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " - "is %sset\n", (status & (1 << 7)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " - "%sset\n", (status & (1 << 6)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " - "%sset\n", (status & (1 << 5)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is " - "%sset\n", (status & (1 << 4)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " - "%sset\n", (status & (1 << 3)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " - "%sset\n", (status & (1 << 2)) ? "" : "not "); + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bp(status, 4); /* FIXME: Pretty-print detailed sector protection status. */ spi_prettyprint_status_register_welwip(status); return 0; Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Fri Aug 3 00:06:14 2012 (r1559) +++ trunk/chipdrivers.h Fri Aug 3 01:51:28 2012 (r1560) @@ -48,7 +48,7 @@ uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); -void spi_prettyprint_status_register_bp3210(uint8_t status, int bp); +void spi_prettyprint_status_register_bp(uint8_t status, int bp); void spi_prettyprint_status_register_welwip(uint8_t status); int spi_prettyprint_status_register(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Fri Aug 3 00:06:14 2012 (r1559) +++ trunk/spi25.c Fri Aug 3 01:51:28 2012 (r1560) @@ -327,21 +327,24 @@ } /* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_bp3210(uint8_t status, int bp) +void spi_prettyprint_status_register_bp(uint8_t status, int bp) { switch (bp) { /* Fall through. */ + case 4: + msg_cdbg("Chip status register: Block Protect 4 (BP4) " + "is %sset\n", (status & (1 << 5)) ? "" : "not "); case 3: - msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) " + msg_cdbg("Chip status register: Block Protect 3 (BP3) " "is %sset\n", (status & (1 << 5)) ? "" : "not "); case 2: - msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) " + msg_cdbg("Chip status register: Block Protect 2 (BP2) " "is %sset\n", (status & (1 << 4)) ? "" : "not "); case 1: - msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) " + msg_cdbg("Chip status register: Block Protect 1 (BP1) " "is %sset\n", (status & (1 << 3)) ? "" : "not "); case 0: - msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) " + msg_cdbg("Chip status register: Block Protect 0 (BP0) " "is %sset\n", (status & (1 << 2)) ? "" : "not "); } } @@ -355,7 +358,7 @@ static void spi_prettyprint_status_register_common(uint8_t status) { - spi_prettyprint_status_register_bp3210(status, 3); + spi_prettyprint_status_register_bp(status, 3); spi_prettyprint_status_register_welwip(status); }

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Re: [flashrom] [PATCH 1/5] Clean up a25.c, at25.c, spi25.c.
by Stefan Tauner 03 Aug '12

03 Aug '12

On Wed, 15 Feb 2012 02:10:20 +0100 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > - introduce spi_prettyprint_status_register_atmel_at25_wpen() > - use spi_prettyprint_status_register_bit() where possible > - generify spi_prettyprint_status_register_bp3210 and use it in at25.c too > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> self-acked and committed in r1560. it has been hanging there long enough and is trivial enough anyway imho. :) i would have committed it in any case after 0.9.6 because of that (i.e. it is not related to any previous discussion about changing the review process). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] flashrom 0.9.6
by Carl-Daniel Hailfinger 03 Aug '12

03 Aug '12

Increase release number to 0.9.6 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-0.9.6-release/Makefile =================================================================== --- flashrom-0.9.6-release/Makefile (Revision 1557) +++ flashrom-0.9.6-release/Makefile (Arbeitskopie) @@ -282,7 +282,7 @@ # will not require subversion. The downloadable snapshots are already exported. SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) -RELEASE := 0.9.5.2 +RELEASE := 0.9.6 VERSION := $(RELEASE)-r$(SVNVERSION) RELEASENAME ?= $(VERSION) -- http://www.hailfinger.org/

1 1

[commit] r1559 - tags/flashrom-0.9.6
by repository service 03 Aug '12

03 Aug '12

Author: hailfinger Date: Fri Aug 3 00:06:14 2012 New Revision: 1559 URL: http://flashrom.org/trac/flashrom/changeset/1559 Log: Tag flashrom 0.9.6 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Added: tags/flashrom-0.9.6/ - copied from r1558, trunk/

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[commit] r1558 - trunk
by repository service 03 Aug '12

03 Aug '12

Author: hailfinger Date: Fri Aug 3 00:00:05 2012 New Revision: 1558 URL: http://flashrom.org/trac/flashrom/changeset/1558 Log: Increase flashrom release number to 0.9.6 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Mon Jul 30 21:42:33 2012 (r1557) +++ trunk/Makefile Fri Aug 3 00:00:05 2012 (r1558) @@ -282,7 +282,7 @@ # will not require subversion. The downloadable snapshots are already exported. SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) -RELEASE := 0.9.5.2 +RELEASE := 0.9.6 VERSION := $(RELEASE)-r$(SVNVERSION) RELEASENAME ?= $(VERSION)

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Re: [flashrom] Intel C602 support
by Stefan Tauner 02 Aug '12

02 Aug '12

On Thu, 28 Jun 2012 07:03:34 -0700 Greg Schardt <gschardt(a)ddn.com> wrote: > I apologize for the delay. likewise ;) > Here is the output: > > 00:1f.0 ISA bridge [0601]: Intel Corporation Patsburg LPC Controller [8086:1d41] (rev 06) > > Let me know if you need more information or would like me to test it. that one actually is already supported since september 2011, so the latest stable version should detect it and work correctly (as long as there are no locked regions). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 2

Re: [flashrom] [PATCH 2/3] Not for merge: Warn if we skipped all blocks
by Idwer Vollering 02 Aug '12

02 Aug '12

2012/7/23 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: > Quick hack to print a warning if we skip all blocks because they are already > equal to the requested image. We want something like this to make users > aware... and some developers that regularly fall for this too *coughcough*. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > flashrom.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/flashrom.c b/flashrom.c > index 70687ff..ebc3118 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -1218,6 +1218,7 @@ static int selfcheck_eraseblocks(const struct flashchip *flash) > return ret; > } > > +static int all_skipped = 1; > static int erase_and_write_block_helper(struct flashctx *flash, > unsigned int start, unsigned int len, > uint8_t *curcontents, > @@ -1266,6 +1267,8 @@ static int erase_and_write_block_helper(struct flashctx *flash, > } > if (skip) > msg_cdbg("S"); > + else > + all_skipped = 0; > return ret; > } > > @@ -1391,6 +1394,8 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents, > if (ret) { > msg_cerr("FAILED!\n"); > } else { > + if(all_skipped) > + msg_cinfo("\nWarning: Chip contents were already identical to the requested image.\n"); I would change "were already identical" to "are identical". Let's not (right now) digress about calling it chip contents or content. > msg_cinfo("Erase/write done.\n"); > } > return ret; > -- > Kind regards, Stefan Tauner After considering the above comment: Acked-by: Idwer Vollering <vidwer(a)gmail.com>

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[PATCH] Fix VIA VX*** support.
by Stefan Tauner 31 Jul '12

31 Jul '12

Helge Wagner's patch that added VIA VX900 chipset support made me look closer at the datasheets which led to some concise documentation about newer VIA chipsets: http://flashrom.org/VIA Based on that this patch adds full support for VX800/VX820, VX855/VX875 and VX900, including SPI and LPC. VT8237S was not changed (SPI support only) because there is no public datasheet and it is not clear how to distinguish between LPC and SPI strapping and investigations in (NDAed) documents have not brought up anything conclusively. enable_flash_vt823x could probably be enhanced too due to various yet ignored LPC options of the chipset. Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- New version with tiny changes for 0.9.6... test status is NT and arguable... but since there are so few VIA users out there anyway i think we wont get too many mails anyway. chipset_enable.c | 80 +++++++++++++++++++++++++++++++++++++++++++++++------- ichspi.c | 11 +++----- programmer.h | 2 +- 3 files changed, 75 insertions(+), 18 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 936d7b8..0974427 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -6,6 +6,7 @@ * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> * Copyright (C) 2007,2008,2009 Carl-Daniel Hailfinger * Copyright (C) 2009 Kontron Modular Computers GmbH + * Copyright (C) 2011, 2012 Stefan Tauner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -508,12 +509,6 @@ static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) return ret; } -static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) -{ - /* Do we really need no write enable? */ - return via_init_spi(dev); -} - static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, enum ich_chipset ich_generation) { @@ -681,16 +676,80 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name) return -1; } - if (dev->device_id == 0x3227) { /* VT8237R */ + if (dev->device_id == 0x3227) { /* VT8237 */ /* All memory cycles, not just ROM ones, go to LPC. */ val = pci_read_byte(dev, 0x59); val &= ~0x80; rpci_write_byte(dev, 0x59, val); } + internal_buses_supported = BUS_LPC | BUS_FWH; return 0; } +static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) +{ + struct pci_dev *south_north = pci_dev_find(0x1106, 0xa353); + if (south_north == NULL) { + msg_perr("Could not find South-North Module Interface Control device!\n"); + return ERROR_FATAL; + } + + msg_pdbg("Strapped to "); + if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) { + msg_pdbg("LPC.\n"); + return enable_flash_vt823x(dev, name); + } + msg_pdbg("SPI.\n"); + + uint32_t mmio_base; + void *mmio_base_physmapped; + uint32_t spi_cntl; + #define SPI_CNTL_LEN 0x08 + uint32_t spi0_mm_base = 0; + switch(dev->device_id) { + case 0x8353: /* VX800/VX820 */ + spi0_mm_base = pci_read_long(dev, 0xbc) << 8; + break; + case 0x8409: /* VX855/VX875 */ + case 0x8410: /* VX900 */ + mmio_base = pci_read_long(dev, 0xbc) << 8; + mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) { + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + + /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; + if ((spi_cntl & 0x01) == 0) { + msg_pdbg ("SPI Bus0 disabled!\n"); + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + /* Offset 1-3 has SPI Bus Memory Map Base Address: */ + spi0_mm_base = spi_cntl & 0xFFFFFF00; + + /* Offset 4 - Bit 0 holds SPI Bus1 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x04; + if ((spi_cntl & 0x01) == 1) + msg_pdbg2("SPI Bus1 is enabled too.\n"); + + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + break; + default: + msg_perr("%s: Unsupported chipset %x:%x!\n", __func__, dev->vendor_id, dev->device_id); + return ERROR_FATAL; + } + + return via_init_spi(dev, spi0_mm_base); +} + +static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) +{ + return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8); +} + static int enable_flash_cs5530(struct pci_dev *dev, const char *name) { uint8_t reg8; @@ -1263,7 +1322,7 @@ const struct penable chipset_enables[] = { {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111}, - {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, + {0x1106, 0x3074, OK, "VIA", "VT8233/VT8237R", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, @@ -1271,8 +1330,9 @@ const struct penable chipset_enables[] = { {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, - {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, + {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, + {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, + {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, diff --git a/ichspi.c b/ichspi.c index 0223ae3..44d659b 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1844,19 +1844,16 @@ static const struct spi_programmer spi_programmer_via = { .write_aai = default_spi_write_aai, }; -int via_init_spi(struct pci_dev *dev) +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) { - uint32_t mmio_base; int i; - mmio_base = (pci_read_long(dev, 0xbc)) << 8; - msg_pdbg("MMIO base at = 0x%x\n", mmio_base); - ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); + ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ - /* Not sure if it speaks all these bus protocols. */ - internal_buses_supported = BUS_LPC | BUS_FWH; ich_generation = CHIPSET_ICH7; register_spi_programmer(&spi_programmer_via); + internal_buses_supported = BUS_SPI; msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2)); diff --git a/programmer.h b/programmer.h index 5109ed9..ec29ed8 100644 --- a/programmer.h +++ b/programmer.h @@ -561,7 +561,7 @@ enum ich_chipset { extern uint32_t ichspi_bbar; int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, enum ich_chipset ich_generation); -int via_init_spi(struct pci_dev *dev); +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); /* it85spi.c */ int it85xx_spi_init(struct superio s); -- Kind regards, Stefan Tauner

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Tagging flashrom 0.9.6
by Carl-Daniel Hailfinger 31 Jul '12

31 Jul '12

I plan to tag and release flashrom 0.9.6 Real Soon Now (tm). If you need anything merged, tell me NOW. flashrom svn HEAD doesn't have any known regressions compared to 0.9.5, so it seems stable enough to ship. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH] remove exit calls from sp_docommand
by Niklas Söderlund 30 Jul '12

30 Jul '12

Adapted two callers to handle return codes instead of relying on the exit call. Rest of upstream callers are prepared to handle return values. Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- serprog.c | 34 ++++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/serprog.c b/serprog.c index f03d332..aac10af 100644 --- a/serprog.c +++ b/serprog.c @@ -246,17 +246,23 @@ static int sp_docommand(uint8_t command, uint32_t parmlen, unsigned char c; if (sp_automatic_cmdcheck(command)) return 1; - if (write(sp_fd, &command, 1) != 1) - sp_die("Error: cannot write op code"); - if (write(sp_fd, params, parmlen) != (parmlen)) - sp_die("Error: cannot write parameters"); - if (read(sp_fd, &c, 1) != 1) - sp_die("Error: cannot read from device"); + if (write(sp_fd, &command, 1) != 1) { + msg_perr("Error: cannot write op code: %s\n", strerror(errno)); + return 1; + } + if (write(sp_fd, params, parmlen) != (parmlen)) { + msg_perr("Error: cannot write parameters: %s\n", strerror(errno)); + return 1; + } + if (read(sp_fd, &c, 1) != 1) { + msg_perr("Error: cannot read from device: %s\n", strerror(errno)); + return 1; + } if (c == S_NAK) return 1; if (c != S_ACK) { - msg_perr("Error: invalid response 0x%02X from device\n",c); - exit(1); + msg_perr("Error: invalid response 0x%02X from device\n", c); + return 1; } if (retlen) { int rd_bytes = 0; @@ -264,8 +270,10 @@ static int sp_docommand(uint8_t command, uint32_t parmlen, int r; r = read(sp_fd, retparms + rd_bytes, retlen - rd_bytes); - if (r <= 0) - sp_die("Error: cannot read return parameters"); + if (r <= 0) { + msg_perr("Error: cannot read return parameters: %s\n", strerror(errno)); + return 1; + } rd_bytes += r; } while (rd_bytes != retlen); } @@ -491,7 +499,8 @@ int serprog_init(void) the programmer to tell us its limits, but if it doesn't, we will assume stuff, so it's in the programmers best interest to tell us. */ - sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL); + if (sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL)) + return 1; if (!sp_docommand(S_CMD_Q_WRNMAXLEN, 0, NULL, 3, rbuf)) { uint32_t v; v = ((unsigned int)(rbuf[0]) << 0); @@ -513,7 +522,8 @@ int serprog_init(void) msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", v); } bt = serprog_buses_supported; - sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL); + if (sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL)) + return 1; } if (serprog_buses_supported & BUS_NONSPI) { -- 1.7.10.3

2 1

[PATCH] remove exit calls from sp_openserport
by Niklas Söderlund 30 Jul '12

30 Jul '12

Instead: - Print same error message as before but use msg_perr instead of perror - Return -1 instead of calling exit(1) All callers of sp_openserport where able to handle this change without much trouble. There already where other error cases that where taken care of, so adding one more will not change behavior of there callers. Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- buspirate_spi.c | 2 ++ pony_spi.c | 3 ++- serial.c | 32 +++++++++++++++++++++++--------- serprog.c | 3 ++- 4 files changed, 29 insertions(+), 11 deletions(-) diff --git a/buspirate_spi.c b/buspirate_spi.c index f816afd..f18538a 100644 --- a/buspirate_spi.c +++ b/buspirate_spi.c @@ -39,6 +39,8 @@ static int buspirate_serialport_setup(char *dev) { /* 115200bps, 8 databits, no parity, 1 stopbit */ sp_fd = sp_openserport(dev, 115200); + if (sp_fd < 0) + return 1; return 0; } #else diff --git a/pony_spi.c b/pony_spi.c index b5dfc2f..3a413c7 100644 --- a/pony_spi.c +++ b/pony_spi.c @@ -99,7 +99,8 @@ int pony_spi_init(void) if (arg && strlen(arg)) { sp_fd = sp_openserport( arg, 9600 ); - have_device++; + if (sp_fd >= 0) + have_device++; } free(arg); diff --git a/serial.c b/serial.c index 0a56568..32d7e6a 100644 --- a/serial.c +++ b/serial.c @@ -113,8 +113,10 @@ fdtype sp_openserport(char *dev, unsigned int baud) (tolower((unsigned char)dev[1]) == 'o') && (tolower((unsigned char)dev[2]) == 'm')) { dev2 = malloc(strlen(dev) + 5); - if (!dev2) - sp_die("Error: Out of memory"); + if (!dev2) { + msg_perr("Error: Out of memory: %s\n", strerror(errno)); + return -1; + } strcpy(dev2, "\\\\.\\"); strcpy(dev2 + 4, dev); } @@ -123,33 +125,45 @@ fdtype sp_openserport(char *dev, unsigned int baud) if (dev2 != dev) free(dev2); if (fd == INVALID_HANDLE_VALUE) { - sp_die("Error: cannot open serial port"); + msg_perr("Error: cannot open serial port: %s\n", + strerror(errno)); + return -1; } DCB dcb; if (!GetCommState(fd, &dcb)) { - sp_die("Error: Could not fetch serial port configuration"); + msg_perr("Error: Could not fetch serial port configuration: %s\n", + strerror(errno)); + return -1; } + switch (baud) { case 9600: dcb.BaudRate = CBR_9600; break; case 19200: dcb.BaudRate = CBR_19200; break; case 38400: dcb.BaudRate = CBR_38400; break; case 57600: dcb.BaudRate = CBR_57600; break; case 115200: dcb.BaudRate = CBR_115200; break; - default: sp_die("Error: Could not set baud rate"); + default: msg_perr("Error: Could not set baud rate: %s\n", + strerror(errno)); + return -1; } dcb.ByteSize = 8; dcb.Parity = NOPARITY; dcb.StopBits = ONESTOPBIT; if (!SetCommState(fd, &dcb)) { - sp_die("Error: Could not change serial port configuration"); + msg_perr("Error: Could not change serial port configuration: %s\n", + strerror(errno)); + return -1; } return fd; #else struct termios options; int fd, i; fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); - if (fd < 0) - sp_die("Error: cannot open serial port"); + if (fd < 0) { + msg_perr("Error: cannot open serial port: %s\n", + strerror(errno)); + return -1; + } fcntl(fd, F_SETFL, 0); tcgetattr(fd, &options); for (i = 0;; i++) { @@ -157,7 +171,7 @@ fdtype sp_openserport(char *dev, unsigned int baud) close(fd); msg_perr("Error: cannot configure for baudrate %d\n", baud); - exit(1); + return -1; } if (sp_baudtable[i].baud == baud) { cfsetispeed(&options, sp_baudtable[i].flag); diff --git a/serprog.c b/serprog.c index 65539a1..baa1eab 100644 --- a/serprog.c +++ b/serprog.c @@ -361,7 +361,8 @@ int serprog_init(void) } if (strlen(device)) { sp_fd = sp_openserport(device, atoi(baudport)); - have_device++; + if (sp_fd >= 0) + have_device++; } } if (device && !strlen(device)) { -- 1.7.10.2

2 2

[PATCH] remove exit calls from sp_opensocket
by Niklas Söderlund 30 Jul '12

30 Jul '12

Replace with return statements and adopt the only upstream caller which in turn all plumbing is place for Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- serprog.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/serprog.c b/serprog.c index d06fb0b..02996ea 100644 --- a/serprog.c +++ b/serprog.c @@ -110,20 +110,25 @@ static int sp_opensocket(char *ip, unsigned int port) int sock; msg_pdbg(MSGHEADER "IP %s port %d\n", ip, port); sock = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP); - if (sock < 0) - sp_die("Error: serprog cannot open socket"); + if (sock < 0) { + msg_perr("Error: serprog cannot open socket: %s\n", strerror(errno)); + return -1; + } hostPtr = gethostbyname(ip); if (NULL == hostPtr) { hostPtr = gethostbyaddr(ip, strlen(ip), AF_INET); - if (NULL == hostPtr) - sp_die("Error: cannot resolve"); + if (NULL == hostPtr) { + msg_perr("Error: cannot resolve: %s\n", strerror(errno)); + return -1; + } } sp.si.sin_family = AF_INET; sp.si.sin_port = htons(port); (void)memcpy(&sp.si.sin_addr, hostPtr->h_addr, hostPtr->h_length); if (connect(sock, &sp.s, sizeof(sp.si)) < 0) { close(sock); - sp_die("Error: serprog cannot connect"); + msg_perr("Error: serprog cannot connect: %s\n", strerror(errno)); + return -1; } /* We are latency limited, and sometimes do write-write-read * * (write-n) - so enable TCP_NODELAY. */ @@ -398,6 +403,10 @@ int serprog_init(void) } if (strlen(device)) { sp_fd = sp_opensocket(device, atoi(baudport)); + if (sp_fd < 0) { + free(device); + return 1; + } have_device++; } } -- 1.7.10.3

2 1

Re: [flashrom] [PATCH] remove exit call from internal_init
by Stefan Tauner 30 Jul '12

30 Jul '12

On Wed, 30 May 2012 12:24:19 -0700 David Hendricks <dhendrix(a)google.com> wrote: > This seems trivial, as internal_init() already does the right thing when a > return value is used here. indeed. thanks niklas! i have applied it in r1557. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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