- flashrom - mail.coreboot.org

[commit] r1582 - trunk
by repository service 26 Aug '12

26 Aug '12

Author: stefanct Date: Sun Aug 26 04:35:13 2012 New Revision: 1582 URL: http://flashrom.org/trac/flashrom/changeset/1582 Log: Clean up enable_flash_ich and attempt to disable SMM write protection. This is based on chromiumos commit a5f4e82c59d6bcaf06b94623e5516d1db8cb843a. http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… See also http://www.flashrom.org/pipermail/flashrom/2011-November/008191.html Besides disabling the SMM protection this also fixes something that bothered me for a long time: the content of BIOS_CNTL was shown before we try to modify it. This is usually not what interests us and contradicts other outputs. With this patch we try to set the write enable and disable the SMM protection first and show the state of BIOS_CNTL afterwards. We now return an error only if the write enable is not set (which should be equivalent to the previous behavior on sane hardware, but it seems to be 'more correct' and makes the code clearer to do this explicitly). Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Aug 25 05:53:12 2012 (r1581) +++ trunk/chipset_enable.c Sun Aug 26 04:35:13 2012 (r1582) @@ -281,22 +281,15 @@ * See ie. page 375 of "Intel I/O Controller Hub 7 (ICH7) Family Datasheet" * http://download.intel.com/design/chipsets/datashts/30701303.pdf */ -static int enable_flash_ich(struct pci_dev *dev, const char *name, - int bios_cntl) +static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_cntl) { uint8_t old, new, wanted; /* - * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, but + * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Tunnel Creek it is even 32b, but * just treating it as 8 bit wide seems to work fine in practice. */ - old = pci_read_byte(dev, bios_cntl); - - msg_pdbg("\nBIOS Lock Enable: %sabled, ", - (old & (1 << 1)) ? "en" : "dis"); - msg_pdbg("BIOS Write Enable: %sabled, ", - (old & (1 << 0)) ? "en" : "dis"); - msg_pdbg("BIOS_CNTL is 0x%x\n", old); + wanted = old = pci_read_byte(dev, bios_cntl); /* * Quote from the 6 Series datasheet (Document Number: 324645-004): @@ -304,22 +297,36 @@ * 1 = BIOS region SMM protection is enabled. * The BIOS Region is not writable unless all processors are in SMM." * In earlier chipsets this bit is reserved. + * + * Try to unset it in any case. + * It won't hurt and makes sense in some cases according to Stefan Reinauer. */ - if (old & (1 << 5)) + wanted &= ~(1 << 5); + + /* Set BIOS Write Enable */ + wanted |= (1 << 0); + + /* Only write the register if it's necessary */ + if (wanted != old) { + rpci_write_byte(dev, bios_cntl, wanted); + new = pci_read_byte(dev, bios_cntl); + } else + new = old; + + msg_pdbg("\nBIOS_CNTL = 0x%02x: ", new); + msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); + msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); + if (new & (1 << 5)) msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); - wanted = old | 1; - if (wanted == old) - return 0; - - rpci_write_byte(dev, bios_cntl, wanted); - - if ((new = pci_read_byte(dev, bios_cntl)) != wanted) { - msg_pinfo("WARNING: Setting 0x%x from 0x%x to 0x%x on %s " - "failed. New value is 0x%x.\n", - bios_cntl, old, wanted, name, new); + + if (new != wanted) + msg_pinfo("WARNING: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" + "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); + + /* Return an error if we could not set the write enable */ + if (!(new & (1 << 0))) return -1; - } return 0; }

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Re: [flashrom] [PATCH 1/3] Resort SPI function in chipdrivers.h.
by Carl-Daniel Hailfinger 26 Aug '12

26 Aug '12

Am 25.08.2012 22:35 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH 3/3] Add support for generic SPI RES matching.
by Stefan Tauner 25 Aug '12

25 Aug '12

Support generic 1-byte SPI RES matching (low match quality). Support generic 2-byte SPI RES matching (high match quality). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipdrivers.h | 2 + flashchips.c | 31 +++++++++++++++ flashrom.c | 4 +- sfdp.c | 48 +---------------------- spi25.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++++++------ 5 files changed, 143 insertions(+), 59 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 56a4c8a..c4b798a 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -37,6 +37,7 @@ int probe_spi_rdid4(struct flashctx *flash); int probe_spi_rems(struct flashctx *flash); int probe_spi_res1(struct flashctx *flash); int probe_spi_res2(struct flashctx *flash); +int probe_spi_automagic_res1(struct flashctx *flash); int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -46,6 +47,7 @@ int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); +int spi_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); diff --git a/flashchips.c b/flashchips.c index 789f17f..4b78f7f 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9673,5 +9673,36 @@ const struct flashchip flashchips[] = { .write = NULL, }, + { + .vendor = "Generic", + .name = "unknown SPI chip (RES2)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res2, + .write = NULL, + }, + + { + .vendor = "Generic", + .name = "unknown SPI chip (RES1)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_automagic_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = spi_disable_blockprotect, + .write = NULL, + .read = spi_chip_read, + .voltage = {}, + }, + { NULL } }; diff --git a/flashrom.c b/flashrom.c index 44a3eba..c39abf6 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1029,7 +1029,9 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct if (startchip == 0) break; /* Not the first flash chip detected on this bus, but not a generic match either. */ - if ((flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID)) + if ((flash->chip->manufacture_id != GENERIC_MANUF_ID) && + (flash->chip->model_id != GENERIC_DEVICE_ID) && + (flash->chip->model_id != SFDP_DEVICE_ID)) break; /* Not the first flash chip detected on this bus, and it's just a generic match. Ignore it. */ notfound: diff --git a/sfdp.c b/sfdp.c index bc69dd0..1d3669c 100644 --- a/sfdp.c +++ b/sfdp.c @@ -81,50 +81,6 @@ struct sfdp_tbl_hdr { uint32_t ptp; /* 24b pointer */ }; -static int sfdp_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size) -{ - int i; - uint32_t total_size = chip->total_size * 1024; - erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode); - - if (erasefn == NULL || total_size == 0 || block_size == 0 || - total_size % block_size != 0) { - msg_cdbg("%s: invalid input, please report to " - "flashrom(a)flashrom.org\n", __func__); - return 1; - } - - for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { - struct block_eraser *eraser = &chip->block_erasers[i]; - /* Check for duplicates (including (some) non-uniform ones). */ - if (eraser->eraseblocks[0].size == block_size && - eraser->block_erase == erasefn) { - msg_cdbg2(" Tried to add a duplicate block eraser: " - "%d x %d B with opcode 0x%02x.\n", - total_size/block_size, block_size, opcode); - return 1; - } - if (eraser->eraseblocks[0].size != 0 || - eraser->block_erase != NULL) { - msg_cspew(" Block Eraser %d is already occupied.\n", - i); - continue; - } - - eraser->block_erase = erasefn; - eraser->eraseblocks[0].size = block_size; - eraser->eraseblocks[0].count = total_size/block_size; - msg_cdbg2(" Block eraser %d: %d x %d B with opcode " - "0x%02x\n", i, total_size/block_size, block_size, - opcode); - return 0; - } - msg_cinfo("%s: Not enough space to store another eraser (i=%d)." - " Please report this at flashrom(a)flashrom.org\n", - __func__, i); - return 1; -} - static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len) { uint8_t opcode_4k_erase = 0xFF; @@ -221,7 +177,7 @@ static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len) } if (opcode_4k_erase != 0xFF) - sfdp_add_uniform_eraser(chip, opcode_4k_erase, 4 * 1024); + spi_add_uniform_eraser(chip, opcode_4k_erase, 4 * 1024); /* FIXME: double words 3-7 contain unused fast read information */ @@ -252,7 +208,7 @@ static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len) tmp8 = buf[(4 * 7) + (j * 2) + 1]; msg_cspew(" Erase Sector Type %d Opcode: 0x%02x\n", j + 1, tmp8); - sfdp_add_uniform_eraser(chip, tmp8, block_size); + spi_add_uniform_eraser(chip, tmp8, block_size); } done: diff --git a/spi25.c b/spi25.c index 914b821..9ea04ef 100644 --- a/spi25.c +++ b/spi25.c @@ -22,6 +22,7 @@ * Contains the common SPI chip driver functions */ +#include <stdio.h> #include <string.h> #include "flash.h" #include "flashchips.h" @@ -232,6 +233,7 @@ int probe_spi_rems(struct flashctx *flash) int probe_spi_res1(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; static const unsigned char allff[] = {0xff, 0xff, 0xff}; static const unsigned char all00[] = {0x00, 0x00, 0x00}; unsigned char readarr[3]; @@ -265,18 +267,23 @@ int probe_spi_res1(struct flashctx *flash) msg_cdbg("%s: id 0x%x\n", __func__, id2); - if (id2 != flash->chip->model_id) - return 0; + if (id2 == flash->chip->model_id) { + /* Print the status register to tell the user about possible write protection. */ + spi_prettyprint_status_register(flash); - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; + return 1; + } + + /* Test if there is any device ID. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id2 == chip->model_id) + return 1; + + return 0; } int probe_spi_res2(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; unsigned char readarr[2]; uint32_t id1, id2; @@ -289,13 +296,55 @@ int probe_spi_res2(struct flashctx *flash) msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) + if (id1 == chip->manufacture_id && id2 == chip->model_id) { + /* Print the status register to tell the + * user about possible write protection. + */ + spi_prettyprint_status_register(flash); + + return 1; + } + + /* Test if this is a pure vendor match. */ + if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) + return 1; + + /* Test if there is any vendor ID and if this is indeed a two-byte RES. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != id2) + return 1; + + return 0; +} + +int probe_spi_automagic_res1(struct flashctx *flash) +{ + unsigned char readarr[1]; + unsigned int total_size; + + if (spi_res(flash, readarr, 1)) return 0; - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); + msg_cdbg("%s: id1 0x%x\n", __func__, readarr[0]); + if (readarr[0] < 0x10 || readarr[0] > 0x17) { + msg_cdbg("RES ID out of bounds: 0x%x\n", readarr[0]); + return 0; + } + total_size = (2 << readarr[0]) / 1024; + + //if (!force) { + //blablabla + //return 0; + //} + flash->chip->total_size = total_size; + + spi_add_uniform_eraser(flash->chip, 0x60, total_size * 1024); + spi_add_uniform_eraser(flash->chip, 0xc7, total_size * 1024); + /* This does not help users of locked-down thinkpads because there is only the 0xd8 erase op available. + * But since that one is used with various erase block sizes (non-uniform, 4k, 32k, 64k, 256k), we + * can not just add that too. */ + // gather (uniform) 0xd8 block size from command line argument? + flash->chip->write = spi_chip_write_1; + flash->chip->tested = TEST_OK_PREW; return 1; } @@ -748,6 +797,50 @@ erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) } } +int spi_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size) +{ + int i; + uint32_t total_size = chip->total_size * 1024; + erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode); + + if (erasefn == NULL || total_size == 0 || block_size == 0 || + total_size % block_size != 0) { + msg_cdbg("%s: invalid input, please report to " + "flashrom(a)flashrom.org\n", __func__); + return 1; + } + + for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { + struct block_eraser *eraser = &chip->block_erasers[i]; + /* Check for duplicates (including (some) non-uniform ones). */ + if (eraser->eraseblocks[0].size == block_size && + eraser->block_erase == erasefn) { + msg_cdbg2(" Tried to add a duplicate block eraser: " + "%d x %d B with opcode 0x%02x.\n", + total_size/block_size, block_size, opcode); + return 1; + } + if (eraser->eraseblocks[0].size != 0 || + eraser->block_erase != NULL) { + msg_cspew(" Block Eraser %d is already occupied.\n", + i); + continue; + } + + eraser->block_erase = erasefn; + eraser->eraseblocks[0].size = block_size; + eraser->eraseblocks[0].count = total_size/block_size; + msg_cdbg2(" Block eraser %d: %d x %d B with opcode " + "0x%02x\n", i, total_size/block_size, block_size, + opcode); + return 0; + } + msg_cinfo("%s: Not enough space to store another eraser (i=%d)." + " Please report this at flashrom(a)flashrom.org\n", + __func__, i); + return 1; +} + int spi_write_status_enable(struct flashctx *flash) { static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; -- Kind regards, Stefan Tauner

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[PATCH 2/3] Add RES/REMS support to all dummyflasher emulated chips.
by Stefan Tauner 25 Aug '12

25 Aug '12

Also, fix a few odd corner cases in RES/REMS support in dummyflasher emulation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- dummyflasher.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 47 insertions(+), 10 deletions(-) diff --git a/dummyflasher.c b/dummyflasher.c index 66d0df0..2803f76 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -493,6 +493,9 @@ static int emulate_spi_chip_response(unsigned int writecnt, { unsigned int offs, i, toread; static int unsigned aai_offs; + const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; + const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; + const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16}; if (writecnt == 0) { msg_perr("No command sent to the chip!\n"); @@ -529,20 +532,54 @@ static int emulate_spi_chip_response(unsigned int writecnt, switch (writearr[0]) { case JEDEC_RES: - if (emu_chip != EMULATE_ST_M25P10_RES) + if (writecnt < JEDEC_RES_OUTSIZE) break; - /* Respond with ST_M25P10_RES. */ - if (readcnt > 0) - readarr[0] = 0x10; + /* offs calculation is only needed for SST chips which treat RES like REMS. */ + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_ST_M25P10_RES: + if (readcnt > 0) + memset(readarr, 0x10, readcnt); + break; + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + if (readcnt > 0) + memset(readarr, 0x16, readcnt); + break; + default: /* ignore */ + break; + } break; case JEDEC_REMS: - if (emu_chip != EMULATE_SST_SST25VF040_REMS) + /* REMS response has wraparound and uses an address parameter. */ + if (writecnt < JEDEC_REMS_OUTSIZE) break; - /* Respond with SST_SST25VF040_REMS. */ - if (readcnt > 0) - readarr[0] = 0xbf; - if (readcnt > 1) - readarr[1] = 0x44; + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + for (i = 0; i < readcnt; i++) + readarr[i] = mx25l6436_rems_response[(offs + i) % 2]; + break; + default: /* ignore */ + break; + } break; case JEDEC_RDID: switch (emu_chip) { -- Kind regards, Stefan Tauner

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[PATCH 1/3] Resort SPI function in chipdrivers.h.
by Stefan Tauner 25 Aug '12

25 Aug '12

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipdrivers.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 0c78b0d..56a4c8a 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -27,7 +27,11 @@ #include "flash.h" /* for chipaddr and flashctx */ -/* spi.c, should probably be in spi_chip.c */ +/* spi.c */ +int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); +int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +/* spi25.c */ int probe_spi_rdid(struct flashctx *flash); int probe_spi_rdid4(struct flashctx *flash); int probe_spi_rems(struct flashctx *flash); @@ -43,8 +47,6 @@ int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); @@ -57,7 +59,6 @@ int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); -int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); -- Kind regards, Stefan Tauner

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[PATCH] Add support for generic SPI RES matching
by Carl-Daniel Hailfinger 25 Aug '12

25 Aug '12

Support generic 1-byte SPI RES matching (low match quality). Support generic 2-byte SPI RES matching (high match quality). Add RES/REMS support to all dummyflasher emulated chips as a test case. Fix a few odd corner cases in RES/REMS support in dummyflasher emulation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_res_generic_chips/dummyflasher.c =================================================================== --- flashrom-spi_res_generic_chips/dummyflasher.c (Revision 1579) +++ flashrom-spi_res_generic_chips/dummyflasher.c (Arbeitskopie) @@ -493,6 +493,9 @@ { unsigned int offs, i, toread; static int unsigned aai_offs; + const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; + const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; + const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16}; if (writecnt == 0) { msg_perr("No command sent to the chip!\n"); @@ -529,20 +532,54 @@ switch (writearr[0]) { case JEDEC_RES: - if (emu_chip != EMULATE_ST_M25P10_RES) + if (writecnt < JEDEC_RES_OUTSIZE) break; - /* Respond with ST_M25P10_RES. */ - if (readcnt > 0) - readarr[0] = 0x10; + /* offs calculation is only needed for SST chips which treat RES like REMS. */ + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_ST_M25P10_RES: + if (readcnt > 0) + memset(readarr, 0x10, readcnt); + break; + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + if (readcnt > 0) + memset(readarr, 0x16, readcnt); + break; + default: /* ignore */ + break; + } break; case JEDEC_REMS: - if (emu_chip != EMULATE_SST_SST25VF040_REMS) + /* REMS response has wraparound and uses an address parameter. */ + if (writecnt < JEDEC_REMS_OUTSIZE) break; - /* Respond with SST_SST25VF040_REMS. */ - if (readcnt > 0) - readarr[0] = 0xbf; - if (readcnt > 1) - readarr[1] = 0x44; + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + for (i = 0; i < readcnt; i++) + readarr[i] = mx25l6436_rems_response[(offs + i) % 2]; + break; + default: /* ignore */ + break; + } break; case JEDEC_RDID: switch (emu_chip) { Index: flashrom-spi_res_generic_chips/spi25.c =================================================================== --- flashrom-spi_res_generic_chips/spi25.c (Revision 1579) +++ flashrom-spi_res_generic_chips/spi25.c (Arbeitskopie) @@ -232,6 +232,7 @@ int probe_spi_res1(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; static const unsigned char allff[] = {0xff, 0xff, 0xff}; static const unsigned char all00[] = {0x00, 0x00, 0x00}; unsigned char readarr[3]; @@ -265,18 +266,23 @@ msg_cdbg("%s: id 0x%x\n", __func__, id2); - if (id2 != flash->chip->model_id) - return 0; + if (id2 == flash->chip->model_id) { + /* Print the status register to tell the user about possible write protection. */ + spi_prettyprint_status_register(flash); - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; + return 1; + } + + /* Test if there is any device ID. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id2 != 0xff) + return 1; + + return 0; } int probe_spi_res2(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; unsigned char readarr[2]; uint32_t id1, id2; @@ -289,14 +295,24 @@ msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) - return 0; + if (id1 == chip->manufacture_id && id2 == chip->model_id) { + /* Print the status register to tell the + * user about possible write protection. + */ + spi_prettyprint_status_register(flash); - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; + return 1; + } + + /* Test if this is a pure vendor match. */ + if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) + return 1; + + /* Test if there is any vendor ID and if this is indeed a two-byte RES. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != id2) + return 1; + + return 0; } uint8_t spi_read_status_register(struct flashctx *flash) Index: flashrom-spi_res_generic_chips/flashchips.c =================================================================== --- flashrom-spi_res_generic_chips/flashchips.c (Revision 1579) +++ flashrom-spi_res_generic_chips/flashchips.c (Arbeitskopie) @@ -9673,5 +9673,162 @@ .write = NULL, }, + { + .vendor = "Generic", + .name = "unknown SPI chip (RES2)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res2, + .write = NULL, + }, + + { + .vendor = "Generic", + .name = "unknown 128 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_128K, + .total_size = 128, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 256 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_256K, + .total_size = 256, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 512 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_512K, + .total_size = 512, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 1024 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_1024K, + .total_size = 1024, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 2048 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_2048K, + .total_size = 2048, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 4096 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_4096K, + .total_size = 4096, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 8192 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_8192K, + .total_size = 8192, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 16384 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_16384K, + .total_size = 16384, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + { NULL } }; Index: flashrom-spi_res_generic_chips/flashchips.h =================================================================== --- flashrom-spi_res_generic_chips/flashchips.h (Revision 1579) +++ flashrom-spi_res_generic_chips/flashchips.h (Arbeitskopie) @@ -39,6 +39,14 @@ #define SFDP_DEVICE_ID 0xFFFE #define PROGMANUF_ID 0xFFFE /* dummy ID for opaque chips behind a programmer */ #define PROGDEV_ID 0x01 /* dummy ID for opaque chips behind a programmer */ +#define GENERIC_SPI_RES_128K 0x10 /* SPI RES response for 128 kByte chip */ +#define GENERIC_SPI_RES_256K 0x11 +#define GENERIC_SPI_RES_512K 0x12 +#define GENERIC_SPI_RES_1024K 0x13 +#define GENERIC_SPI_RES_2048K 0x14 +#define GENERIC_SPI_RES_4096K 0x15 +#define GENERIC_SPI_RES_8192K 0x16 +#define GENERIC_SPI_RES_16384K 0x17 #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define ALLIANCE_AS29F002B 0x34 Index: flashrom-spi_res_generic_chips/flashrom.c =================================================================== --- flashrom-spi_res_generic_chips/flashrom.c (Revision 1579) +++ flashrom-spi_res_generic_chips/flashrom.c (Arbeitskopie) @@ -1029,7 +1029,8 @@ if (startchip == 0) break; /* Not the first flash chip detected on this bus, but not a generic match either. */ - if ((flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID)) + if ((flash->chip->manufacture_id != GENERIC_MANUF_ID) && + (flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID)) break; /* Not the first flash chip detected on this bus, and it's just a generic match. Ignore it. */ notfound: -- http://www.hailfinger.org/

2 1

rtl8169 support - Final
by Jon Shadow 25 Aug '12

25 Aug '12

Fixed a few things. Still need someone to test it. Signed-off-by: Sergey Lichack <shadowpilot34(a)gmail.com>

4 3

flashrom -V
by Jan Joosten 25 Aug '12

25 Aug '12

Dear programmers, Please find below the output of flashrom -V as requested. I do not have more information than the information below. I just installed flasrom from the OpenSuse 12 repositories. Assume it is the latest version. Keep up the good word! Regards Jan Joosten flashrom v0.9.4-r1457 on Linux 3.1.10-1.16-desktop (x86_64), built with libpci 3.1.7, GCC 4.6.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 367M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 1002 us, 10000 myus = 10004 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "V-M2NC61P" DMI string baseboard-version: "Rev x.xx" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8712 on port 0x2e Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544. SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Super I/O ID 0x8712 is not on the list of flash capable controllers. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Chip status register is 00 Found Eon flash chip "EN25F80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0x1c, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0x1c, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0x1c, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0x1c, id2 0x13 Found Eon flash chip "EN25F80" (1024 kB, SPI). No operations were specified.

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Support for IBM/Lenovo Thinkpad T60 Flash
by Joerg Mayer 25 Aug '12

25 Aug '12

Hello, some time (> 1 year?) ago I asked on flashrom about support for the T60 and the attached patch was sent as part of the answer. The other part of the answer was that whoever sent this patch was not happy with it. Unfortunately I didn't keep the mail(s) and have forgotten the reason for this. Google also didn't really help. What I found was a similar but not identical mail on coreboot: http://www.coreboot.org/pipermail/coreboot/2010-December/062303.html As the T60 is one of the few Laptop models that are supported by coreboot and I'd like to update to it I have two requests: 1) would someone be willing to update the patch to the current flashrom codebase (I tried this and was able to read, but I don't trust it as the change was done without understanding what the changes did). 2) if possible integrate this into flashrom to make using coreboot easier. 3) (of 2) would it be useful to integrate bucts into flashrom or move it to coreboot/utils/? Thanks Jörg -- Joerg Mayer <jmayer(a)loplof.de> We are stuck with technology when what we really want is just stuff that works. Some say that should read Microsoft instead of technology.

2 1

[PATCH] board enable for DFI AD77
by Tadas Slotkus 25 Aug '12

25 Aug '12

Hello, Thank you people on the IRC for helping with assembler :) Happy Easter!

3 5

[commit] r1581 - trunk
by repository service 25 Aug '12

25 Aug '12

Author: stefanct Date: Sat Aug 25 05:53:12 2012 New Revision: 1581 URL: http://flashrom.org/trac/flashrom/changeset/1581 Log: Add untested board enable for DFI AD77. Based on http://patchwork.coreboot.org/patch/2983/ Signed-off-by: Tadas Slotkus <devtadas(a)gmail.com> PCI IDs are generic therefore requiring manual activation. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Aug 25 04:07:20 2012 (r1580) +++ trunk/board_enable.c Sat Aug 25 05:53:12 2012 (r1581) @@ -567,6 +567,7 @@ /* * Suited for: + * - DFI AD77: VIA KT400 + VT8235 + W83697HF * - EPoX EP-8K5A2: VIA KT333 + VT8235 * - Albatron PM266A Pro: VIA P4M266A + VT8235 * - Shuttle AK31 (all versions): VIA KT266 + VT8233 @@ -2376,6 +2377,7 @@ {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e}, {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, + {0x1106, 0x3189, 0x1106, 0x3189, 0x1106, 0x3177, 0x1106, 0x3177, "^AD77", "dfi", "ad77", P3, "DFI", "AD77", 0, NT, w836xx_memw_enable_2e}, {0x10de, 0x03ea, 0x1019, 0x2602, 0x10de, 0x03e0, 0x1019, 0x2602, NULL, NULL, NULL, P3, "Elitegroup", "GeForce6100SM-M", 0, OK, board_ecs_geforce6100sm_m}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, P3, "Elitegroup", "K7VTA3", 256, OK, NULL}, {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, P3, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Aug 25 04:07:20 2012 (r1580) +++ trunk/print.c Sat Aug 25 05:53:12 2012 (r1581) @@ -761,6 +761,7 @@ B("Dell", "PowerEdge 1850", OK, "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL), B("Dell", "Vostro 460", BAD, "http://support.dell.com/support/edocs/systems/vos460/en/index.htm", "Mainboard model is 0Y2MRG. Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("DFI", "855GME-MGF", BAD, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?…", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"), + B("DFI", "AD77", NT, NULL, "Untested board enable."), B("DFI", "Blood-Iron P35 T2RL", OK, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWin…", NULL), B("Elitegroup", "GeForce6100SM-M ", OK, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&M…", NULL), B("Elitegroup", "GF7100PVT-M3 (V1.0)", OK, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&C…", NULL),

1 0

[PATCH] fixup! Remove potential endless loops from satasii.c.
by Stefan Tauner 25 Aug '12

25 Aug '12

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> --- i have not looked at the datasheet... do we still want this in? then ill commit it with the previous patch... or my tested stuff branch? Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- satasii.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/satasii.c b/satasii.c index a68a0c4..18003b8 100644 --- a/satasii.c +++ b/satasii.c @@ -79,6 +79,7 @@ int satasii_init(void) { uint32_t addr; uint16_t reg_offset; + uint32_t tmp; if (rget_io_perms()) return 1; @@ -101,6 +102,13 @@ int satasii_init(void) if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pinfo("Warning: Flash seems unconnected.\n"); + msg_pdbg("Using BAR5 access method.\n"); + tmp = pci_read_long(pcidev_dev, 0x40) & (1 << 1); + msg_pdbg("BAR5 Indirect Access is %sabled\n", tmp ? "en" : "dis"); + /* This bit has contradicting definitions in the 3512 datasheet. */ + tmp = pci_read_long(pcidev_dev, 0x88) & (1 << 16); + msg_pdbg("BAR5 Access is %sabled\n", tmp ? "en" : "dis"); + if (register_shutdown(satasii_shutdown, NULL)) return 1; -- Kind regards, Stefan Tauner

1 0

[PATCH] Make satasii driver more robust
by David Borg 25 Aug '12

25 Aug '12

Sorry, forgot to CC.the list. Updated patch to apply cleanly against latest revision (1151) and changed the string as pointed out by Rudolf Marek. Regards, David >-----BEGIN PGP SIGNED MESSAGE----- >Hash: SHA1 > >Hi thanks for doing that. > >Carl-Daniel Hailfinger wrote: >> Make the satasii driver more robust. >> >> Untested. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2...(a)gmx.net> >> >> Index: flashrom-satasii_robust/satasii.c >> =================================================================== >> --- flashrom-satasii_robust/satasii.c (Revision 1005) >> +++ flashrom-satasii_robust/satasii.c (Arbeitskopie) >> @@ -44,6 +44,7 @@ >> { >> uint32_t addr; >> uint16_t reg_offset; >> + uint32_t tmp; >> >> get_io_perms(); >> >> @@ -59,12 +60,19 @@ >> reg_offset = 0x50; >> } >> >> - sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset; >> + sii_bar = physmap("SATA SiI registers", addr, 0x100) + reg_offset; >> >> /* Check if ROM cycle are OK. */ >> if ((id != 0x0680) && (!(mmio_readl(sii_bar) & (1 << 26)))) >> msg_pinfo("Warning: Flash seems unconnected.\n"); >> >> + msg_pdbg("Using BAR5 access method.\n"); >> + tmp = pci_read_long(pcidev_dev, 0x40) & (1 << 1); >> + msg_pdbg("BAR5 Indirect Access is %snabled\n", tmp ? "en" : "dis"); >> + /* This bit has contradicting definitions in the 3512 datasheet. */ > >this looks strange you get dissnabled or ensabled ;) > >> + tmp = pci_read_long(pcidev_dev, 0x88) & (1 << 16); >> + msg_pdbg("BAR5 Access is %snabled\n", tmp ? "en" : "dis"); > >This Reg is EN_66 in other controllers so I guess it just this and not the >BA5_EN. It looks like it is driven by strap resistor only anyway. > >Interesting would be to test if BA5_EN is not enabled if you can access it >through indirect access through C0/C4 regs. > >Thanks, >Rudolf > > >> + >> buses_supported = CHIP_BUSTYPE_PARALLEL; >> >> return 0; >> @@ -81,6 +89,7 @@ >> void satasii_chip_writeb(uint8_t val, chipaddr addr) >> { >> uint32_t ctrl_reg, data_reg; >> + int i = 0; >> >> while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ; >> >> @@ -92,12 +101,19 @@ >> mmio_writel(data_reg, (sii_bar + 4)); >> mmio_writel(ctrl_reg, sii_bar); >> >> - while (mmio_readl(sii_bar) & (1 << 25)) ; >> + while (mmio_readl(sii_bar) & (1 << 25)) { >> + if (++i > 10000) { >> + msg_perr("%s: control reg stuck at %08x, aborting\n", >> + __func__, mmio_readl(sii_bar)); >> + break; >> + } >> + } >> } >> >> uint8_t satasii_chip_readb(const chipaddr addr) >> { >> uint32_t ctrl_reg; >> + int i = 0; >> >> while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ; >> >> @@ -107,7 +123,13 @@ >> >> mmio_writel(ctrl_reg, sii_bar); >> >> - while (mmio_readl(sii_bar) & (1 << 25)) ; >> + while (mmio_readl(sii_bar) & (1 << 25)) { >> + if (++i > 10000) { >> + msg_perr("%s: control reg stuck at %08x, aborting\n", >> + __func__, mmio_readl(sii_bar)); >> + break; >> + } >> + } >> >> return (mmio_readl(sii_bar + 4)) & 0xff; >> } >> >> >-----BEGIN PGP SIGNATURE----- >Version: GnuPG v1.4.10 (GNU/Linux) >Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org > >iEYEARECAAYFAkv4VwUACgkQ3J9wPJqZRNU4BQCfYmc1fp2kmy5SjQHjirrsKP82 >enkAoKQLbvmaCGs6/qNfawamobV7RayX >=7NEj >-----END PGP SIGNATURE----- > -- David Borg

2 1

[commit] r1580 - trunk
by repository service 25 Aug '12

25 Aug '12

Author: stefanct Date: Sat Aug 25 04:07:20 2012 New Revision: 1580 URL: http://flashrom.org/trac/flashrom/changeset/1580 Log: Clean up satasii.c. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/satasii.c Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Sat Aug 25 03:17:58 2012 (r1579) +++ trunk/satasii.c Sat Aug 25 04:07:20 2012 (r1580) @@ -20,8 +20,6 @@ /* Datasheets can be found on http://www.siliconimage.com. Great thanks! */ -#include <stdlib.h> -#include "flash.h" #include "programmer.h" #include "hwaccess.h" @@ -29,7 +27,7 @@ #define SATASII_MEMMAP_SIZE 0x100 -uint8_t *sii_bar; +static uint8_t *sii_bar; static uint16_t id; const struct pcidev_status satas_sii[] = { @@ -43,10 +41,8 @@ {}, }; -static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, - chipaddr addr); -static uint8_t satasii_chip_readb(const struct flashctx *flash, - const chipaddr addr); +static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr); static const struct par_programmer par_programmer_satasii = { .chip_readb = satasii_chip_readb, .chip_readw = fallback_chip_readw, @@ -85,8 +81,7 @@ reg_offset = 0x50; } - sii_bar = physmap("SATA SIL registers", addr, SATASII_MEMMAP_SIZE) + - reg_offset; + sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset; /* Check if ROM cycle are OK. */ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) @@ -100,8 +95,7 @@ return 0; } -static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, - chipaddr addr) +static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { uint32_t ctrl_reg, data_reg; @@ -118,8 +112,7 @@ while (pci_mmio_readl(sii_bar) & (1 << 25)) ; } -static uint8_t satasii_chip_readb(const struct flashctx *flash, - const chipaddr addr) +static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr) { uint32_t ctrl_reg;

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Re: [flashrom] [PATCH] Make struct flashchip a field in struct flashctx instead of a complete copy.
by Carl-Daniel Hailfinger 25 Aug '12

25 Aug '12

Am 26.02.2012 02:05 schrieb Stefan Tauner: > This is not tested very thoroughly, but it compiles and writing the dummy works. > Most of the transformation is quite obvious and painless (well, it was no pleasure, > so i would rather not rebase this often. :) > I have introduced dedicated struct flashchip variables where the functions use the > chip field a lot and some of those (not) introduced variables may be debatable, > but one gets at least a feeling how the code would look like with this change. > > One major FIXME is: the code allocates "the new field" while probing and copies > the data from the *const* struct flashchip in the flashchips.c array into it. > We need to free that sometime... it is probably obvious (scope of fill_flash), but i > have not looked into it yet and this is my reminder. I have answered that in annotations. > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Good idea. It was too dangerous to do this directly before 0.9.5, but now that the tree has reopened, I think we can merge such a patch early in the cycle (now) and have enough time to get it tested. > diff --git a/cli_classic.c b/cli_classic.c > index 972043b..4bce7d7 100644 > --- a/cli_classic.c > +++ b/cli_classic.c > @@ -166,6 +166,7 @@ int main(int argc, char *argv[]) > const struct flashchip *flash; > struct flashctx flashes[3]; > struct flashctx *fill_flash; > + const struct flashchip *chip; > const char *name; > int namelen, opt, i, j; > int startchip = -1, chipcount = 0, option_index = 0, force = 0; > @@ -441,11 +442,13 @@ int main(int argc, char *argv[]) > } > } > > + fill_flash = &flashes[0]; Can you move this assignment back to where it was? > + chip = fill_flash->chip; And move this assignment together with the other one? > if (chipcount > 1) { > printf("Multiple flash chips were detected: \"%s\"", > - flashes[0].name); > + chip->name); Can you please use flashes[0].chip->name here to keep the code consistent? Besides that, do you have any idea why the current code is so screwed up? Moving a printf for flashes[0] outside a perfectly working for loop seems odd to me. It would be nice if you could just let the loop below start at i=0 and remove the chip name part from the printf above. > for (i = 1; i < chipcount; i++) > - printf(", \"%s\"", flashes[i].name); > + printf(", \"%s\"", flashes[i].chip->name); > printf("\nPlease specify which chip to use with the " > "-c <chipname> option.\n"); > ret = 1; > @@ -464,7 +467,7 @@ int main(int argc, char *argv[]) > /* This loop just counts compatible controllers. */ > for (j = 0; j < registered_programmer_count; j++) { > pgm = &registered_programmers[j]; > - if (pgm->buses_supported & flashes[0].bustype) > + if (pgm->buses_supported & chip->bustype) flashes[0].chip->bustype please. Note to self: This code needs to be audited again if it should really run against flashes[0] here. It looks odd, at least when looking only at the patch. > compatible_programmers++; > } > if (compatible_programmers > 1) > @@ -491,19 +494,17 @@ int main(int argc, char *argv[]) > goto out_shutdown; > } else if (!chip_to_probe) { > /* repeat for convenience when looking at foreign logs */ > - tempstr = flashbuses_to_text(flashes[0].bustype); > + tempstr = flashbuses_to_text(chip->bustype); > msg_gdbg("Found %s flash chip \"%s\" (%d kB, %s).\n", > - flashes[0].vendor, flashes[0].name, > - flashes[0].total_size, tempstr); > + chip->vendor, chip->name, > + chip->total_size, tempstr); And the flashes[0].chip dance again. > free(tempstr); > } > > - fill_flash = &flashes[0]; > - > - check_chip_supported(fill_flash); > + check_chip_supported(chip); > > - size = fill_flash->total_size * 1024; > - if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->bustype, size) && > + size = chip->total_size * 1024; > + if (check_max_decode(fill_flash->pgm->buses_supported & chip->bustype, size) && > (!force)) { > fprintf(stderr, "Chip is too big for this programmer " > "(-V gives details). Use --force to override.\n"); > diff --git a/flash.h b/flash.h > index 0dac13d..ed64512 100644 > --- a/flash.h > +++ b/flash.h > @@ -87,6 +87,7 @@ enum chipbustype { > #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) > > struct flashctx; > +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen); > > struct flashchip { > const char *vendor; > @@ -135,7 +136,7 @@ struct flashchip { > } eraseblocks[NUM_ERASEREGIONS]; > /* a block_erase function should try to erase one block of size > * 'blocklen' at address 'blockaddr' and return 0 on success. */ > - int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); > + erasefunc_t *block_erase; I really really hate that typedef. I wonder if we could keep the code here and use typeof() instead of the typedef elsewhere. > } block_erasers[NUM_ERASEFUNCTIONS]; > > int (*printlock) (struct flashctx *flash); > @@ -148,35 +149,14 @@ struct flashchip { > } voltage; > }; > > -/* struct flashctx must always contain struct flashchip at the beginning. */ > struct flashctx { > - const char *vendor; > - const char *name; > - enum chipbustype bustype; > - uint32_t manufacture_id; > - uint32_t model_id; > - int total_size; > - int page_size; > - int feature_bits; > - uint32_t tested; > - int (*probe) (struct flashctx *flash); > - int probe_timing; > - struct block_eraser block_erasers[NUM_ERASEFUNCTIONS]; > - int (*printlock) (struct flashctx *flash); > - int (*unlock) (struct flashctx *flash); > - int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); > - int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); > - struct voltage voltage; > - /* struct flashchip ends here. */ > - > + struct flashchip *chip; Yay! > chipaddr virtual_memory; > /* Some flash devices have an additional register space. */ > chipaddr virtual_registers; > struct registered_programmer *pgm; > }; > > -typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen); > - > #define TEST_UNTESTED 0 > > #define TEST_OK_PROBE (1 << 0) > diff --git a/flashrom.c b/flashrom.c > index cad043b..0b6cca3 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -522,7 +522,7 @@ char *extract_programmer_param(const char *param_name) > } > > /* Returns the number of well-defined erasers for a chip. */ > -static unsigned int count_usable_erasers(const struct flashctx *flash) > +static unsigned int count_usable_erasers(const struct flashchip *flash) Do we want to count usable erasers for the current programmer (for chips with erase functions limited to certain buses)? If yes, please keep struct flashctx. > { > unsigned int usable_erasefunctions = 0; > int k; > @@ -941,32 +942,38 @@ int check_max_decode(enum chipbustype buses, uint32_t size) > int probe_flash(struct registered_programmer *pgm, int startchip, > struct flashctx *fill_flash, int force) > { > - const struct flashchip *flash; > + const struct flashchip *chip; > unsigned long base = 0; > char location[64]; > uint32_t size; > enum chipbustype buses_common; > char *tmp; > > - for (flash = flashchips + startchip; flash && flash->name; flash++) { > - if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) > + for (chip = flashchips + startchip; chip && chip->name; chip++) { > + if (chip_to_probe && strcmp(chip->name, chip_to_probe) != 0) > continue; > - buses_common = pgm->buses_supported & flash->bustype; > + buses_common = pgm->buses_supported & chip->bustype; > if (!buses_common) > continue; > msg_gdbg("Probing for %s %s, %d kB: ", > - flash->vendor, flash->name, flash->total_size); > - if (!flash->probe && !force) { > + chip->vendor, chip->name, chip->total_size); > + if (!chip->probe && !force) { > msg_gdbg("failed! flashrom has no probe function for " > "this flash chip.\n"); > continue; > } > > - size = flash->total_size * 1024; > + size = chip->total_size * 1024; > check_max_decode(buses_common, size); > > /* Start filling in the dynamic data. */ > - memcpy(fill_flash, flash, sizeof(struct flashchip)); > + /* FIXME: when to free? */ Tricky, but I think we are lucky here because there is only one path which returns a non-match and that's the only path where we want to free. I have annotated that place a few hunks below. > + fill_flash->chip = malloc(sizeof(struct flashchip)); > + if (fill_flash->chip == NULL) { > + msg_gerr("%s: out of memory.\n", __func__); > + return -1; Can we return an explicit code for OOM here or would that screw up the caller? > + } > + memcpy(fill_flash->chip, chip, sizeof(struct flashchip)); > fill_flash->pgm = pgm; > > base = flashbase ? flashbase : (0xffffffff - size + 1); > @@ -985,11 +992,11 @@ int probe_flash(struct registered_programmer *pgm, int startchip, > * one for this programmer interface and thus no other chip has > * been found on this interface. > */ > - if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) { > + if (startchip == 0 && chip->model_id == SFDP_DEVICE_ID) { We used fill_flash for consistency (i.e. only use the rw copy of the flashchip entry) here, and if we want to keep that consistency, it's fill_flash->chip->model_id. > msg_cinfo("===\n" > "SFDP has autodetected a flash chip which is " > "not natively supported by flashrom yet.\n"); > - if (count_usable_erasers(fill_flash) == 0) > + if (count_usable_erasers(chip) == 0) See the count_usable_erasers comment a few hunks above. > msg_cinfo("The standard operations read and " > "verify should work, but to support " > "erase, write and all other " > @@ -1010,15 +1017,15 @@ int probe_flash(struct registered_programmer *pgm, int startchip, > } > > if (startchip == 0 || > - ((fill_flash->model_id != GENERIC_DEVICE_ID) && > - (fill_flash->model_id != SFDP_DEVICE_ID))) > + ((chip->model_id != GENERIC_DEVICE_ID) && > + (chip->model_id != SFDP_DEVICE_ID))) See above for fill_flash->chip->model_id. > break; > > notfound: > programmer_unmap_flash_region((void *)fill_flash->virtual_memory, size); > } > > - if (!flash || !flash->name) > + if (!chip || !chip->name) Here you have to free flash->chip. No other freeing is needed AFAICS. > return -1; > > #if CONFIG_INTERNAL == 1 > @@ -1028,27 +1035,27 @@ notfound: > #endif > snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); > > - tmp = flashbuses_to_text(flash->bustype); > + tmp = flashbuses_to_text(chip->bustype); fill_flash->chip->... > msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", > - force ? "Assuming" : "Found", fill_flash->vendor, > - fill_flash->name, fill_flash->total_size, tmp, location); > + force ? "Assuming" : "Found", chip->vendor, > + chip->name, chip->total_size, tmp, location); dito > free(tmp); > > /* Flash registers will not be mapped if the chip was forced. Lock info > * may be stored in registers, so avoid lock info printing. > */ > if (!force) > - if (fill_flash->printlock) > - fill_flash->printlock(fill_flash); > + if (chip->printlock) dito > + chip->printlock(fill_flash); dito > > /* Return position of matching chip. */ > - return flash - flashchips; > + return chip - flashchips; > } > > int verify_flash(struct flashctx *flash, uint8_t *buf) > @@ -1308,7 +1315,7 @@ static int walk_eraseregions(struct flashctx *flash, int erasefunction, > return 0; > } > > -static int check_block_eraser(const struct flashctx *flash, int k, int log) > +static int check_block_eraser(const struct flashchip *flash, int k, int log) No conversion, please. See below. > { > struct block_eraser eraser = flash->block_erasers[k]; > > @@ -1357,7 +1366,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents, > break; > } > msg_cdbg("Trying erase function %i... ", k); > - if (check_block_eraser(flash, k, 1)) > + if (check_block_eraser(chip, k, 1)) This one is debatable. We know that some chips support certain erase functions only on some buses, e.g. Sharp LHF00L04 which can do a full-chip erase only if it is accesses in A/A Mux mode, not in FWH mode. My mid-term plan is to augment erase functions (and possibly also read/write/probe) with a list of valid buses for any given function. > continue; > usable_erasefunctions--; > ret = walk_eraseregions(flash, k, &erase_and_write_block_helper, > @@ -1550,14 +1559,6 @@ int selfcheck(void) > msg_gerr("Flashchips table miscompilation!\n"); > ret = 1; > } > - /* Check that virtual_memory in struct flashctx is placed directly > - * after the members copied from struct flashchip. > - */ > - if (sizeof(struct flashchip) != > - offsetof(struct flashctx, virtual_memory)) { > - msg_gerr("struct flashctx broken!\n"); > - ret = 1; > - } Glad to lose this hunk! > for (flash = flashchips; flash && flash->name; flash++) > if (selfcheck_eraseblocks(flash)) > ret = 1; > @@ -1642,7 +1643,7 @@ void check_chip_supported(const struct flashctx *flash) > /* FIXME: This function signature needs to be improved once doit() has a better > * function signature. > */ > -int chip_safety_check(struct flashctx *flash, int force, int read_it, > +int chip_safety_check(const struct flashchip *flash, int force, int read_it, Can you please make sure that all pointers to struct flashchip are called "chip"? Otherwise grepping for "chip->" won't return all accesses to struct flashchip. The same comment applies to other hunks of the patch as well. However, chip_safety_check can not be converted to a different calling convention because we need struct flashctx here. Admittedly we don't need it right now, but we will need it once programmer_may_write is part of the programmer struct in struct flashctx. > int write_it, int erase_it, int verify_it) > { > if (!programmer_may_write && (write_it || erase_it)) { > @@ -1710,9 +1711,10 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > uint8_t *oldcontents; > uint8_t *newcontents; > int ret = 0; > - unsigned long size = flash->total_size * 1024; > + const struct flashchip *chip = flash->chip; > + unsigned long size = chip->total_size * 1024; > > - if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) { > + if (chip_safety_check(chip, force, read_it, write_it, erase_it, verify_it)) { No conversion, please. See above. > msg_cerr("Aborting.\n"); > ret = 1; > goto out_nofree; > @@ -1791,7 +1793,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > > // This should be moved into each flash part's code to do it > // cleanly. This does the job. > - handle_romentries(flash, oldcontents, newcontents); > + handle_romentries(chip, oldcontents, newcontents); No conversion, please. See two hunks below. > > // //////////////////////////////////////////////////////////// > > diff --git a/jedec.c b/jedec.c > index 69c0c0c..5c549a2 100644 > --- a/jedec.c > +++ b/jedec.c > @@ -93,7 +93,7 @@ void data_polling_jedec(const struct flashctx *flash, chipaddr dst, > msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i); > } > > -static unsigned int getaddrmask(struct flashctx *flash) > +static unsigned int getaddrmask(const struct flashchip *flash) Hm yes, const makes sense. In fact, const makes sense in many more places. > { > switch (flash->feature_bits & FEATURE_ADDR_MASK) { > case FEATURE_ADDR_FULL: > diff --git a/layout.c b/layout.c > index 90d3cce..f0f7a6f 100644 > --- a/layout.c > +++ b/layout.c > @@ -302,7 +302,7 @@ romlayout_t *get_next_included_romentry(unsigned int start) > return best_entry; > } > > -int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) > +int handle_romentries(const struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents) Will we have to change this back once we try to merge the layout patches? In that case, we need some way to get permissible regions from the programmer, and that would probably be done via the programmer struct. > { > unsigned int start = 0; > romlayout_t *entry; > diff --git a/spi25.c b/spi25.c > index b7e8189..2accb6d 100644 > --- a/spi25.c > +++ b/spi25.c > @@ -416,22 +416,23 @@ void spi_prettyprint_status_register_sst25vf040b(uint8_t status) > > int spi_prettyprint_status_register(struct flashctx *flash) > { > + const struct flashchip *chip = flash->chip; const struct flashchip here, but just struct flashchip in the next hunk. What's the reason? Same question applies to other hunks of the patch as well. > uint8_t status; > > status = spi_read_status_register(flash); > msg_cdbg("Chip status register is %02x\n", status); > - switch (flash->manufacture_id) { > + switch (chip->manufacture_id) { > case ST_ID: > - if (((flash->model_id & 0xff00) == 0x2000) || > - ((flash->model_id & 0xff00) == 0x2500)) > + if (((chip->model_id & 0xff00) == 0x2000) || > + ((chip->model_id & 0xff00) == 0x2500)) > spi_prettyprint_status_register_st_m25p(status); > break; > case MACRONIX_ID: > - if ((flash->model_id & 0xff00) == 0x2000) > + if ((chip->model_id & 0xff00) == 0x2000) > spi_prettyprint_status_register_st_m25p(status); > break; > case SST_ID: > - switch (flash->model_id) { > + switch (chip->model_id) { > case 0x2541: > spi_prettyprint_status_register_sst25vf016(status); > break; > @@ -862,16 +863,17 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) > > int spi_write_status_register(struct flashctx *flash, int status) > { > + struct flashchip *chip = flash->chip; > int ret = 1; > > - if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { > + if (!(chip->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { > msg_cdbg("Missing status register write definition, assuming " > "EWSR is needed\n"); > - flash->feature_bits |= FEATURE_WRSR_EWSR; > + chip->feature_bits |= FEATURE_WRSR_EWSR; > } > - if (flash->feature_bits & FEATURE_WRSR_WREN) > + if (chip->feature_bits & FEATURE_WRSR_WREN) > ret = spi_write_status_register_wren(flash, status); > - if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) > + if (ret && (chip->feature_bits & FEATURE_WRSR_EWSR)) > ret = spi_write_status_register_ewsr(flash, status); > return ret; > } I think the next iteration of this patch can go in. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 7

[commit] r1579 - trunk
by repository service 25 Aug '12

25 Aug '12

Author: hailfinger Date: Sat Aug 25 03:17:58 2012 New Revision: 1579 URL: http://flashrom.org/trac/flashrom/changeset/1579 Log: Make struct flashchip a field in struct flashctx instead of a complete copy. All the driver conversion work and cleanup has been done by Stefan. flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/82802ab.c trunk/cli_classic.c trunk/dediprog.c trunk/en29lv640b.c trunk/flash.h trunk/flashrom.c trunk/ichspi.c trunk/it87spi.c trunk/jedec.c trunk/layout.c trunk/m29f400bt.c trunk/pm49fl00x.c trunk/print.c trunk/programmer.h trunk/sfdp.c trunk/spi.c trunk/spi25.c trunk/sst28sf040.c trunk/sst49lfxxxc.c trunk/sst_fwhub.c trunk/stm50flw0x0x.c trunk/w29ee011.c trunk/w39.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/82802ab.c Sat Aug 25 03:17:58 2012 (r1579) @@ -44,7 +44,7 @@ { chipaddr bios = flash->virtual_memory; uint8_t id1, id2, flashcontent1, flashcontent2; - int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) != 0; /* Reset to get a clean state */ chip_writeb(flash, 0xFF, bios); @@ -80,10 +80,10 @@ msg_cdbg(", id2 is normal flash content"); msg_cdbg("\n"); - if (id1 != flash->manufacture_id || id2 != flash->model_id) + if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) return 0; - if (flash->feature_bits & FEATURE_REGISTERMAP) + if (flash->chip->feature_bits & FEATURE_REGISTERMAP) map_flash_registers(flash); return 1; @@ -112,7 +112,7 @@ int i; //chipaddr wrprotect = flash->virtual_registers + page + 2; - for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) + for (i = 0; i < flash->chip->total_size * 1024; i+= flash->chip->page_size) chip_writeb(flash, 0, flash->virtual_registers + i + 2); return 0; @@ -181,7 +181,7 @@ } /* Read block lock-bits */ - for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) { + for (i = 0; i < flash->chip->total_size * 1024; i+= (64 * 1024)) { bcfg = chip_readb(flash, bios + i + 2); // read block lock config msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un"); if (bcfg) { @@ -234,7 +234,7 @@ } /* Read block lock-bits, 8 * 8 KB + 15 * 64 KB */ - for (i = 0; i < flash->total_size * 1024; + for (i = 0; i < flash->chip->total_size * 1024; i += (i >= (64 * 1024) ? 64 * 1024 : 8 * 1024)) { bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */ msg_cdbg("block lock at %06x is %slocked!\n", i, Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/cli_classic.c Sat Aug 25 03:17:58 2012 (r1579) @@ -109,8 +109,8 @@ { unsigned long size; /* Probe for up to three flash chips. */ - const struct flashchip *flash; - struct flashctx flashes[3]; + const struct flashchip *chip = NULL; + struct flashctx flashes[3] = {{0}}; struct flashctx *fill_flash; const char *name; int namelen, opt, i, j; @@ -389,17 +389,16 @@ } /* Does a chip with the requested name exist in the flashchips array? */ if (chip_to_probe) { - for (flash = flashchips; flash && flash->name; flash++) - if (!strcmp(flash->name, chip_to_probe)) + for (chip = flashchips; chip && chip->name; chip++) + if (!strcmp(chip->name, chip_to_probe)) break; - if (!flash || !flash->name) { + if (!chip || !chip->name) { msg_cerr("Error: Unknown chip '%s' specified.\n", chip_to_probe); msg_gerr("Run flashrom -L to view the hardware supported in this flashrom version.\n"); ret = 1; goto out; } - /* Clean up after the check. */ - flash = NULL; + /* Keep chip around for later usage in case a forced read is requested. */ } if (prog == PROGRAMMER_INVALID) { @@ -419,16 +418,13 @@ goto out_shutdown; } tempstr = flashbuses_to_text(get_buses_supported()); - msg_pdbg("The following protocols are supported: %s.\n", - tempstr); + msg_pdbg("The following protocols are supported: %s.\n", tempstr); free(tempstr); for (j = 0; j < registered_programmer_count; j++) { startchip = 0; while (chipcount < ARRAY_SIZE(flashes)) { - startchip = probe_flash(&registered_programmers[j], - startchip, - &flashes[chipcount], 0); + startchip = probe_flash(&registered_programmers[j], startchip, &flashes[chipcount], 0); if (startchip == -1) break; chipcount++; @@ -437,9 +433,9 @@ } if (chipcount > 1) { - msg_cinfo("Multiple flash chips were detected: \"%s\"", flashes[0].name); + msg_cinfo("Multiple flash chips were detected: \"%s\"", flashes[0].chip->name); for (i = 1; i < chipcount; i++) - msg_cinfo(", \"%s\"", flashes[i].name); + msg_cinfo(", \"%s\"", flashes[i].chip->name); msg_cinfo("\nPlease specify which chip to use with the -c <chipname> option.\n"); ret = 1; goto out_shutdown; @@ -456,9 +452,15 @@ /* This loop just counts compatible controllers. */ for (j = 0; j < registered_programmer_count; j++) { pgm = &registered_programmers[j]; - if (pgm->buses_supported & flashes[0].bustype) + /* chip is still set from the chip_to_probe earlier in this function. */ + if (pgm->buses_supported & chip->bustype) compatible_programmers++; } + if (!compatible_programmers) { + msg_cinfo("No compatible controller found for the requested flash chip.\n"); + ret = 1; + goto out_shutdown; + } if (compatible_programmers > 1) msg_cinfo("More than one compatible controller found for the requested flash " "chip, using the first one.\n"); @@ -469,6 +471,7 @@ break; } if (startchip == -1) { + // FIXME: This should never happen! Ask for a bug report? msg_cinfo("Probing for flash chip '%s' failed.\n", chip_to_probe); ret = 1; goto out_shutdown; @@ -481,19 +484,18 @@ goto out_shutdown; } else if (!chip_to_probe) { /* repeat for convenience when looking at foreign logs */ - tempstr = flashbuses_to_text(flashes[0].bustype); + tempstr = flashbuses_to_text(flashes[0].chip->bustype); msg_gdbg("Found %s flash chip \"%s\" (%d kB, %s).\n", - flashes[0].vendor, flashes[0].name, - flashes[0].total_size, tempstr); + flashes[0].chip->vendor, flashes[0].chip->name, flashes[0].chip->total_size, tempstr); free(tempstr); } fill_flash = &flashes[0]; - check_chip_supported(fill_flash); + check_chip_supported(fill_flash->chip); - size = fill_flash->total_size * 1024; - if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->bustype, size) && (!force)) { + size = fill_flash->chip->total_size * 1024; + if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->chip->bustype, size) && (!force)) { msg_cerr("Chip is too big for this programmer (-V gives details). Use --force to override.\n"); ret = 1; goto out_shutdown; Modified: trunk/dediprog.c ============================================================================== --- trunk/dediprog.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/dediprog.c Sat Aug 25 03:17:58 2012 (r1579) @@ -381,7 +381,7 @@ unsigned int start, unsigned int len, uint8_t dedi_spi_cmd) { int ret; - const unsigned int chunksize = flash->page_size; + const unsigned int chunksize = flash->chip->page_size; unsigned int residue = start % chunksize ? chunksize - start % chunksize : 0; unsigned int bulklen; Modified: trunk/en29lv640b.c ============================================================================== --- trunk/en29lv640b.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/en29lv640b.c Sat Aug 25 03:17:58 2012 (r1579) @@ -81,7 +81,7 @@ msg_cdbg("%s: id1 0x%04x, id2 0x%04x\n", __func__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) + if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id) return 1; return 0; @@ -130,7 +130,7 @@ int block_erase_chip_en29lv640b(struct flashctx *flash, unsigned int address, unsigned int blocklen) { - if ((address != 0) || (blocklen != flash->total_size * 1024)) { + if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; } Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/flash.h Sat Aug 25 03:17:58 2012 (r1579) @@ -87,6 +87,7 @@ #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) struct flashctx; +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen); struct flashchip { const char *vendor; @@ -148,35 +149,14 @@ } voltage; }; -/* struct flashctx must always contain struct flashchip at the beginning. */ struct flashctx { - const char *vendor; - const char *name; - enum chipbustype bustype; - uint32_t manufacture_id; - uint32_t model_id; - int total_size; - int page_size; - int feature_bits; - uint32_t tested; - int (*probe) (struct flashctx *flash); - int probe_timing; - struct block_eraser block_erasers[NUM_ERASEFUNCTIONS]; - int (*printlock) (struct flashctx *flash); - int (*unlock) (struct flashctx *flash); - int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); - int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); - struct voltage voltage; - /* struct flashchip ends here. */ - + struct flashchip *chip; chipaddr virtual_memory; /* Some flash devices have an additional register space. */ chipaddr virtual_registers; struct registered_programmer *pgm; }; -typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen); - #define TEST_UNTESTED 0 #define TEST_OK_PROBE (1 << 0) @@ -307,7 +287,7 @@ int register_include_arg(char *name); int process_include_args(void); int read_romlayout(char *name); -int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); +int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); /* spi.c */ struct spi_command { Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/flashrom.c Sat Aug 25 03:17:58 2012 (r1579) @@ -416,7 +416,7 @@ void map_flash_registers(struct flashctx *flash) { - size_t size = flash->total_size * 1024; + size_t size = flash->chip->total_size * 1024; /* Flash registers live 4 MByte below the flash. */ /* FIXME: This is incorrect for nonstandard flashbase. */ flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size); @@ -580,7 +580,7 @@ if (!len) goto out_free; - if (!flash->read) { + if (!flash->chip->read) { msg_cerr("ERROR: flashrom has no read function for this flash chip.\n"); return 1; } @@ -589,17 +589,17 @@ exit(1); } - if (start + len > flash->total_size * 1024) { + if (start + len > flash->chip->total_size * 1024) { msg_gerr("Error: %s called with start 0x%x + len 0x%x >" " total_size 0x%x\n", __func__, start, len, - flash->total_size * 1024); + flash->chip->total_size * 1024); ret = -1; goto out_free; } if (!message) message = "VERIFY"; - ret = flash->read(flash, readbuf, start, len); + ret = flash->chip->read(flash, readbuf, start, len); if (ret) { msg_gerr("Verification impossible because read failed " "at 0x%x (len 0x%x)\n", start, len); @@ -950,44 +950,49 @@ return 1; } -int probe_flash(struct registered_programmer *pgm, int startchip, - struct flashctx *fill_flash, int force) +int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *flash, int force) { - const struct flashchip *flash; + const struct flashchip *chip; unsigned long base = 0; char location[64]; uint32_t size; enum chipbustype buses_common; char *tmp; - for (flash = flashchips + startchip; flash && flash->name; flash++) { - if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) + for (chip = flashchips + startchip; chip && chip->name; chip++) { + if (chip_to_probe && strcmp(chip->name, chip_to_probe) != 0) continue; - buses_common = pgm->buses_supported & flash->bustype; + buses_common = pgm->buses_supported & chip->bustype; if (!buses_common) continue; - msg_gdbg("Probing for %s %s, %d kB: ", - flash->vendor, flash->name, flash->total_size); - if (!flash->probe && !force) { - msg_gdbg("failed! flashrom has no probe function for " - "this flash chip.\n"); + msg_gdbg("Probing for %s %s, %d kB: ", chip->vendor, chip->name, chip->total_size); + if (!chip->probe && !force) { + msg_gdbg("failed! flashrom has no probe function for this flash chip.\n"); continue; } - size = flash->total_size * 1024; + size = chip->total_size * 1024; check_max_decode(buses_common, size); /* Start filling in the dynamic data. */ - memcpy(fill_flash, flash, sizeof(struct flashchip)); - fill_flash->pgm = pgm; + flash->chip = calloc(1, sizeof(struct flashchip)); + if (!flash->chip) { + msg_gerr("Out of memory!\n"); + exit(1); + } + memcpy(flash->chip, chip, sizeof(struct flashchip)); + flash->pgm = pgm; base = flashbase ? flashbase : (0xffffffff - size + 1); - fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size); + flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size); + /* We handle a forced match like a real match, we just avoid probing. Note that probe_flash() + * is only called with force=1 after normal probing failed. + */ if (force) break; - if (fill_flash->probe(fill_flash) != 1) + if (flash->chip->probe(flash) != 1) goto notfound; /* If this is the first chip found, accept it. @@ -997,11 +1002,11 @@ * one for this programmer interface and thus no other chip has * been found on this interface. */ - if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) { + if (startchip == 0 && flash->chip->model_id == SFDP_DEVICE_ID) { msg_cinfo("===\n" "SFDP has autodetected a flash chip which is " "not natively supported by flashrom yet.\n"); - if (count_usable_erasers(fill_flash) == 0) + if (count_usable_erasers(flash) == 0) msg_cinfo("The standard operations read and " "verify should work, but to support " "erase, write and all other " @@ -1020,16 +1025,21 @@ "===\n"); } - if (startchip == 0 || - ((fill_flash->model_id != GENERIC_DEVICE_ID) && - (fill_flash->model_id != SFDP_DEVICE_ID))) + /* First flash chip detected on this bus. */ + if (startchip == 0) break; - + /* Not the first flash chip detected on this bus, but not a generic match either. */ + if ((flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID)) + break; + /* Not the first flash chip detected on this bus, and it's just a generic match. Ignore it. */ notfound: - programmer_unmap_flash_region((void *)fill_flash->virtual_memory, size); + programmer_unmap_flash_region((void *)flash->virtual_memory, size); + flash->virtual_memory = (chipaddr)NULL; + free(flash->chip); + flash->chip = NULL; } - if (!flash || !flash->name) + if (!flash->chip) return -1; #if CONFIG_INTERNAL == 1 @@ -1039,27 +1049,26 @@ #endif snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); - tmp = flashbuses_to_text(flash->bustype); - msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", - force ? "Assuming" : "Found", fill_flash->vendor, - fill_flash->name, fill_flash->total_size, tmp, location); + tmp = flashbuses_to_text(flash->chip->bustype); + msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", + flash->chip->vendor, flash->chip->name, flash->chip->total_size, tmp, location); free(tmp); /* Flash registers will not be mapped if the chip was forced. Lock info * may be stored in registers, so avoid lock info printing. */ if (!force) - if (fill_flash->printlock) - fill_flash->printlock(fill_flash); + if (flash->chip->printlock) + flash->chip->printlock(flash); /* Return position of matching chip. */ - return flash - flashchips; + return chip - flashchips; } int verify_flash(struct flashctx *flash, uint8_t *buf) { int ret; - unsigned int total_size = flash->total_size * 1024; + unsigned int total_size = flash->chip->total_size * 1024; msg_cinfo("Verifying flash... "); @@ -1132,7 +1141,7 @@ int read_flash_to_file(struct flashctx *flash, const char *filename) { - unsigned long size = flash->total_size * 1024; + unsigned long size = flash->chip->total_size * 1024; unsigned char *buf = calloc(size, sizeof(char)); int ret = 0; @@ -1142,12 +1151,12 @@ msg_cinfo("FAILED.\n"); return 1; } - if (!flash->read) { + if (!flash->chip->read) { msg_cerr("No read function available for this flash chip.\n"); ret = 1; goto out_free; } - if (flash->read(flash, buf, 0, size)) { + if (flash->chip->read(flash, buf, 0, size)) { msg_cerr("Read operation failed!\n"); ret = 1; goto out_free; @@ -1164,14 +1173,14 @@ * walk_eraseregions(). * Even if an error is found, the function will keep going and check the rest. */ -static int selfcheck_eraseblocks(const struct flashchip *flash) +static int selfcheck_eraseblocks(const struct flashchip *chip) { int i, j, k; int ret = 0; for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { unsigned int done = 0; - struct block_eraser eraser = flash->block_erasers[k]; + struct block_eraser eraser = chip->block_erasers[k]; for (i = 0; i < NUM_ERASEREGIONS; i++) { /* Blocks with zero size are bugs in flashchips.c. */ @@ -1180,7 +1189,7 @@ msg_gerr("ERROR: Flash chip %s erase function " "%i region %i has size 0. Please report" " a bug at flashrom(a)flashrom.org\n", - flash->name, k, i); + chip->name, k, i); ret = 1; } /* Blocks with zero count are bugs in flashchips.c. */ @@ -1189,7 +1198,7 @@ msg_gerr("ERROR: Flash chip %s erase function " "%i region %i has count 0. Please report" " a bug at flashrom(a)flashrom.org\n", - flash->name, k, i); + chip->name, k, i); ret = 1; } done += eraser.eraseblocks[i].count * @@ -1201,12 +1210,12 @@ "non-empty erase function. Not an error.\n"); if (!done) continue; - if (done != flash->total_size * 1024) { + if (done != chip->total_size * 1024) { msg_gerr("ERROR: Flash chip %s erase function %i " "region walking resulted in 0x%06x bytes total," " expected 0x%06x bytes. Please report a bug at" - " flashrom(a)flashrom.org\n", flash->name, k, - done, flash->total_size * 1024); + " flashrom(a)flashrom.org\n", chip->name, k, + done, chip->total_size * 1024); ret = 1; } if (!eraser.block_erase) @@ -1217,11 +1226,11 @@ */ for (j = k + 1; j < NUM_ERASEFUNCTIONS; j++) { if (eraser.block_erase == - flash->block_erasers[j].block_erase) { + chip->block_erasers[j].block_erase) { msg_gerr("ERROR: Flash chip %s erase function " "%i and %i are identical. Please report" " a bug at flashrom(a)flashrom.org\n", - flash->name, k, j); + chip->name, k, j); ret = 1; } } @@ -1268,7 +1277,7 @@ if (!writecount++) msg_cdbg("W"); /* Needs the partial write function signature. */ - ret = flash->write(flash, newcontents + starthere, + ret = flash->chip->write(flash, newcontents + starthere, start + starthere, lenhere); if (ret) return ret; @@ -1295,7 +1304,7 @@ int i, j; unsigned int start = 0; unsigned int len; - struct block_eraser eraser = flash->block_erasers[erasefunction]; + struct block_eraser eraser = flash->chip->block_erasers[erasefunction]; for (i = 0; i < NUM_ERASEREGIONS; i++) { /* count==0 for all automatically initialized array @@ -1321,7 +1330,7 @@ static int check_block_eraser(const struct flashctx *flash, int k, int log) { - struct block_eraser eraser = flash->block_erasers[k]; + struct block_eraser eraser = flash->chip->block_erasers[k]; if (!eraser.block_erase && !eraser.eraseblocks[0].count) { if (log) @@ -1340,6 +1349,7 @@ "eraseblock layout is not defined. "); return 1; } + // TODO: Once erase functions are annotated with allowed buses, check that as well. return 0; } @@ -1348,7 +1358,7 @@ { int k, ret = 1; uint8_t *curcontents; - unsigned long size = flash->total_size * 1024; + unsigned long size = flash->chip->total_size * 1024; unsigned int usable_erasefunctions = count_usable_erasers(flash); msg_cinfo("Erasing and writing flash chip... "); @@ -1386,7 +1396,7 @@ * in non-verbose mode. */ msg_cinfo("Reading current flash chip contents... "); - if (flash->read(flash, curcontents, 0, size)) { + if (flash->chip->read(flash, curcontents, 0, size)) { /* Now we are truly screwed. Read failed as well. */ msg_cerr("Can't read anymore! Aborting.\n"); /* We have no idea about the flash chip contents, so @@ -1575,7 +1585,7 @@ int selfcheck(void) { int ret = 0; - const struct flashchip *flash; + const struct flashchip *chip; /* Safety check. Instead of aborting after the first error, check * if more errors exist. @@ -1593,16 +1603,8 @@ msg_gerr("Flashchips table miscompilation!\n"); ret = 1; } - /* Check that virtual_memory in struct flashctx is placed directly - * after the members copied from struct flashchip. - */ - if (sizeof(struct flashchip) != - offsetof(struct flashctx, virtual_memory)) { - msg_gerr("struct flashctx broken!\n"); - ret = 1; - } - for (flash = flashchips; flash && flash->name; flash++) - if (selfcheck_eraseblocks(flash)) + for (chip = flashchips; chip && chip->name; chip++) + if (selfcheck_eraseblocks(chip)) ret = 1; #if CONFIG_INTERNAL == 1 @@ -1626,41 +1628,41 @@ return ret; } -void check_chip_supported(const struct flashctx *flash) +void check_chip_supported(const struct flashchip *chip) { - if (flash->feature_bits & FEATURE_OTP) { + if (chip->feature_bits & FEATURE_OTP) { msg_cdbg("This chip may contain one-time programmable memory. " "flashrom cannot read\nand may never be able to write " "it, hence it may not be able to completely\n" "clone the contents of this chip (see man page for " "details).\n"); } - if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { + if (TEST_OK_MASK != (chip->tested & TEST_OK_MASK)) { msg_cinfo("===\n"); - if (flash->tested & TEST_BAD_MASK) { + if (chip->tested & TEST_BAD_MASK) { msg_cinfo("This flash part has status NOT WORKING for operations:"); - if (flash->tested & TEST_BAD_PROBE) + if (chip->tested & TEST_BAD_PROBE) msg_cinfo(" PROBE"); - if (flash->tested & TEST_BAD_READ) + if (chip->tested & TEST_BAD_READ) msg_cinfo(" READ"); - if (flash->tested & TEST_BAD_ERASE) + if (chip->tested & TEST_BAD_ERASE) msg_cinfo(" ERASE"); - if (flash->tested & TEST_BAD_WRITE) + if (chip->tested & TEST_BAD_WRITE) msg_cinfo(" WRITE"); msg_cinfo("\n"); } - if ((!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) || - (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) || - (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) || - (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE))) { + if ((!(chip->tested & TEST_BAD_PROBE) && !(chip->tested & TEST_OK_PROBE)) || + (!(chip->tested & TEST_BAD_READ) && !(chip->tested & TEST_OK_READ)) || + (!(chip->tested & TEST_BAD_ERASE) && !(chip->tested & TEST_OK_ERASE)) || + (!(chip->tested & TEST_BAD_WRITE) && !(chip->tested & TEST_OK_WRITE))) { msg_cinfo("This flash part has status UNTESTED for operations:"); - if (!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) + if (!(chip->tested & TEST_BAD_PROBE) && !(chip->tested & TEST_OK_PROBE)) msg_cinfo(" PROBE"); - if (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) + if (!(chip->tested & TEST_BAD_READ) && !(chip->tested & TEST_OK_READ)) msg_cinfo(" READ"); - if (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) + if (!(chip->tested & TEST_BAD_ERASE) && !(chip->tested & TEST_OK_ERASE)) msg_cinfo(" ERASE"); - if (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE)) + if (!(chip->tested & TEST_BAD_WRITE) && !(chip->tested & TEST_OK_WRITE)) msg_cinfo(" WRITE"); msg_cinfo("\n"); } @@ -1685,9 +1687,11 @@ /* FIXME: This function signature needs to be improved once doit() has a better * function signature. */ -int chip_safety_check(struct flashctx *flash, int force, int read_it, - int write_it, int erase_it, int verify_it) +int chip_safety_check(const struct flashctx *flash, int force, int read_it, int write_it, int erase_it, + int verify_it) { + const struct flashchip *chip = flash->chip; + if (!programmer_may_write && (write_it || erase_it)) { msg_perr("Write/erase is not working yet on your programmer in " "its current configuration.\n"); @@ -1701,13 +1705,13 @@ if (read_it || erase_it || write_it || verify_it) { /* Everything needs read. */ - if (flash->tested & TEST_BAD_READ) { + if (chip->tested & TEST_BAD_READ) { msg_cerr("Read is not working on this chip. "); if (!force) return 1; msg_cerr("Continuing anyway.\n"); } - if (!flash->read) { + if (!chip->read) { msg_cerr("flashrom has no read function for this " "flash chip.\n"); return 1; @@ -1715,7 +1719,7 @@ } if (erase_it || write_it) { /* Write needs erase. */ - if (flash->tested & TEST_BAD_ERASE) { + if (chip->tested & TEST_BAD_ERASE) { msg_cerr("Erase is not working on this chip. "); if (!force) return 1; @@ -1728,13 +1732,13 @@ } } if (write_it) { - if (flash->tested & TEST_BAD_WRITE) { + if (chip->tested & TEST_BAD_WRITE) { msg_cerr("Write is not working on this chip. "); if (!force) return 1; msg_cerr("Continuing anyway.\n"); } - if (!flash->write) { + if (!chip->write) { msg_cerr("flashrom has no write function for this " "flash chip.\n"); return 1; @@ -1753,7 +1757,7 @@ uint8_t *oldcontents; uint8_t *newcontents; int ret = 0; - unsigned long size = flash->total_size * 1024; + unsigned long size = flash->chip->total_size * 1024; if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) { msg_cerr("Aborting.\n"); @@ -1764,8 +1768,8 @@ /* Given the existence of read locks, we want to unlock for read, * erase and write. */ - if (flash->unlock) - flash->unlock(flash); + if (flash->chip->unlock) + flash->chip->unlock(flash); if (read_it) { ret = read_flash_to_file(flash, filename); @@ -1833,7 +1837,7 @@ * takes time as well. */ msg_cinfo("Reading old flash chip contents... "); - if (flash->read(flash, oldcontents, 0, size)) { + if (flash->chip->read(flash, oldcontents, 0, size)) { ret = 1; msg_cinfo("FAILED.\n"); goto out; @@ -1850,7 +1854,7 @@ if (erase_and_write_flash(flash, oldcontents, newcontents)) { msg_cerr("Uh oh. Erase/write failed. Checking if " "anything changed.\n"); - if (!flash->read(flash, newcontents, 0, size)) { + if (!flash->chip->read(flash, newcontents, 0, size)) { if (!memcmp(oldcontents, newcontents, size)) { msg_cinfo("Good. It seems nothing was " "changed.\n"); Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/ichspi.c Sat Aug 25 03:17:58 2012 (r1579) @@ -1193,9 +1193,9 @@ else msg_cdbg(" with a"); msg_cdbg(" density of %d kB.\n", total_size / 1024); - flash->total_size = total_size / 1024; + flash->chip->total_size = total_size / 1024; - eraser = &(flash->block_erasers[0]); + eraser = &(flash->chip->block_erasers[0]); boundary = (REGREAD32(ICH9_REG_FPB) & FPB_FPBA) << 12; size_high = total_size - boundary; erase_size_high = ich_hwseq_get_erase_block_size(boundary); @@ -1228,7 +1228,7 @@ msg_cdbg("In that range are %d erase blocks with %d B each.\n", size_high / erase_size_high, erase_size_high); } - flash->tested = TEST_OK_PREW; + flash->chip->tested = TEST_OK_PREW; return 1; } @@ -1256,7 +1256,7 @@ return -1; } - if (addr + len > flash->total_size * 1024) { + if (addr + len > flash->chip->total_size * 1024) { msg_perr("Request to erase some inaccessible memory address(es)" " (addr=0x%x, len=%d). " "Not erasing anything.\n", addr, len); @@ -1288,7 +1288,7 @@ uint16_t timeout = 100 * 60; uint8_t block_len; - if (addr + len > flash->total_size * 1024) { + if (addr + len > flash->chip->total_size * 1024) { msg_perr("Request to read from an inaccessible memory address " "(addr=0x%x, len=%d).\n", addr, len); return -1; @@ -1326,7 +1326,7 @@ uint16_t timeout = 100 * 60; uint8_t block_len; - if (addr + len > flash->total_size * 1024) { + if (addr + len > flash->chip->total_size * 1024) { msg_perr("Request to write to an inaccessible memory address " "(addr=0x%x, len=%d).\n", addr, len); return -1; Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/it87spi.c Sat Aug 25 03:17:58 2012 (r1579) @@ -331,7 +331,7 @@ /* FIXME: The command below seems to be redundant or wrong. */ OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); - for (i = 0; i < flash->page_size; i++) + for (i = 0; i < flash->chip->page_size; i++) mmio_writeb(buf[i], (void *)(bios + start + i)); OUTB(0, it8716f_flashport); /* Wait until the Write-In-Progress bit is cleared. @@ -355,7 +355,7 @@ * the mainboard does not use IT87 SPI translation. This should be done * via a programmer parameter for the internal programmer. */ - if ((flash->total_size * 1024 > 512 * 1024)) { + if ((flash->chip->total_size * 1024 > 512 * 1024)) { spi_read_chunked(flash, buf, start, len, 3); } else { mmio_readn((void *)(flash->virtual_memory + start), buf, len); @@ -367,6 +367,7 @@ static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { + const struct flashchip *chip = flash->chip; /* * IT8716F only allows maximum of 512 kb SPI chip size for memory * mapped access. It also can't write more than 1+3+256 bytes at once, @@ -377,28 +378,27 @@ * the mainboard does not use IT87 SPI translation. This should be done * via a programmer parameter for the internal programmer. */ - if ((flash->total_size * 1024 > 512 * 1024) || - (flash->page_size > 256)) { + if ((chip->total_size * 1024 > 512 * 1024) || (chip->page_size > 256)) { spi_chip_write_1(flash, buf, start, len); } else { unsigned int lenhere; - if (start % flash->page_size) { + if (start % chip->page_size) { /* start to the end of the page or to start + len, * whichever is smaller. */ - lenhere = min(len, flash->page_size - start % flash->page_size); + lenhere = min(len, chip->page_size - start % chip->page_size); spi_chip_write_1(flash, buf, start, lenhere); start += lenhere; len -= lenhere; buf += lenhere; } - while (len >= flash->page_size) { + while (len >= chip->page_size) { it8716f_spi_page_program(flash, buf, start); - start += flash->page_size; - len -= flash->page_size; - buf += flash->page_size; + start += chip->page_size; + len -= chip->page_size; + buf += chip->page_size; } if (len) spi_chip_write_1(flash, buf, start, len); Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/jedec.c Sat Aug 25 03:17:58 2012 (r1579) @@ -93,9 +93,9 @@ msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i); } -static unsigned int getaddrmask(struct flashctx *flash) +static unsigned int getaddrmask(const struct flashchip *chip) { - switch (flash->feature_bits & FEATURE_ADDR_MASK) { + switch (chip->feature_bits & FEATURE_ADDR_MASK) { case FEATURE_ADDR_FULL: return MASK_FULL; break; @@ -124,16 +124,17 @@ static int probe_jedec_common(struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; + const struct flashchip *chip = flash->chip; uint8_t id1, id2; uint32_t largeid1, largeid2; uint32_t flashcontent1, flashcontent2; int probe_timing_enter, probe_timing_exit; - if (flash->probe_timing > 0) - probe_timing_enter = probe_timing_exit = flash->probe_timing; - else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */ + if (chip->probe_timing > 0) + probe_timing_enter = probe_timing_exit = chip->probe_timing; + else if (chip->probe_timing == TIMING_ZERO) { /* No delay. */ probe_timing_enter = probe_timing_exit = 0; - } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */ + } else if (chip->probe_timing == TIMING_FIXME) { /* == _IGNORED */ msg_cdbg("Chip lacks correct probe timing information, " "using default 10mS/40uS. "); probe_timing_enter = 10000; @@ -151,7 +152,7 @@ if (probe_timing_enter) programmer_delay(probe_timing_enter); /* Reset chip to a clean slate */ - if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) + if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); if (probe_timing_exit) @@ -194,7 +195,7 @@ } /* Issue JEDEC Product ID Exit command */ - if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) + if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); if (probe_timing_exit) @@ -231,10 +232,10 @@ msg_cdbg(", id2 is normal flash content"); msg_cdbg("\n"); - if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id) + if (largeid1 != chip->manufacture_id || largeid2 != chip->model_id) return 0; - if (flash->feature_bits & FEATURE_REGISTERMAP) + if (chip->feature_bits & FEATURE_REGISTERMAP) map_flash_registers(flash); return 1; @@ -245,7 +246,7 @@ { chipaddr bios = flash->virtual_memory; int delay_us = 0; - if(flash->probe_timing != TIMING_ZERO) + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the Sector Erase command */ @@ -275,7 +276,7 @@ { chipaddr bios = flash->virtual_memory; int delay_us = 0; - if(flash->probe_timing != TIMING_ZERO) + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the Sector Erase command */ @@ -304,7 +305,7 @@ { chipaddr bios = flash->virtual_memory; int delay_us = 0; - if(flash->probe_timing != TIMING_ZERO) + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the JEDEC Chip Erase command */ @@ -366,7 +367,7 @@ chipaddr olddst; unsigned int mask; - mask = getaddrmask(flash); + mask = getaddrmask(flash->chip); olddst = dst; for (i = 0; i < len; i++) { @@ -390,7 +391,7 @@ chipaddr d = dst; unsigned int mask; - mask = getaddrmask(flash); + mask = getaddrmask(flash->chip); retry: /* Issue JEDEC Start Program command */ @@ -438,7 +439,7 @@ * write_jedec have page_size set to max_writechunk_size, so * we're OK for now. */ - unsigned int page_size = flash->page_size; + unsigned int page_size = flash->chip->page_size; /* Warning: This loop has a very unusual condition and body. * The loop needs to go through each page with at least one affected @@ -469,8 +470,8 @@ { unsigned int mask; - mask = getaddrmask(flash); - if ((addr != 0) || (blocksize != flash->total_size * 1024)) { + mask = getaddrmask(flash->chip); + if ((addr != 0) || (blocksize != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; @@ -482,7 +483,7 @@ { unsigned int mask; - mask = getaddrmask(flash); + mask = getaddrmask(flash->chip); return probe_jedec_common(flash, mask); } @@ -491,7 +492,7 @@ { unsigned int mask; - mask = getaddrmask(flash); + mask = getaddrmask(flash->chip); return erase_sector_jedec_common(flash, page, size, mask); } @@ -500,7 +501,7 @@ { unsigned int mask; - mask = getaddrmask(flash); + mask = getaddrmask(flash->chip); return erase_block_jedec_common(flash, page, size, mask); } @@ -508,6 +509,6 @@ { unsigned int mask; - mask = getaddrmask(flash); + mask = getaddrmask(flash->chip); return erase_chip_jedec_common(flash, mask); } Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/layout.c Sat Aug 25 03:17:58 2012 (r1579) @@ -217,11 +217,11 @@ return best_entry; } -int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) +int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) { unsigned int start = 0; romlayout_t *entry; - unsigned int size = flash->total_size * 1024; + unsigned int size = flash->chip->total_size * 1024; /* If no regions were specified for inclusion, assume * that the user wants to write the complete new image. Modified: trunk/m29f400bt.c ============================================================================== --- trunk/m29f400bt.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/m29f400bt.c Sat Aug 25 03:17:58 2012 (r1579) @@ -81,7 +81,7 @@ msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) + if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id) return 1; return 0; @@ -130,7 +130,7 @@ int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, unsigned int blocklen) { - if ((address != 0) || (blocklen != flash->total_size * 1024)) { + if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; Modified: trunk/pm49fl00x.c ============================================================================== --- trunk/pm49fl00x.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/pm49fl00x.c Sat Aug 25 03:17:58 2012 (r1579) @@ -40,14 +40,14 @@ int unlock_49fl00x(struct flashctx *flash) { - write_lockbits_49fl00x(flash, flash->total_size * 1024, 0, - flash->page_size); + write_lockbits_49fl00x(flash, flash->chip->total_size * 1024, 0, + flash->chip->page_size); return 0; } int lock_49fl00x(struct flashctx *flash) { - write_lockbits_49fl00x(flash, flash->total_size * 1024, 1, - flash->page_size); + write_lockbits_49fl00x(flash, flash->chip->total_size * 1024, 1, + flash->chip->page_size); return 0; } Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/print.c Sat Aug 25 03:17:58 2012 (r1579) @@ -67,22 +67,22 @@ int maxvendorlen = strlen("Vendor") + 1; int maxchiplen = strlen("Device") + 1; int maxtypelen = strlen("Type") + 1; - const struct flashchip *f; + const struct flashchip *chip; char *s; char *tmpven, *tmpdev; int tmpvenlen, tmpdevlen, curvenlen, curdevlen; /* calculate maximum column widths and by iterating over all chips */ - for (f = flashchips; f->name != NULL; f++) { + for (chip = flashchips; chip->name != NULL; chip++) { /* Ignore generic entries. */ - if (!strncmp(f->vendor, "Unknown", 7) || - !strncmp(f->vendor, "Programmer", 10) || - !strncmp(f->name, "unknown", 7)) + if (!strncmp(chip->vendor, "Unknown", 7) || + !strncmp(chip->vendor, "Programmer", 10) || + !strncmp(chip->name, "unknown", 7)) continue; chipcount++; /* Find maximum vendor length (respecting line splitting). */ - tmpven = (char *)f->vendor; + tmpven = (char *)chip->vendor; do { /* and take minimum token lengths into account */ tmpvenlen = 0; @@ -100,7 +100,7 @@ } while (1); /* same for device name */ - tmpdev = (char *)f->name; + tmpdev = (char *)chip->name; do { tmpdevlen = 0; do { @@ -115,7 +115,7 @@ break; } while (1); - s = flashbuses_to_text(f->bustype); + s = flashbuses_to_text(chip->bustype); maxtypelen = max(maxtypelen, strlen(s)); free(s); } @@ -162,11 +162,11 @@ msg_ginfo("\n\n"); msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); - for (f = flashchips; f->name != NULL; f++) { + for (chip = flashchips; chip->name != NULL; chip++) { /* Don't print generic entries. */ - if (!strncmp(f->vendor, "Unknown", 7) || - !strncmp(f->vendor, "Programmer", 10) || - !strncmp(f->name, "unknown", 7)) + if (!strncmp(chip->vendor, "Unknown", 7) || + !strncmp(chip->vendor, "Programmer", 10) || + !strncmp(chip->name, "unknown", 7)) continue; /* support for multiline vendor names: @@ -179,12 +179,12 @@ * - after all other values are printed print the surplus tokens * on fresh lines */ - tmpven = malloc(strlen(f->vendor) + 1); + tmpven = malloc(strlen(chip->vendor) + 1); if (tmpven == NULL) { msg_gerr("Out of memory!\n"); exit(1); } - strcpy(tmpven, f->vendor); + strcpy(tmpven, chip->vendor); tmpven = strtok(tmpven, delim); msg_ginfo("%s", tmpven); @@ -203,12 +203,12 @@ msg_ginfo(" "); /* support for multiline device names as above */ - tmpdev = malloc(strlen(f->name) + 1); + tmpdev = malloc(strlen(chip->name) + 1); if (tmpdev == NULL) { msg_gerr("Out of memory!\n"); exit(1); } - strcpy(tmpdev, f->name); + strcpy(tmpdev, chip->name); tmpdev = strtok(tmpdev, delim); msg_ginfo("%s", tmpdev); @@ -226,60 +226,60 @@ for (i = curdevlen; i < maxchiplen; i++) msg_ginfo(" "); - if ((f->tested & TEST_OK_PROBE)) + if ((chip->tested & TEST_OK_PROBE)) msg_ginfo("P"); else msg_ginfo(" "); - if ((f->tested & TEST_OK_READ)) + if ((chip->tested & TEST_OK_READ)) msg_ginfo("R"); else msg_ginfo(" "); - if ((f->tested & TEST_OK_ERASE)) + if ((chip->tested & TEST_OK_ERASE)) msg_ginfo("E"); else msg_ginfo(" "); - if ((f->tested & TEST_OK_WRITE)) + if ((chip->tested & TEST_OK_WRITE)) msg_ginfo("W"); else msg_ginfo(" "); for (i = 0; i < border; i++) msg_ginfo(" "); - if ((f->tested & TEST_BAD_PROBE)) + if ((chip->tested & TEST_BAD_PROBE)) msg_ginfo("P"); else msg_ginfo(" "); - if ((f->tested & TEST_BAD_READ)) + if ((chip->tested & TEST_BAD_READ)) msg_ginfo("R"); else msg_ginfo(" "); - if ((f->tested & TEST_BAD_ERASE)) + if ((chip->tested & TEST_BAD_ERASE)) msg_ginfo("E"); else msg_ginfo(" "); - if ((f->tested & TEST_BAD_WRITE)) + if ((chip->tested & TEST_BAD_WRITE)) msg_ginfo("W"); else msg_ginfo(" "); for (i = 0; i < border + 1; i++) msg_ginfo(" "); - msg_ginfo("%5d", f->total_size); + msg_ginfo("%5d", chip->total_size); for (i = 0; i < border; i++) msg_ginfo(" "); - s = flashbuses_to_text(f->bustype); + s = flashbuses_to_text(chip->bustype); msg_ginfo("%s", s); for (i = strlen(s); i < maxtypelen; i++) msg_ginfo(" "); free(s); - if (f->voltage.min == 0 && f->voltage.max == 0) + if (chip->voltage.min == 0 && chip->voltage.max == 0) msg_gdbg("no info"); else msg_gdbg("%0.02f;%0.02f", - f->voltage.min/(double)1000, - f->voltage.max/(double)1000); + chip->voltage.min/(double)1000, + chip->voltage.max/(double)1000); /* print surplus vendor and device name tokens */ while (tmpven != NULL || tmpdev != NULL) { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/programmer.h Sat Aug 25 03:17:58 2012 (r1579) @@ -473,7 +473,7 @@ extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -void check_chip_supported(const struct flashctx *flash); +void check_chip_supported(const struct flashchip *chip); int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(const char *param_name); Modified: trunk/sfdp.c ============================================================================== --- trunk/sfdp.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/sfdp.c Sat Aug 25 03:17:58 2012 (r1579) @@ -81,10 +81,10 @@ uint32_t ptp; /* 24b pointer */ }; -static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint32_t block_size) +static int sfdp_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size) { int i; - uint32_t total_size = flash->total_size * 1024; + uint32_t total_size = chip->total_size * 1024; erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode); if (erasefn == NULL || total_size == 0 || block_size == 0 || @@ -95,7 +95,7 @@ } for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { - struct block_eraser *eraser = &flash->block_erasers[i]; + struct block_eraser *eraser = &chip->block_erasers[i]; /* Check for duplicates (including (some) non-uniform ones). */ if (eraser->eraseblocks[0].size == block_size && eraser->block_erase == erasefn) { @@ -125,7 +125,7 @@ return 1; } -static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len) +static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len) { uint8_t opcode_4k_erase = 0xFF; uint32_t tmp32; @@ -170,28 +170,28 @@ msg_cdbg2("volatile and writes to the status register have to " "be enabled with "); if (tmp32 & (1 << 4)) { - flash->feature_bits = FEATURE_WRSR_WREN; + chip->feature_bits = FEATURE_WRSR_WREN; msg_cdbg2("WREN (0x06).\n"); } else { - flash->feature_bits = FEATURE_WRSR_EWSR; + chip->feature_bits = FEATURE_WRSR_EWSR; msg_cdbg2("EWSR (0x50).\n"); } } else { msg_cdbg2("non-volatile and the standard does not allow " "vendors to tell us whether EWSR/WREN is needed for " "status register writes - assuming EWSR.\n"); - flash->feature_bits = FEATURE_WRSR_EWSR; + chip->feature_bits = FEATURE_WRSR_EWSR; } msg_cdbg2(" Write chunk size is "); if (tmp32 & (1 << 2)) { msg_cdbg2("at least 64 B.\n"); - flash->page_size = 64; - flash->write = spi_chip_write_256; + chip->page_size = 64; + chip->write = spi_chip_write_256; } else { msg_cdbg2("1 B only.\n"); - flash->page_size = 256; - flash->write = spi_chip_write_1; + chip->page_size = 256; + chip->write = spi_chip_write_1; } if ((tmp32 & 0x3) == 0x1) { @@ -212,8 +212,8 @@ return 1; } total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8; - flash->total_size = total_size / 1024; - msg_cdbg2(" Flash chip size is %d kB.\n", flash->total_size); + chip->total_size = total_size / 1024; + msg_cdbg2(" Flash chip size is %d kB.\n", chip->total_size); if (total_size > (1 << 24)) { msg_cdbg("Flash chip size is bigger than what 3-Byte addressing " "can access.\n"); @@ -221,7 +221,7 @@ } if (opcode_4k_erase != 0xFF) - sfdp_add_uniform_eraser(flash, opcode_4k_erase, 4 * 1024); + sfdp_add_uniform_eraser(chip, opcode_4k_erase, 4 * 1024); /* FIXME: double words 3-7 contain unused fast read information */ @@ -252,7 +252,7 @@ tmp8 = buf[(4 * 7) + (j * 2) + 1]; msg_cspew(" Erase Sector Type %d Opcode: 0x%02x\n", j + 1, tmp8); - sfdp_add_uniform_eraser(flash, tmp8, block_size); + sfdp_add_uniform_eraser(chip, tmp8, block_size); } done: @@ -381,7 +381,7 @@ msg_cdbg("Length of the mandatory JEDEC SFDP " "parameter table is wrong (%d B), " "skipping it.\n", len); - } else if (sfdp_fill_flash(flash, tbuf, len) == 0) + } else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0) ret = 1; } free(tbuf); Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/spi.c Sat Aug 25 03:17:58 2012 (r1579) @@ -111,16 +111,16 @@ * means 0xffffff, the highest unsigned 24bit number. */ addrbase = spi_get_valid_read_addr(flash); - if (addrbase + flash->total_size * 1024 > (1 << 24)) { + if (addrbase + flash->chip->total_size * 1024 > (1 << 24)) { msg_perr("Flash chip size exceeds the allowed access window. "); msg_perr("Read will probably fail.\n"); /* Try to get the best alignment subject to constraints. */ - addrbase = (1 << 24) - flash->total_size * 1024; + addrbase = (1 << 24) - flash->chip->total_size * 1024; } /* Check if alignment is native (at least the largest power of two which * is a factor of the mapped size of the chip). */ - if (ffs(flash->total_size * 1024) > (ffs(addrbase) ? : 33)) { + if (ffs(flash->chip->total_size * 1024) > (ffs(addrbase) ? : 33)) { msg_perr("Flash chip is not aligned natively in the allowed " "access window.\n"); msg_perr("Read will probably return garbage.\n"); Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/spi25.c Sat Aug 25 03:17:58 2012 (r1579) @@ -117,6 +117,7 @@ static int probe_spi_rdid_generic(struct flashctx *flash, int bytes) { + const struct flashchip *chip = flash->chip; unsigned char readarr[4]; uint32_t id1; uint32_t id2; @@ -147,7 +148,7 @@ msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) { + if (id1 == chip->manufacture_id && id2 == chip->model_id) { /* Print the status register to tell the * user about possible write protection. */ @@ -157,13 +158,11 @@ } /* Test if this is a pure vendor match. */ - if (id1 == flash->manufacture_id && - GENERIC_DEVICE_ID == flash->model_id) + if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) return 1; /* Test if there is any vendor ID. */ - if (GENERIC_MANUF_ID == flash->manufacture_id && - id1 != 0xff) + if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff) return 1; return 0; @@ -198,6 +197,7 @@ int probe_spi_rems(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; unsigned char readarr[JEDEC_REMS_INSIZE]; uint32_t id1, id2; @@ -210,7 +210,7 @@ msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) { + if (id1 == chip->manufacture_id && id2 == chip->model_id) { /* Print the status register to tell the * user about possible write protection. */ @@ -220,13 +220,11 @@ } /* Test if this is a pure vendor match. */ - if (id1 == flash->manufacture_id && - GENERIC_DEVICE_ID == flash->model_id) + if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) return 1; /* Test if there is any vendor ID. */ - if (GENERIC_MANUF_ID == flash->manufacture_id && - id1 != 0xff) + if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff) return 1; return 0; @@ -267,7 +265,7 @@ msg_cdbg("%s: id 0x%x\n", __func__, id2); - if (id2 != flash->model_id) + if (id2 != flash->chip->model_id) return 0; /* Print the status register to tell the @@ -291,7 +289,7 @@ msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - if (id1 != flash->manufacture_id || id2 != flash->model_id) + if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) return 0; /* Print the status register to tell the @@ -419,22 +417,23 @@ int spi_prettyprint_status_register(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; uint8_t status; status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - switch (flash->manufacture_id) { + switch (chip->manufacture_id) { case ST_ID: - if (((flash->model_id & 0xff00) == 0x2000) || - ((flash->model_id & 0xff00) == 0x2500)) + if (((chip->model_id & 0xff00) == 0x2000) || + ((chip->model_id & 0xff00) == 0x2500)) spi_prettyprint_status_register_st_m25p(status); break; case MACRONIX_ID: - if ((flash->model_id & 0xff00) == 0x2000) + if ((chip->model_id & 0xff00) == 0x2000) spi_prettyprint_status_register_st_m25p(status); break; case SST_ID: - switch (flash->model_id) { + switch (chip->model_id) { case 0x2541: spi_prettyprint_status_register_sst25vf016(status); break; @@ -704,7 +703,7 @@ int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; @@ -715,7 +714,7 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; @@ -820,7 +819,7 @@ int spi_write_status_register(struct flashctx *flash, int status) { - int feature_bits = flash->feature_bits; + int feature_bits = flash->chip->feature_bits; int ret = 1; if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { @@ -972,7 +971,7 @@ { int rc = 0; unsigned int i, j, starthere, lenhere, toread; - unsigned int page_size = flash->page_size; + unsigned int page_size = flash->chip->page_size; /* Warning: This loop has a very unusual condition and body. * The loop needs to go through each page with at least one affected @@ -1017,7 +1016,7 @@ * spi_chip_write_256 have page_size set to max_writechunk_size, so * we're OK for now. */ - unsigned int page_size = flash->page_size; + unsigned int page_size = flash->chip->page_size; /* Warning: This loop has a very unusual condition and body. * The loop needs to go through each page with at least one affected Modified: trunk/sst28sf040.c ============================================================================== --- trunk/sst28sf040.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/sst28sf040.c Sat Aug 25 03:17:58 2012 (r1579) @@ -119,7 +119,7 @@ int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; Modified: trunk/sst49lfxxxc.c ============================================================================== --- trunk/sst49lfxxxc.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/sst49lfxxxc.c Sat Aug 25 03:17:58 2012 (r1579) @@ -38,7 +38,7 @@ static int write_lockbits_49lfxxxc(struct flashctx *flash, unsigned char bits) { chipaddr registers = flash->virtual_registers; - unsigned int i, left = flash->total_size * 1024; + unsigned int i, left = flash->chip->total_size * 1024; unsigned long address; msg_cdbg("\nbios=0x%08lx\n", registers); Modified: trunk/sst_fwhub.c ============================================================================== --- trunk/sst_fwhub.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/sst_fwhub.c Sat Aug 25 03:17:58 2012 (r1579) @@ -31,7 +31,7 @@ blockstatus = chip_readb(flash, registers + offset + 2); msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ", - offset, flash->page_size, blockstatus); + offset, flash->chip->page_size, blockstatus); switch (blockstatus & 0x3) { case 0x0: msg_cdbg("full access\n"); @@ -72,7 +72,7 @@ { int i; - for (i = 0; i < flash->total_size * 1024; i += flash->page_size) + for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size) check_sst_fwhub_block_lock(flash, i); return 0; @@ -82,7 +82,7 @@ { int i, ret=0; - for (i = 0; i < flash->total_size * 1024; i += flash->page_size) + for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size) { if (clear_sst_fwhub_block_lock(flash, i)) { Modified: trunk/stm50flw0x0x.c ============================================================================== --- trunk/stm50flw0x0x.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/stm50flw0x0x.c Sat Aug 25 03:17:58 2012 (r1579) @@ -54,7 +54,7 @@ /* Check, if it's is a top/bottom-block with 4k-sectors. */ /* TODO: What about the other types? */ if ((offset == 0) || - (offset == (flash->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000)) + (offset == (flash->chip->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000)) || (offset == 0xF0000)) { // unlock each 4k-sector @@ -85,7 +85,7 @@ { int i; - for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) { + for (i = 0; i < flash->chip->total_size * 1024; i+= flash->chip->page_size) { if(unlock_block_stm50flw0x0x(flash, i)) { msg_cerr("UNLOCK FAILED!\n"); return -1; Modified: trunk/w29ee011.c ============================================================================== --- trunk/w29ee011.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/w29ee011.c Sat Aug 25 03:17:58 2012 (r1579) @@ -29,11 +29,11 @@ chipaddr bios = flash->virtual_memory; uint8_t id1, id2; - if (!chip_to_probe || strcmp(chip_to_probe, flash->name)) { + if (!chip_to_probe || strcmp(chip_to_probe, flash->chip->name)) { msg_cdbg("Old Winbond W29* probe method disabled because " "the probing sequence puts the AMIC A49LF040A in " "a funky state. Use 'flashrom -c %s' if you " - "have a board with such a chip.\n", flash->name); + "have a board with such a chip.\n", flash->chip->name); return 0; } @@ -65,7 +65,7 @@ msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) + if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id) return 1; return 0; Modified: trunk/w39.c ============================================================================== --- trunk/w39.c Sat Aug 25 01:03:46 2012 (r1578) +++ trunk/w39.c Sat Aug 25 03:17:58 2012 (r1579) @@ -138,11 +138,11 @@ static int printlock_w39_fwh(struct flashctx *flash) { - unsigned int i, total_size = flash->total_size * 1024; + unsigned int i, total_size = flash->chip->total_size * 1024; int ret = 0; /* Print lock status of the complete chip */ - for (i = 0; i < total_size; i += flash->page_size) + for (i = 0; i < total_size; i += flash->chip->page_size) ret |= printlock_w39_fwh_block(flash, i); return ret; @@ -150,10 +150,10 @@ static int unlock_w39_fwh(struct flashctx *flash) { - unsigned int i, total_size = flash->total_size * 1024; + unsigned int i, total_size = flash->chip->total_size * 1024; /* Unlock the complete chip */ - for (i = 0; i < total_size; i += flash->page_size) + for (i = 0; i < total_size; i += flash->chip->page_size) if (unlock_w39_fwh_block(flash, i)) return -1;

1 0

IBM lflash source code?
by Carl-Daniel Hailfinger 25 Aug '12

25 Aug '12

Hi Mike, a few years ago, you asked about IBM lflash (firmware updating of BIOS, RSA, and BMC hardware under Linux) users on the xcat.org mailing list. Are you still involved with that project inside IBM, and if not, do you know anyone I can contact about getting the source code for it or getting documentation for the hardware interfaces it uses? Background: I am one of the developers of the open source (GPLv2 license) flashrom utility which can update the firmware/BIOS/EFI of most x86 mainboards from within a Linux/*BSD/DOS system, and which can also update the firmware on quite a few network/storage/graphics cards. We would love to add a driver for IBM RSA/BMC firmware updating to flashrom, and we have been approached by someone whose company is using IBM SurePOS all over the world. lflash is apparently almost(?) impossible to get by for SurePOS, and save rebooting every terminal into DOS, flashrom seems to be the only choice right now. Writing a flashrom driver for new hardware is easy (~30 lines of code), and if we can get documentation for the flashing interface of IBM RSA/BMC, we will do that ourselves and integrate that driver into the official flashrom sources. Thanks in advance for your help. Regards, Carl-Daniel

1 0

Re: [flashrom] [PATCH] Fix VIA VX*** support.
by Carl-Daniel Hailfinger 25 Aug '12

25 Aug '12

Am 31.07.2012 20:52 schrieb Stefan Tauner: > Helge Wagner's patch that added VIA VX900 chipset support made me look > closer at the datasheets which led to some concise documentation about > newer VIA chipsets: http://flashrom.org/VIA Thanks, that was very helpful. I have updated the wiki with new information. > Based on that this patch adds full support for VX800/VX820, VX855/VX875 > and VX900, including SPI and LPC. VT8237S was not changed (SPI support > only) because there is no public datasheet and it is not clear how to > distinguish between LPC and SPI strapping and investigations in (NDAed) > documents have not brought up anything conclusively. > > enable_flash_vt823x could probably be enhanced too due to various > yet ignored LPC options of the chipset. > > Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> The more I learn about VIA, the less I'm inclined to change the behaviour of flashrom substantially directly before a release. I would like to get a modified version of this patch merged after 0.9.6. > New version with tiny changes for 0.9.6... > test status is NT and arguable... but since there are so few VIA users > out there anyway i think we wont get too many mails anyway. > > chipset_enable.c | 80 +++++++++++++++++++++++++++++++++++++++++++++++------- > ichspi.c | 11 +++----- > programmer.h | 2 +- > 3 files changed, 75 insertions(+), 18 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 936d7b8..0974427 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -6,6 +6,7 @@ > * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> > * Copyright (C) 2007,2008,2009 Carl-Daniel Hailfinger > * Copyright (C) 2009 Kontron Modular Computers GmbH > + * Copyright (C) 2011, 2012 Stefan Tauner > * > * This program is free software; you can redistribute it and/or modify > * it under the terms of the GNU General Public License as published by > @@ -508,12 +509,6 @@ static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) > return ret; > } > > -static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) > -{ > - /* Do we really need no write enable? */ > - return via_init_spi(dev); > -} > - > static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, > enum ich_chipset ich_generation) > { > @@ -681,16 +676,80 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name) > return -1; > } > > - if (dev->device_id == 0x3227) { /* VT8237R */ > + if (dev->device_id == 0x3227) { /* VT8237 */ If you change that comment, please change it to VT8237/VT8237R. > /* All memory cycles, not just ROM ones, go to LPC. */ > val = pci_read_byte(dev, 0x59); > val &= ~0x80; > rpci_write_byte(dev, 0x59, val); > } > > + internal_buses_supported = BUS_LPC | BUS_FWH; It's not that easy. Some older VIA chipsets do not support ROMs on LPC/FWH, or LPC/FWH at all. And unfortunately, not all VIA chipsets allow you to read the ROM type straps. Please kill this hunk for now. VT8231 can speak Parallel/LPC VT8233 can speak Parallel/LPC VT8233A ??? VT8235 can speak Parallel/LPC/FWH VT8237A ??? VT8237R can speak LPC/FWH (and is identical to VT8237) VT8237S can speak LPC/FWH/SPI CX700 can speak LPC/FWH VX[89]* can speak LPC/FWH/SPI Adding that information to the chipset enable functions should be done in a separate patch. I can do that if you want... it's pretty tricky. > return 0; > } > > +static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) > +{ > + struct pci_dev *south_north = pci_dev_find(0x1106, 0xa353); > + if (south_north == NULL) { > + msg_perr("Could not find South-North Module Interface Control device!\n"); > + return ERROR_FATAL; > + } > + > + msg_pdbg("Strapped to "); > + if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) { > + msg_pdbg("LPC.\n"); > + return enable_flash_vt823x(dev, name); > + } > + msg_pdbg("SPI.\n"); > + > + uint32_t mmio_base; > + void *mmio_base_physmapped; > + uint32_t spi_cntl; > + #define SPI_CNTL_LEN 0x08 > + uint32_t spi0_mm_base = 0; > + switch(dev->device_id) { > + case 0x8353: /* VX800/VX820 */ > + spi0_mm_base = pci_read_long(dev, 0xbc) << 8; > + break; > + case 0x8409: /* VX855/VX875 */ > + case 0x8410: /* VX900 */ > + mmio_base = pci_read_long(dev, 0xbc) << 8; > + mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); > + if (mmio_base_physmapped == ERROR_PTR) { > + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); > + return ERROR_FATAL; > + } > + > + /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ > + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; > + if ((spi_cntl & 0x01) == 0) { > + msg_pdbg ("SPI Bus0 disabled!\n"); > + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); > + return ERROR_FATAL; > + } > + /* Offset 1-3 has SPI Bus Memory Map Base Address: */ > + spi0_mm_base = spi_cntl & 0xFFFFFF00; > + > + /* Offset 4 - Bit 0 holds SPI Bus1 Enable Bit. */ > + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x04; > + if ((spi_cntl & 0x01) == 1) > + msg_pdbg2("SPI Bus1 is enabled too.\n"); We don't handle that anywhere, so it should probably spit out some really loud warning. > + > + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); > + break; > + default: > + msg_perr("%s: Unsupported chipset %x:%x!\n", __func__, dev->vendor_id, dev->device_id); > + return ERROR_FATAL; > + } > + > + return via_init_spi(dev, spi0_mm_base); > +} > + > +static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) This function needs to die. > +{ > + return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8); > +} > + > static int enable_flash_cs5530(struct pci_dev *dev, const char *name) > { > uint8_t reg8; > @@ -1263,7 +1322,7 @@ const struct penable chipset_enables[] = { > {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, > {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, > {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111}, > - {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, > + {0x1106, 0x3074, OK, "VIA", "VT8233/VT8237R", enable_flash_vt823x}, No, that's very likely just a datasheet bug (compare table 4 in VT8237R datasheet 2.06 to the values mentioned in the detailed register description for the Bus Control device). Please undo this hunk. > {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, > {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, > {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, > @@ -1271,8 +1330,9 @@ const struct penable chipset_enables[] = { > {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, > {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, > {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, > - {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, > - {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, > + {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, > + {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, > + {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, > {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, > {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, > {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, > diff --git a/ichspi.c b/ichspi.c > index 0223ae3..44d659b 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -1844,19 +1844,16 @@ static const struct spi_programmer spi_programmer_via = { > .write_aai = default_spi_write_aai, > }; > > -int via_init_spi(struct pci_dev *dev) > +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) > { > - uint32_t mmio_base; > int i; > > - mmio_base = (pci_read_long(dev, 0xbc)) << 8; > - msg_pdbg("MMIO base at = 0x%x\n", mmio_base); > - ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); > + ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); > + /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ > > - /* Not sure if it speaks all these bus protocols. */ > - internal_buses_supported = BUS_LPC | BUS_FWH; > ich_generation = CHIPSET_ICH7; > register_spi_programmer(&spi_programmer_via); > + internal_buses_supported = BUS_SPI; Please undo the internal_buses_supported change here. So far, all VIA chipsets with SPI also support LPC/FWH. We could either call enable_flash_vt823x() on all SPI-capable chipsets as well, and have LPC/FWH/SPI sorted out automatically by flashrom, or we could try to read the ROM straps, which may or may not be readable or documented. > > msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); > msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2)); > diff --git a/programmer.h b/programmer.h > index 5109ed9..ec29ed8 100644 > --- a/programmer.h > +++ b/programmer.h > @@ -561,7 +561,7 @@ enum ich_chipset { > extern uint32_t ichspi_bbar; > int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > enum ich_chipset ich_generation); > -int via_init_spi(struct pci_dev *dev); > +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); > > /* it85spi.c */ > int it85xx_spi_init(struct superio s); Regards, Carl-Daniel -- http://www.hailfinger.org/

2 3

[commit] r1578 - trunk
by repository service 25 Aug '12

25 Aug '12

Author: stefanct Date: Sat Aug 25 01:03:46 2012 New Revision: 1578 URL: http://flashrom.org/trac/flashrom/changeset/1578 Log: Fix VIA VX*** support. Helge Wagner's patch that added VIA VX900 chipset support made me look closer at the datasheets which led to some concise documentation about newer VIA chipsets: http://flashrom.org/VIA Based on that this patch adds full support for VX800/VX820, VX855/VX875 and VX900, including SPI and LPC. VT8237S was not changed (SPI support only) because there is no public datasheet and it is not clear how to distinguish between LPC and SPI strapping and investigations in (NDAed) documents have not brought up anything conclusively. enable_flash_vt823x could probably be enhanced too due to various ignored LPC options of the chipset. Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Tested-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/ichspi.c trunk/programmer.h Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/board_enable.c Sat Aug 25 01:03:46 2012 (r1578) @@ -784,7 +784,7 @@ dev = pci_dev_find_vendorclass(0x1106, 0x0601); switch (dev->device_id) { case 0x3177: /* VT8235 */ - case 0x3227: /* VT8237R */ + case 0x3227: /* VT8237/VT8237R */ case 0x3337: /* VT8237A */ break; default: Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/chipset_enable.c Sat Aug 25 01:03:46 2012 (r1578) @@ -6,6 +6,7 @@ * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> * Copyright (C) 2007,2008,2009 Carl-Daniel Hailfinger * Copyright (C) 2009 Kontron Modular Computers GmbH + * Copyright (C) 2011, 2012 Stefan Tauner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -508,12 +509,6 @@ return ret; } -static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) -{ - /* Do we really need no write enable? */ - return via_init_spi(dev); -} - static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, enum ich_chipset ich_generation) { @@ -681,7 +676,7 @@ return -1; } - if (dev->device_id == 0x3227) { /* VT8237R */ + if (dev->device_id == 0x3227) { /* VT8237/VT8237R */ /* All memory cycles, not just ROM ones, go to LPC. */ val = pci_read_byte(dev, 0x59); val &= ~0x80; @@ -691,6 +686,69 @@ return 0; } +static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) +{ + struct pci_dev *south_north = pci_dev_find(0x1106, 0xa353); + if (south_north == NULL) { + msg_perr("Could not find South-North Module Interface Control device!\n"); + return ERROR_FATAL; + } + + msg_pdbg("Strapped to "); + if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) { + msg_pdbg("LPC.\n"); + return enable_flash_vt823x(dev, name); + } + msg_pdbg("SPI.\n"); + + uint32_t mmio_base; + void *mmio_base_physmapped; + uint32_t spi_cntl; + #define SPI_CNTL_LEN 0x08 + uint32_t spi0_mm_base = 0; + switch(dev->device_id) { + case 0x8353: /* VX800/VX820 */ + spi0_mm_base = pci_read_long(dev, 0xbc) << 8; + break; + case 0x8409: /* VX855/VX875 */ + case 0x8410: /* VX900 */ + mmio_base = pci_read_long(dev, 0xbc) << 8; + mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) { + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + + /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; + if ((spi_cntl & 0x01) == 0) { + msg_pdbg ("SPI Bus0 disabled!\n"); + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + /* Offset 1-3 has SPI Bus Memory Map Base Address: */ + spi0_mm_base = spi_cntl & 0xFFFFFF00; + + /* Offset 4 - Bit 0 holds SPI Bus1 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x04; + if ((spi_cntl & 0x01) == 1) + msg_pdbg2("SPI Bus1 is enabled too.\n"); + + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + break; + default: + msg_perr("%s: Unsupported chipset %x:%x!\n", __func__, dev->vendor_id, dev->device_id); + return ERROR_FATAL; + } + + return via_init_spi(dev, spi0_mm_base); +} + +static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) +{ + return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8); +} + static int enable_flash_cs5530(struct pci_dev *dev, const char *name) { uint8_t reg8; @@ -1266,13 +1324,14 @@ {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, - {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, + {0x1106, 0x3227, OK, "VIA", "VT8237(R)", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, - {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, + {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, + {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, + {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/ichspi.c Sat Aug 25 01:03:46 2012 (r1578) @@ -1844,14 +1844,12 @@ .write_aai = default_spi_write_aai, }; -int via_init_spi(struct pci_dev *dev) +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) { - uint32_t mmio_base; int i; - mmio_base = (pci_read_long(dev, 0xbc)) << 8; - msg_pdbg("MMIO base at = 0x%x\n", mmio_base); - ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); + ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ /* Not sure if it speaks all these bus protocols. */ internal_buses_supported = BUS_LPC | BUS_FWH; Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/programmer.h Sat Aug 25 01:03:46 2012 (r1578) @@ -558,7 +558,7 @@ extern uint32_t ichspi_bbar; int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, enum ich_chipset ich_generation); -int via_init_spi(struct pci_dev *dev); +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); /* it85spi.c */ int it85xx_spi_init(struct superio s);

1 0

W836xx: Supermicro X8DTT-H: flashrom -V
by Simon Kuhn 24 Aug '12

24 Aug '12

flashrom v0.9.6.1-r1563 on Linux 2.6.35-32-server (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.0.0, GCC 4.4.3, little endian Command line (3 args): flashrom -V -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 1333M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10006 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Supermicro" DMI string system-product-name: "X8DTT-H" DMI string system-version: "1234567890" DMI string baseboard-manufacturer: "Supermicro" DMI string baseboard-product-name: "X8DTT-H" DMI string baseboard-version: "1.3 " DMI string chassis-type: "Main Server Chassis" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 1a. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "Intel ICH10R" with PCI ID 8086:3a16. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 Root Complex Register Block address = 0xfed1c000 GCS = 0x60: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x0 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x2008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=0, FLOCKDN=0 Programming OPCODES... done 0x08: 0x003fffc0 (FADDR) 0x90: 0x04 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0x007f10 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 0x94: 0x5006 (PREOP) 0x96: 0x463b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0xc79f0190 (OPMENU+4) 0xA0: 0x00000000 (BBAR) SPI Read Configuration: prefetching disabled, caching enabled, OK. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0xbf, id2 0x4a Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0xbf, id2 0x4a Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Chip status register is 00 Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found SST flash chip "SST25VF032B" (4096 kB, SPI) at physical address 0xffc00000. Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Found SST flash chip "SST25VF032B" (4096 kB, SPI). No operations were specified. Restoring MMIO space at 0x7fcf72ea98a0 Restoring MMIO space at 0x7fcf72ea989c Restoring MMIO space at 0x7fcf72ea9898 Restoring MMIO space at 0x7fcf72ea9896 Restoring MMIO space at 0x7fcf72ea9894

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Re: [flashrom] Fix for serprog-ardu initialization failure due to unimplemented S_CMD_S_BUSTYPE (0x12)
by Denis 'GNUtoo' Carikli 23 Aug '12

23 Aug '12

On Wed, 2012-08-15 at 02:10 +0200, Alexander Meyer wrote: > Hi, > > I had problems making flashrom talk to an Arduino as described in > http://www.flashrom.org/index.php?title=Serprog&redirect=no > > It always failed right after this: > Warning: Automatic command availability check failed for cmd 0x12 - > won't execute cmd I am sorry, I was waiting for a Tested-by line that didn't come fast enough(I don't have the hardware with me so I rely on a user to test my commits).... Now the fix should be pushed... Beside There are issues with the speed with the arduino uno because of the microcontroller doing the USB<->Serial conversion.... Such issues are absent on the arduino duemillanove. I'll try to fix it when I have access to my arduino uno again.... Also I have not found the corresponding source code of the firmware running on that microcontroller: they give a binary in the arduino git and source code that doesn't seem to correspond to it. However I've a nearly equivalent(only reset don't work out of the box) firmware with LUFA alone. The idea is to fix the reset and then try to fix the serial issues that occur at higher speeds. Denis.

1 0

bios
by Dubrov Andrey 23 Aug '12

23 Aug '12

1 0

lspci dumps of VT8237S with SPI
by Stefan Tauner 21 Aug '12

21 Aug '12

Here are two logs from Rudolf Marek… > Hi some very old dumps. new_lspci is coreboot. lspci xxxvvv is vendor > bios. the board uses SPI flash. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

ASRock 4CoreDual-SATA2 R2.0: VT8237S flashing
by Carl-Daniel Hailfinger 21 Aug '12

21 Aug '12

Hi Jan-Hendrik, I noticed that you own an ASRock 4CoreDual-SATA2 R2.0 which has the VIA VT8237S chipset and a LPC/FWH BIOS flash chip. We flashrom developers are currently trying to cross-check the VT8237S documentation with real hardware settings, and it would be very helpful for us if you could mail us (just hit reply-all to send to the flashrom(a)flashrom.org mailing list) the output of the following command (as root): lspci -nnvvvxxx Just in case you've never heard about flashrom: flashrom is a tool to update your BIOS/EFI/coreboot from inside Linux/*BSD without the need to use a DOS boot disk. Your help is greatly appreciated. Regards, Carl-Daniel

2 1

NAND flash support
by jana1972＠centrum.cz 20 Aug '12

20 Aug '12

Is there NAND flash support available? Or is it a plan to add such support? By NAND I mean paralel NAND flash such as HY27US08121A or similar ( used in Xbox360 and other kind of boxes) BR, Ja.

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Re: [flashrom] [PATCH] Refactor the -p internal:mainboard handling.
by Carl-Daniel Hailfinger 20 Aug '12

20 Aug '12

Am 13.08.2012 02:51 schrieb Stefan Tauner: > This patch gets rid of some global variables and makes lots of bits along > the code path that control the board enable execution more generic and > clearer. From now on flashrom also abort on a few occasions that should be > safer for the user. For example we abort if he specifies the mainboard (enable) > but we can not find the enable function. > > Parts of the board_match_cbname refactoring were done by Carl-Daniel. > > FIXME: manpage > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> with a few comments and if you fix the manpage. BIG FAT NOTE: You do not have to change all the stuff mentioned in the review (because that would mean I have to review the patch again), but it would be nice to have the review comments addressed in a followup patch. > --- > This might be kinda unreviewable... > i can probably split it up if need be, just tell me please. Big patch, but still... splitting it wouldn't have helped. > diff --git a/board_enable.c b/board_enable.c > index 9c16905..22d4072 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -25,6 +25,7 @@ > */ > > #include <string.h> > +#include <stdlib.h> > #include "flash.h" > #include "programmer.h" > #include "hwaccess.h" > @@ -2443,41 +2444,63 @@ const struct board_match board_matches[] = { > { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ > }; > > +/* Parse the <vendor>:<board> string specified by the user as part of -p internal:mainboard=<vendor>:<board>. > + * Parameters vendor and model will be overwritten. Returns 0 on success. > + * Note: strtok modifies the original string, so we work on a copy and allocate memory for the results. > + */ > +int board_parse_parameter(const char *boardstring, const char **vendor, const char **model) > +{ > + /* strtok may modify the original string. */ > + char *tempstr = strdup(boardstring); > + char *tempstr2 = NULL; > + strtok(tempstr, ":"); > + tempstr2 = strtok(NULL, ":"); > + if (tempstr == NULL || tempstr2 == NULL) { > + free(tempstr); While freeing only tempstr is correct, it's not obvious. > + msg_pinfo("Please supply the board vendor and model name with the " > + "-p internal:mainboard=<vendor>:<model> option.\n"); > + return 1; > + } > + *vendor = strdup(tempstr); > + *model = strdup(tempstr2); > + msg_pspew("-p internal:mainboard: vendor=\"%s\", model=\"%s\"\n", tempstr, tempstr2); > + free(tempstr); > + return 0; > +} > + > /* > - * Match boards on coreboot table gathered vendor and part name. > + * Match boards on vendor and model name. > + * Hint: the parameters can come either from the coreboot table or the command line (i.e. the user). Please add the following comment: vendor and model must be non-NULL. > * Require main PCI IDs to match too as extra safety. > */ > -static const struct board_match *board_match_cbname(const char *vendor, > - const char *part) > +static const struct board_match *board_match_name(const char *vendor, const char *model) > { > const struct board_match *board = board_matches; > const struct board_match *partmatch = NULL; > > for (; board->vendor_name; board++) { > - if (vendor && (!board->lb_vendor > - || strcasecmp(board->lb_vendor, vendor))) > + if (!board->lb_vendor || strcasecmp(board->lb_vendor, vendor)) > continue; > > - if (!board->lb_part || strcasecmp(board->lb_part, part)) > + if (!board->lb_part || strcasecmp(board->lb_part, model)) > continue; > > - if (!pci_dev_find(board->first_vendor, board->first_device)) > + if (!pci_dev_find(board->first_vendor, board->first_device)) { > + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but first PCI device %04x:%04x " > + "doesn't.\n", vendor, model, board->first_vendor, board->first_device); Should we ask for a report here? Not sure, personal preference is not to ask. If yes, at which message level? > continue; > + } > > - if (board->second_vendor && > - !pci_dev_find(board->second_vendor, board->second_device)) > + if (!pci_dev_find(board->second_vendor, board->second_device)) { > + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but second PCI device %04x:%04x " > + "doesn't.\n", vendor, model, board->second_vendor, board->second_device); > continue; > - > - if (vendor) > - return board; > + } > > if (partmatch) { > - /* a second entry has a matching part name */ > - msg_pinfo("AMBIGUOUS BOARD NAME: %s\n", part); > - msg_pinfo("At least vendors '%s' and '%s' match.\n", > - partmatch->lb_vendor, board->lb_vendor); > - msg_perr("Please use the full -p internal:mainboard=" > - "vendor:part syntax.\n"); > + /* More than one entry has a matching name. */ > + msg_perr("Board name \"%s\":\"%s\" and PCI IDs matched more than one board enable " > + "entry. Please report a bug at flashrom(a)flashrom.org\n", vendor, model); > return NULL; > } > partmatch = board; > @@ -2486,15 +2509,7 @@ static const struct board_match *board_match_cbname(const char *vendor, > if (partmatch) > return partmatch; > > - if (!partvendor_from_cbtable) { > - /* Only warn if the mainboard type was not gathered from the > - * coreboot table. If it was, the coreboot implementor is > - * expected to fix flashrom, too. > - */ > - msg_perr("\nUnknown vendor:board from -p internal:mainboard=" > - " programmer parameter:\n%s:%s\n\n", > - vendor, part); > - } > + msg_perr("No board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); > return NULL; > } > > @@ -2534,9 +2549,10 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas > > if (board->dmi_pattern) { > if (!has_dmi_support) { > - msg_perr("WARNING: Can't autodetect %s %s," > - " DMI info unavailable.\n", > + msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", > board->vendor_name, board->board_name); > + msg_pinfo("Please supply the board vendor and model name with the " > + "-p internal:mainboard=<vendor>:<model> option.\n"); > continue; > } else { > if (!dmi_match(board->dmi_pattern)) > @@ -2569,8 +2585,7 @@ static int unsafe_board_handler(const struct board_match *board) > return 1; > } > msg_pinfo("NOTE: Running an untested board enable procedure.\n" > - "Please report success/failure to flashrom(a)flashrom.org\n" > - "with your board name and SUCCESS or FAILURE in the subject.\n"); > + "Please report success/failure to flashrom(a)flashrom.org.\n"); > return 0; > } > > @@ -2606,29 +2621,29 @@ void board_handle_before_laptop(void) > board_handle_phase(P2); > } > > -int board_flash_enable(const char *vendor, const char *part) > +int board_flash_enable(const char *vendor, const char *model) > { > const struct board_match *board = NULL; > int ret = 0; > > - if (part) > - board = board_match_cbname(vendor, part); > - > - if (!board) > + if (vendor && model) { > + board = board_match_name(vendor, model); > + if (!board) /* if a board was given it has to match, else we abort here. */ > + return 1; > + } else { > board = board_match_pci_ids(P3); > + if (!board) /* i.e. there is just no board enable available for this board */ > + return 0; > + } > > - if (unsafe_board_handler(board)) > - board = NULL; > - > - if (board) { > + ret = unsafe_board_handler(board); Side note: unsafe_board_handler is a pretty dumb name. Yes, it's my fault. Still... check_unsafe_board_enable() or something similar would be a better name. > + if (!ret) { > if (board->max_rom_decode_parallel) > - max_rom_decode.parallel = > - board->max_rom_decode_parallel * 1024; > + max_rom_decode.parallel = board->max_rom_decode_parallel * 1024; > > if (board->enable != NULL) { > - msg_pinfo("Disabling flash write protection for " > - "board \"%s %s\"... ", board->vendor_name, > - board->board_name); > + msg_pinfo("Enabling full flash access for board \"%s %s\"... ", > + board->vendor_name, board->board_name); > > ret = board->enable(); > if (ret) > diff --git a/cbtable.c b/cbtable.c > index dde12ac..1f8b1c3 100644 > --- a/cbtable.c > +++ b/cbtable.c > @@ -24,57 +24,33 @@ > > #include <unistd.h> > #include <stdio.h> > -#include <stdlib.h> > #include <ctype.h> > #include <string.h> > #include "flash.h" > #include "programmer.h" > #include "coreboot_tables.h" > > -char *lb_part = NULL, *lb_vendor = NULL; > -int partvendor_from_cbtable = 0; > -static char *def_name = "DEFAULT"; > -static char *mainboard_vendor = NULL; > -static char *mainboard_part = NULL; > - > -/* Parse the [<vendor>:]<board> string specified by the user as part of > - * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part > - * to the extracted values. > - * Note: strtok modifies the original string, so we work on a copy and allocate > - * memory for lb_vendor and lb_part with strdup. > - */ > -void lb_vendor_dev_from_string(const char *boardstring) > -{ > - /* strtok may modify the original string. */ > - char *tempstr = strdup(boardstring); > - char *tempstr2 = NULL; > - strtok(tempstr, ":"); > - tempstr2 = strtok(NULL, ":"); > - if (tempstr2) { > - lb_vendor = strdup(tempstr); > - lb_part = strdup(tempstr2); > - } else { > - lb_vendor = NULL; > - lb_part = strdup(tempstr); > - } > - free(tempstr); > -} > +static char *cb_vendor = NULL, *cb_model = NULL; > > -int show_id(uint8_t *bios, int size) > +/* Tries to find coreboot IDs in the supplied image and compares them to the current IDs. > + * Returns... > + * -1 if IDs in the image do not match the IDs embedded in the current firmware, > + * 0 if the IDs could not be found in the image or if they match correctly. > + */ > +int cb_check_image(uint8_t *image, int size) cb_check_image_matches_board would be a better name IMHO. > { > + const char *image_vendor = NULL; > + const char *image_model = NULL; > unsigned int *walk; > unsigned int mb_part_offset, mb_vendor_offset; > char *mb_part, *mb_vendor; > > - mainboard_vendor = def_name; > - mainboard_part = def_name; > - > - walk = (unsigned int *)(bios + size - 0x10); > + walk = (unsigned int *)(image + size - 0x10); > walk--; The two lines above made me scream WTF?!? Since you're already fixing that code, can you please merge them into one? walk = (unsigned int *)(image + size - 0x14); > > if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { > - /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ > - walk = (unsigned int *)(bios + size - 0x80); > + /* We might have an NVIDIA chipset which stores the ID information somewhere else. */ Actually, "BIOS" wasn't that wrong... let me rephrase the comment so that others may have a chance to understand the reason: /* Some NVIDIA chipsets store chipset soft straps (IIRC Hypertransport init info etc.) in flash at exactly the location where coreboot image size, coreboot vendor name pointer and coreboot board name pointer are usually stored. In this case coreboot uses an alternate location for the coreboot image data. */ > + walk = (unsigned int *)(image + size - 0x80); > walk--; And the two lines above need to be walk = (unsigned int *)(image + size - 0x84); > } > > @@ -88,49 +64,37 @@ int show_id(uint8_t *bios, int size) > mb_vendor_offset = *(walk - 2); > if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || > mb_part_offset > size || mb_vendor_offset > size) { > - msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); > + msg_pdbg("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); > return 0; > } > > - mb_part = (char *)(bios + size - mb_part_offset); > - mb_vendor = (char *)(bios + size - mb_vendor_offset); > + mb_part = (char *)(image + size - mb_part_offset); > + mb_vendor = (char *)(image + size - mb_vendor_offset); > if (!isprint((unsigned char)*mb_part) || > !isprint((unsigned char)*mb_vendor)) { > - msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); > + msg_pdbg("Flash image seems to have garbage in the ID location. Disabling checks.\n"); ...garbage in the coreboot ID location. Disabling coreboot-related checks. > return 0; > } > > msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); > > - mainboard_part = strdup(mb_part); > - mainboard_vendor = strdup(mb_vendor); > - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); > - msg_pdbg("Mainboard ID: %s\n", mainboard_part); > + image_vendor = strdup(mb_vendor); > + image_model = strdup(mb_part); If the image looks like a coreboot image according to our checks, but it's malformed (or not a coreboot image), checking string length with if (strnlen(mb_vendor, mb_vendor_offset) < mb_vendor_offset) and aborting otherwise may be a good idea to avoid segfaults. Can be done in a followup patch, though. > + msg_pdbg("Manufacturer: %s\n", image_vendor); > + msg_pdbg("Mainboard ID: %s\n", image_model); > > /* If these are not set, the coreboot table was not found. */ > - if (!lb_vendor || !lb_part) { > - msg_pinfo("Note: If the following flash access fails, try " > - "-p internal:mainboard=<vendor>:<mainboard>.\n"); > + if (!cb_vendor || !cb_model) > return 0; > - } > > /* These comparisons are case insensitive to make things a little less user^Werror prone. */ > - if (!strcasecmp(mainboard_vendor, lb_vendor) && > - !strcasecmp(mainboard_part, lb_part)) { > - msg_pdbg("This firmware image matches this mainboard.\n"); > + if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) { > + msg_pdbg2("This coreboot image matches this mainboard.\n"); > } else { > - if (force_boardmismatch) { > - msg_pinfo("WARNING: This firmware image does not " > - "seem to fit to this machine - forcing it.\n"); > - } else { > - msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" > - " be correct for the detected mainboard (%s:%s)\n\n" > - "Override with -p internal:boardmismatch=force to ignore the board name\n" > - "in the firmware image or override the detected mainboard with\n" > - "-p internal:mainboard=<vendor>:<mainboard>.\n\n", > - mainboard_vendor, mainboard_part, lb_vendor, lb_part); > - return 1; > - } > + msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n" > + " be correct for the detected mainboard (%s:%s).\n", > + image_vendor, image_model, cb_vendor, cb_model); > + return -1; > } > > return 0; > @@ -242,22 +206,15 @@ static void find_mainboard(struct lb_record *ptr, unsigned long addr) find_mainboard is a misnomer... it should be get_mainboard_from_cb_record or something like that, and the addr parameter was never used since the code was first committed. Followup patch, no need to complicate this one. > rec = (struct lb_mainboard *)ptr; > max_size = rec->size - sizeof(*rec); > msg_pdbg("Vendor ID: %.*s, part ID: %.*s\n", > - max_size - rec->vendor_idx, > - rec->strings + rec->vendor_idx, > - max_size - rec->part_number_idx, > - rec->strings + rec->part_number_idx); > - snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, > - rec->strings + rec->vendor_idx); > - snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, > - rec->strings + rec->part_number_idx); > - > - if (lb_part) { > - msg_pdbg("Overwritten by command line, vendor ID: %s, part ID: %s.\n", lb_vendor, lb_part); > - } else { > - partvendor_from_cbtable = 1; > - lb_part = strdup(part); > - lb_vendor = strdup(vendor); > - } > + max_size - rec->vendor_idx, > + rec->strings + rec->vendor_idx, > + max_size - rec->part_number_idx, > + rec->strings + rec->part_number_idx); > + snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, rec->strings + rec->vendor_idx); > + snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, rec->strings + rec->part_number_idx); > + > + cb_vendor = strdup(vendor); > + cb_model = strdup(part); > } > > static struct lb_record *next_record(struct lb_record *rec) > @@ -265,8 +222,7 @@ static struct lb_record *next_record(struct lb_record *rec) > return (struct lb_record *)(((char *)rec) + rec->size); > } > > -static void search_lb_records(struct lb_record *rec, struct lb_record *last, > - unsigned long addr) > +static void search_lb_records(struct lb_record *rec, struct lb_record *last, unsigned long addr) > { > struct lb_record *next; > int count; > @@ -284,7 +240,8 @@ static void search_lb_records(struct lb_record *rec, struct lb_record *last, > } > > #define BYTES_TO_MAP (1024*1024) > -int coreboot_init(void) > +/* returns 0 if the table was parsed successfully and cb_vendor/cb_model have been set. */ > +int cb_parse_table(const char **vendor, const char **model) > { > uint8_t *table_area; > unsigned long addr, start; > @@ -317,8 +274,7 @@ int coreboot_init(void) > physunmap(table_area, BYTES_TO_MAP); > table_area = physmap_try_ro("high tables", start, BYTES_TO_MAP); > if (ERROR_PTR == table_area) { > - msg_perr("Failed getting access to coreboot " > - "high tables.\n"); > + msg_perr("Failed getting access to coreboot high tables.\n"); > return -1; > } > lb_table = find_lb_table(table_area, 0x00000, 0x1000); > @@ -340,6 +296,7 @@ int coreboot_init(void) > lb_table->table_bytes, lb_table->table_checksum, > lb_table->table_entries); > search_lb_records(rec, last, addr + lb_table->header_bytes); > - > + *vendor = cb_vendor; > + *model = cb_model; I'm not totally happy with those static variables, but I can't offer a better suggestion (unless we want to extend struct flashctx with board/device matching info, but anything like that should be a separate patch. > return 0; > } > diff --git a/flashrom.c b/flashrom.c > index 9544155..c39c12c 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -1814,11 +1814,15 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > } > > #if CONFIG_INTERNAL == 1 > - if (programmer == PROGRAMMER_INTERNAL) > - if (show_id(newcontents, size)) { > + if (programmer == PROGRAMMER_INTERNAL && cb_check_image(newcontents, size) < 0) { > + if (force_boardmismatch) { > + msg_pinfo("Proceeding anyway because user forced us to.\n"); > + } else { > + msg_perr("Aborting. You can override this with -p internal:boardmismatch=force.\n"); 112 column limit... > ret = 1; > goto out; > } > + } > #endif > } > > diff --git a/internal.c b/internal.c > index 3ecc348..b1686aa 100644 > --- a/internal.c > +++ b/internal.c > @@ -249,10 +256,20 @@ int internal_init(void) > } > > #if defined(__i386__) || defined(__x86_64__) > - /* We look at the cbtable first to see if we need a > - * mainboard specific flash enable sequence. > - */ > - coreboot_init(); > + if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ > + /* if no -p internal:mainboard was given but there are valid coreboot IDs then use those */ Please capitalize first word and finish with full stop. Otherwise you'll see an instant followup commit by Uwe changing it. ;-) > + if (board_vendor == NULL || board_model == NULL) { Is it even possible that only one of board_vendor/board_model is NULL? > + board_vendor = cb_vendor; > + board_model = cb_model; > + } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { > + msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" > + " match the current coreboot IDs of the mainboard (%s:%s).\n", > + board_vendor, board_model, cb_vendor, cb_model); > + if (!force_boardmismatch) > + return 1; > + msg_pinfo("Continuing anyway.\n"); > + } > + } > > dmi_init(); > > @@ -321,12 +338,11 @@ int internal_init(void) > init_superio_ite(); > #endif > > - board_flash_enable(lb_vendor, lb_part); > + if (board_flash_enable(board_vendor, board_model)) { > + msg_perr("Aborting to be safe.\n"); > + return 1; > + } > > - /* Even if chipset init returns an error code, we don't want to abort. > - * The error code might have been a warning only. The two lines above still make sense AFAICS. > - * Besides that, we don't check the board enable return code either. The line above can be killed as you did. > - */ > #if defined(__i386__) || defined(__x86_64__) || defined (__mips) > register_par_programmer(&par_programmer_internal, internal_buses_supported); > return 0; Thanks for cleaning up this code! Regards, Carl-Daniel -- http://www.hailfinger.org/

2 4

[commit] r1577 - trunk
by repository service 20 Aug '12

20 Aug '12

Author: stefanct Date: Mon Aug 20 02:24:22 2012 New Revision: 1577 URL: http://flashrom.org/trac/flashrom/changeset/1577 Log: Refactor the -p internal:mainboard handling. This patch gets rid of some global variables and makes lots of bits along the code path that control the board enable execution more generic and clearer. From now on flashrom aborts on a few more occasions that should be safer for the user. For example it aborts if the enable function for the specified mainboard (enable) can not be found. Parts of the board_match_cbname refactoring were done by Carl-Daniel. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/cbtable.c trunk/flashrom.8 trunk/flashrom.c trunk/internal.c trunk/programmer.h Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/board_enable.c Mon Aug 20 02:24:22 2012 (r1577) @@ -25,6 +25,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" #include "programmer.h" #include "hwaccess.h" @@ -2443,41 +2444,64 @@ { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ }; +/* Parse the <vendor>:<board> string specified by the user as part of -p internal:mainboard=<vendor>:<board>. + * Parameters vendor and model will be overwritten. Returns 0 on success. + * Note: strtok modifies the original string, so we work on a copy and allocate memory for the results. + */ +int board_parse_parameter(const char *boardstring, const char **vendor, const char **model) +{ + /* strtok may modify the original string. */ + char *tempstr = strdup(boardstring); + char *tempstr2 = NULL; + strtok(tempstr, ":"); + tempstr2 = strtok(NULL, ":"); + if (tempstr == NULL || tempstr2 == NULL) { + free(tempstr); + msg_pinfo("Please supply the board vendor and model name with the " + "-p internal:mainboard=<vendor>:<model> option.\n"); + return 1; + } + *vendor = strdup(tempstr); + *model = strdup(tempstr2); + msg_pspew("-p internal:mainboard: vendor=\"%s\", model=\"%s\"\n", tempstr, tempstr2); + free(tempstr); + return 0; +} + /* - * Match boards on coreboot table gathered vendor and part name. + * Match boards on vendor and model name. + * Hint: the parameters can come either from the coreboot table or the command line (i.e. the user). * Require main PCI IDs to match too as extra safety. + * vendor and model must be non-NULL! */ -static const struct board_match *board_match_cbname(const char *vendor, - const char *part) +static const struct board_match *board_match_name(const char *vendor, const char *model) { const struct board_match *board = board_matches; const struct board_match *partmatch = NULL; for (; board->vendor_name; board++) { - if (vendor && (!board->lb_vendor - || strcasecmp(board->lb_vendor, vendor))) + if (!board->lb_vendor || strcasecmp(board->lb_vendor, vendor)) continue; - if (!board->lb_part || strcasecmp(board->lb_part, part)) + if (!board->lb_part || strcasecmp(board->lb_part, model)) continue; - if (!pci_dev_find(board->first_vendor, board->first_device)) + if (!pci_dev_find(board->first_vendor, board->first_device)) { + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but first PCI device %04x:%04x " + "doesn't.\n", vendor, model, board->first_vendor, board->first_device); continue; + } - if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) + if (!pci_dev_find(board->second_vendor, board->second_device)) { + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but second PCI device %04x:%04x " + "doesn't.\n", vendor, model, board->second_vendor, board->second_device); continue; - - if (vendor) - return board; + } if (partmatch) { - /* a second entry has a matching part name */ - msg_pinfo("AMBIGUOUS BOARD NAME: %s\n", part); - msg_pinfo("At least vendors '%s' and '%s' match.\n", - partmatch->lb_vendor, board->lb_vendor); - msg_perr("Please use the full -p internal:mainboard=" - "vendor:part syntax.\n"); + /* More than one entry has a matching name. */ + msg_perr("Board name \"%s\":\"%s\" and PCI IDs matched more than one board enable " + "entry. Please report a bug at flashrom(a)flashrom.org\n", vendor, model); return NULL; } partmatch = board; @@ -2486,15 +2510,7 @@ if (partmatch) return partmatch; - if (!partvendor_from_cbtable) { - /* Only warn if the mainboard type was not gathered from the - * coreboot table. If it was, the coreboot implementor is - * expected to fix flashrom, too. - */ - msg_perr("\nUnknown vendor:board from -p internal:mainboard=" - " programmer parameter:\n%s:%s\n\n", - vendor, part); - } + msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); return NULL; } @@ -2534,9 +2550,10 @@ if (board->dmi_pattern) { if (!has_dmi_support) { - msg_perr("WARNING: Can't autodetect %s %s," - " DMI info unavailable.\n", + msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", board->vendor_name, board->board_name); + msg_pinfo("Please supply the board vendor and model name with the " + "-p internal:mainboard=<vendor>:<model> option.\n"); continue; } else { if (!dmi_match(board->dmi_pattern)) @@ -2550,7 +2567,7 @@ return NULL; } -static int unsafe_board_handler(const struct board_match *board) +static int board_enable_safetycheck(const struct board_match *board) { if (!board) return 1; @@ -2559,18 +2576,15 @@ return 0; if (!force_boardenable) { - msg_pinfo("WARNING: Your mainboard is %s %s, but the mainboard-specific\n" - "code has not been tested, and thus will not be executed by default.\n" - "Depending on your hardware environment, erasing, writing or even probing\n" - "can fail without running the board specific code.\n\n" + msg_pinfo("WARNING: The mainboard-specific code for %s %s has not been tested,\n" + "and thus will not be executed by default. Depending on your hardware,\n" + "erasing, writing or even probing can fail without running this code.\n\n" "Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n" - "\"internal programmer\") for details.\n", - board->vendor_name, board->board_name); + "\"internal programmer\") for details.\n", board->vendor_name, board->board_name); return 1; } msg_pinfo("NOTE: Running an untested board enable procedure.\n" - "Please report success/failure to flashrom(a)flashrom.org\n" - "with your board name and SUCCESS or FAILURE in the subject.\n"); + "Please report success/failure to flashrom(a)flashrom.org.\n"); return 0; } @@ -2581,12 +2595,12 @@ board = board_match_pci_ids(phase); - if (unsafe_board_handler(board)) - board = NULL; - if (!board) return 0; + if (board_enable_safetycheck(board)) + return 0; + if (!board->enable) { /* Not sure if there is a valid case for this. */ msg_perr("Board match found, but nothing to do?\n"); @@ -2606,36 +2620,37 @@ board_handle_phase(P2); } -int board_flash_enable(const char *vendor, const char *part) +int board_flash_enable(const char *vendor, const char *model) { const struct board_match *board = NULL; int ret = 0; - if (part) - board = board_match_cbname(vendor, part); - - if (!board) + if (vendor && model) { + board = board_match_name(vendor, model); + if (!board) /* if a board was given it has to match, else we abort here. */ + return 1; + } else { board = board_match_pci_ids(P3); + if (!board) /* i.e. there is just no board enable available for this board */ + return 0; + } - if (unsafe_board_handler(board)) - board = NULL; + if (board_enable_safetycheck(board)) + return 1; - if (board) { - if (board->max_rom_decode_parallel) - max_rom_decode.parallel = - board->max_rom_decode_parallel * 1024; - - if (board->enable != NULL) { - msg_pinfo("Disabling flash write protection for " - "board \"%s %s\"... ", board->vendor_name, - board->board_name); - - ret = board->enable(); - if (ret) - msg_pinfo("FAILED!\n"); - else - msg_pinfo("OK.\n"); - } + /* limit the maximum size of the parallel bus */ + if (board->max_rom_decode_parallel) + max_rom_decode.parallel = board->max_rom_decode_parallel * 1024; + + if (board->enable != NULL) { + msg_pinfo("Enabling full flash access for board \"%s %s\"... ", + board->vendor_name, board->board_name); + + ret = board->enable(); + if (ret) + msg_pinfo("FAILED!\n"); + else + msg_pinfo("OK.\n"); } return ret; Modified: trunk/cbtable.c ============================================================================== --- trunk/cbtable.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/cbtable.c Mon Aug 20 02:24:22 2012 (r1577) @@ -24,57 +24,36 @@ #include <unistd.h> #include <stdio.h> -#include <stdlib.h> #include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" #include "coreboot_tables.h" -char *lb_part = NULL, *lb_vendor = NULL; -int partvendor_from_cbtable = 0; -static char *def_name = "DEFAULT"; -static char *mainboard_vendor = NULL; -static char *mainboard_part = NULL; - -/* Parse the [<vendor>:]<board> string specified by the user as part of - * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part - * to the extracted values. - * Note: strtok modifies the original string, so we work on a copy and allocate - * memory for lb_vendor and lb_part with strdup. - */ -void lb_vendor_dev_from_string(const char *boardstring) -{ - /* strtok may modify the original string. */ - char *tempstr = strdup(boardstring); - char *tempstr2 = NULL; - strtok(tempstr, ":"); - tempstr2 = strtok(NULL, ":"); - if (tempstr2) { - lb_vendor = strdup(tempstr); - lb_part = strdup(tempstr2); - } else { - lb_vendor = NULL; - lb_part = strdup(tempstr); - } - free(tempstr); -} +static char *cb_vendor = NULL, *cb_model = NULL; -int show_id(uint8_t *bios, int size) +/* Tries to find coreboot IDs in the supplied image and compares them to the current IDs. + * Returns... + * -1 if IDs in the image do not match the IDs embedded in the current firmware, + * 0 if the IDs could not be found in the image or if they match correctly. + */ +int cb_check_image(uint8_t *image, int size) { + const char *image_vendor = NULL; + const char *image_model = NULL; unsigned int *walk; unsigned int mb_part_offset, mb_vendor_offset; char *mb_part, *mb_vendor; - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); + walk = (unsigned int *)(image + size - 0x10); walk--; if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ - walk = (unsigned int *)(bios + size - 0x80); + /* Some NVIDIA chipsets store chipset soft straps (IIRC Hypertransport init info etc.) in + * flash at exactly the location where coreboot image size, coreboot vendor name pointer and + * coreboot board name pointer are usually stored. In this case coreboot uses an alternate + * location for the coreboot image data. */ + walk = (unsigned int *)(image + size - 0x80); walk--; } @@ -88,49 +67,38 @@ mb_vendor_offset = *(walk - 2); if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + msg_pdbg("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); return 0; } - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); + mb_part = (char *)(image + size - mb_part_offset); + mb_vendor = (char *)(image + size - mb_vendor_offset); if (!isprint((unsigned char)*mb_part) || !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + msg_pdbg("Flash image seems to have garbage in the ID location. " + "Disabling coreboot-related checks.\n"); return 0; } msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); + image_vendor = strdup(mb_vendor); + image_model = strdup(mb_part); + msg_pdbg("Manufacturer: %s\n", image_vendor); + msg_pdbg("Mainboard ID: %s\n", image_model); /* If these are not set, the coreboot table was not found. */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); + if (!cb_vendor || !cb_model) return 0; - } /* These comparisons are case insensitive to make things a little less user^Werror prone. */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); + if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) { + msg_pdbg2("This coreboot image matches this mainboard.\n"); } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" - " be correct for the detected mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=force to ignore the board name\n" - "in the firmware image or override the detected mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>.\n\n", - mainboard_vendor, mainboard_part, lb_vendor, lb_part); - return 1; - } + msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s).\n", + image_vendor, image_model, cb_vendor, cb_model); + return -1; } return 0; @@ -242,22 +210,15 @@ rec = (struct lb_mainboard *)ptr; max_size = rec->size - sizeof(*rec); msg_pdbg("Vendor ID: %.*s, part ID: %.*s\n", - max_size - rec->vendor_idx, - rec->strings + rec->vendor_idx, - max_size - rec->part_number_idx, - rec->strings + rec->part_number_idx); - snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, - rec->strings + rec->vendor_idx); - snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, - rec->strings + rec->part_number_idx); + max_size - rec->vendor_idx, + rec->strings + rec->vendor_idx, + max_size - rec->part_number_idx, + rec->strings + rec->part_number_idx); + snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, rec->strings + rec->vendor_idx); + snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, rec->strings + rec->part_number_idx); - if (lb_part) { - msg_pdbg("Overwritten by command line, vendor ID: %s, part ID: %s.\n", lb_vendor, lb_part); - } else { - partvendor_from_cbtable = 1; - lb_part = strdup(part); - lb_vendor = strdup(vendor); - } + cb_vendor = strdup(vendor); + cb_model = strdup(part); } static struct lb_record *next_record(struct lb_record *rec) @@ -265,8 +226,7 @@ return (struct lb_record *)(((char *)rec) + rec->size); } -static void search_lb_records(struct lb_record *rec, struct lb_record *last, - unsigned long addr) +static void search_lb_records(struct lb_record *rec, struct lb_record *last, unsigned long addr) { struct lb_record *next; int count; @@ -284,7 +244,8 @@ } #define BYTES_TO_MAP (1024*1024) -int coreboot_init(void) +/* returns 0 if the table was parsed successfully and cb_vendor/cb_model have been set. */ +int cb_parse_table(const char **vendor, const char **model) { uint8_t *table_area; unsigned long addr, start; @@ -317,8 +278,7 @@ physunmap(table_area, BYTES_TO_MAP); table_area = physmap_try_ro("high tables", start, BYTES_TO_MAP); if (ERROR_PTR == table_area) { - msg_perr("Failed getting access to coreboot " - "high tables.\n"); + msg_perr("Failed getting access to coreboot high tables.\n"); return -1; } lb_table = find_lb_table(table_area, 0x00000, 0x1000); @@ -340,6 +300,7 @@ lb_table->table_bytes, lb_table->table_checksum, lb_table->table_entries); search_lb_records(rec, last, addr + lb_table->header_bytes); - + *vendor = cb_vendor; + *model = cb_model; return 0; } Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/flashrom.8 Mon Aug 20 02:24:22 2012 (r1577) @@ -259,7 +259,7 @@ identify the mainboard (which is the exception), or if you want to override the detected mainboard model, you can specify the mainboard using the .sp -.B " flashrom \-p internal:mainboard=[<vendor>:]<board>" +.B " flashrom \-p internal:mainboard=<vendor>:<board>" syntax. .sp See the 'Known boards' or 'Known laptops' section in the output Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/flashrom.c Mon Aug 20 02:24:22 2012 (r1577) @@ -1012,12 +1012,11 @@ "work, but to support all possible " "features"); - msg_cinfo(" we need to add them manually.\nYou " - "can help us by mailing us the output of " - "the following command to flashrom@flashrom." - "org: \n'flashrom -VV [plus the " - "-p/--programmer parameter (if needed)]" - "'\nThanks for your help!\n" + msg_cinfo(" we need to add them manually.\n" + "You can help us by mailing us the output of the following command to " + "flashrom@flashrom.org:\n" + "'flashrom -VV [plus the -p/--programmer parameter]'\n" + "Thanks for your help!\n" "===\n"); } @@ -1814,11 +1813,16 @@ } #if CONFIG_INTERNAL == 1 - if (programmer == PROGRAMMER_INTERNAL) - if (show_id(newcontents, size)) { + if (programmer == PROGRAMMER_INTERNAL && cb_check_image(newcontents, size) < 0) { + if (force_boardmismatch) { + msg_pinfo("Proceeding anyway because user forced us to.\n"); + } else { + msg_perr("Aborting. You can override this with " + "-p internal:boardmismatch=force.\n"); ret = 1; goto out; } + } #endif } Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/internal.c Mon Aug 20 02:24:22 2012 (r1577) @@ -169,6 +169,10 @@ #endif int force_laptop = 0; int not_a_laptop = 0; + const char *board_vendor = NULL; + const char *board_model = NULL; + const char *cb_vendor = NULL; + const char *cb_model = NULL; char *arg; arg = extract_programmer_param("boardenable"); @@ -217,7 +221,10 @@ arg = extract_programmer_param("mainboard"); if (arg && strlen(arg)) { - lb_vendor_dev_from_string(arg); + if (board_parse_parameter(arg, &board_vendor, &board_model)) { + free(arg); + return 1; + } } else if (arg && !strlen(arg)) { msg_perr("Missing argument for mainboard.\n"); free(arg); @@ -249,10 +256,20 @@ } #if defined(__i386__) || defined(__x86_64__) - /* We look at the cbtable first to see if we need a - * mainboard specific flash enable sequence. - */ - coreboot_init(); + if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ + /* If no -p internal:mainboard was given but there are valid coreboot IDs then use those. */ + if (board_vendor == NULL || board_model == NULL) { + board_vendor = cb_vendor; + board_model = cb_model; + } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { + msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" + " match the current coreboot IDs of the mainboard (%s:%s).\n", + board_vendor, board_model, cb_vendor, cb_model); + if (!force_boardmismatch) + return 1; + msg_pinfo("Continuing anyway.\n"); + } + } dmi_init(); @@ -321,11 +338,13 @@ init_superio_ite(); #endif - board_flash_enable(lb_vendor, lb_part); + if (board_flash_enable(board_vendor, board_model)) { + msg_perr("Aborting to be safe.\n"); + return 1; + } /* Even if chipset init returns an error code, we don't want to abort. * The error code might have been a warning only. - * Besides that, we don't check the board enable return code either. */ #if defined(__i386__) || defined(__x86_64__) || defined (__mips) register_par_programmer(&par_programmer_internal, internal_buses_supported); Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/programmer.h Mon Aug 20 02:24:22 2012 (r1577) @@ -246,6 +246,7 @@ #if CONFIG_INTERNAL == 1 /* board_enable.c */ +int board_parse_parameter(const char *boardstring, const char **vendor, const char **model); void w836xx_ext_enter(uint16_t port); void w836xx_ext_leave(uint16_t port); void probe_superio_winbond(void); @@ -255,7 +256,7 @@ void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); -int board_flash_enable(const char *vendor, const char *part); +int board_flash_enable(const char *vendor, const char *model); /* chipset_enable.c */ int chipset_flash_enable(void); @@ -273,11 +274,8 @@ void cleanup_cpu_msr(void); /* cbtable.c */ -void lb_vendor_dev_from_string(const char *boardstring); -int show_id(uint8_t *bios, int size); -int coreboot_init(void); -extern char *lb_part, *lb_vendor; -extern int partvendor_from_cbtable; +int cb_parse_table(const char **vendor, const char **model); +int cb_check_image(uint8_t *bios, int size); /* dmi.c */ extern int has_dmi_support;

1 0

K9N6SGM-V
by Perpetuum Mobile (ukr.net) 19 Aug '12

19 Aug '12

http://www.msi.com/product/mb/K9N6SGM-V---K9N6PGM-FI---K9N6PGM- F.html#/?div=Detail

2 3

[PATCH] Bus Pirate init cleanup and fixes
by Carl-Daniel Hailfinger 17 Aug '12

17 Aug '12

The Bus Pirate firmware (at least v6.1 and earlier) can't handle UART input buffer overflow in BBIO mode, and sending a sequence of 0x00 too fast apparently triggers such an UART input buffer overflow. Wait 10 ms after sending each 0x00 byte during init to give the Bus Pirate enough time to handle the input. This fixes a Bus Pirate hang if the previous flashrom run was aborted by the user. The Bus Pirate firmware v6.1 and earlier use the wrong (too slow) SPI speed if more than 2 MHz are requested. Automatically downgrade SPI speed to 2 MHz for affected firmware versions. Detect Bus Pirate hardware and firmware versions to allow quirk handling. The Bus Pirate init sequence has lots of open-coded sequences which wait for a given string on the serial line. Refactor them into buspirate_wait_for_string(). User-visible changes: Fix hang, use 2 MHz SPI speed on buggy firmware. Note: This patch does _not_ include support for the fast access mode present in firmware 5.5 and later. Tested with Bus Pirate hardware v3a and v3b, firmwares 4.0, 5.2 and 6.2-beta. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-buspirate_initcleanup/buspirate_spi.c =================================================================== --- flashrom-buspirate_initcleanup/buspirate_spi.c (Revision 1546) +++ flashrom-buspirate_initcleanup/buspirate_spi.c (Arbeitskopie) @@ -83,7 +83,8 @@ msg_perr("Zero length command!\n"); return 1; } - msg_pspew("Sending"); + if (writecnt) + msg_pspew("Sending"); for (i = 0; i < writecnt; i++) msg_pspew(" 0x%02x", buf[i]); #ifdef FAKE_COMMUNICATION @@ -103,19 +104,32 @@ if (ret) return ret; #endif - msg_pspew(", receiving"); + if (readcnt) + msg_pspew(", receiving"); for (i = 0; i < readcnt; i++) msg_pspew(" 0x%02x", buf[i]); msg_pspew("\n"); return 0; } -static int buspirate_spi_send_command(struct flashctx *flash, - unsigned int writecnt, - unsigned int readcnt, - const unsigned char *writearr, - unsigned char *readarr); +static int buspirate_wait_for_string(unsigned char *buf, char *key) +{ + unsigned int keylen = strlen(key); + int ret; + ret = buspirate_sendrecv(buf, 0, keylen); + while (!ret) { + if (!memcmp(buf, key, keylen)) + return 0; + memmove(buf, buf + 1, keylen - 1); + ret = buspirate_sendrecv(buf + keylen - 1, 0, 1); + } + return ret; +} + +static int buspirate_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); + static const struct spi_programmer spi_programmer_buspirate = { .type = SPI_CONTROLLER_BUSPIRATE, .max_data_read = 12, @@ -146,17 +160,15 @@ /* Exit raw SPI mode (enter raw bitbang mode) */ bp_commbuf[0] = 0x00; - ret = buspirate_sendrecv(bp_commbuf, 1, 5); - if (ret) + if ((ret = buspirate_sendrecv(bp_commbuf, 1, 0))) goto out_shutdown; - if (memcmp(bp_commbuf, "BBIO", 4)) { - msg_perr("Entering raw bitbang mode failed!\n"); - ret = 1; + if ((ret = buspirate_wait_for_string(bp_commbuf, "BBIO"))) goto out_shutdown; - } - msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[4]); - if (bp_commbuf[4] != '1') { - msg_perr("Can't handle raw bitbang mode version %c!\n", bp_commbuf[4]); + if ((ret = buspirate_sendrecv(bp_commbuf, 0, 1))) + goto out_shutdown; + msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[0]); + if (bp_commbuf[0] != '1') { + msg_perr("Can't handle raw bitbang mode version %c!\n", bp_commbuf[0]); ret = 1; goto out_shutdown; } @@ -181,18 +193,26 @@ return ret; } +#define BP_FWVERSION(a,b) ((a) << 8 | (b)) + int buspirate_spi_init(void) { char *dev = NULL; char *speed = NULL; + char *tmp; + unsigned int fw_version_major = 0; + unsigned int fw_version_minor = 0; int spispeed = 0x7; int ret = 0; int i; dev = extract_programmer_param("dev"); - if (!dev || !strlen(dev)) { - msg_perr("No serial device given. Use flashrom -p " - "buspirate_spi:dev=/dev/ttyUSB0\n"); + if (dev && !strlen(dev)) { + free(dev); + dev = NULL; + } + if (!dev) { + msg_perr("No serial device given. Use flashrom -p buspirate_spi:dev=/dev/ttyUSB0\n"); return 1; } @@ -209,9 +229,6 @@ } free(speed); - /* This works because speeds numbering starts at 0 and is contiguous. */ - msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed].name); - /* Default buffer size is 19: 16 bytes data, 3 bytes control. */ #define DEFAULT_BUFSIZE (16 + 3) bp_commbuf = malloc(DEFAULT_BUFSIZE); @@ -235,66 +252,118 @@ return 1; /* This is the brute force version, but it should work. */ - for (i = 0; i < 19; i++) { + for (i = 0; i < 20; i++) { /* Enter raw bitbang mode */ bp_commbuf[0] = 0x00; /* Send the command, don't read the response. */ ret = buspirate_sendrecv(bp_commbuf, 1, 0); if (ret) return ret; - /* Read any response and discard it. */ - sp_flush_incoming(); + /* The old way to handle responses from a Bus Pirate already in BBIO mode was to flush any + * response which came in over serial. Unfortunately that does not work reliably on Linux + * with FTDI USB-serial. + */ + //sp_flush_incoming(); + /* The Bus Pirate can't handle UART input buffer overflow in BBIO mode, and sending a sequence + * of 0x00 too fast apparently triggers such an UART input buffer overflow. + */ + usleep(10000); } - /* USB is slow. The Bus Pirate is even slower. Apparently the flush - * action above is too fast or too early. Some stuff still remains in - * the pipe after the flush above, and one additional flush is not - * sufficient either. Use a 1.5 ms delay inside the loop to make - * mostly sure that at least one USB frame had time to arrive. - * Looping only 5 times is not sufficient and causes the - * occasional failure. - * Folding the delay into the loop above is not reliable either. - */ - for (i = 0; i < 10; i++) { - usleep(1500); - /* Read any response and discard it. */ - sp_flush_incoming(); + /* We know that 20 commands of \0 should elicit at least one BBIO1 response. */ + if ((ret = buspirate_wait_for_string(bp_commbuf, "BBIO"))) + return ret; + + /* Reset the Bus Pirate. */ + bp_commbuf[0] = 0x0f; + /* Send the command, don't read the response. */ + if ((ret = buspirate_sendrecv(bp_commbuf, 1, 0))) + return ret; + if ((ret = buspirate_wait_for_string(bp_commbuf, "irate "))) + return ret; + /* Read the hardware version string. Last byte of the buffer is reserved for \0. */ + for (i = 0; i < DEFAULT_BUFSIZE - 1; i++) { + if ((ret = buspirate_sendrecv(bp_commbuf + i, 0, 1))) + return ret; + if (strchr("\r\n\t ", bp_commbuf[i])) + break; } + bp_commbuf[i] = '\0'; + msg_pdbg("Detected Bus Pirate hardware %s\n", bp_commbuf); + + if ((ret = buspirate_wait_for_string(bp_commbuf, "irmware "))) + return ret; + /* Read the firmware version string. Last byte of the buffer is reserved for \0. */ + for (i = 0; i < DEFAULT_BUFSIZE - 1; i++) { + if ((ret = buspirate_sendrecv(bp_commbuf + i, 0, 1))) + return ret; + if (strchr("\r\n\t ", bp_commbuf[i])) + break; + } + bp_commbuf[i] = '\0'; + msg_pdbg("Detected Bus Pirate firmware "); + if (bp_commbuf[0] != 'v') + msg_pdbg("(unknown version number format)\n"); + else if (!strchr("0123456789", bp_commbuf[1])) + msg_pdbg("(unknown version number format)"); + else { + fw_version_major = strtoul((char *)bp_commbuf + 1, &tmp, 10); + while ((*tmp != '\0') && !strchr("0123456789", *tmp)) + tmp++; + fw_version_minor = strtoul(tmp, NULL, 10); + msg_pdbg("%u.%u", fw_version_major, fw_version_minor); + } + msg_pdbg2(" (\"%s\")", bp_commbuf); + msg_pdbg("\n"); + + if ((ret = buspirate_wait_for_string(bp_commbuf, "HiZ>"))) + return ret; + + /* Workaround for broken speed settings in firmware 6.1 and older. */ + if (BP_FWVERSION(fw_version_major, fw_version_minor) < BP_FWVERSION(6, 2)) + if (spispeed > 0x4) { + msg_perr("Bus Pirate firmware 6.1 and older does not support SPI speeds above 2 MHz. " + "Limiting speed to 2 MHz.\n"); + msg_pinfo("It is recommended to upgrade to firmware 6.2 or newer.\n"); + spispeed = 0x4; + } + + /* Tell the user about missing SPI binary mode in firmware 2.3 and older. */ + if (BP_FWVERSION(fw_version_major, fw_version_minor) < BP_FWVERSION(2, 4)) { + msg_pinfo("Bus Pirate firmware 2.3 and older does not support binary SPI access.\n"); + msg_pinfo("Please upgrade to the latest firmware (at least 2.4).\n"); + return SPI_PROGRAMMER_ERROR; + } + + /* This works because speeds numbering starts at 0 and is contiguous. */ + msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed].name); + /* Enter raw bitbang mode */ - bp_commbuf[0] = 0x00; - ret = buspirate_sendrecv(bp_commbuf, 1, 5); - if (ret) + for (i = 0; i < 20; i++) { + bp_commbuf[0] = 0x00; + if ((ret = buspirate_sendrecv(bp_commbuf, 1, 0))) + return ret; + } + if ((ret = buspirate_wait_for_string(bp_commbuf, "BBIO"))) return ret; - if (memcmp(bp_commbuf, "BBIO", 4)) { - msg_perr("Entering raw bitbang mode failed!\n"); - msg_pdbg("Got %02x%02x%02x%02x%02x\n", - bp_commbuf[0], bp_commbuf[1], bp_commbuf[2], - bp_commbuf[3], bp_commbuf[4]); + if ((ret = buspirate_sendrecv(bp_commbuf, 0, 1))) + return ret; + msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[0]); + if (bp_commbuf[0] != '1') { + msg_perr("Can't handle raw bitbang mode version %c!\n", bp_commbuf[0]); return 1; } - msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[4]); - if (bp_commbuf[4] != '1') { - msg_perr("Can't handle raw bitbang mode version %c!\n", - bp_commbuf[4]); - return 1; - } /* Enter raw SPI mode */ bp_commbuf[0] = 0x01; - ret = buspirate_sendrecv(bp_commbuf, 1, 4); - if (ret) + ret = buspirate_sendrecv(bp_commbuf, 1, 0); + if ((ret = buspirate_wait_for_string(bp_commbuf, "SPI"))) return ret; - if (memcmp(bp_commbuf, "SPI", 3)) { - msg_perr("Entering raw SPI mode failed!\n"); - msg_pdbg("Got %02x%02x%02x%02x\n", - bp_commbuf[0], bp_commbuf[1], bp_commbuf[2], - bp_commbuf[3]); + if ((ret = buspirate_sendrecv(bp_commbuf, 0, 1))) + return ret; + msg_pdbg("Raw SPI mode version %c\n", bp_commbuf[0]); + if (bp_commbuf[0] != '1') { + msg_perr("Can't handle raw SPI mode version %c!\n", bp_commbuf[0]); return 1; } - msg_pdbg("Raw SPI mode version %c\n", bp_commbuf[3]); - if (bp_commbuf[3] != '1') { - msg_perr("Can't handle raw SPI mode version %c!\n", - bp_commbuf[3]); - return 1; - } /* Initial setup (SPI peripherals config): Enable power, CS high, AUX */ bp_commbuf[0] = 0x40 | 0xb; -- http://www.hailfinger.org/

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[commit] r1576 - trunk
by repository service 17 Aug '12

17 Aug '12

Author: hailfinger Date: Fri Aug 17 19:30:43 2012 New Revision: 1576 URL: http://flashrom.org/trac/flashrom/changeset/1576 Log: Bus Pirate init cleanup and fixes. The Bus Pirate firmware (at least v6.1 and earlier) can't handle UART input buffer overflow in BBIO mode, and sending a sequence of 0x00 too fast apparently triggers such an UART input buffer overflow. Wait 10 ms after sending each 0x00 byte during init to give the Bus Pirate enough time to handle the input. This fixes a Bus Pirate hang if the previous flashrom run was aborted by the user. The Bus Pirate firmware v6.1 and earlier use the wrong (too slow) SPI speed if more than 2 MHz are requested. Automatically downgrade SPI speed to 2 MHz for affected firmware versions. Detect Bus Pirate hardware and firmware versions to allow quirk handling. The Bus Pirate init sequence has lots of open-coded sequences which wait for a given string on the serial line. Refactor them into buspirate_wait_for_string(). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/buspirate_spi.c Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Thu Aug 16 01:06:32 2012 (r1575) +++ trunk/buspirate_spi.c Fri Aug 17 19:30:43 2012 (r1576) @@ -84,7 +84,8 @@ msg_perr("Zero length command!\n"); return 1; } - msg_pspew("Sending"); + if (writecnt) + msg_pspew("Sending"); for (i = 0; i < writecnt; i++) msg_pspew(" 0x%02x", buf[i]); #ifdef FAKE_COMMUNICATION @@ -104,18 +105,31 @@ if (ret) return ret; #endif - msg_pspew(", receiving"); + if (readcnt) + msg_pspew(", receiving"); for (i = 0; i < readcnt; i++) msg_pspew(" 0x%02x", buf[i]); msg_pspew("\n"); return 0; } -static int buspirate_spi_send_command(struct flashctx *flash, - unsigned int writecnt, - unsigned int readcnt, - const unsigned char *writearr, - unsigned char *readarr); +static int buspirate_wait_for_string(unsigned char *buf, char *key) +{ + unsigned int keylen = strlen(key); + int ret; + + ret = buspirate_sendrecv(buf, 0, keylen); + while (!ret) { + if (!memcmp(buf, key, keylen)) + return 0; + memmove(buf, buf + 1, keylen - 1); + ret = buspirate_sendrecv(buf + keylen - 1, 0, 1); + } + return ret; +} + +static int buspirate_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); static const struct spi_programmer spi_programmer_buspirate = { .type = SPI_CONTROLLER_BUSPIRATE, @@ -147,17 +161,15 @@ /* Exit raw SPI mode (enter raw bitbang mode) */ bp_commbuf[0] = 0x00; - ret = buspirate_sendrecv(bp_commbuf, 1, 5); - if (ret) + if ((ret = buspirate_sendrecv(bp_commbuf, 1, 0))) goto out_shutdown; - if (memcmp(bp_commbuf, "BBIO", 4)) { - msg_perr("Entering raw bitbang mode failed!\n"); - ret = 1; + if ((ret = buspirate_wait_for_string(bp_commbuf, "BBIO"))) goto out_shutdown; - } - msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[4]); - if (bp_commbuf[4] != '1') { - msg_perr("Can't handle raw bitbang mode version %c!\n", bp_commbuf[4]); + if ((ret = buspirate_sendrecv(bp_commbuf, 0, 1))) + goto out_shutdown; + msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[0]); + if (bp_commbuf[0] != '1') { + msg_perr("Can't handle raw bitbang mode version %c!\n", bp_commbuf[0]); ret = 1; goto out_shutdown; } @@ -182,18 +194,26 @@ return ret; } +#define BP_FWVERSION(a,b) ((a) << 8 | (b)) + int buspirate_spi_init(void) { char *dev = NULL; char *speed = NULL; + char *tmp; + unsigned int fw_version_major = 0; + unsigned int fw_version_minor = 0; int spispeed = 0x7; int ret = 0; int i; dev = extract_programmer_param("dev"); - if (!dev || !strlen(dev)) { - msg_perr("No serial device given. Use flashrom -p " - "buspirate_spi:dev=/dev/ttyUSB0\n"); + if (dev && !strlen(dev)) { + free(dev); + dev = NULL; + } + if (!dev) { + msg_perr("No serial device given. Use flashrom -p buspirate_spi:dev=/dev/ttyUSB0\n"); return 1; } @@ -210,9 +230,6 @@ } free(speed); - /* This works because speeds numbering starts at 0 and is contiguous. */ - msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed].name); - /* Default buffer size is 19: 16 bytes data, 3 bytes control. */ #define DEFAULT_BUFSIZE (16 + 3) bp_commbuf = malloc(DEFAULT_BUFSIZE); @@ -236,64 +253,116 @@ return 1; /* This is the brute force version, but it should work. */ - for (i = 0; i < 19; i++) { + for (i = 0; i < 20; i++) { /* Enter raw bitbang mode */ bp_commbuf[0] = 0x00; /* Send the command, don't read the response. */ ret = buspirate_sendrecv(bp_commbuf, 1, 0); if (ret) return ret; - /* Read any response and discard it. */ - sp_flush_incoming(); + /* The old way to handle responses from a Bus Pirate already in BBIO mode was to flush any + * response which came in over serial. Unfortunately that does not work reliably on Linux + * with FTDI USB-serial. + */ + //sp_flush_incoming(); + /* The Bus Pirate can't handle UART input buffer overflow in BBIO mode, and sending a sequence + * of 0x00 too fast apparently triggers such an UART input buffer overflow. + */ + usleep(10000); + } + /* We know that 20 commands of \0 should elicit at least one BBIO1 response. */ + if ((ret = buspirate_wait_for_string(bp_commbuf, "BBIO"))) + return ret; + + /* Reset the Bus Pirate. */ + bp_commbuf[0] = 0x0f; + /* Send the command, don't read the response. */ + if ((ret = buspirate_sendrecv(bp_commbuf, 1, 0))) + return ret; + if ((ret = buspirate_wait_for_string(bp_commbuf, "irate "))) + return ret; + /* Read the hardware version string. Last byte of the buffer is reserved for \0. */ + for (i = 0; i < DEFAULT_BUFSIZE - 1; i++) { + if ((ret = buspirate_sendrecv(bp_commbuf + i, 0, 1))) + return ret; + if (strchr("\r\n\t ", bp_commbuf[i])) + break; } - /* USB is slow. The Bus Pirate is even slower. Apparently the flush - * action above is too fast or too early. Some stuff still remains in - * the pipe after the flush above, and one additional flush is not - * sufficient either. Use a 1.5 ms delay inside the loop to make - * mostly sure that at least one USB frame had time to arrive. - * Looping only 5 times is not sufficient and causes the - * occasional failure. - * Folding the delay into the loop above is not reliable either. - */ - for (i = 0; i < 10; i++) { - usleep(1500); - /* Read any response and discard it. */ - sp_flush_incoming(); + bp_commbuf[i] = '\0'; + msg_pdbg("Detected Bus Pirate hardware %s\n", bp_commbuf); + + if ((ret = buspirate_wait_for_string(bp_commbuf, "irmware "))) + return ret; + /* Read the firmware version string. Last byte of the buffer is reserved for \0. */ + for (i = 0; i < DEFAULT_BUFSIZE - 1; i++) { + if ((ret = buspirate_sendrecv(bp_commbuf + i, 0, 1))) + return ret; + if (strchr("\r\n\t ", bp_commbuf[i])) + break; } - /* Enter raw bitbang mode */ - bp_commbuf[0] = 0x00; - ret = buspirate_sendrecv(bp_commbuf, 1, 5); - if (ret) + bp_commbuf[i] = '\0'; + msg_pdbg("Detected Bus Pirate firmware "); + if (bp_commbuf[0] != 'v') + msg_pdbg("(unknown version number format)"); + else if (!strchr("0123456789", bp_commbuf[1])) + msg_pdbg("(unknown version number format)"); + else { + fw_version_major = strtoul((char *)bp_commbuf + 1, &tmp, 10); + while ((*tmp != '\0') && !strchr("0123456789", *tmp)) + tmp++; + fw_version_minor = strtoul(tmp, NULL, 10); + msg_pdbg("%u.%u", fw_version_major, fw_version_minor); + } + msg_pdbg2(" (\"%s\")", bp_commbuf); + msg_pdbg("\n"); + + if ((ret = buspirate_wait_for_string(bp_commbuf, "HiZ>"))) return ret; - if (memcmp(bp_commbuf, "BBIO", 4)) { - msg_perr("Entering raw bitbang mode failed!\n"); - msg_pdbg("Got %02x%02x%02x%02x%02x\n", - bp_commbuf[0], bp_commbuf[1], bp_commbuf[2], - bp_commbuf[3], bp_commbuf[4]); - return 1; + + /* Tell the user about missing SPI binary mode in firmware 2.3 and older. */ + if (BP_FWVERSION(fw_version_major, fw_version_minor) < BP_FWVERSION(2, 4)) { + msg_pinfo("Bus Pirate firmware 2.3 and older does not support binary SPI access.\n"); + msg_pinfo("Please upgrade to the latest firmware (at least 2.4).\n"); + return SPI_PROGRAMMER_ERROR; + } + + /* Workaround for broken speed settings in firmware 6.1 and older. */ + if (BP_FWVERSION(fw_version_major, fw_version_minor) < BP_FWVERSION(6, 2)) + if (spispeed > 0x4) { + msg_perr("Bus Pirate firmware 6.1 and older does not support SPI speeds above 2 MHz. " + "Limiting speed to 2 MHz.\n"); + msg_pinfo("It is recommended to upgrade to firmware 6.2 or newer.\n"); + spispeed = 0x4; + } + + /* This works because speeds numbering starts at 0 and is contiguous. */ + msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed].name); + + /* Enter raw bitbang mode */ + for (i = 0; i < 20; i++) { + bp_commbuf[0] = 0x00; + if ((ret = buspirate_sendrecv(bp_commbuf, 1, 0))) + return ret; } - msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[4]); - if (bp_commbuf[4] != '1') { - msg_perr("Can't handle raw bitbang mode version %c!\n", - bp_commbuf[4]); + if ((ret = buspirate_wait_for_string(bp_commbuf, "BBIO"))) + return ret; + if ((ret = buspirate_sendrecv(bp_commbuf, 0, 1))) + return ret; + msg_pdbg("Raw bitbang mode version %c\n", bp_commbuf[0]); + if (bp_commbuf[0] != '1') { + msg_perr("Can't handle raw bitbang mode version %c!\n", bp_commbuf[0]); return 1; } /* Enter raw SPI mode */ bp_commbuf[0] = 0x01; - ret = buspirate_sendrecv(bp_commbuf, 1, 4); - if (ret) + ret = buspirate_sendrecv(bp_commbuf, 1, 0); + if ((ret = buspirate_wait_for_string(bp_commbuf, "SPI"))) return ret; - if (memcmp(bp_commbuf, "SPI", 3)) { - msg_perr("Entering raw SPI mode failed!\n"); - msg_pdbg("Got %02x%02x%02x%02x\n", - bp_commbuf[0], bp_commbuf[1], bp_commbuf[2], - bp_commbuf[3]); - return 1; - } - msg_pdbg("Raw SPI mode version %c\n", bp_commbuf[3]); - if (bp_commbuf[3] != '1') { - msg_perr("Can't handle raw SPI mode version %c!\n", - bp_commbuf[3]); + if ((ret = buspirate_sendrecv(bp_commbuf, 0, 1))) + return ret; + msg_pdbg("Raw SPI mode version %c\n", bp_commbuf[0]); + if (bp_commbuf[0] != '1') { + msg_perr("Can't handle raw SPI mode version %c!\n", bp_commbuf[0]); return 1; }

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Re: [flashrom] [PATCH/WIP] AT45DB011D flashing support
by Aidan Thornton 17 Aug '12

17 Aug '12

Let's try that again, this time remembering to svn add the new file. Sorry about that On Fri, Aug 17, 2012 at 5:53 PM, Aidan Thornton <makosoft(a)gmail.com> wrote: > Hi, > > The attached patch is a somewhat messy attempt to add support for the > AT45DB011D and potentially other AT45DBxxxD Atmel DataFlash chips. > I've tested flashing the AT45DB011D-like integrated Flash on the > Xilinx XC3S50AN with it and it appears to work. Not really ready to > merge, but carldani asked me to post this so he could see if it could > be combined with his old incomplete code for non-power-of-2 flash > chips. Should in theory be able to read all AT45DBxxxD chips as-is and > write all chips that have 256/264-byte pages with suitable additions > to flashchips.c. > > Aidan

1 0

[PATCH/WIP] AT45DB011D flashing support
by Aidan Thornton 17 Aug '12

17 Aug '12

Hi, The attached patch is a somewhat messy attempt to add support for the AT45DB011D and potentially other AT45DBxxxD Atmel DataFlash chips. I've tested flashing the AT45DB011D-like integrated Flash on the Xilinx XC3S50AN with it and it appears to work. Not really ready to merge, but carldani asked me to post this so he could see if it could be combined with his old incomplete code for non-power-of-2 flash chips. Should in theory be able to read all AT45DBxxxD chips as-is and write all chips that have 256/264-byte pages with suitable additions to flashchips.c. Aidan

1 0

AT45DB011D / Spartan-3AN SPI flash
by Aidan Thornton 17 Aug '12

17 Aug '12

Hi, So I've got access to a board with an AT45DB011D (or more accurately a XC3S50AN FPGA with integrated SPI flash that's identical to an AT45DB011D down to the ID bytes) hooked up to an FT4232H-based programmer. I've chatted to stefanct in IRC and apparently this is unlikely to be supported by flashrom in the near future, but if at some point someone does want to add support and I still have access to this board I might be able to test it. For anyone that isn't familiar with the AT45DB011D, it's an oddball Atmel DataFlash chip with a non-power-of-two page size (264 bytes per page) and a slightly interesting address space as a result of that. It's also available in a 256-byte page variant that has the same ID and which can only be distinguished by a bit in the status register. One of the read commands supported is mostly standard aside from some weirdness resulting from the odd page size, writing and erasing is probably less so. Aidan

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CHIPSET: AMD CS5536
by Sven Neumann 17 Aug '12

17 Aug '12

Hi, I am trying to flash a new coreboot image to our hardware, which is a "PC Engines ALIX 2C.2" board, see http://pcengines.ch/alix2c2.htm Latest version of flashrom gives me following output, so I am reporting this to you as requested: flashrom v0.9.6.1-r1564 on Linux 3.5.2 (i586) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. coreboot table found at 0xf7c1c00. Found chipset "AMD CS5536". Enabling flash write... OK. WARNING: unexpected second chipset match: "AMD CS5536" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. And here's the output from "lspci -v": 00:01.0 Class 0600: Device 1022:2080 (rev 33) Subsystem: Device 1022:2080 Flags: bus master, 66MHz, medium devsel, latency 64 I/O ports at ac1c [size=4] 00:01.2 Class 1010: Device 1022:2082 Subsystem: Device 1022:2082 Flags: 66MHz, medium devsel, IRQ 11 Memory at fe020000 (32-bit, non-prefetchable) [size=16K] 00:09.0 Class 0200: Device 1106:3053 (rev 96) Subsystem: Device 1106:0106 Flags: bus master, stepping, medium devsel, latency 64, IRQ 10 I/O ports at 1000 [size=256] Memory at fe029000 (32-bit, non-prefetchable) [size=256] Capabilities: [40] Power Management version 2 Kernel driver in use: via-rhine 00:0b.0 Class 0200: Device 1106:3053 (rev 96) Subsystem: Device 1106:0106 Flags: bus master, stepping, medium devsel, latency 64, IRQ 9 I/O ports at 1400 [size=256] Memory at fe029100 (32-bit, non-prefetchable) [size=256] Capabilities: [40] Power Management version 2 Kernel driver in use: via-rhine 00:0c.0 Class 0200: Device 168c:001b (rev 01) Subsystem: Device 185f:1600 Flags: bus master, medium devsel, latency 168, IRQ 11 Memory at fe000000 (32-bit, non-prefetchable) [size=64K] Capabilities: [44] Power Management version 2 Kernel driver in use: ath5k Kernel modules: ath5k 00:0f.0 Class 0601: Device 1022:2090 (rev 03) Subsystem: Device 1022:2090 Flags: 66MHz, medium devsel I/O ports at 20b0 [size=8] I/O ports at 1800 [size=256] I/O ports at 2000 [size=64] I/O ports at 2080 [size=32] I/O ports at 1c00 [size=128] I/O ports at 2040 [size=64] Kernel driver in use: cs5535-mfd 00:0f.2 Class 0101: Device 1022:209a (rev 01) (prog-if 80 [Master]) Subsystem: Device 1022:209a Flags: bus master, 66MHz, medium devsel, latency 248 [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] [virtual] Memory at 000003f0 (type 3, non-prefetchable) [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] [virtual] Memory at 00000370 (type 3, non-prefetchable) I/O ports at 20a0 [size=16] Kernel driver in use: cs5536 00:0f.4 Class 0c03: Device 1022:2094 (rev 02) (prog-if 10) Subsystem: Device 1022:2094 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 9 Memory at fe026000 (32-bit, non-prefetchable) [size=4K] Capabilities: [40] Power Management version 2 Kernel driver in use: ohci_hcd 00:0f.5 Class 0c03: Device 1022:2095 (rev 02) (prog-if 20) Subsystem: Device 1022:2095 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 9 Memory at fe027000 (32-bit, non-prefetchable) [size=4K] Capabilities: [40] Power Management version 2 Kernel driver in use: ehci_hcd As flashrom does not appear to find the flash chip, I am now somewhat stuck. Any help would be much appreciated. Regards, Sven -- Sven Neumann Head of RAUMFELD Software Development Lautsprecher Teufel GmbH Gewerbehof Bülowbogen - Aufgang D1 Bülowstr. 66 - 10783 Berlin - Germany Registernummer HRB 20271 beim Amtsgericht Berlin-Charlottenburg Geschäftsführer: Thorsten Reuber, Thomas Stiegler Tel. +49 (0)30 - 300 930 - 0, Direkt -153 neumann(a)teufel.de www.teufel.de www.teufelaudio.com http://blog.teufel.de

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[PATCH] Allow specifying CPPFLAGS
by Carl-Daniel Hailfinger 16 Aug '12

16 Aug '12

The user may know better which CFLAGS/CPPFLAGS are appropriate. Use FLASHROM_CFLAGS for flags which flashrom definitely needs to build. Note: With this patch, automatic Ubuntu Launchpad builds should work again. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-makefile_allow_cppflags/Makefile =================================================================== --- flashrom-makefile_allow_cppflags/Makefile (Revision 1574) +++ flashrom-makefile_allow_cppflags/Makefile (Arbeitskopie) @@ -122,7 +122,7 @@ ifeq ($(TARGET_OS), MinGW) EXEC_SUFFIX := .exe # MinGW doesn't have the ffs() function, but we can use gcc's __builtin_ffs(). -CPPFLAGS += -Dffs=__builtin_ffs +FLASHROM_CFLAGS += -Dffs=__builtin_ffs # libusb-win32/libftdi stuff is usually installed in /usr/local. CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib @@ -201,7 +201,7 @@ endif ifeq ($(TARGET_OS), libpayload) -CPPFLAGS += -DSTANDALONE +FLASHROM_CFLAGS += -DSTANDALONE ifeq ($(CONFIG_DUMMY), yes) UNSUPPORTED_FEATURES += CONFIG_DUMMY=yes else @@ -603,7 +603,7 @@ TAROPTIONS = $(shell LC_ALL=C tar --version|grep -q GNU && echo "--owner=root --group=root") %.o: %.c .features - $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< + $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< # Make sure to add all names of generated binaries here. # This includes all frontends and libflashrom. Index: flashrom-makefile_allow_cppflags/util/ich_descriptors_tool/Makefile =================================================================== --- flashrom-makefile_allow_cppflags/util/ich_descriptors_tool/Makefile (Revision 1574) +++ flashrom-makefile_allow_cppflags/util/ich_descriptors_tool/Makefile (Arbeitskopie) @@ -30,10 +30,10 @@ endif -CPPFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d +FLASHROM_CFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d # enables functions that populate the descriptor structs from plain binary dumps -CPPFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP -CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) +FLASHROM_CFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP +FLASHROM_CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) OBJ = $(OBJATH)/$(SRC:%.c=%.o) @@ -42,15 +42,15 @@ all:$(PROGRAM)$(EXEC_SUFFIX) $(OBJ): $(OBJATH)/%.o : %.c - $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) -o $@ -c $< # this enables us to share source files without simultaneously sharing .o files # with flashrom, which would lead to unexpected results (w/o running make clean) $(SHAREDOBJ): $(OBJATH)/%.o : $(SHAREDSRCDIR)/%.c - $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) -o $@ -c $< $(PROGRAM)$(EXEC_SUFFIX): $(OBJ) $(SHAREDOBJ) - $(CC) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJ) $(SHAREDOBJ) + $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJ) $(SHAREDOBJ) clean: rm -f $(PROGRAM) $(PROGRAM).exe -- http://www.hailfinger.org/

1 1

[commit] r1575 - in trunk: . util/ich_descriptors_tool
by repository service 16 Aug '12

16 Aug '12

Author: hailfinger Date: Thu Aug 16 01:06:32 2012 New Revision: 1575 URL: http://flashrom.org/trac/flashrom/changeset/1575 Log: Allow specifying CPPFLAGS The user may know better which CFLAGS/CPPFLAGS are appropriate. Use FLASHROM_CFLAGS for flags which flashrom definitely needs to build. Thanks to Stefan Tauner for pointing out the flaw in r1574. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile trunk/util/ich_descriptors_tool/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Tue Aug 14 23:36:11 2012 (r1574) +++ trunk/Makefile Thu Aug 16 01:06:32 2012 (r1575) @@ -122,7 +122,7 @@ ifeq ($(TARGET_OS), MinGW) EXEC_SUFFIX := .exe # MinGW doesn't have the ffs() function, but we can use gcc's __builtin_ffs(). -CPPFLAGS += -Dffs=__builtin_ffs +FLASHROM_CFLAGS += -Dffs=__builtin_ffs # libusb-win32/libftdi stuff is usually installed in /usr/local. CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib @@ -201,7 +201,7 @@ endif ifeq ($(TARGET_OS), libpayload) -CPPFLAGS += -DSTANDALONE +FLASHROM_CFLAGS += -DSTANDALONE ifeq ($(CONFIG_DUMMY), yes) UNSUPPORTED_FEATURES += CONFIG_DUMMY=yes else @@ -603,7 +603,7 @@ TAROPTIONS = $(shell LC_ALL=C tar --version|grep -q GNU && echo "--owner=root --group=root") %.o: %.c .features - $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< + $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< # Make sure to add all names of generated binaries here. # This includes all frontends and libflashrom. Modified: trunk/util/ich_descriptors_tool/Makefile ============================================================================== --- trunk/util/ich_descriptors_tool/Makefile Tue Aug 14 23:36:11 2012 (r1574) +++ trunk/util/ich_descriptors_tool/Makefile Thu Aug 16 01:06:32 2012 (r1575) @@ -30,10 +30,10 @@ endif -CPPFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d +FLASHROM_CFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d # enables functions that populate the descriptor structs from plain binary dumps -CPPFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP -CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) +FLASHROM_CFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP +FLASHROM_CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) OBJ = $(OBJATH)/$(SRC:%.c=%.o) @@ -42,15 +42,15 @@ all:$(PROGRAM)$(EXEC_SUFFIX) $(OBJ): $(OBJATH)/%.o : %.c - $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) -o $@ -c $< # this enables us to share source files without simultaneously sharing .o files # with flashrom, which would lead to unexpected results (w/o running make clean) $(SHAREDOBJ): $(OBJATH)/%.o : $(SHAREDSRCDIR)/%.c - $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) -o $@ -c $< $(PROGRAM)$(EXEC_SUFFIX): $(OBJ) $(SHAREDOBJ) - $(CC) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJ) $(SHAREDOBJ) + $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJ) $(SHAREDOBJ) clean: rm -f $(PROGRAM) $(PROGRAM).exe

1 0

Re: [flashrom] IBM SurePOS 700 4800-783 support
by Stefan Tauner 15 Aug '12

15 Aug '12

On Wed, 15 Aug 2012 08:56:34 -0400 Jason_Vannest(a)abercrombie.com wrote: Hi Jason! > Sorry Stefan, > > I've been busy and our test lab is being used to do a regression right now > so I've not had time to try and compile and test the patch you provided. NP, i just wanted to get sure you have received my last mail and nothing momentous happened, because your replies were within days or even hours before. > I do intend to do so, give me a little more time and I'll see what I can > do. We have received your other message containing the read out bios image. It sits in the moderation queue at the moment, because we can't publish it (it is copyrighted). Thanks for taking the time to test! What we actually wanted to see is the output that flashrom prints to screen (or saves to a file when one specifies the log file option -o "logfilename"). But since you were able to read the BIOS file correctly the patch seems to have worked at least to some extend. This is great news! Nevertheless please send the verbose output of flashrom too. > On the topic of IBM and help, I have been in discussion with IBM about the > firmware updates and they have been very adamant that we need to insure > that we update all the devices not just the BIOS itself. From looking at > a handful of their update packages, I can see that they frequently include > updates for riser cards, service processors and possibly other devices > with the BIOS updates. So before we implement something with flashrom we > would want to make sure we're not missing something that could later cause > us issues even if the issues are only that IBM is unhappy because we > didn't follow their update procedures. The latter would be the last thing i would worry about, but especially the service processors might interact with the BIOS and if an update changes the protocol that they talk with each other, then this may lead to unbootable machines... It is probably possible to add support for the other device to flashrom as well, but that would certainly not be a single line change and take way more time to implement, even if IBM provides some documentation. Without documentation it would probably be pretty much infeasible. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] IBM SurePOS 700 4800-783 support
by Stefan Tauner 15 Aug '12

15 Aug '12

On Wed, 11 Jul 2012 18:17:19 -0400 Jason_Vannest(a)abercrombie.com wrote: > If I'm reading the flashrom site correctly this is one of the flash chips > that flashrom has support for already. So that might be a plus. Yes, the flash chip itself wont be a problem. There is a service manual for the POS located at ftp://ftp.software.ibm.com/software/retail/pubs/hw/4800_surepos700/btd5_480… and it mentions a "backup bios" in the service processor section. That could complicate things further (or help you out if something fails if you are very lucky, but usually it make things worse for us). The remainder of the document is not very helpful (targeted at users not developers). > > I'd venture a guess that we can do this before IBM can > > even give you a quote. > > What kind of information would you want? I have pretty solid connections > with IBM I may be able to get questions answered about this. A schematic that contains the data path between the southbridge and the flash chip as well as its relation to the Renesas IC would indicate if we have to take care about the Renesas at all. Any additional information regarding the BIOS upgrade process (e.g. if the version of the Renesas' firmware has to be kept in sync with the BIOS) or the service processor's interaction with the flash chip would be very welcome too. Above all we need to work on the support for the VIA chipset (VT8251), but IBM won't be able to help us with that. I have no news regarding that. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

3 6

Re: [flashrom] Issue with flashrom tool
by Carl-Daniel Hailfinger 15 Aug '12

15 Aug '12

Hi Lap Ngo Doan, your flashrom version is very old. Please get a newer flashrom version from https://launchpad.net/~flashrom-developers/+archive/flashrom-daily or compile latest flashrom from source: http://flashrom.org/Downloads Am 15.08.2012 05:14 schrieb Lap Ngo Doan: > We are preparing flash new rom (coreboot.rom) to Persimmon board using > flashrom tool > http://www.coreboot.org/AMD_DB-FT1_PERSIMMON > http://www.amd.com/us/Documents/49286_Embedded_Solutions_Brief_FT1_web.pdf > Before do that, We'd like to make a test of using flashroom tool. > [Envrionment] > Hardware: Persimmon board > OS: Ubuntu 10.10 32bits > Flash rom tool: flashrom > [Testing steps] > 1. Use flashrom tool to capture/read current ROM > file (to make a backup) : ROM_BOARD2.rom > $flashrom -r ROM_BOARD2.rom > 2. Verify captured data (ROM_BOARD2.rom) with > current ROM > $flashrom -v ROM_BOARD2.rom > Unfortunately, the verifiy status is FALIED ==> We are not confident to use > flashrom tool to update new rom file Please retry the test with flashrom 0.9.5 or 0.9.6 or newer in verbose mode: flashrom -p internal -VV -r ROM_BOARD2.rom flashrom -p internal -VV -v ROM_BOARD2.rom Then post the new verbose logs to this mailing list. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

Issue with flashrom tool
by Lap Ngo Doan 15 Aug '12

15 Aug '12

Hi all, We are preparing flash new rom (coreboot.rom) to Persimmon board using flashrom tool http://www.coreboot.org/AMD_DB-FT1_PERSIMMON http://www.amd.com/us/Documents/49286_Embedded_Solutions_Brief_FT1_web.pdf Before do that, We'd like to make a test of using flashroom tool. [Envrionment] Hardware: Persimmon board OS: Ubuntu 10.10 32bits Flash rom tool: flashrom [Testing steps] 1. Use flashrom tool to capture/read current ROM file (to make a backup) : ROM_BOARD2.rom $flashrom -r ROM_BOARD2.rom 2. Verify captured data (ROM_BOARD2.rom) with current ROM $flashrom -v ROM_BOARD2.rom Unfortunately, the verifiy status is FALIED ==> We are not confident to use flashrom tool to update new rom file Could you please refer to log file to see the details and give us some advises? Thank you very much!

1 0

Fix for serprog-ardu initialization failure due to unimplemented S_CMD_S_BUSTYPE (0x12)
by Alexander Meyer 15 Aug '12

15 Aug '12

Hi, I had problems making flashrom talk to an Arduino as described in http://www.flashrom.org/index.php?title=Serprog&redirect=no It always failed right after this: Warning: Automatic command availability check failed for cmd 0x12 - won't execute cmd With help from stefanct on the IRC I was able to fix it and successfully write and verify a W25X80 bios chip. The problem was, stefanct implemented a mandatory check for S_CMD_S_BUSTYPE (0x12) in flashrom which isn't yet implemented in the Arduino code. To work around it you can downgrade flashrom to before r1557 or you can make the Arduino code give a satisfactory answer to the check. To do that, you must append "| (1 << (S_CMD_S_BUSTYPE - 16))" to the SUPPORTED_COMMANDS_HIGH define, and send an ACK when asked for S_CMD_S_BUSTYPE (0x12) in the Arduino code. Actually, "<stefanct> the right way would be to test if flashrom tries to set SPI and ack in that case and nak in all other cases". I also had problems with the high baudrate. Setting it to 1000000 instead of 2000000 seems to work reliably and is still fast enough for me. YMMV. Note that the value must be changed in the arguments for flashrom as well as the Arduino code. Thank you guys for your great work and thank you stefanct for helping me out! Cheers, Alexander

1 0

Shuttle Inc FN78S: flashrom -V
by dvrhax 15 Aug '12

15 Aug '12

3 4

Gigabyte GA-H77-D3H test
by Alexander Gordeev 14 Aug '12

14 Aug '12

Hi! I've got the attached output after running flashrom -V. Is it ok to try to write to flash? Particularly this line concerns me: enable_flash_ich_dc_spi: unknown ICH generation. Please report! Anyway, Gigabyte DualBIOS should save it if write corrupts BIOS... Right? :) -- Alexander

2 1

[PATCH] Allow the user to specify CFLAGS without breaking the build
by Carl-Daniel Hailfinger 14 Aug '12

14 Aug '12

GNU make has a very interesting quirk: If you set a variable on the command line, any changes to that variable in the Makefile are ignored unless marked with the "override" keyword. Use CFLAGS only for optimization and warning options, and use CPPFLAGS for the dependency and other preprocessor related options. That way packagers can specify their own CFLAGS without breaking the build. As a side benefit, the ich_descriptors_tool Makefile now behaves exactly the same whether called standalone or as part of the main Makefile. Note: THIS WILL BREAK THE BUILD due to problems in the ich_descriptors_tool code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-gnumake_workaround_cflags_ich_descriptors_tool/Makefile =================================================================== --- flashrom-gnumake_workaround_cflags_ich_descriptors_tool/Makefile (Revision 1569) +++ flashrom-gnumake_workaround_cflags_ich_descriptors_tool/Makefile (Arbeitskopie) @@ -26,6 +26,9 @@ # If you want to cross-compile, just run e.g. # make CC=i586-pc-msdosdjgpp-gcc # You may have to specify STRIP/AR/RANLIB as well. +# +# Note for anyone editing this Makefile: gnumake will happily ignore any +# changes in this Makefile to variables set on the command line. CC ?= gcc STRIP ?= strip INSTALL = install @@ -83,7 +86,7 @@ EXEC_SUFFIX := .exe CPPFLAGS += -I../libgetopt # DJGPP has odd uint*_t definitions which cause lots of format string warnings. -CPPFLAGS += -Wno-format +CFLAGS += -Wno-format # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt LIBS += ../libgetopt/libgetopt.a # Bus Pirate, Serprog and PonyProg are not supported under DOS (missing serial support). @@ -119,7 +122,7 @@ ifeq ($(TARGET_OS), MinGW) EXEC_SUFFIX := .exe # MinGW doesn't have the ffs() function, but we can use gcc's __builtin_ffs(). -CFLAGS += -Dffs=__builtin_ffs +CPPFLAGS += -Dffs=__builtin_ffs # libusb-win32/libftdi stuff is usually installed in /usr/local. CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib Index: flashrom-gnumake_workaround_cflags_ich_descriptors_tool/util/ich_descriptors_tool/Makefile =================================================================== --- flashrom-gnumake_workaround_cflags_ich_descriptors_tool/util/ich_descriptors_tool/Makefile (Revision 1569) +++ flashrom-gnumake_workaround_cflags_ich_descriptors_tool/util/ich_descriptors_tool/Makefile (Arbeitskopie) @@ -1,4 +1,8 @@ -CC ?= gcc +# +# This file is part of the flashrom project. +# +# This Makefile works standalone, but it is usually called from the main +# Makefile in the flashrom directory. PROGRAM=ich_descriptors_tool EXTRAINCDIRS = ../../ . @@ -6,20 +10,31 @@ OBJATH = .obj SHAREDSRC = ich_descriptors.c SHAREDSRCDIR = ../.. +# If your compiler spits out excessive warnings, run make WARNERROR=no +# You shouldn't have to change this flag. +WARNERROR ?= yes SRC = $(wildcard *.c) -CFLAGS += -Wall -CFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d -# enables functions that populate the descriptor structs from plain binary dumps -CFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP -CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) +CC ?= gcc +# If the user has specified custom CFLAGS, all CFLAGS settings below will be +# completely ignored by gnumake. +CFLAGS ?= -Os -Wall -Wshadow ifeq ($(TARGET_OS), DOS) # DJGPP has odd uint*_t definitions which cause lots of format string warnings. CFLAGS += -Wno-format endif +ifeq ($(WARNERROR), yes) +CFLAGS += -Werror +endif + +CPPFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d +# enables functions that populate the descriptor structs from plain binary dumps +CPPFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP +CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) + OBJ = $(OBJATH)/$(SRC:%.c=%.o) SHAREDOBJ = $(OBJATH)/$(notdir $(SHAREDSRC:%.c=%.o)) @@ -27,12 +42,12 @@ all:$(PROGRAM)$(EXEC_SUFFIX) $(OBJ): $(OBJATH)/%.o : %.c - $(CC) $(CFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< # this enables us to share source files without simultaneously sharing .o files # with flashrom, which would lead to unexpected results (w/o running make clean) $(SHAREDOBJ): $(OBJATH)/%.o : $(SHAREDSRCDIR)/%.c - $(CC) $(CFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< $(PROGRAM)$(EXEC_SUFFIX): $(OBJ) $(SHAREDOBJ) $(CC) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJ) $(SHAREDOBJ) -- http://www.hailfinger.org/

2 2

[commit] r1574 - in trunk: . util/ich_descriptors_tool
by repository service 14 Aug '12

14 Aug '12

Author: hailfinger Date: Tue Aug 14 23:36:11 2012 New Revision: 1574 URL: http://flashrom.org/trac/flashrom/changeset/1574 Log: Allow the user to specify CFLAGS without breaking the build GNU make has a very interesting quirk: If you set a variable on the command line, any changes to that variable in the Makefile are ignored unless marked with the "override" keyword. Use CFLAGS only for optimization and warning options, and use CPPFLAGS for the dependency and other preprocessor related options. That way packagers can specify their own CFLAGS without breaking the build. As a side benefit, the ich_descriptors_tool Makefile now behaves exactly the same whether called standalone or as part of the main Makefile. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Makefile trunk/util/ich_descriptors_tool/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Tue Aug 14 03:32:46 2012 (r1573) +++ trunk/Makefile Tue Aug 14 23:36:11 2012 (r1574) @@ -26,6 +26,9 @@ # If you want to cross-compile, just run e.g. # make CC=i586-pc-msdosdjgpp-gcc # You may have to specify STRIP/AR/RANLIB as well. +# +# Note for anyone editing this Makefile: gnumake will happily ignore any +# changes in this Makefile to variables set on the command line. CC ?= gcc STRIP ?= strip INSTALL = install @@ -83,7 +86,7 @@ EXEC_SUFFIX := .exe CPPFLAGS += -I../libgetopt # DJGPP has odd uint*_t definitions which cause lots of format string warnings. -CPPFLAGS += -Wno-format +CFLAGS += -Wno-format # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt LIBS += ../libgetopt/libgetopt.a # Bus Pirate, Serprog and PonyProg are not supported under DOS (missing serial support). @@ -119,7 +122,7 @@ ifeq ($(TARGET_OS), MinGW) EXEC_SUFFIX := .exe # MinGW doesn't have the ffs() function, but we can use gcc's __builtin_ffs(). -CFLAGS += -Dffs=__builtin_ffs +CPPFLAGS += -Dffs=__builtin_ffs # libusb-win32/libftdi stuff is usually installed in /usr/local. CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib Modified: trunk/util/ich_descriptors_tool/Makefile ============================================================================== --- trunk/util/ich_descriptors_tool/Makefile Tue Aug 14 03:32:46 2012 (r1573) +++ trunk/util/ich_descriptors_tool/Makefile Tue Aug 14 23:36:11 2012 (r1574) @@ -1,4 +1,8 @@ -CC ?= gcc +# +# This file is part of the flashrom project. +# +# This Makefile works standalone, but it is usually called from the main +# Makefile in the flashrom directory. PROGRAM=ich_descriptors_tool EXTRAINCDIRS = ../../ . @@ -6,19 +10,30 @@ OBJATH = .obj SHAREDSRC = ich_descriptors.c SHAREDSRCDIR = ../.. +# If your compiler spits out excessive warnings, run make WARNERROR=no +# You shouldn't have to change this flag. +WARNERROR ?= yes SRC = $(wildcard *.c) -CFLAGS += -Wall -CFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d -# enables functions that populate the descriptor structs from plain binary dumps -CFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP -CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) +CC ?= gcc +# If the user has specified custom CFLAGS, all CFLAGS settings below will be +# completely ignored by gnumake. +CFLAGS ?= -Os -Wall -Wshadow ifeq ($(TARGET_OS), DOS) # DJGPP has odd uint*_t definitions which cause lots of format string warnings. CFLAGS += -Wno-format endif +ifeq ($(WARNERROR), yes) +CFLAGS += -Werror +endif + + +CPPFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d +# enables functions that populate the descriptor structs from plain binary dumps +CPPFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP +CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) OBJ = $(OBJATH)/$(SRC:%.c=%.o) @@ -27,12 +42,12 @@ all:$(PROGRAM)$(EXEC_SUFFIX) $(OBJ): $(OBJATH)/%.o : %.c - $(CC) $(CFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< # this enables us to share source files without simultaneously sharing .o files # with flashrom, which would lead to unexpected results (w/o running make clean) $(SHAREDOBJ): $(OBJATH)/%.o : $(SHAREDSRCDIR)/%.c - $(CC) $(CFLAGS) -o $@ -c $< + $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $< $(PROGRAM)$(EXEC_SUFFIX): $(OBJ) $(SHAREDOBJ) $(CC) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJ) $(SHAREDOBJ)

1 0

ASRock N68C-S UCC flashrom -V
by Timon Freitag 14 Aug '12

14 Aug '12

heinrich@Bienenstock:~$ sudo flashrom -V flashrom v0.9.5.2-r1517 on Linux 3.2.0-29-generic (x86_64), built with libpci 3.1.8, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 936M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10012 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "To Be Filled By O.E.M." DMI string system-product-name: "To Be Filled By O.E.M." DMI string system-version: "To Be Filled By O.E.M." DMI string baseboard-manufacturer: "ASRock" DMI string baseboard-product-name: "N68C-S UCC" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP61" with PCI ID 10de:03e1. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544. SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. WARNING: unexpected second chipset match: "NVIDIA MCP61" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x13 Found Macronix flash chip "MX25L8005" (1024 kB, SPI). No operations were specified.

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[PATCH] Macronix MX25L6445E
by Stefan Tauner 14 Aug '12

14 Aug '12

From: "Wagner, Helge (GE Intelligent Platforms)" <Helge.Wagner(a)ge.com> -Fixed spi_block_erase_d8() block size for MX25L3205 was wrong. -Now using spi_block_erase_20_4or64k() erase function instead of spi_block_erase_20() which can handle both 4KB and 64KB block sizes for those flash chips that might have same id but different erase block sizes. -New probe function added (probe_spi_mx_2017()) to differentiate MX25L6445E and MX25L6405. Signed-off-by: Helge Wagner <helge.wagner(a)ge.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- White space errors removed, rebased to work with flashctx. No further changes iirc, although i spotted various things that should be changed before merging it. chipdrivers.h | 2 + flashchips.c | 52 ++++++++++++++++---- flashchips.h | 1 + spi.h | 15 ++++++ spi25.c | 147 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 208 insertions(+), 9 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 0c78b0d..62806f9 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -33,9 +33,11 @@ int probe_spi_rdid4(struct flashctx *flash); int probe_spi_rems(struct flashctx *flash); int probe_spi_res1(struct flashctx *flash); int probe_spi_res2(struct flashctx *flash); +int probe_spi_mx_2017(struct flashctx *flash); int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_20_4or64k(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); diff --git a/flashchips.c b/flashchips.c index 789f17f..19d5163 100644 --- a/flashchips.c +++ b/flashchips.c @@ -4751,14 +4751,14 @@ const struct flashchip flashchips[] = { .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { - .eraseblocks = { {4 * 1024, 512} }, - .block_erase = spi_block_erase_20, /* This erase function has 64k blocksize for eLiteFlash */ + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_20_4or64k, /* This erase function has 64k blocksize for eLiteFlash */ }, { .eraseblocks = { {64 * 1024, 32} }, /* Not supported in MX25L1605 (eLiteFlash) and MX25L1605D */ .block_erase = spi_block_erase_52, @@ -4856,16 +4856,16 @@ const struct flashchip flashchips[] = { .total_size = 4096, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { - .eraseblocks = { {4 * 1024, 1024} }, - .block_erase = spi_block_erase_20, + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_20_4or64k, }, { - .eraseblocks = { {4 * 1024, 1024} }, + .eraseblocks = { {64 * 1024, 64} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, @@ -4924,13 +4924,47 @@ const struct flashchip flashchips[] = { .total_size = 8192, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, + .tested = TEST_OK_PROBE, + .probe = probe_spi_mx_2017, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_20_4or64k, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX25L6445E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L6445E, + .total_size = 8192, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_mx_2017, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {64 * 1024, 128} }, diff --git a/flashchips.h b/flashchips.h index 0fe2cc4..bfbbacd 100644 --- a/flashchips.h +++ b/flashchips.h @@ -383,6 +383,7 @@ #define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */ #define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */ #define MACRONIX_MX25L6405 0x2017 /* MX25L6405{,D}, MX25L6406E, MX25L6436E */ +#define MACRONIX_MX25L6445E 0x16 /* MX25L6445E, MX25L6405D ID = REMS2 answer */ #define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ diff --git a/spi.h b/spi.h index a57f1b6..8a2c246 100644 --- a/spi.h +++ b/spi.h @@ -45,6 +45,21 @@ #define JEDEC_SFDP_OUTSIZE 0x05 /* 8b op, 24b addr, 8b dummy */ /* JEDEC_SFDP_INSIZE : any length */ +/* Read Electronic Manufacturer Signature for 2x I/O mode */ +#define JEDEC_REMS2 0xef +#define JEDEC_REMS2_OUTSIZE 0x04 +#define JEDEC_REMS2_INSIZE 0x02 + +/* Read Electronic Manufacturer Signature for 4x I/O mode */ +#define JEDEC_REMS4 0xdf +#define JEDEC_REMS4_OUTSIZE 0x04 +#define JEDEC_REMS4_INSIZE 0x02 + +/* Read Electronic Manufacturer Signature for 4x I/O DT mode */ +#define JEDEC_REMS4D 0xcf +#define JEDEC_REMS4D_OUTSIZE 0x04 +#define JEDEC_REMS4D_INSIZE 0x02 + /* Read Electronic Signature */ #define JEDEC_RES 0xab #define JEDEC_RES_OUTSIZE 0x04 diff --git a/spi25.c b/spi25.c index 900df9c..a3ae8f5 100644 --- a/spi25.c +++ b/spi25.c @@ -22,6 +22,7 @@ * Contains the common SPI chip driver functions */ +#include <stdlib.h> #include <string.h> #include "flash.h" #include "flashchips.h" @@ -68,6 +69,27 @@ static int spi_rems(struct flashctx *flash, unsigned char *readarr) return 0; } +static int spi_rems2(struct flashctx *flash, unsigned char *readarr) +{ + unsigned char cmd[JEDEC_REMS2_OUTSIZE] = { JEDEC_REMS2, 0, 0, 0 }; + uint32_t readaddr; + int ret; + + ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS2_INSIZE, cmd, readarr); + if (ret == SPI_INVALID_ADDRESS) { + /* Find the lowest even address allowed for reads. */ + readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1; + cmd[1] = (readaddr >> 16) & 0xff, + cmd[2] = (readaddr >> 8) & 0xff, + cmd[3] = (readaddr >> 0) & 0xff, + ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS2_INSIZE, cmd, readarr); + } + if (ret) + return ret; + msg_cspew("REMS2 returned %02x %02x. ", readarr[0], readarr[1]); + return 0; +} + static int spi_res(struct flashctx *flash, unsigned char *readarr, int bytes) { unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 }; @@ -174,6 +196,58 @@ int probe_spi_rdid(struct flashctx *flash) return probe_spi_rdid_generic(flash, 3); } +int probe_spi_mx_2017(struct flashctx *flash) +{ + unsigned char readarr[4]; + uint32_t id1; + uint32_t id2; + uint32_t id3; + uint32_t id4; + + if (spi_rdid(flash, readarr, 3)) { + msg_cdbg("\n"); + return 0; + } + id1 = readarr[0]; + id2 = (readarr[1] << 8) | readarr[2]; + + if (id1 == MACRONIX_ID && id2 == MACRONIX_MX25L6405) { + /* Now we have detected the 2017h class of Macronix flash devices. + * We can further differentiate two classes: + * -those who support the REMS2 function do always have 4KB sector size + * (at least i have not found one with 64KB yet), + * and + * -those who don't support the REMS2 function might have 4KB or 64KB + * (some have 4KB, e.g. MX25L6406E, some have 64KB, e.g. MX25L6405 (not D)) + * for erase function 20h. + */ + if (spi_rems2(flash, readarr)) { + msg_cdbg("\n"); + return 0; + } + id3 = readarr[0]; + id4 = readarr[1]; + msg_cdbg("%s: id1 0x%02x, id2 0x%02x, id3 0x%02x, id4 0x%02x\n", __func__, id1, id2, id3, id4); + if (id3 == MACRONIX_ID && id4 == MACRONIX_MX25L6445E) { + /* MACRONIX_MX25L6445E class, always 4KB sector */ + if (flash->model_id == MACRONIX_MX25L6445E) + return 1; + else + return 0; + } else { + /* MACRONIX_MX25L6405 class, might have 4KB or 64KB sector */ + if (flash->model_id == MACRONIX_MX25L6405) + return 1; + else + return 0; + } + } else { + msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); + } + /* neither MACRONIX_MX25L6405 nor MACRONIX_MX25L6445E */ + return 0; +} + int probe_spi_rdid4(struct flashctx *flash) { /* Some SPI controllers do not support commands with writecnt=1 and @@ -701,6 +775,79 @@ int spi_block_erase_20(struct flashctx *flash, unsigned int addr, return 0; } +/* Sector size might be 4KB or 64KB, but on call to this function this is unknown. + * So we do a first erase command and then check if mem in the complete 64KB sector is erased. + * If not we assume 4KB and so we repeat the erase for each 4KB sector in the 64KB block + * (which is not erased already). + * PLEASE NOTE: the .eraseblocks block size must be set to 64KB if you use this function. + */ +int spi_block_erase_20_4or64k(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + int result, i, j, fully_erased, sector_erased; + unsigned int curraddr, currblocklen; + uint8_t *readbuf; + + if (blocklen != (64 * 1024)) { + msg_gerr("%s: blocklen not 64KB! Please report a bug at " + "flashrom(a)flashrom.org\n", __func__); + return 1; + } + + readbuf = malloc(blocklen); + if (!readbuf) { + msg_gerr("Out of memory!\n"); + exit(1); + } + + for (i = 0; i < 16; i++) { /* there are 16 4KB sectors in 64KB */ + + curraddr = addr + (i * (4 * 1024)); + + if (i > 0) { + /* Skip the sector erase if the sector is already erased */ + sector_erased = 1; + result = flash->read(flash, readbuf, curraddr, (4 * 1024)); + if (result) { + msg_gerr("Erase impossible because read failed " + "at 0x%x (len 0x%x)\n", curraddr, (4 * 1024)); + break; + } + for (j = 0; j < currblocklen; j++) + if (readbuf[j] != 0xFF) + sector_erased = 0; + if (sector_erased) + continue; /* Sector is already erased */ + } + + result = spi_block_erase_20 (flash, curraddr, (4 * 1024)); /* last parameter (blocklen) is unused */ + if (result) break; + + if (0 == i) { + curraddr += 4 * 1024; + currblocklen = (64*1024)-(4*1024); + fully_erased = 1; + result = flash->read(flash, readbuf, curraddr, currblocklen); + if (result) { + msg_gerr("Erase impossible because read failed " + "at 0x%x (len 0x%x)\n", curraddr, currblocklen); + break; + } + for (j = 0; j < currblocklen; j++) + if (readbuf[j] != 0xFF) + fully_erased = 0; + if (fully_erased) { + /* This means either that the SE command has erased the full 64KB + * or that the remaining 64KB sector was already erased before. + * Anyhow, we can now exit without calling the SE command again. + */ + break; + } + } + } + free(readbuf); + return result; +} + int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { -- Kind regards, Stefan Tauner

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[commit] r1573 - trunk
by repository service 14 Aug '12

14 Aug '12

Author: stefanct Date: Tue Aug 14 03:32:46 2012 New Revision: 1573 URL: http://flashrom.org/trac/flashrom/changeset/1573 Log: Call ftdi_set_interface right after ftdi_init and before ftdi_usb_open. Else libftdi complains that it is impossible to set interface on an already open device since 1c5fa36b67bc30742eee94ed3e3648fcd4640f24 (which will probably end up in libftdi 0.21). Signed-off-by: Ilya A. Volynets-Evenbakh <ilya(a)total-knowledge.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/ft2232_spi.c Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Tue Aug 14 01:43:46 2012 (r1572) +++ trunk/ft2232_spi.c Tue Aug 14 03:32:46 2012 (r1573) @@ -277,6 +277,10 @@ return -3; } + if (ftdi_set_interface(ftdic, ft2232_interface) < 0) { + msg_perr("Unable to select interface: %s\n", ftdic->error_str); + } + f = ftdi_usb_open(ftdic, ft2232_vid, ft2232_type); if (f < 0 && f != -5) { @@ -291,11 +295,6 @@ clock_5x = 0; } - if (ftdi_set_interface(ftdic, ft2232_interface) < 0) { - msg_perr("Unable to select interface: %s\n", - ftdic->error_str); - } - if (ftdi_usb_reset(ftdic) < 0) { msg_perr("Unable to reset FTDI device\n"); }

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New flash chips, AT49F010 and CAT28F512
by Andrew Morgan 14 Aug '12

14 Aug '12

AT49F010 patch is basically a copy of the existing AT49F020 code, but with half the size and the correct ID. The log was from a write of random data, after the chip already contained different random data. I did separate read, erase, write tests before but this log seems to show that PREW all work. CAT28F512 I have successfully probed and read data from, but erase fails. Could be because it needs 12v VPP. The CAT28F512 I have is soldered on to a NIC. I haven't investigated if VPP is connected at all yet. Thought I'd include the patch as-is anyway. Both patches: Signed-off-by: Andrew Morgan <ziltro(a)ziltro.com> -- Andrew.

3 10

[commit] r1572 - trunk
by repository service 14 Aug '12

14 Aug '12

Author: stefanct Date: Tue Aug 14 01:43:46 2012 New Revision: 1572 URL: http://flashrom.org/trac/flashrom/changeset/1572 Log: Add support for Atmel AT49(H)F010, AT49F080 and AT49F080T. Also, alter the page size of the other family members to indicate that it is unused. Maybe we this accelerates the deletion of this field... haha. Signed-off-by: Andrew Morgan <ziltro(a)ziltro.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Aug 13 18:33:04 2012 (r1571) +++ trunk/flashchips.c Tue Aug 14 01:43:46 2012 (r1572) @@ -2317,12 +2317,37 @@ { .vendor = "Atmel", + .name = "AT49(H)F010", + .bustype = BUS_PARALLEL, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT49F010, + .total_size = 128, + .page_size = 0, /* unused */ + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_OK_PREW, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .printlock = printlock_at49f, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { + .vendor = "Atmel", .name = "AT49F020", .bustype = BUS_PARALLEL, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT49F020, .total_size = 256, - .page_size = 256, + .page_size = 0, /* unused */ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PRE, .probe = probe_jedec, @@ -2353,7 +2378,7 @@ .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT49F040, .total_size = 512, - .page_size = 512, + .page_size = 0, /* unused */ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, @@ -2370,6 +2395,69 @@ * FIXME: add another eraser when partial erasers are * supported. */ + }, + .printlock = printlock_at49f, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { + .vendor = "Atmel", + .name = "AT49F080", + .bustype = BUS_PARALLEL, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT49F080, + .total_size = 1024, + .page_size = 0, /* unused */ + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + /* Chip features an optional permanent write protection + * of the first 16 kB. The erase function is the same as + * above, but 00000H to 03FFFH will not be erased. + * FIXME: add another eraser when partial erasers are + * supported. + */ + }, + .printlock = printlock_at49f, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { + /* 'top' version of AT49F080. equal in all aspects but the boot block address */ + .vendor = "Atmel", + .name = "AT49F080T", + .bustype = BUS_PARALLEL, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT49F080T, + .total_size = 1024, + .page_size = 0, /* unused */ + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + /* Chip features an optional permanent write protection + * of the first 16 kB. The erase function is the same as + * above, but FC000H to FFFFFH will not be erased. + * FIXME: add another eraser when partial erasers are + * supported. + */ }, .printlock = printlock_at49f, .write = write_jedec_1, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Mon Aug 13 18:33:04 2012 (r1571) +++ trunk/flashchips.h Tue Aug 14 01:43:46 2012 (r1572) @@ -187,8 +187,11 @@ #define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */ #define ATMEL_AT49LH002 0xE9 #define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */ +#define ATMEL_AT49F010 0x17 /* Same as AT49HF010 */ #define ATMEL_AT49F020 0x0B #define ATMEL_AT49F040 0x13 +#define ATMEL_AT49F080 0x23 +#define ATMEL_AT49F080T 0x27 /* Bright Microelectronics has the same manufacturer ID as Hyundai... */ #define BRIGHT_ID 0xAD /* Bright Microelectronics */

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