- flashrom - mail.coreboot.org

flashrom problem
by Jonas Peres 22 Sep '12

22 Sep '12

My bios is unknow state before flashing with flashbios Please help Best regards Jonas Peres

1 0

[commit] r1602 - trunk
by repository service 22 Sep '12

22 Sep '12

Author: stefanct Date: Sat Sep 22 03:38:06 2012 New Revision: 1602 URL: http://flashrom.org/trac/flashrom/changeset/1602 Log: Generify a25.c's SRWD printing function and move it to spi25.c. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/a25.c trunk/chipdrivers.h trunk/spi25.c Modified: trunk/a25.c ============================================================================== --- trunk/a25.c Fri Sep 21 14:52:50 2012 (r1601) +++ trunk/a25.c Sat Sep 22 03:38:06 2012 (r1602) @@ -23,12 +23,6 @@ /* Prettyprint the status register. Works for AMIC A25L series. */ -static void spi_prettyprint_status_register_amic_a25_srwd(uint8_t status) -{ - msg_cdbg("Chip status register: Status Register Write Disable " - "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not "); -} - int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash) { uint8_t status; @@ -36,7 +30,7 @@ status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); spi_prettyprint_status_register_bit(status, 4); @@ -52,7 +46,7 @@ status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); spi_prettyprint_status_register_bp(status, 2); @@ -67,7 +61,7 @@ status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); msg_cdbg("Chip status register: Sector Protect Size (SEC) " "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " @@ -85,7 +79,7 @@ status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); msg_cdbg("Chip status register: Sector Protect Size (SEC) " "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Fri Sep 21 14:52:50 2012 (r1601) +++ trunk/chipdrivers.h Sat Sep 22 03:38:06 2012 (r1602) @@ -53,6 +53,7 @@ int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); void spi_prettyprint_status_register_bp(uint8_t status, int bp); +void spi_prettyprint_status_register_srwd(uint8_t status); void spi_prettyprint_status_register_welwip(uint8_t status); int spi_prettyprint_status_register(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Fri Sep 21 14:52:50 2012 (r1601) +++ trunk/spi25.c Sat Sep 22 03:38:06 2012 (r1602) @@ -315,7 +315,13 @@ return readarr[0]; } -/* Prettyprint the status register. Common definitions. */ +/* Common highest bit: Status Register Write Disable (SRWD). */ +void spi_prettyprint_status_register_srwd(uint8_t status) +{ + msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + void spi_prettyprint_status_register_welwip(uint8_t status) { msg_cdbg("Chip status register: Write Enable Latch (WEL) is " @@ -366,10 +372,8 @@ */ void spi_prettyprint_status_register_st_m25p(uint8_t status) { - msg_cdbg("Chip status register: Status Register Write Disable " - "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 6 is " - "%sset\n", (status & (1 << 6)) ? "" : "not "); + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_common(status); }

1 0

[commit] r1601 - trunk
by repository service 21 Sep '12

21 Sep '12

Author: stefanct Date: Fri Sep 21 14:52:50 2012 New Revision: 1601 URL: http://flashrom.org/trac/flashrom/changeset/1601 Log: Add a bunch of new/tested stuff and various small changes 14. Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/at… Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/chipdrivers.h trunk/chipset_enable.c trunk/flash.h trunk/flashchips.c trunk/flashrom.8 trunk/flashrom.c trunk/ichspi.c trunk/internal.c trunk/layout.c trunk/print.c trunk/spi.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/board_enable.c Fri Sep 21 14:52:50 2012 (r1601) @@ -346,7 +346,7 @@ case WINBOND_W83627HF_ID: case WINBOND_W83627EHF_ID: case WINBOND_W83627THF_ID: - msg_pdbg("Found Winbond Super I/O, id %02hx\n", s.model); + msg_pdbg("Found Winbond Super I/O, id 0x%02hx\n", s.model); register_superio(s); break; case WINBOND_W83697HF_ID: @@ -355,7 +355,7 @@ if (((tmp == 0x00) && (s.port != WINBOND_SUPERIO_PORT1)) || ((tmp == 0x40) && (s.port != WINBOND_SUPERIO_PORT2))) { msg_pdbg("Winbond Super I/O probe weirdness: Port mismatch for ID " - "%02x at port %04x\n", s.model, s.port); + "0x%02x at port 0x%04x\n", s.model, s.port); break; } tmp = w836xx_deviceid_hwmon(s.port); @@ -365,11 +365,11 @@ break; } if (tmp != s.model) { - msg_pinfo("W83 series hardware monitor device ID weirdness: expected %02x, " - "got %02x\n", WINBOND_W83697HF_ID, tmp); + msg_pinfo("W83 series hardware monitor device ID weirdness: expected 0x%02x, " + "got 0x%02x\n", WINBOND_W83697HF_ID, tmp); break; } - msg_pinfo("Found Winbond Super I/O, id %02hx\n", s.model); + msg_pinfo("Found Winbond Super I/O, id 0x%02hx\n", s.model); register_superio(s); break; } @@ -1700,11 +1700,13 @@ /* * Suited for: + * - ASUS CUSL2-C: Intel socket370 + 815 + ICH2 * - ASUS P4B266LM (Sony Vaio PCV-RX650): socket478 + 845D + ICH2 * - ASUS P4C800-E Deluxe: socket478 + 875P + ICH5 * - ASUS P4P800: Intel socket478 + 865PE + ICH5R * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R * - ASUS P4P800-VM: Intel socket478 + 865PE + ICH5R + * - ASUS P4P800-X: Intel socket478 + 865PE + ICH5R * - ASUS P5GD1 Pro: Intel LGA 775 + 915P + ICH6R * - ASUS P5GD2 Premium: Intel LGA775 + 915G + ICH6R * - ASUS P5GDC Deluxe: Intel socket775 + 915P + ICH6R @@ -2333,8 +2335,9 @@ {0x8086, 0x2560, 0x103C, 0x2A00, 0x8086, 0x24C3, 0x103C, 0x2A01, "^Guppy", NULL, NULL, P3, "ASUS", "P4GV-LA (Guppy)", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, P3, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x8086, 0x24D5, 0x1043, 0x80F3, NULL, NULL, NULL, P3, "ASUS", "P4P800", 0, NT, intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x8086, 0x24D3, 0x1043, 0x80A6, "^P4P800-E$", NULL, NULL, P3, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80A5, 0x8086, 0x24d0, 0, 0, NULL, NULL, NULL, P3, "ASUS", "P4P800-VM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80f2, 0x8086, 0x24d3, 0x1043, 0x80a6, "^P4P800-E$", NULL, NULL, P3, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80a5, 0x8086, 0x24d3, 0x1043, 0x80a6, "^P4P800-VM$", NULL, NULL, P3, "ASUS", "P4P800-VM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80f2, 0x8086, 0x24d3, 0x1043, 0x80a6, "^P4P800-X$", NULL, NULL, P3, "ASUS", "P4P800-X", 0, OK, intel_ich_gpio21_raise}, {0x1039, 0x0651, 0x1043, 0x8081, 0x1039, 0x0962, 0, 0, NULL, NULL, NULL, P3, "ASUS", "P4SC-E", 0, OK, it8707f_write_enable_2e}, {0x8086, 0x2570, 0x1043, 0x80A5, 0x105A, 0x24D3, 0x1043, 0x80A6, NULL, NULL, NULL, P3, "ASUS", "P4SD-LA", 0, NT, intel_ich_gpio32_raise}, {0x1039, 0x0661, 0x1043, 0x8113, 0x1039, 0x5513, 0x1043, 0x8087, NULL, NULL, NULL, P3, "ASUS", "P4S800-MX", 512, OK, w836xx_memw_enable_2e}, @@ -2356,8 +2359,9 @@ {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x829E, "^P5N-D$", NULL, NULL, P3, "ASUS", "P5N-D", 0, OK, it8718f_gpio63_raise}, {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x8249, "^P5N-E SLI$",NULL, NULL, P3, "ASUS", "P5N-E SLI", 0, NT, it8718f_gpio63_raise}, {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, - {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, NULL, NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e}, + {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^CUSL2-C", NULL, NULL, P3, "ASUS", "CUSL2-C", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^TUSL2-C", NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e}, {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x1106, 0x3189, 0x1106, 0x3189, 0x1106, 0x3177, 0x1106, 0x3177, "^AD77", "dfi", "ad77", P3, "DFI", "AD77", 0, NT, w836xx_memw_enable_2e}, Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/chipdrivers.h Fri Sep 21 14:52:50 2012 (r1601) @@ -27,7 +27,12 @@ #include "flash.h" /* for chipaddr and flashctx */ -/* spi.c, should probably be in spi_chip.c */ +/* spi.c */ +int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); + +/* spi25.c */ int probe_spi_rdid(struct flashctx *flash); int probe_spi_rdid4(struct flashctx *flash); int probe_spi_rems(struct flashctx *flash); @@ -44,8 +49,6 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); @@ -58,7 +61,6 @@ int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); -int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/chipset_enable.c Fri Sep 21 14:52:50 2012 (r1601) @@ -1405,17 +1405,22 @@ {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, {0x8086, 0x1c5c, OK, "Intel", "H61", enable_flash_pch6}, {0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_pch6}, - {0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_pch6}, + {0x8086, 0x1d41, OK, "Intel", "X79", enable_flash_pch6}, {0x8086, 0x1e44, NT, "Intel", "Z77", enable_flash_pch7}, {0x8086, 0x1e46, NT, "Intel", "Z75", enable_flash_pch7}, + {0x8086, 0x1e47, NT, "Intel", "Q77", enable_flash_pch7}, + {0x8086, 0x1e48, NT, "Intel", "Q75", enable_flash_pch7}, {0x8086, 0x1e49, NT, "Intel", "B75", enable_flash_pch7}, {0x8086, 0x1e4a, NT, "Intel", "H77", enable_flash_pch7}, + {0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7}, {0x8086, 0x1e55, OK, "Intel", "QM77", enable_flash_pch7}, + {0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7}, {0x8086, 0x1e57, NT, "Intel", "HM77", enable_flash_pch7}, {0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7}, {0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7}, {0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7}, {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, + {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/flash.h Fri Sep 21 14:52:50 2012 (r1601) @@ -59,6 +59,21 @@ }; /* + * The following write granularities are known: + * - 1 bit: Each bit can be cleared individually. + * - 1 byte: A byte can be written once. Further writes to an already written byte cause its contents to be + * either undefined or to stay unchanged. + * - 128 bytes: If less than 128 bytes are written, the rest will be erased. Each write to a 128-byte region + * will trigger an automatic erase before anything is written. Very uncommon behaviour. + * - 256 bytes: If less than 256 bytes are written, the contents of the unwritten bytes are undefined. + */ +enum write_granularity { + write_gran_1bit, + write_gran_1byte, + write_gran_256bytes, +}; + +/* * How many different contiguous runs of erase blocks with one size each do * we have for a given erase function? */ @@ -203,11 +218,6 @@ void print_supported_wiki(void); /* flashrom.c */ -enum write_granularity { - write_gran_1bit, - write_gran_1byte, - write_gran_256bytes, -}; extern int verbose_screen; extern int verbose_logfile; extern const char flashrom_version[]; Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/flashchips.c Fri Sep 21 14:52:50 2012 (r1601) @@ -2596,7 +2596,7 @@ .total_size = 1024, .page_size = 256, .feature_bits = FEATURE_WRSR_EITHER, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -3474,7 +3474,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - .voltage = {2700, 3600}, + .voltage = {2700, 3600}, }, { @@ -3509,7 +3509,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - .voltage = {2700, 3600}, + .voltage = {2700, 3600}, }, { @@ -3585,7 +3585,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - .voltage = {2700, 3600}, + .voltage = {2700, 3600}, }, { @@ -3620,7 +3620,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - .voltage = {2700, 3600}, + .voltage = {2700, 3600}, }, { @@ -4014,7 +4014,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - .voltage = {2700, 3600}, + .voltage = {2700, 3600}, }, { @@ -4051,7 +4051,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - .voltage = {2700, 3600}, + .voltage = {2700, 3600}, }, { @@ -4178,7 +4178,7 @@ .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -5032,7 +5032,7 @@ .total_size = 16384, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -7044,7 +7044,7 @@ .total_size = 384, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = @@ -8060,29 +8060,29 @@ .voltage = {2700, 3600}, }, - { - .vendor = "ST", - .name = "M29W512B", - .bustype = BUS_PARALLEL, - .manufacture_id = ST_ID, - .model_id = ST_M29W512B, - .total_size = 64, - .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, + { + .vendor = "ST", + .name = "M29W512B", + .bustype = BUS_PARALLEL, + .manufacture_id = ST_ID, + .model_id = ST_M29W512B, + .total_size = 64, + .page_size = 64 * 1024, + .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, - .block_erasers = - { - { - .eraseblocks = { {64 * 1024, 1} }, - .block_erase = erase_chip_block_jedec, - } - }, - .write = write_jedec_1, - .read = read_memmapped, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .write = write_jedec_1, + .read = read_memmapped, .voltage = {2700, 3600}, - }, + }, { .vendor = "ST", @@ -9476,7 +9476,7 @@ .total_size = 256, .page_size = 128, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -9714,6 +9714,21 @@ .model_id = GENERIC_DEVICE_ID, .total_size = 0, .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .write = NULL, + .read = NULL, + }, + + { + .vendor = "Winbond", + .name = "unknown Winbond (ex Nexcom) SPI chip", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/flashrom.8 Fri Sep 21 14:52:50 2012 (r1601) @@ -291,8 +291,9 @@ .BR \-r ) and store it to a medium outside of your computer, like a USB drive or a network share. If you needed to run the board enable code -already for probing, use it for reading too. Now you can try to write the -new image. You should enable the board enable code in any case now, as it +already for probing, use it for reading too. +If reading succeeds and the contens of the read file look legit you can try to write the new image. +You should enable the board enable code in any case now, as it has been written because it is known that writing/erasing without the board enable is going to fail. In any case (success or failure), please report to the flashrom mailing list, see below. @@ -326,7 +327,7 @@ .B Intel chipsets .sp If you have an Intel chipset with an ICH8 or later southbridge with SPI flash -attached, and if a valid descriptor was written to it (e.g. by the vendor), the +attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the chipset provides an alternative way to access the flash chip(s) named .BR "Hardware Sequencing" . It is much simpler than the normal access method (called @@ -341,7 +342,7 @@ .BR auto ", " swseq " or " hwseq . By default .RB "(or when setting " ich_spi_mode=auto ) -the module tries to use swseq and only activates hwseq if need be (e.g. if +the module tries to use swseq and only activates hwseq if need be (e.g.\& if important opcodes are inaccessible due to lockdown; or if more than one flash chip is attached). The other options (swseq, hwseq) select the respective mode (if possible). @@ -482,7 +483,7 @@ .sp syntax where .B size -is the number of bytes (min. 1, max. 256). +is the number of bytes (min.\& 1, max.\& 256). .sp Example: .sp @@ -498,7 +499,7 @@ syntax where .B commandlist is a list of two-digit hexadecimal representations of -SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the SPI +SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI controller refuses to run command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom will detect an error during command execution. @@ -514,7 +515,7 @@ syntax where .B commandlist is a list of two-digit hexadecimal representations of -SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore +SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom won't detect an error during command execution. @@ -723,7 +724,7 @@ you want to use with the .B pci= parameter as explained in the -.B nic3com +.B nic3com et al.\& section above. .sp More information about the hardware is available at @@ -828,11 +829,11 @@ IRC channel on .BR chat.freenode.net . You are welcome to join and ask questions, send us bug and success reports there -too. Please provide a way to contact you later (e.g. a mail address) and be +too. Please provide a way to contact you later (e.g.\& a mail address) and be patient if there is no immediate reaction. Also, we provide a pastebin service at .B http://paste.flashrom.org -that is very useful when you want to share logs etc. without spamming the +that is very useful when you want to share logs etc.\& without spamming the channel. .SS .B Laptops @@ -853,7 +854,7 @@ .sp Some flash chips contain OTP memory often denoted as "security registers". They usually have a capacity in the range of some bytes to a few hundred -bytes and can be used to give devices unique IDs etc. flashrom is not able +bytes and can be used to give devices unique IDs etc. flashrom is not able to read or write these memories and may therefore not be able to duplicate a chip completely. For chip types known to include OTP memories a warning is printed when they are detected. Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/flashrom.c Fri Sep 21 14:52:50 2012 (r1601) @@ -631,16 +631,6 @@ * erasing. This is only possible if all chunks of size @gran are either kept * as-is or changed from an all-ones state to any other state. * - * The following write granularities (enum @gran) are known: - * - 1 bit. Each bit can be cleared individually. - * - 1 byte. A byte can be written once. Further writes to an already written - * byte cause the contents to be either undefined or to stay unchanged. - * - 128 bytes. If less than 128 bytes are written, the rest will be - * erased. Each write to a 128-byte region will trigger an automatic erase - * before anything is written. Very uncommon behaviour and unsupported by - * this function. - * - 256 bytes. If less than 256 bytes are written, the contents of the - * unwritten bytes are undefined. * Warning: This function assumes that @have and @want point to naturally * aligned regions. * Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/ichspi.c Fri Sep 21 14:52:50 2012 (r1601) @@ -1689,7 +1689,7 @@ } tmp = mmio_readl(ich_spibar + ICH9_REG_FADDR); - msg_pdbg("0x08: 0x%08x (FADDR)\n", tmp); + msg_pdbg2("0x08: 0x%08x (FADDR)\n", tmp); if (desc_valid) { tmp = mmio_readl(ich_spibar + ICH9_REG_FRAP); @@ -1704,6 +1704,7 @@ ich_spi_rw_restricted |= ich9_handle_frap(tmp, i); } + /* Handle PR registers */ for (i = 0; i < 5; i++) { /* if not locked down try to disable PR locks first */ if (!ichspi_lock) Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/internal.c Fri Sep 21 14:52:50 2012 (r1601) @@ -344,9 +344,6 @@ return 1; } - /* Even if chipset init returns an error code, we don't want to abort. - * The error code might have been a warning only. - */ #if defined(__i386__) || defined(__x86_64__) || defined (__mips) register_par_programmer(&par_programmer_internal, internal_buses_supported); return 0; Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/layout.c Fri Sep 21 14:52:50 2012 (r1601) @@ -78,7 +78,7 @@ tstr1 = strtok(tempstr, ":"); tstr2 = strtok(NULL, ":"); if (!tstr1 || !tstr2) { - msg_gerr("Error parsing layout file.\n"); + msg_gerr("Error parsing layout file. Offending string: \"%s\"\n", tempstr); fclose(romlayout); return 1; } Modified: trunk/print.c ============================================================================== --- trunk/print.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/print.c Fri Sep 21 14:52:50 2012 (r1601) @@ -608,8 +608,8 @@ B("ASUS", "A7N8X Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL), B("ASUS", "A7N8X-E Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL), B("ASUS", "A7N8X-VM/400", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL), - B("ASUS", "A7V133", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL), - B("ASUS", "A7V333", OK, "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL), + B("ASUS", "A7V133", OK, NULL, NULL), + B("ASUS", "A7V333", OK, NULL, NULL), B("ASUS", "A7V400-MX", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL), B("ASUS", "A7V600-X", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL), B("ASUS", "A7V8X", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL), @@ -650,6 +650,7 @@ B("ASUS", "M2V-MX", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL), B("ASUS", "M3A", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL), B("ASUS", "M3A76-CM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL), + B("ASUS", "M3A78-EH", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EH/", NULL), B("ASUS", "M3A78-EM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL), B("ASUS", "M3N78 PRO", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78_PRO/", NULL), B("ASUS", "M3N78-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL), @@ -666,33 +667,35 @@ B("ASUS", "M5A78L-M LX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A78LM_LX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see http://www.flashrom.org/pipermail/flashrom/2012-May/009200.html"), B("ASUS", "M5A99X EVO", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL), B("ASUS", "Maximus IV Extreme", BAD, "http://www.asus.com/Motherboards/Intel_Socket_1155/Maximus_IV_Extreme/", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), - B("ASUS", "MEW-AM", BAD, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), + B("ASUS", "MEW-AM", BAD, NULL, "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("ASUS", "MEW-VM", BAD, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("ASUS", "OPLX-M", NT, NULL, "Untested board enable."), - B("ASUS", "P2B", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL), - B("ASUS", "P2B-D", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL), - B("ASUS", "P2B-DS", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL), - B("ASUS", "P2B-F", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL), - B("ASUS", "P2B-N", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL), - B("ASUS", "P2E-M", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL), - B("ASUS", "P2L97-S", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL), - B("ASUS", "P3B-F", BAD, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), - B("ASUS", "P4B266", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL), + B("ASUS", "P2B", OK, NULL, NULL), + B("ASUS", "P2B-D", OK, NULL, NULL), + B("ASUS", "P2B-DS", OK, NULL, NULL), + B("ASUS", "P2B-F", OK, NULL, NULL), + B("ASUS", "P2B-LS", OK, NULL, NULL), + B("ASUS", "P2B-N", OK, NULL, NULL), + B("ASUS", "P2E-M", OK, NULL, NULL), + B("ASUS", "P2L97-S", OK, NULL, NULL), + B("ASUS", "P3B-F", BAD, NULL, "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), + B("ASUS", "P4B266", OK, NULL, NULL), B("ASUS", "P4B266-LM", OK, "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL), - B("ASUS", "P4B533-E", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL), + B("ASUS", "P4B533-E", OK, NULL, NULL), B("ASUS", "P4C800-E Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL), B("ASUS", "P4GV-LA (Guppy)", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c003…", NULL), B("ASUS", "P4P800", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL), B("ASUS", "P4P800-E Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL), B("ASUS", "P4P800-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL), - B("ASUS", "P4S533-X", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL), + B("ASUS", "P4P800-X", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800X/", NULL), + B("ASUS", "P4S533-X", OK, NULL, NULL), B("ASUS", "P4S800-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL), - B("ASUS", "P4SC-E", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"), + B("ASUS", "P4SC-E", OK, NULL, "Part of ASUS Terminator P4 533 barebone system"), B("ASUS", "P4SD-LA", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL), - B("ASUS", "P5A", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL), - B("ASUS", "P5B", OK, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL), + B("ASUS", "P5A", OK, NULL, NULL), + B("ASUS", "P5B", OK, NULL, NULL), B("ASUS", "P5B-Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL), - B("ASUS", "P5BV-M", BAD, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard(a)uml12d.zq1.de> to flashrom(a)coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."), + B("ASUS", "P5BV-M", BAD, NULL, "Reported by Bernhard M. Wiedemann <bernhard(a)uml12d.zq1.de> to flashrom(a)coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."), B("ASUS", "P5BV-R", OK, "http://www.asus.com/Server_Workstation/Servers/RS120E5PA2/", "Used in RS120-E5/PA2 servers."), B("ASUS", "P5GC-MX/1333", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL), B("ASUS", "P5GD1 Pro", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL), @@ -714,7 +717,6 @@ B("ASUS", "P5LP-LE (Lithium-UL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prod…", "This is an OEM board from HP."), B("ASUS", "P5LP-LE (Epson OEM)", OK, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."), B("ASUS", "P5LP-LE", NT, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."), - B("ASUS", "P5N-E SLI", NT, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable"), B("ASUS", "P5N-D", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL), B("ASUS", "P5N-E SLI", NT, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."), B("ASUS", "P5N32-E SLI", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL), @@ -741,6 +743,7 @@ B("ASUS", "P8Z68-V PRO", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8Z68-V PRO/GEN3", OK, "http://www.asus.com/Motherboards/Intel_Socket_1155/P8Z68V_PROGEN3/", "Warning: MAC address of LOM is stored at 0x1000 - 0x1005 of the image."), B("ASUS", "SABERTOOTH 990FX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX/", NULL), + B("ASUS", "CUSL2-C", OK, NULL, "The image provided by ASUS is only 256 kB big and has to be written to the upper 256 kB of the 512 kB chip."), B("ASUS", "TUSL2-C", NT, "http://support.asus.com/download.aspx?SLanguage=en&p=1&s=4&m=TUSL2-C&os=&ha…", "Untested board enable."), B("ASUS", "Z8NA-D6C", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL), B("ASUS", "Z8PE-D12", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL), @@ -749,33 +752,36 @@ B("Bifferos", "Bifferboard", OK, "http://bifferos.co.uk/", NULL), B("Biostar", "H61MU3", BAD, NULL, "Probing works (Eon EN25Q32(A/B), 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Biostar", "M6TBA", BAD, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), - B("Biostar", "M7NCD Pro", OK, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL), + B("Biostar", "M7NCD Pro", OK, "http://www.biostar.com.tw/app/en/mb/introduction.php?S_ID=260", NULL), B("Biostar", "M7VIQ", NT, NULL, NULL), B("Biostar", "N61PB-M2S", OK, NULL, NULL), B("Biostar", "N68S3+", OK, NULL, NULL), B("Biostar", "P4M80-M4", OK, "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL), - B("Biostar", "TA780G M2+", OK, "http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344", NULL), + B("Biostar", "TA780G M2+", OK, "http://www.biostar.com.tw/app/en/mb/introduction.php?S_ID=344", NULL), + B("Biostar", "TA790GX A3+", OK, "http://www.biostar.com.tw/app/en/mb/introduction.php?S_ID=395", NULL), B("Boser", "HS-6637", BAD, "http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark(a)zl2tod.net> to flashrom(a)coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."), B("Congatec", "conga-X852", OK, "http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL), B("Dell", "Inspiron 580", BAD, "http://support.dell.com/support/edocs/systems/insp580/en/index.htm", "Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("Dell", "OptiPlex GX1", OK, "http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL), B("Dell", "PowerEdge 1850", OK, "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL), + B("Dell", "PowerEdge C6220", BAD, NULL, "Mainboard model is 0HYFFG. Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked (and there are even overlapping PRs)."), B("Dell", "Vostro 460", BAD, "http://support.dell.com/support/edocs/systems/vos460/en/index.htm", "Mainboard model is 0Y2MRG. Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("DFI", "855GME-MGF", BAD, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?…", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"), B("DFI", "AD77", NT, NULL, "Untested board enable."), B("DFI", "Blood-Iron P35 T2RL", OK, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWin…", NULL), - B("Elitegroup", "GeForce6100SM-M ", OK, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&M…", NULL), - B("Elitegroup", "GF7100PVT-M3 (V1.0)", OK, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&C…", NULL), - B("Elitegroup", "GF8200A", OK, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=873&C…", NULL), - B("Elitegroup", "K7S5A", OK, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&…", NULL), - B("Elitegroup", "K7S6A", OK, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&C…", NULL), - B("Elitegroup", "K7SEM (V1.0A)", OK, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&C…", NULL), - B("Elitegroup", "K7VTA3", OK, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&…", NULL), - B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", OK, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), + B("Elitegroup", "848P-A7", OK, NULL, NULL), + B("Elitegroup", "GeForce6100SM-M", OK, NULL, NULL), + B("Elitegroup", "GF7100PVT-M3 (V1.0)", OK, NULL, NULL), + B("Elitegroup", "GF8200A", OK, NULL, NULL), + B("Elitegroup", "K7S5A", OK, NULL, NULL), + B("Elitegroup", "K7S6A", OK, NULL, NULL), + B("Elitegroup", "K7SEM (V1.0A)", OK, NULL, NULL), + B("Elitegroup", "K7VTA3", OK, NULL, NULL), + B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", OK, NULL, NULL), B("Elitegroup", "P4VXMS (V1.0A)", OK, NULL, NULL), - B("Elitegroup", "P6IWP-Fe", OK, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), - B("Elitegroup", "P6VAP-A+", OK, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&…", NULL), - B("Elitegroup", "RS485M-M", OK, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), + B("Elitegroup", "P6IWP-Fe", OK, NULL, NULL), + B("Elitegroup", "P6VAP-A+", OK, NULL, NULL), + B("Elitegroup", "RS485M-M", OK, NULL, NULL), B("Emerson", "ATCA-7360", OK, "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Pr…", NULL), B("EPoX", "EP-3PTA", BAD, NULL, "Missing board enable (W83627HF/F/HG/G), see http://www.flashrom.org/pipermail/flashrom/2012-April/009043.html"), B("EPoX", "EP-8K5A2", OK, "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL), @@ -786,10 +792,11 @@ B("EVGA", "132-CK-NF78", OK, "http://www.evga.com/articles/385.asp", NULL), B("EVGA", "270-WS-W555-A2 (Classified SR-2)", OK, "http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL), B("FIC", "VA-502", BAD, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."), - B("Foxconn", "6150K8MD-8EKRSH", OK, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=…", NULL), - B("Foxconn", "A6VMX", OK, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=…", NULL), - B("Foxconn", "P4M800P7MA-RS2", OK, "http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=…", NULL), + B("Foxconn", "6150K8MD-8EKRSH", OK, "http://www.foxconnchannel.com/ProductDetail.aspx?T=Motherboard&U=en-us00001…", NULL), + B("Foxconn", "A6VMX", OK, "http://www.foxconnchannel.com/ProductDetail.aspx?T=Motherboard&U=en-us00003…", NULL), + B("Foxconn", "P4M800P7MA-RS2", OK, "http://www.foxconnchannel.com/ProductDetail.aspx?T=Motherboard&U=en-us00001…", NULL), B("Freetech", "P6F91i", OK, "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F9…", NULL), + B("Foxconn", "Q45M", BAD, "http://www.foxconnchannel.com/ProductDetail.aspx?T=Motherboard&U=en-us00005…", "Probing works (Hardware sequencing, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("Fujitsu-Siemens", "ESPRIMO P5915", OK, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRI…", "Mainboard model is D2312-A2."), B("Fujitsu-Siemens", "CELSIUS W410", BAD, "ftp://ftp.ts.fujitsu.com/pub/mainboard-oem-sales/Products/Mainboards/Indust…", "Mainboard model is D3062-A1. Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("GIGABYTE", "GA-2761GXDK", OK, "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gi…", NULL), @@ -814,8 +821,10 @@ B("GIGABYTE", "GA-965P-DS4", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL), B("GIGABYTE", "GA-EP31-DS3L (rev. 2.1)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL), B("GIGABYTE", "GA-EP35-DS3L", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL), + B("GIGABYTE", "GA-G41MT-S2PT", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3960", NULL), B("GIGABYTE", "GA-H61M-D2-B3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3773", NULL), B("GIGABYTE", "GA-H61M-D2H-USB3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4004", NULL), + B("GIGABYTE", "GA-H77-D3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4141", "Does only work with -p internal:ich_spi_mode=hwseq due to an evil twin of MX25L6405 and ICH SPI lockdown."), B("GIGABYTE", "GA-EX58-UD4P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL), B("GIGABYTE", "GA-K8N-SLI", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL), B("GIGABYTE", "GA-K8N51GMF", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL), @@ -839,6 +848,7 @@ B("GIGABYTE", "GA-P67A-UD3P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL), B("GIGABYTE", "GA-X58A-UD7 (rev. 2.0)", OK, NULL, NULL), B("GIGABYTE", "GA-X58A-UDR3 (rev. 2.0)", OK, NULL, NULL), + B("GIGABYTE", "GA-X79-UD5", OK, NULL, NULL), B("GIGABYTE", "GA-Z68MX-UD2H-B (rev. 1.3)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL), B("GIGABYTE", "GA-Z68XP-UD3 (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL), B("HP", "8100 Elite CMT PC (304Bh)", BAD, NULL, "SPI lock down, PR, read-only descriptor, locked ME region."), @@ -909,6 +919,7 @@ B("MSI", "MS-7253 (K9VGM-V)", OK, "http://www.msi.com/product/mb/K9VGM-V.html", NULL), B("MSI", "MS-7255 (P4M890M)", OK, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL), B("MSI", "MS-7260 (K9N Neo PCB 1.0)", BAD, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>."), + B("MSI", "MS-7309 (K9N6SGM-V)", BAD, "http://www.msi.com/product/mb/K9N6SGM-V---K9N6PGM-FI---K9N6PGM-F.html", "Uses Fintek F71882F/F71883F/F71887 SPI-to-LPC translation."), B("MSI", "MS-7309 (K9N6PGM2-V2)", OK, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL), B("MSI", "MS-7312 (K9MM-V)", OK, "http://www.msi.com/product/mb/K9MM-V.html", NULL), B("MSI", "MS-7345 (P35 Neo2-FIR)", OK, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL), @@ -953,6 +964,7 @@ B("Shuttle", "FD37", OK, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL), B("Shuttle", "FH67", OK, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL), B("Shuttle", "FN25", OK, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL), + B("Shuttle", "FN78S", OK, "http://www.shuttle.eu/products/discontinued/barebones/sn78sh7/", NULL), B("Shuttle", "X50/X50(B)", OK, "http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL), B("Soyo", "SY-5VD", BAD, "http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("Soyo", "SY-6BA+ III", OK, "http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL), @@ -977,6 +989,7 @@ B("Supermicro", "X8SIE(-F)", BAD, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI…", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."), B("Supermicro", "X8STi", OK, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL), B("Supermicro", "X9DR3-F", BAD, "http://www.supermicro.com/products/motherboard/xeon/c600/x9dr3-f.cfm", "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("Supermicro", "X9QRi-F+", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C600/X9QRi-F_.cfm", "Probing works (Macronix MX25L12805, 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked; SMM protection enabled."), B("Supermicro", "X9SCA-F", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X9SCL", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("T-Online", "S-100", OK, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL), @@ -1014,6 +1027,7 @@ B("Tyan", "S5377 (Tempest i5100T)", OK, "http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000…", NULL), B("Tyan", "S5382 (Tempest i5000PW)", OK, "http://www.tyan.com/product_board_detail.aspx?pid=439", NULL), B("Tyan", "S5397 (Tempest i5400PW)", OK, "http://www.tyan.com/product_board_detail.aspx?pid=560", NULL), + B("VIA", "EITX-3000", OK, "http://www.viaembedded.com/en/products/boards/810/1/EITX-3000.html", NULL), B("VIA", "EPIA M/MII/...", OK, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&…", NULL), /* EPIA-MII link for now */ B("VIA", "EPIA SP", OK, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&…", NULL), B("VIA", "EPIA-CN", OK, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_i…", NULL), @@ -1029,6 +1043,7 @@ B("VIA", "VB700X", OK, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_i…", NULL), B("ZOTAC", "Fusion-ITX WiFi (FUSION350-A-E)", OK, NULL, NULL), B("ZOTAC", "GeForce 8200", OK, NULL, NULL), + B("ZOTAC", "H61-ITX WiFi (H61ITX-A-E)", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ZOTAC", "H67-ITX WiFi (H67ITX-C-E)", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ZOTAC", "nForce 630i Supreme (N73U-Supreme)", OK, NULL, NULL), B("ZOTAC", "ZBOX AD02 (PLUS)", OK, NULL, NULL), Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Fri Sep 21 14:46:56 2012 (r1600) +++ trunk/spi.c Fri Sep 21 14:52:50 2012 (r1601) @@ -152,6 +152,7 @@ #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) case SPI_CONTROLLER_ICH7: + case SPI_CONTROLLER_ICH9: /* Return BBAR for ICH chipsets. */ return ichspi_bbar; #endif

1 0

Re: [flashrom] [PATCH 4/5] Add spi_block_erase_62.
by Stefan Tauner 21 Sep '12

21 Sep '12

On Wed, 15 Feb 2012 02:10:23 +0100 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > This is used by the AT25F series (only?), but is generic enough to reside in spi25.c. > The only currently supported chip is the AT25F512B. Other members of that series > need some additional infrastructure code, hence this patch adds the erase function to > the AT25F512B only. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> refined due to upstream changes, self-acked and committed in r1600 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1600 - trunk
by repository service 21 Sep '12

21 Sep '12

Author: stefanct Date: Fri Sep 21 14:46:56 2012 New Revision: 1600 URL: http://flashrom.org/trac/flashrom/changeset/1600 Log: Add spi_block_erase_62. This is used by the AT25F series (only?), but is generic enough to reside in spi25.c. The only currently supported chip is the AT25F512B. Other members of that series need some additional infrastructure code, hence this patch adds the erase function to the AT25F512B only. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/spi.h trunk/spi25.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Mon Sep 17 02:40:54 2012 (r1599) +++ trunk/chipdrivers.h Fri Sep 21 14:46:56 2012 (r1600) @@ -40,6 +40,7 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Sep 17 02:40:54 2012 (r1599) +++ trunk/flashchips.c Fri Sep 21 14:46:56 2012 (r1600) @@ -1695,6 +1695,9 @@ }, { .eraseblocks = { {64 * 1024, 1} }, .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, } }, .printlock = spi_prettyprint_status_register_at25f512b, Modified: trunk/spi.h ============================================================================== --- trunk/spi.h Mon Sep 17 02:40:54 2012 (r1599) +++ trunk/spi.h Fri Sep 21 14:46:56 2012 (r1600) @@ -66,6 +66,11 @@ #define JEDEC_CE_60_OUTSIZE 0x01 #define JEDEC_CE_60_INSIZE 0x00 +/* Chip Erase 0x62 is supported by Atmel AT25F chips. */ +#define JEDEC_CE_62 0x62 +#define JEDEC_CE_62_OUTSIZE 0x01 +#define JEDEC_CE_62_INSIZE 0x00 + /* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */ #define JEDEC_CE_C7 0xc7 #define JEDEC_CE_C7_OUTSIZE 0x01 Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Mon Sep 17 02:40:54 2012 (r1599) +++ trunk/spi25.c Fri Sep 21 14:46:56 2012 (r1600) @@ -487,6 +487,43 @@ return 0; } +int spi_chip_erase_62(struct flashctx *flash) +{ + int result; + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_CE_62_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_CE_62 }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(flash, cmds); + if (result) { + msg_cerr("%s failed during command execution\n", + __func__); + return result; + } + /* Wait until the Write-In-Progress bit is cleared. + * This usually takes 2-5 s, so wait in 100 ms steps. + */ + /* FIXME: We assume spi_read_status_register will never fail. */ + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(100 * 1000); + /* FIXME: Check the status register for errors. */ + return 0; +} + int spi_chip_erase_c7(struct flashctx *flash) { int result; @@ -711,6 +748,16 @@ return spi_chip_erase_60(flash); } +int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) { + msg_cerr("%s called with incorrect arguments\n", + __func__); + return -1; + } + return spi_chip_erase_62(flash); +} + int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) {

1 0

Re: [flashrom] MSI K9N6SGM-V: flashrom -V
by Stefan Tauner 19 Sep '12

19 Sep '12

On Tue, 18 Sep 2012 22:24:09 +0200 Benoit Sarels <benoit.sarels(a)gmail.com> wrote: thanks for testing! > Super I/O ID 0x0541 is SPI capable. TODO: Check if SPI is active. great, that means carl-daniel's code is working as expected to this point. but there is much more work to do before accessing the flash chip will work and he is constantly busy (with tiny breaks in between :) so please don't expect any further progress soon (and be happy in case my prediction turns out to be wrong). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

Re: [flashrom] [PATCH] Fintek SPI driver, based off it87spi
by Carl-Daniel Hailfinger 18 Sep '12

18 Sep '12

Hi Philipp Matthias, I noticed that you sent this log only to me and not to the mailing list. That's why I'm fullquoting it now. An updated patch will follow shortly. Regards, Carl-Daniel Am 23.10.2011 22:05 schrieb Philipp Matthias Hahn: > Moin Carl-Daniel, > > On Sun, Oct 23, 2011 at 01:24:31AM +0200, Carl-Daniel Hailfinger wrote: >>> The driver had lots of ITE IT87* related code which should have been >>> removed. >>> I adapted the code to the current superio interfaces, but in the process >>> I disabled all flashing completely. Right now I mostly want to check if >>> detection works or not. >>> >>> This code should be safe to run. >>> Please supply the log of >>> flashrom -V >> Next round. This one should print more info, and only one SuperI/O is >> supported. No flash access at all will happen. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> > # ./flashrom -V > flashrom v0.9.4-r1455 on Linux 3.0.7 (x86_64), built with libpci 3.1.7, GCC 4.6.1, little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OS timer resolution is 1 usecs, 2552M loops per second, 10 myus = 10 us, 100 myus = 96 us, 1000 myus = 960 us, 10000 myus = 9797 us, 4 myus = 4 us, OK. > Initializing internal programmer > No coreboot table found. > DMI string system-manufacturer: "MSI" > DMI string system-product-name: "MS-7350" > DMI string system-version: "1.0" > DMI string baseboard-manufacturer: "MSI" > DMI string baseboard-product-name: "MS-7350" > DMI string baseboard-version: "1.0" > DMI string chassis-type: "Desktop" > Found Fintek Super I/O, ID 0x4105. > Found chipset "NVIDIA MCP51" with PCI ID 10de:0260. Enabling flash write... OK. > This chipset supports the following protocols: Non-SPI. > F71882 LPC to serial flash translation enabled > Serial flash segment 0xfff00000-0xfff7ffff disabled > Serial flash segment 0xffee0000-0xffefffff enabled > Serial flash segment 0x000f0000-0x000fffff enabled > Serial flash segment 0xfff80000-0xffffffff enabled > Serial flash segment 0x000e0000-0x000effff enabled > LPC write to serial flash disabled > SPI_CS_EN is 0 > Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff > Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff > Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x91, id2 0xe3, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff > Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff > Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. > Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x02, id2 0x1e, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content > No EEPROM/flash device found. > Note: flashrom can never write if the flash chip isn't found automatically. > Restoring PCI config space for 00:0a:0 reg 0x6d > > BYtE > Philipp -- http://www.hailfinger.org/

2 2

Re: [flashrom] MSI K9N6SGM-V: flashrom -V
by Stefan Tauner 18 Sep '12

18 Sep '12

On Tue, 18 Sep 2012 16:01:20 +0200 Benoit Sarels <benoit.sarels(a)gmail.com> wrote: hi > It seems like I am missing something : yes indeed, namely the --programmer parameter ;) you need to add -p internal to the command line. since r1552 flashrom requires that you select the programmer. the previous behavior of having a default programmer has been disabled, because it could lead to unexpected bricking of devices if one gets too much used to a specific default programmer and then using another version of flashrom which uses another one... -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

Re: [flashrom] MSI K9N6SGM-V: flashrom -V
by Stefan Tauner 18 Sep '12

18 Sep '12

Hi! Thanks for the log. It seems like your board uses a superio chip that is not supported by flashrom yet. Carl-Daniel is working on a patch for it, but it does (or should) only detect that chip at the moment - it does not enable read or write access yet. Please do not expect flashrom to work on that board soon, sorry. If you want to help us add support for that board please get the source of flashrom from http://flashrom.org/Downloads#Installation_from_source apply the patch below, compile it and reply with a verbose log again. If you need help with that just ask or visit our IRC channel (#flashrom on chat.freenode.net). the current patch: http://patchwork.coreboot.org/patch/3713/ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

#5: Winbond W25Q128 for ICH
by flashrom 18 Sep '12

18 Sep '12

#5: Winbond W25Q128 for ICH ----------------------------------+--------------------------- Reporter: rheneus.paul@… | Owner: hailfinger Type: defect | Status: new Priority: critical | Milestone: Component: flashrom | Version: Keywords: | Dependencies: Patch Status: there is no patch | ----------------------------------+--------------------------- I could not use flashrom 0.9.3 -r1205 to detect Winbond W25Q128 to program BIOS. Attached the read log Just by adding WINBOND_NEX_W25Q128 0x4018 in flashchips.c for W25Q128, similar to W25Q64 throws run Opcode 0x3 error for read. Attached Verbose log of read -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/5> flashrom <http://www.flashrom.org/>

1 2

Add support for unlock and write to Atmel AT26F040
by tim＠buttersideup.com 18 Sep '12

18 Sep '12

Add support for unlock and write to Atmel AT26F040 SPI 512k chips. Tested using a bus pirate only. I'm unavailble for a couple of weeks imminently, but will reply on return if pos... Cheers, Tim. ~# flashrom -c AT26F004 -p buspirate_spi:dev=/dev/ttyUSB0 -Vw rr620WDA-read-rom-image flashrom v0.9.3-r1349 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1088M loops per second, 10 myus = 10 us, 100 myus = 95 us, 1000 myus = 945 us, 10000 myus = 9495 us, 4 myus = 5 us, OK. Initializing buspirate_spi programmer SPI speed is 8MHz Raw bitbang mode version 1 Raw SPI mode version 1 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x400 Chip status register is 1c Found chip "Atmel AT26F004" (512 kB, SPI) on buspirate_spi. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Some block protection in effect, disabling All write protection disabled! Reading old flash chip contents... Erasing and writing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff:EW, 0x001000-0x001fff:W, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S, 0x00c000-0x00cfff:W, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff:S, 0x010000-0x010fff:EW, 0x011000-0x011fff:EW, 0x012000-0x012fff:EW, 0x013000-0x013fff:EW, 0x014000-0x014fff:EW, 0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:S, 0x018000-0x018fff:S, 0x019000-0x019fff:S, 0x01a000-0x01afff:S, 0x01b000-0x01bfff:S, 0x01c000-0x01cfff:S, 0x01d000-0x01dfff:S, 0x01e000-0x01efff:S, 0x01f000-0x01ffff:S, 0x020000-0x020fff:EW, 0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W, 0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W, 0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W, 0x02a000-0x02aff f:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W, 0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W, 0x030000-0x030fff:W, 0x031000-0x031fff:W, 0x032000-0x032fff:W, 0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W, 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W, 0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W, 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:S, 0x03e000-0x03efff:S, 0x03f000-0x03ffff:S, 0x040000-0x040fff:S, 0x041000-0x041fff:S, 0x042000-0x042fff:S, 0x043000-0x043fff:S, 0x044000-0x044fff:S, 0x045000-0x045fff:S, 0x046000-0x046fff:S, 0x047000-0x047fff:S, 0x048000-0x048fff:S, 0x049000-0x049fff:S, 0x04a000-0x04afff:S, 0x04b000-0x04bfff:S, 0x04c000-0x04cfff:S, 0x04d000-0x04dfff:S, 0x04e000-0x04efff:S, 0x04f000-0x04ffff:S, 0x050000-0x050fff:S, 0x051000-0x051fff:S, 0x052000-0x052fff:S, 0x053000-0x053fff:S, 0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x056000-0x056fff:S, 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff: S, 0x05a000-0x05afff:S, 0x05b000-0x05bfff:W, 0x05c000-0x05cfff:W, 0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S, 0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S, 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S, 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S, 0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S, 0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S, 0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S, 0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S, 0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S, 0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S, 0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S, 0x07e000-0x07efff:S, 0x07f000-0x07ffff:S Done. Verifying flash... VERIFIED. Raw bitbang mode version 1 Bus Pirate shutdown completed. Signed-off-by: Tim Small <tim(a)seoss.co.uk> Index: at25.c =================================================================== --- at25.c (revision 1349) +++ at25.c (working copy) @@ -215,6 +215,8 @@ /* spi_disable_blockprotect_at25df is not really the right way to do * this, but the side effects of said function work here as well. */ + /* FIXME? This does a global unlock, but at25f don't have this command? + */ return spi_disable_blockprotect_at25df(flash); } @@ -285,3 +287,71 @@ } return 0; } + + +int spi_disable_blockprotect_at26f040(struct flashchip *flash) +{ + uint8_t status; + uint32_t i; + int result; + + /* See Page 19 * + * http://www.atmel.com/dyn/resources/prod_documents/doc3588.pdf */ + + /* Write Protect Pin status: 0 == cannot set SPRL to 0 (unlocked) */ + const uint8_t stat_bit_WPP = (1 << 4); + + /* Software Protection Status: 00 == all sectors unprotected */ + const uint8_t stat_bit_SWP = (3 << 2); + + /* Sector Protection registers locked: 0 == unlocked. * + * Cannot be set to 0 if WPP is 1 (hardware lock). */ + const uint8_t stat_bit_SPRL = (1 << 7); + + /* Page 6 */ + const uint8_t at26f004_unprotect_sector = 0x39; + + status = spi_read_status_register(); + /* If block protection is disabled, OK to go ahead, stop here. */ + if ((status & stat_bit_SWP) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & stat_bit_SPRL) { + msg_cdbg("Need to disable Sector Protection Register Lock\n"); + if ((status & stat_bit_WPP) == 0) { + msg_cerr("The chips write-protect pin is being " + "asserted (driven low) by external hardware." + "\nWriting is impossible :-(.\n"); + return 1; + } + /* All bits except bit 7 (SPRL) are readonly. */ + /* Unlock sector protection registers. */ + result = spi_write_status_register(flash, status & ~stat_bit_SPRL); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + + } + /* Call unprotect sector on each sector. We need to give an address */ + /* within each sector, and the smallest sector is 8KB. */ + for (i = 0; i < 0x80000; i += 0x1000) { + const unsigned char cmd[4] = { at26f004_unprotect_sector, + (i >> 16) & 0xff, + (i >> 8) & 0xff, + i & 0xff}; + /* set the chip's "WEL" write latch - WREN (Write Enable) */ + spi_write_enable(); + spi_send_command(sizeof(cmd), 0, cmd, NULL); + } + status = spi_read_status_register(); + if ((status & stat_bit_SWP) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } else { + msg_cerr("All write protection disabled!\n"); + } + + return 0; +} Index: spi25.c =================================================================== --- spi25.c (revision 1349) +++ spi25.c (working copy) @@ -1210,3 +1210,94 @@ return 0; } + + +/* This is for Atmel chips only (AT26F004, AT26DF161A etc.) - the 25F004 only + * does either this mode, or byte-at-a-time. */ +int spi_at26_write_sequential(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + /* ref http://www.atmel.com/dyn/resources/prod_documents/doc3588.pdf + * page 9 etc. */ + const int AT26_SEQ_BYTE_WRITE_OUTSIZE = 5; + const int AT26_SEQ_BYTE_WRITE_CONT_OUTSIZE = 2; + const int AT26_SEQ_BYTE_WRITE_CMD = 0xaf; + uint32_t pos = start; + int result; + unsigned char cmd[4] = { + AT26_SEQ_BYTE_WRITE_CMD + }; + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = AT26_SEQ_BYTE_WRITE_OUTSIZE, + .writearr = (const unsigned char[]){ + AT26_SEQ_BYTE_WRITE_CMD, + (start >> 16) & 0xff, + (start >> 8) & 0xff, + (start & 0xff), + buf[0] + }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + switch (spi_programmer->type) { +#if CONFIG_INTERNAL == 1 +#if defined(__i386__) || defined(__x86_64__) + case SPI_CONTROLLER_IT87XX: + case SPI_CONTROLLER_WBSIO: + msg_perr("%s: impossible with this SPI controller," + " degrading to byte program\n", __func__); + return spi_chip_write_1(flash, buf, start, len); +#endif +#endif + default: + break; + } + + cmds[1].writearr = (const unsigned char[]){ + 0xAF, + (pos >> 16) & 0xff, + (pos >> 8) & 0xff, + (pos & 0xff), + buf[pos - start] + }; + + + result = spi_send_multicommand(cmds); + if (result) { + msg_cerr("%s failed during start command execution\n", + __func__); + /* FIXME: Should we send WRDI here as well to make sure the chip + * is not in seuquential wirte mode? + */ + return result; + } + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(5); + + pos ++; + + while (pos < start + len) { + cmd[1] = buf[pos++ - start]; + spi_send_command(AT26_SEQ_BYTE_WRITE_CONT_OUTSIZE, 0, cmd, NULL); + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(5); + } + + /* Use WRDI to exit sequential write mode. This needs to be done before + * issuing any other non-sequential-byte-write commands. + */ + spi_write_disable(); + + return 0; +} Index: flashchips.c =================================================================== --- flashchips.c (revision 1349) +++ flashchips.c (working copy) @@ -1883,6 +1883,7 @@ }, .printlock = spi_prettyprint_status_register_atmel_at26df081a, .unlock = spi_disable_blockprotect, + /* Should support spi_at26_write_sequential too, but it's untested */ .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, @@ -1914,6 +1915,7 @@ .model_id = ATMEL_AT26F004, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1936,7 +1938,9 @@ .block_erase = spi_block_erase_c7, } }, - .write = NULL /* Incompatible Page write */, + .unlock = spi_disable_blockprotect_at26f040, + /* also supports spi_chip_write_1, but nothing else */ + .write = spi_at26_write_sequential, .read = spi_chip_read, .voltage = {2700, 3600}, }, Index: chipdrivers.h =================================================================== --- chipdrivers.h (revision 1349) +++ chipdrivers.h (working copy) @@ -55,6 +55,7 @@ int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf, int start, int len); +int spi_at26_write_sequential(struct flashchip *flash, uint8_t *buf, int start, int len); /* a25.c */ int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash); @@ -74,6 +75,7 @@ int spi_disable_blockprotect_at25f(struct flashchip *flash); int spi_disable_blockprotect_at25fs010(struct flashchip *flash); int spi_disable_blockprotect_at25fs040(struct flashchip *flash); +int spi_disable_blockprotect_at26f040(struct flashchip *flash); /* 82802ab.c */ uint8_t wait_82802ab(struct flashchip *flash);

3 4

[commit] r1599 - trunk
by repository service 17 Sep '12

17 Sep '12

Author: stefanct Date: Mon Sep 17 02:40:54 2012 New Revision: 1599 URL: http://flashrom.org/trac/flashrom/changeset/1599 Log: Allow to select FTDI device by serial number. Requires libftdi > 0.5 (2004, commit ID a8f46ddc1595b1b07abfcce613acdafe5b8ddf9d). Idea stolen from chromiumos commit 5eb5624aeb7e2ee483e2fa0823c4e634c8ea3e68: http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… Signed-off-by: Shik Chen <shik(a)chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashrom.8 trunk/ft2232_spi.c Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Mon Sep 17 02:05:44 2012 (r1598) +++ trunk/flashrom.8 Mon Sep 17 02:40:54 2012 (r1599) @@ -573,6 +573,15 @@ and the default interface is .BR B . .sp +If there is more than one ft2232_spi-compatible device connected, you can select which one should be used by +specifying its serial number with the +.sp +.B " flashrom \-p ft2232_spi:serial=number" +.sp +syntax where +.B number +is the serial number of the device (which can be found for example in the output of lsusb -v). +.sp All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The expressible divisors are all even numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of 6 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Mon Sep 17 02:05:44 2012 (r1598) +++ trunk/ft2232_spi.c Mon Sep 17 02:40:54 2012 (r1599) @@ -283,7 +283,9 @@ msg_perr("Unable to select interface: %s\n", ftdic->error_str); } - f = ftdi_usb_open(ftdic, ft2232_vid, ft2232_type); + arg = extract_programmer_param("serial"); + f = ftdi_usb_open_desc(ftdic, ft2232_vid, ft2232_type, NULL, arg); + free(arg); if (f < 0 && f != -5) { msg_perr("Unable to open FTDI device: %d (%s)\n", f,

1 0

[commit] r1598 - trunk
by repository service 17 Sep '12

17 Sep '12

Author: stefanct Date: Mon Sep 17 02:05:44 2012 New Revision: 1598 URL: http://flashrom.org/trac/flashrom/changeset/1598 Log: Add support for GigaDevice GD25LQ32. This is the low power version (vendor,device = 0xc8,0x6016) of GD25Q32 (0xc8,0x4016) which matches that of W25Q32 (0xef,0x4016) and W25Q32DW (0xef,0x6016). All their datasheets look pretty much the same with respect to commands, erase blocks, etc. Stolen from chromiumos: http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… Signed-off-by: Bryan Freed <bfreed(a)chromium.org> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Sep 15 17:51:09 2012 (r1597) +++ trunk/flashchips.c Mon Sep 17 02:05:44 2012 (r1598) @@ -4240,6 +4240,43 @@ }, { + .vendor = "GigaDevice", + .name = "GD25LQ32", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25LQ32, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, + }, + + { .vendor = "Hyundai", .name = "HY29F002T", .bustype = BUS_PARALLEL, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Sep 15 17:51:09 2012 (r1597) +++ trunk/flashchips.h Mon Sep 17 02:05:44 2012 (r1598) @@ -305,6 +305,7 @@ #define GIGADEVICE_GD25Q32 0x4016 #define GIGADEVICE_GD25Q64 0x4017 #define GIGADEVICE_GD25Q128 0x4018 +#define GIGADEVICE_GD25LQ32 0x6016 #define HYUNDAI_ID 0xAD /* Hyundai */ #define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */

1 0

Re: [flashrom] [coreboot] New laptop: Lenovo ThinkPad X230 tablet, with dumps to go with it
by Peter Stuge 16 Sep '12

16 Sep '12

Keith Hui wrote: > At this point I'm mostly interested in just identifying the flash chip > without disassembling the laptop, although I'm ready for that if > necessary. Try: flashrom -p internal:force=laptop_I_want_a_brick flashrom is overly defensive on Thinkpads, where the Renesas EC always has it's own flash. > However, I do need to find a USB-based chip programmer that can do > parallel, FWH and SPI. No such thing in cheap. You can get a GALEP-5, which supports an incredible range of devices, but which also costs >= 600 USD. I want to make an open hardware+firmware design, but so far I haven't made it beyond the USB protocol. http://git.stuge.se/?p=qiprog.git //Peter

2 1

Re: [flashrom] [coreboot] New laptop: Lenovo ThinkPad X230 tablet, with dumps to go with it
by Keith Hui 16 Sep '12

16 Sep '12

Thanks Idwer for your response. I downloaded most public datasheets available for the CPU and the PCH (it was called 7 Series). At this point I'm mostly interested in just identifying the flash chip without disassembling the laptop, although I'm ready for that if necessary. However, I do need to find a USB-based chip programmer that can do parallel, FWH and SPI. I still have to get a spare SPI flash chip and port coreboot to my Asus AMD board. For some reason I killed by home-built Willem PCB3B trying to convert it to PCB4-something to use newer version of its software. On Sat, Sep 15, 2012 at 7:10 AM, Idwer Vollering <vidwer(a)gmail.com> wrote: > CC: flashrom(a)flashrom.org > > 2012/9/15 Keith Hui <buurin(a)gmail.com>: >> Hi all, >> >> I'm back. With a new laptop. >> >> I'm now rocking a Lenovo x230 tablet, dual-booting Windows 7 and >> Fuduntu, both 64-bit. Knowing the last time I contributed to coreboot >> it was the good old 440BX when life was much simpler, it could be a >> while before I can get up to speed again, so I'll for now just put >> forth the obligatory lspci/superiotool dump to give any interested >> parties a heads-up of what support needs to be programmed for. >> >> Another interesting thing is it does UEFI. >> >> Below is output of flashrom 0.9.6.1. I cannot get it to identify the >> flash chip. lspci and superiotool dumps are attached. > > This thread mentions that it runs QM77: > http://forums.lenovo.com/t5/X-Series-Tablet-ThinkPad-Laptops/X230-Tablet-Ch… > >> >> # /usr/src/flashrom-0.9.6.1/flashrom -V -p internal >> flashrom v0.9.6.1-r1564 on Linux 3.4.9-1.fu2012.x86_64 (x86_64) >> flashrom is free software, get the source code at http://www.flashrom.org >> >> flashrom was built with libpci 3.1.7, GCC 4.6.3 20120306 (Red Hat >> 4.6.3-2), little endian >> Command line (3 args): /usr/src/flashrom-0.9.6.1/flashrom -V -p internal >> Calibrating delay loop... OS timer resolution is 1 usecs, 3243M loops >> per second, 10 myus = 10 us, 100 myus = 119 us, 1000 myus = 1026 us, >> 10000 myus = 10097 us, 4 myus = 4 us, OK. >> Initializing internal programmer >> No coreboot table found. >> DMI string system-manufacturer: "LENOVO" >> DMI string system-product-name: "3434CTO" >> DMI string system-version: "ThinkPad X230 Tablet" >> DMI string baseboard-manufacturer: "LENOVO" >> DMI string baseboard-product-name: "3434CTO" >> DMI string baseboard-version: "Not Available" >> DMI string chassis-type: "Notebook" >> Laptop detected via DMI. >> W836xx enter config mode worked or we were already in config mode. >> W836xx leave config mode had no effect. >> Active config mode, unknown reg 0x20 ID: 00. >> Please send the output of "flashrom -V" to >> flashrom(a)flashrom.org with W836xx: your board name: flashrom -V >> as the subject to help us finish support for your Super I/O. Thanks. >> ======================================================================== >> WARNING! You seem to be running flashrom on an unsupported laptop. >> Laptops, notebooks and netbooks are difficult to support and we >> recommend to use the vendor flashing utility. The embedded controller >> (EC) in these machines often interacts badly with flashing. >> See http://www.flashrom.org/Laptops for details. > > Also, see the "Laptops" section in flashrom's man page. > >> >> If flash is shared with the EC, erase is guaranteed to brick your laptop >> and write may brick your laptop. >> Read and probe may irritate your EC and cause fan failure, backlight >> failure and sudden poweroff. >> You have been warned. >> ======================================================================== >> Aborting. >> Error: Programmer initialization failed. > > You'll want to do a little investigation on which external programmer > [1] suits your needs. > > [1] http://flashrom.org/Supported_programmers

1 0

[PATCH] Fix flashrom running on boards with coreboot.
by Stefan Tauner 16 Sep '12

16 Sep '12

In r1577 we removed the discrimination of coreboot IDs and user-specified mainboards. The problem is that the board enable code required to find a board enable if either of these model strings were set. Therefore boards running coreboot that do not need a board enable failed to execute flashrom since then. This patch fixes this by handling coreboot IDs and user-supplied IDs differently again. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Carl-Daniel noticed that the order of the board_match_name() calls were odd. The result was that in the case the user supplied a mainboard model that differed from the one in the cb table, and if the user forced flashrom to not abort, then the board enable matching the cb table would have been used instead of the one the user supplied. this is wrong or at least confusing. board_enable.c | 20 +++++++++++++++----- internal.c | 10 +++------- programmer.h | 2 +- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/board_enable.c b/board_enable.c index b23ef8f..8528747 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2495,7 +2495,6 @@ static const struct board_match *board_match_name(const char *vendor, const char if (partmatch) return partmatch; - msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); return NULL; } @@ -2605,16 +2604,27 @@ void board_handle_before_laptop(void) board_handle_phase(P2); } -int board_flash_enable(const char *vendor, const char *model) +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model) { const struct board_match *board = NULL; int ret = 0; - if (vendor && model) { + if (vendor != NULL && model != NULL) { board = board_match_name(vendor, model); - if (!board) /* if a board was given it has to match, else we abort here. */ + if (!board) { /* If a board was given by the user it has to match, else we abort here. */ + msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", + vendor, model); return 1; - } else { + } + } + if (board == NULL && cb_vendor != NULL && cb_model != NULL) { + board = board_match_name(cb_vendor, cb_model); + if (!board) { /* Failure is an option here, because many cb boards don't require an enable. */ + msg_pdbg2("No board enable found matching coreboot IDs vendor=\"%s\", model=\"%s\".\n", + vendor, model); + } + } + if (board == NULL) { board = board_match_pci_ids(P3); if (!board) /* i.e. there is just no board enable available for this board */ return 0; diff --git a/internal.c b/internal.c index 7b6cff2..b4414a5 100644 --- a/internal.c +++ b/internal.c @@ -257,12 +257,8 @@ int internal_init(void) } #if defined(__i386__) || defined(__x86_64__) - if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ - /* If no -p internal:mainboard was given but there are valid coreboot IDs then use those. */ - if (board_vendor == NULL || board_model == NULL) { - board_vendor = cb_vendor; - board_model = cb_model; - } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { + if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { + if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" " match the current coreboot IDs of the mainboard (%s:%s).\n", board_vendor, board_model, cb_vendor, cb_model); @@ -339,7 +335,7 @@ int internal_init(void) init_superio_ite(); #endif - if (board_flash_enable(board_vendor, board_model)) { + if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model)) { msg_perr("Aborting to be safe.\n"); return 1; } diff --git a/programmer.h b/programmer.h index 51b9c40..dedec67 100644 --- a/programmer.h +++ b/programmer.h @@ -256,7 +256,7 @@ void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); -int board_flash_enable(const char *vendor, const char *model); +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); /* chipset_enable.c */ int chipset_flash_enable(void); -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] [PATCH] Fix flashrom running on boards with coreboot.
by Idwer Vollering 16 Sep '12

16 Sep '12

2012/9/15 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: > In r1577 we removed the discrimination of coreboot IDs and user-specified > mainboards. The problem is that the board enable code required to find > a board enable if either of these model strings were set. Therefore boards > running coreboot that do not need a board enable failed to execute flashrom > since then. This patch fixes this by handling coreboot IDs and user-supplied > IDs differently again. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer(a)gmail.com> > --- > board_enable.c | 20 +++++++++++++++----- > internal.c | 10 +++------- > programmer.h | 2 +- > 3 files changed, 19 insertions(+), 13 deletions(-) > > diff --git a/board_enable.c b/board_enable.c > index 2668f10..bdd5ebb 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -2493,7 +2493,6 @@ static const struct board_match *board_match_name(const char *vendor, const char > if (partmatch) > return partmatch; > > - msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); > return NULL; > } > > @@ -2603,16 +2602,27 @@ void board_handle_before_laptop(void) > board_handle_phase(P2); > } > > -int board_flash_enable(const char *vendor, const char *model) > +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model) Future plan: pass board_match{} to board_flash_enable() instead? > { > const struct board_match *board = NULL; > int ret = 0; > > - if (vendor && model) { > + if (cb_vendor != NULL && cb_model != NULL) { > + board = board_match_name(cb_vendor, cb_model); > + if (!board) { /* Failure is an option here, because many cb boards don't require an enable. */ > + msg_pdbg2("No board enable found matching coreboot IDs vendor=\"%s\", model=\"%s\".\n", > + vendor, model); > + } > + } > + if (board == NULL && vendor && model) { > board = board_match_name(vendor, model); > - if (!board) /* if a board was given it has to match, else we abort here. */ > + if (!board) { /* If a board was given by the user it has to match, else we abort here. */ > + msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", > + vendor, model); > return 1; > - } else { > + } > + } > + if (board == NULL) { > board = board_match_pci_ids(P3); > if (!board) /* i.e. there is just no board enable available for this board */ > return 0; > diff --git a/internal.c b/internal.c > index 7b6cff2..b4414a5 100644 > --- a/internal.c > +++ b/internal.c > @@ -257,12 +257,8 @@ int internal_init(void) > } > > #if defined(__i386__) || defined(__x86_64__) > - if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ > - /* If no -p internal:mainboard was given but there are valid coreboot IDs then use those. */ > - if (board_vendor == NULL || board_model == NULL) { > - board_vendor = cb_vendor; > - board_model = cb_model; > - } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { > + if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { > + if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { > msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" > " match the current coreboot IDs of the mainboard (%s:%s).\n", > board_vendor, board_model, cb_vendor, cb_model); > @@ -339,7 +335,7 @@ int internal_init(void) > init_superio_ite(); > #endif > > - if (board_flash_enable(board_vendor, board_model)) { > + if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model)) { > msg_perr("Aborting to be safe.\n"); > return 1; > } > diff --git a/programmer.h b/programmer.h > index 51b9c40..dedec67 100644 > --- a/programmer.h > +++ b/programmer.h > @@ -256,7 +256,7 @@ void sio_write(uint16_t port, uint8_t reg, uint8_t data); > void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); > void board_handle_before_superio(void); > void board_handle_before_laptop(void); > -int board_flash_enable(const char *vendor, const char *model); > +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); See above. > > /* chipset_enable.c */ > int chipset_flash_enable(void); > -- > Kind regards, Stefan Tauner > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

1 0

flashrom -V
by Gary E. Miller 15 Sep '12

15 Sep '12

Yo flashrom-ers! See below for the results of 'flashrom -V' on my Foxconn M61PMP motherboard. Flashing worked. RGDS GARY --------------------------------------------------------------------------- Gary E. Miller Rellim 109 NW Wilmington Ave., Suite E, Bend, OR 97701 gem(a)rellim.com Tel:+1(541)382-8588 localhost 966F1P07 # flashrom -V flashrom v0.9.5.2-r1515 on Linux 3.4.9-gentoo (x86_64), built with libpci 3.1.9, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1607M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10001 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "To Be Filled By O.E.M." DMI string system-product-name: "To Be Filled By O.E.M." DMI string system-version: "To Be Filled By O.E.M." DMI string baseboard-manufacturer: "FOXCONN" DMI string baseboard-product-name: "M61PMP/M61PMP-K" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8716 on port 0x2e Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xd0000000 Mapping NVIDIA MCP6x SPI at 0xd0000000, unaligned size 0x544. SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. No IT87* serial flash segment enabled. The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Chip status register is 00 Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x13 Found Winbond flash chip "W25Q80" (1024 kB, SPI). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). No operations were specified.

1 0

Dell Poweredge 6220 Flashrom Error
by William Sharp 15 Sep '12

15 Sep '12

./flashrom -p internal -V -r testfile flashrom v0.9.6.1-r1564 on Linux 2.6.18-164.el5 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-44), little endian Command line (5 args): ./flashrom -p internal -V -r testfile Calibrating delay loop... OS timer resolution is 1 usecs, 1197M loops per second, 10 myus = 11 us, 100 myus = 105 us, 1000 myus = 1002 us, 10000 myus = 10011 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Dell Inc." DMI string system-product-name: "PowerEdge C6220" DMI string system-version: "1.0.14" DMI string baseboard-manufacturer: "Dell Inc." DMI string baseboard-product-name: "0HYFFG" DMI string baseboard-version: "A01" Invalid string keyword: chassis-type Valid string keywords are: bios-vendor bios-version bios-release-date system-manufacturer system-product-name system-version system-serial-number baseboard-manufacturer baseboard-product-name baseboard-version baseboard-serial-number baseboard-asset-tag chassis-manufacturer chassis-version chassis-serial-number chassis-asset-tag processor-manufacturer processor-version dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel X79" with PCI ID 8086:1d41. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x4 0x7fffffff/0x7fffffff FWH IDSEL: 0x5 0x7fffffff/0x7fffffff FWH IDSEL: 0x6 0x7fffffff/0x7fffffff FWH IDSEL: 0x7 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0xc21: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done 0x06: 0x0004 (HSFC) HSFC: FGO=0, FCYCLE=2, FDBC=0, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x00001a1b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b 0x54: 0x000f0000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x0000ffff) is read-only. 0x58: 0x07ff0400 FREG1: BIOS region (0x00400000-0x007fffff) is read-write. 0x5C: 0x03ff0010 FREG2: WARNING: Management Engine region (0x00010000-0x003fffff) is locked. 0x74: 0x81cf0010 PR0: WARNING: 0x00010000-0x001cffff is read-only. 0x78: 0x800f0000 PR1: WARNING: 0x00000000-0x0000ffff is read-only. Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled. You can enforce write support with the ich_spi_force programmer option, but it will most likely harm your hardware! If you force flashrom you will get no support if something breaks. 0x90: 0x84 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xf84200 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=0 0x94: 0x0606 (PREOP) 0x96: 0xf27c (OPTYPE) 0x98: 0x0102209f (OPMENU) 0x9C: 0x00000503 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x0080200d (LVSCC) LVSCC: BES=0x1, WG=1, WSR=1, WEWS=0, EO=0x20, VCL=1 0xC8: 0x0000200d (UVSCC) UVSCC: BES=0x1, WG=1, WSR=1, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) SPI Read Configuration: prefetching disabled, caching enabled, OK. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. Receiving SFDP signature failed. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xf9, id2 0x37, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xf9, id2 0x37, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xf9, id2 0x37, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x00, id2 0x05, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x20, id2 0xb6, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xf9, id2 0x37, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x20, id2 0xb6, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xf9, id2 0x37, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x25, id2 0x32, id1 is normal flash content, id2 is normal flash content Found Macronix flash chip "MX25L6405" (8192 kB, SPI). Reading flash... Transaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=63, SME=0, SCF=0 Running OPCODE 0x03 failed at address 0x010000 (payload length was 64). Read operation failed! FAILED. Restoring MMIO space at 0x2b85277188a0 Restoring PCI config space for 00:1f:0 reg 0xdc [root@oscar279 downloads]#

2 1

Re: [flashrom] MSI K8N Neo Platinum
by Stefan Tauner 15 Sep '12

15 Sep '12

On Sat, 15 Sep 2012 11:01:12 -0400 Jud Porter <judson.porter(a)gmail.com> wrote: > http://paste.flashrom.org/view.php?id=1390 > http://paste.flashrom.org/view.php?id=1391 This one needs a board enable just like the Neo2. Committed in r1597. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1597 - trunk
by repository service 15 Sep '12

15 Sep '12

Author: stefanct Date: Sat Sep 15 17:51:09 2012 New Revision: 1597 URL: http://flashrom.org/trac/flashrom/changeset/1597 Log: Add board enable for MSI K8N Neo Platinum. It's the same as for the Neo2. Thanks to roxfan and twice11 who did the RE! Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Tested-by: Jud Porter Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Sep 7 10:27:46 2012 (r1596) +++ trunk/board_enable.c Sat Sep 15 17:51:09 2012 (r1597) @@ -1165,6 +1165,7 @@ /* * Suited for: + * - MSI K8N Neo Platinum: Socket 754 + nForce3 Ultra + CK8 * - MSI K8N Neo2 Platinum: Socket 939 + nForce3 Ultra + CK8 */ static int nvidia_mcp_gpio0c_raise(void) @@ -2404,6 +2405,7 @@ {0x8086, 0x24d3, 0x1462, 0x7880, 0x8086, 0x2570, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-6788-040 (848P NeoV)", 0, OK, intel_ich_gpio32_raise}, {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, P3, "MSI", "MS-7005 (651M-L)", 0, OK, sis_gpio0_raise_and_w836xx_memw}, {0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, P3, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, + {0x10DE, 0x00E0, 0x1462, 0x0300, 0x10DE, 0x00E1, 0x1462, 0x0300, NULL, NULL, NULL, P3, "MSI", "MS-7030 (K8N Neo Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, P3, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, {0x8086, 0x244b, 0x1462, 0x3910, 0x8086, 0x2442, 0x1462, 0x3910, NULL, NULL, NULL, P3, "MSI", "MS-6391 (845 Pro4)", 0, OK, intel_ich_gpio23_raise}, {0x1106, 0x3149, 0x1462, 0x7061, 0x1106, 0x3227, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-7061 (KM4M-V/KM4AM-V)", 0, OK, w836xx_memw_enable_2e}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Fri Sep 7 10:27:46 2012 (r1596) +++ trunk/print.c Sat Sep 15 17:51:09 2012 (r1597) @@ -895,6 +895,7 @@ B("MSI", "MS-6787 (P4MAM-V/P4MAM-L)", OK, "http://www.msi.com/service/search/?kw=6787&type=product", NULL), B("MSI", "MS-7005 (651M-L)", OK, "http://www.msi.com/product/mb/651M-L.html", NULL), B("MSI", "MS-7025 (K8N Neo2 Platinum)", OK, "http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL), + B("MSI", "MS-7030 (K8N Neo Platinum)", OK, "http://www.msi.com/product/mb/K8N-Neo-Platinum.html", NULL), B("MSI", "MS-7046", OK, "http://www.heimir.de/ms7046/", NULL), B("MSI", "MS-7061 (KM4M-V/KM4AM-V)", OK, "http://www.msi.com/service/search/?kw=7061&type=product", NULL), B("MSI", "MS-7065", OK, "http://browse.geekbench.ca/geekbench2/view/53114", NULL),

1 0

MSI K8N Neo Platinum
by Jud Porter 15 Sep '12

15 Sep '12

http://paste.flashrom.org/view.php?id=1390 http://paste.flashrom.org/view.php?id=1391

1 0

Re: [flashrom] [coreboot] New laptop: Lenovo ThinkPad X230 tablet, with dumps to go with it
by Idwer Vollering 15 Sep '12

15 Sep '12

CC: flashrom(a)flashrom.org 2012/9/15 Keith Hui <buurin(a)gmail.com>: > Hi all, > > I'm back. With a new laptop. > > I'm now rocking a Lenovo x230 tablet, dual-booting Windows 7 and > Fuduntu, both 64-bit. Knowing the last time I contributed to coreboot > it was the good old 440BX when life was much simpler, it could be a > while before I can get up to speed again, so I'll for now just put > forth the obligatory lspci/superiotool dump to give any interested > parties a heads-up of what support needs to be programmed for. > > Another interesting thing is it does UEFI. > > Below is output of flashrom 0.9.6.1. I cannot get it to identify the > flash chip. lspci and superiotool dumps are attached. This thread mentions that it runs QM77: http://forums.lenovo.com/t5/X-Series-Tablet-ThinkPad-Laptops/X230-Tablet-Ch… > > # /usr/src/flashrom-0.9.6.1/flashrom -V -p internal > flashrom v0.9.6.1-r1564 on Linux 3.4.9-1.fu2012.x86_64 (x86_64) > flashrom is free software, get the source code at http://www.flashrom.org > > flashrom was built with libpci 3.1.7, GCC 4.6.3 20120306 (Red Hat > 4.6.3-2), little endian > Command line (3 args): /usr/src/flashrom-0.9.6.1/flashrom -V -p internal > Calibrating delay loop... OS timer resolution is 1 usecs, 3243M loops > per second, 10 myus = 10 us, 100 myus = 119 us, 1000 myus = 1026 us, > 10000 myus = 10097 us, 4 myus = 4 us, OK. > Initializing internal programmer > No coreboot table found. > DMI string system-manufacturer: "LENOVO" > DMI string system-product-name: "3434CTO" > DMI string system-version: "ThinkPad X230 Tablet" > DMI string baseboard-manufacturer: "LENOVO" > DMI string baseboard-product-name: "3434CTO" > DMI string baseboard-version: "Not Available" > DMI string chassis-type: "Notebook" > Laptop detected via DMI. > W836xx enter config mode worked or we were already in config mode. > W836xx leave config mode had no effect. > Active config mode, unknown reg 0x20 ID: 00. > Please send the output of "flashrom -V" to > flashrom(a)flashrom.org with W836xx: your board name: flashrom -V > as the subject to help us finish support for your Super I/O. Thanks. > ======================================================================== > WARNING! You seem to be running flashrom on an unsupported laptop. > Laptops, notebooks and netbooks are difficult to support and we > recommend to use the vendor flashing utility. The embedded controller > (EC) in these machines often interacts badly with flashing. > See http://www.flashrom.org/Laptops for details. Also, see the "Laptops" section in flashrom's man page. > > If flash is shared with the EC, erase is guaranteed to brick your laptop > and write may brick your laptop. > Read and probe may irritate your EC and cause fan failure, backlight > failure and sudden poweroff. > You have been warned. > ======================================================================== > Aborting. > Error: Programmer initialization failed. You'll want to do a little investigation on which external programmer [1] suits your needs. [1] http://flashrom.org/Supported_programmers

1 0

[PATCH] Fix flashrom running on boards with coreboot.
by Stefan Tauner 15 Sep '12

15 Sep '12

In r1577 we removed the discrimination of coreboot IDs and user-specified mainboards. The problem is that the board enable code required to find a board enable if either of these model strings were set. Therefore boards running coreboot that do not need a board enable failed to execute flashrom since then. This patch fixes this by handling coreboot IDs and user-supplied IDs differently again. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- board_enable.c | 20 +++++++++++++++----- internal.c | 10 +++------- programmer.h | 2 +- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/board_enable.c b/board_enable.c index 2668f10..bdd5ebb 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2493,7 +2493,6 @@ static const struct board_match *board_match_name(const char *vendor, const char if (partmatch) return partmatch; - msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); return NULL; } @@ -2603,16 +2602,27 @@ void board_handle_before_laptop(void) board_handle_phase(P2); } -int board_flash_enable(const char *vendor, const char *model) +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model) { const struct board_match *board = NULL; int ret = 0; - if (vendor && model) { + if (cb_vendor != NULL && cb_model != NULL) { + board = board_match_name(cb_vendor, cb_model); + if (!board) { /* Failure is an option here, because many cb boards don't require an enable. */ + msg_pdbg2("No board enable found matching coreboot IDs vendor=\"%s\", model=\"%s\".\n", + vendor, model); + } + } + if (board == NULL && vendor && model) { board = board_match_name(vendor, model); - if (!board) /* if a board was given it has to match, else we abort here. */ + if (!board) { /* If a board was given by the user it has to match, else we abort here. */ + msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", + vendor, model); return 1; - } else { + } + } + if (board == NULL) { board = board_match_pci_ids(P3); if (!board) /* i.e. there is just no board enable available for this board */ return 0; diff --git a/internal.c b/internal.c index 7b6cff2..b4414a5 100644 --- a/internal.c +++ b/internal.c @@ -257,12 +257,8 @@ int internal_init(void) } #if defined(__i386__) || defined(__x86_64__) - if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ - /* If no -p internal:mainboard was given but there are valid coreboot IDs then use those. */ - if (board_vendor == NULL || board_model == NULL) { - board_vendor = cb_vendor; - board_model = cb_model; - } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { + if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { + if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" " match the current coreboot IDs of the mainboard (%s:%s).\n", board_vendor, board_model, cb_vendor, cb_model); @@ -339,7 +335,7 @@ int internal_init(void) init_superio_ite(); #endif - if (board_flash_enable(board_vendor, board_model)) { + if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model)) { msg_perr("Aborting to be safe.\n"); return 1; } diff --git a/programmer.h b/programmer.h index 51b9c40..dedec67 100644 --- a/programmer.h +++ b/programmer.h @@ -256,7 +256,7 @@ void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); -int board_flash_enable(const char *vendor, const char *model); +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); /* chipset_enable.c */ int chipset_flash_enable(void); -- Kind regards, Stefan Tauner

1 0

[PATCH 3/3] Fix memleak in the dummyflasher.
by Stefan Tauner 14 Sep '12

14 Sep '12

emu_persistent_image was not freed correctly. This bug was found thanks to valgrind. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- dummyflasher.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/dummyflasher.c b/dummyflasher.c index 2803f76..655b678 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -150,8 +150,9 @@ static int dummy_shutdown(void *data) if (emu_chip != EMULATE_NONE) { if (emu_persistent_image) { msg_pdbg("Writing %s\n", emu_persistent_image); - write_buf_to_file(flashchip_contents, emu_chip_size, - emu_persistent_image); + write_buf_to_file(flashchip_contents, emu_chip_size, emu_persistent_image); + free(emu_persistent_image); + emu_persistent_image = NULL; } free(flashchip_contents); } -- Kind regards, Stefan Tauner

1 0

[PATCH 2/3] Fix memleaks in cli_classic.c.
by Stefan Tauner 14 Sep '12

14 Sep '12

Frees the memory allocated for the following strings - log file name - layout file name - image file name - programmer parameter (and reset the associated global variable in flashrom.c) Also, free the flashchip structs allocated by probe_flash. The layout image names were not fixed due to the pending layout patches. These bugs were found thanks to valgrind. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- cli_classic.c | 15 +++++++++++++++ flashrom.c | 1 + 2 files changed, 16 insertions(+) diff --git a/cli_classic.c b/cli_classic.c index 58696ad..a120532 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -146,7 +146,9 @@ int main(int argc, char *argv[]) char *filename = NULL; char *layoutfile = NULL; +#ifndef STANDALONE char *logfile = NULL; +#endif /* !STANDALONE */ char *tempstr = NULL; char *pparam = NULL; @@ -235,6 +237,8 @@ int main(int argc, char *argv[]) tempstr = strdup(optarg); if (register_include_arg(tempstr)) cli_classic_abort_usage(); + /* FIXME: The image name is saved in a static array by register_include_arg() and + * needs to be freed after processing them. */ break; case 'L': if (++operation_specified > 1) { @@ -352,6 +356,7 @@ int main(int argc, char *argv[]) cli_classic_abort_usage(); if (logfile && open_logfile(logfile)) return 1; + free(logfile); #endif /* !STANDALONE */ #if CONFIG_PRINT_WIKI == 1 @@ -478,6 +483,7 @@ int main(int argc, char *argv[]) } msg_cinfo("Please note that forced reads most likely contain garbage.\n"); ret = read_flash_to_file(&flashes[0], filename); + free(flashes[0].chip); goto out_shutdown; } ret = 1; @@ -522,6 +528,15 @@ int main(int argc, char *argv[]) out_shutdown: programmer_shutdown(); out: + for (i = 0; i < chipcount; i++) + free(flashes[i].chip); + + free(filename); + free(layoutfile); + free(pparam); + /* clean up global variables */ + free(chip_to_probe); + chip_to_probe = NULL; #ifndef STANDALONE ret |= close_logfile(); #endif /* !STANDALONE */ diff --git a/flashrom.c b/flashrom.c index fdc5412..68ed652 100644 --- a/flashrom.c +++ b/flashrom.c @@ -351,6 +351,7 @@ int programmer_shutdown(void) int i = --shutdown_fn_count; ret |= shutdown_fn[i].func(shutdown_fn[i].data); } + programmer_param = NULL; return ret; } -- Kind regards, Stefan Tauner

1 0

[PATCH 1/3] Fix memleaks in dmi.c.
by Stefan Tauner 14 Sep '12

14 Sep '12

In dmi_init() we populate static char *dmistrings[] with values that get later compared in dmi_match(). Those strings are actually strduped in get_dmi_string() and hence need to be freed later. This patch accomplishes this by registering another shutdown method. This bug was found thanks to valgrind. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- dmi.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/dmi.c b/dmi.c index dfc78e9..fd260a6 100644 --- a/dmi.c +++ b/dmi.c @@ -144,16 +144,28 @@ static char *get_dmi_string(const char *string_name) result = strdup(answerbuf); if (!result) - puts("WARNING: Out of memory - DMI support fails"); + msg_perr("WARNING: Out of memory - DMI support fails"); return result; } +static int dmi_shutdown(void *data) +{ + int i; + for (i = 0; i < ARRAY_SIZE(dmistrings); i++) { + free(dmistrings[i]); + } + return 0; +} + void dmi_init(void) { int i; char *chassis_type; + if (register_shutdown(dmi_shutdown, NULL)) + return; + has_dmi_support = 1; for (i = 0; i < ARRAY_SIZE(dmidecode_names); i++) { dmistrings[i] = get_dmi_string(dmidecode_names[i]); -- Kind regards, Stefan Tauner

1 0

[PATCH 0/3] Fix memleaks
by Stefan Tauner 14 Sep '12

14 Sep '12

This is probably just a start, but these patches are fixes for the most trivial problems valgrind was able to find in my tests. The libpci code leaks a lot and the cli_classic_abort_usage() function needs to die sooner than later... and the layout patches need to be merged eventually ;) For reusable variables it may make sense to create a cleanup function or macro like this: #define clean(p) free(p);(p) = NULL what do you think? Stefan Tauner (3): Fix memleaks in dmi.c. Fix memleaks in cli_classic.c. Fix memleak in the dummyflasher. cli_classic.c | 15 +++++++++++++++ dmi.c | 14 +++++++++++++- dummyflasher.c | 5 +++-- flashrom.c | 1 + 4 files changed, 32 insertions(+), 3 deletions(-) -- Kind regards, Stefan Tauner

1 0

[PATCH] Add board enable for ASUS M3N78-EM.
by Stefan Tauner 13 Sep '12

13 Sep '12

From: Joshua Roys <roysjosh(a)gmail.com> This does not work* (yet), but we want to keep it in patchwork for further refinement. * http://paste.flashrom.org/view.php?id=954 --- board_enable.c | 12 ++++++++++++ chipset_enable.c | 15 ++++++++++++++- mcp6x_spi.c | 11 +++++++++++ 3 files changed, 37 insertions(+), 1 deletion(-) diff --git a/board_enable.c b/board_enable.c index 2668f10..540eb7d 100644 --- a/board_enable.c +++ b/board_enable.c @@ -878,6 +878,17 @@ static int board_msi_kt4v(void) return ret; } +static int board_asus_m3n78em_enable(void) +{ + uint8_t tmp; + + tmp = INB(0xA02); + tmp |= 0x01; + OUTB(tmp, 0xA02); + + return 0; +} + /* * Suited for: * - ASUS P5A @@ -2323,6 +2334,7 @@ const struct board_match board_matches[] = { {0x10de, 0x0264, 0x1043, 0x81bc, 0x10de, 0x02f0, 0x1043, 0x81cd, NULL, NULL, NULL, P3, "ASUS", "A8N-VM CSM", 0, OK, w83627ehf_gpio22_raise_2e}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, P3, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, P3, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, + {0x10de, 0x075c, 0x1043, 0x82f2, 0x10de, 0x0752, 0x1043, 0x82f2, NULL, NULL, NULL, P3, "ASUS", "M3N78-EM", 0, OK, board_asus_m3n78em_enable}, {0x8086, 0x24cc, 0, 0, 0x8086, 0x24c3, 0x1043, 0x1869, "^M6Ne$", NULL, NULL, P3, "ASUS", "M6Ne", 0, NT, intel_ich_gpio43_raise}, {0x8086, 0x7180, 0, 0, 0x8086, 0x7110, 0, 0, "^OPLX-M$", NULL, NULL, P3, "ASUS", "OPLX-M", 0, NT, intel_piix4_gpo18_lower}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^P2B-N$", NULL, NULL, P3, "ASUS", "P2B-N", 0, OK, intel_piix4_gpo18_lower}, diff --git a/chipset_enable.c b/chipset_enable.c index e1684f9..07b7671 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1157,6 +1157,8 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); + ret = enable_flash_mcp55(dev, name); + /* dev is the ISA bridge. No idea what the stuff below does. */ val = pci_read_byte(dev, 0x8a); msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " @@ -1164,7 +1166,6 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) switch ((val >> 5) & 0x3) { case 0x0: - ret = enable_flash_mcp55(dev, name); internal_buses_supported = BUS_LPC; msg_pdbg("Flash bus type is LPC\n"); break; @@ -1198,6 +1199,18 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) if (mcp6x_spi_init(want_spi)) ret = 1; + rpci_write_byte(dev, 0x8e, 0x00); + if (pci_read_byte(dev, 0x8e) != 0x00) { + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x8e, 0x00, name); + } + + rpci_write_byte(dev, 0x8f, 0x00); + if (pci_read_byte(dev, 0x8f) != 0x00) { + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x8f, 0x00, name); + } + out_msg: msg_pinfo("Please send the output of \"flashrom -V\" to " "flashrom(a)flashrom.org with\n" diff --git a/mcp6x_spi.c b/mcp6x_spi.c index ac40557..abe8e0d 100644 --- a/mcp6x_spi.c +++ b/mcp6x_spi.c @@ -104,6 +104,7 @@ static const struct bitbang_spi_master bitbang_spi_master_mcp6x = { int mcp6x_spi_init(int want_spi) { + uint8_t old, new; uint16_t status; uint32_t mcp6x_spibaraddr; struct pci_dev *smbusdev; @@ -125,6 +126,16 @@ int mcp6x_spi_init(int want_spi) smbusdev->bus, smbusdev->dev, smbusdev->func); + old = pci_read_byte(smbusdev, 0xe7); + new = old | 0x80; + if (new != old) { + rpci_write_byte(smbusdev, 0xe7, new); + if (pci_read_byte(smbusdev, 0xe7) != new) { + msg_pinfo("Setting register 0x%x to 0x%x failed " + "(WARNING ONLY).\n", 0xe7, new); + } + } + /* Locate the BAR where the SPI interface lives. */ mcp6x_spibaraddr = pci_read_long(smbusdev, 0x74); /* BAR size is 64k, bits 15..4 are zero, bit 3..0 declare a -- Kind regards, Stefan Tauner

1 0

[PATCH] ichspi: reprogram_opcode_on_the_fly return code fix.
by Stefan Tauner 12 Sep '12

12 Sep '12

From: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> by carldani, found in our paste service history --- ichspi.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/ichspi.c b/ichspi.c index ce9c553..fbc6ea7 100644 --- a/ichspi.c +++ b/ichspi.c @@ -409,13 +409,19 @@ static int reprogram_opcode_on_the_fly(uint8_t opcode, unsigned int writecnt, un else // we have an invalid case return SPI_INVALID_LENGTH; } - int oppos = 2; // use original JEDEC_BE_D8 offset - curopcodes->opcode[oppos].opcode = opcode; - curopcodes->opcode[oppos].spi_type = spi_type; - program_opcodes(curopcodes, 0); - oppos = find_opcode(curopcodes, opcode); - msg_pdbg2("on-the-fly OPCODE (0x%02X) re-programmed, op-pos=%d\n", opcode, oppos); - return oppos; + if (spi_type <= 3) { + int oppos = 2; // use original JEDEC_BE_D8 offset + curopcodes->opcode[oppos].opcode = opcode; + curopcodes->opcode[oppos].spi_type = spi_type; + program_opcodes(curopcodes, 0); + oppos = find_opcode(curopcodes, opcode); + msg_pdbg2("on-the-fly OPCODE (0x%02X) re-programmed, op-pos=%d\n", opcode, oppos); + return oppos; + } + /* This case only happens if the writecnt/readcnt combination is + * impossible to achieve on ICH SPI. + */ + return SPI_INVALID_LENGTH; } static int find_opcode(OPCODES *op, uint8_t opcode) -- Kind regards, Stefan Tauner

1 0

MSI K9N6SGM-V: flashrom -V
by Benoit Sarels 12 Sep '12

12 Sep '12

bibi@k9n6sgm-v:~$ sudo flashrom -V flashrom v0.9.5.2-r1517 on Linux 3.2.0-30-generic (x86_64), built with libpci 3.1.8, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 803M loops per second, 10 myus = 10 us, 100 myus = 101 us, 1000 myus = 1000 us, 10000 myus = 10012 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "MSI" DMI string system-product-name: "MS-7309" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "MSI" DMI string baseboard-product-name: "MS-7309" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Flash bus type is LPC Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. The following protocols are supported: LPC. Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xff, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xff, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring PCI config space for 00:01:0 reg 0x6d Restoring PCI config space for 00:01:0 reg 0x90 Restoring PCI config space for 00:01:0 reg 0x8c Restoring PCI config space for 00:01:0 reg 0x88

1 0

Re: [flashrom] [PATCH] Enable spi clock setting in dediprog driver
by Nico Huber 12 Sep '12

12 Sep '12

Second revision: This adds a programmer parameter 'spispeed' to the dediprog driver to control the transfer rate on the spi bus. The following rates are available (in Hz): 375k, 750k, 1.5M, 2.18M, 3M, 8M, 12M and 24M The original driver reinitializes the programmer after setting the speed, so the initialization calls have moved into a new function dediprog_setup() which is called twice. Signed-off-by: Nico Huber <nico.huber(a)secunet.com> Index: dediprog.c =================================================================== --- dediprog.c (Revision 1596) +++ dediprog.c (Arbeitskopie) @@ -152,7 +152,23 @@ return 0; } -#if 0 +struct dediprog_spispeeds { + const char *const name; + const int speed; +}; + +static const struct dediprog_spispeeds spispeeds[] = { + { "24M", 0x0 }, + { "12M", 0x2 }, + { "8M", 0x1 }, + { "3M", 0x3 }, + { "2.18M", 0x4 }, + { "1.5M", 0x5 }, + { "750k", 0x6 }, + { "375k", 0x7 }, + { NULL, 0x0 }, +}; + /* After dediprog_set_spi_speed, the original app always calls * dediprog_set_spi_voltage(0) and then * dediprog_check_devicestring() four times in a row. @@ -160,56 +176,20 @@ * This looks suspiciously like the microprocessor in the SF100 has to be * restarted/reinitialized in case the speed changes. */ -static int dediprog_set_spi_speed(uint16_t speed) +static int dediprog_set_spi_speed(unsigned int spispeed_idx) { int ret; - unsigned int khz; - /* Case 1 and 2 are in weird order. Probably an organically "grown" - * interface. - * Base frequency is 24000 kHz, divisors are (in order) - * 1, 3, 2, 8, 11, 16, 32, 64. - */ - switch (speed) { - case 0x0: - khz = 24000; - break; - case 0x1: - khz = 8000; - break; - case 0x2: - khz = 12000; - break; - case 0x3: - khz = 3000; - break; - case 0x4: - khz = 2180; - break; - case 0x5: - khz = 1500; - break; - case 0x6: - khz = 750; - break; - case 0x7: - khz = 375; - break; - default: - msg_perr("Unknown frequency selector 0x%x! Aborting.\n", speed); - return 1; - } - msg_pdbg("Setting SPI speed to %u kHz\n", khz); + msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed_idx].name); - ret = usb_control_msg(dediprog_handle, 0x42, 0x61, speed, 0xff, NULL, - 0x0, DEFAULT_TIMEOUT); + ret = usb_control_msg(dediprog_handle, 0x42, 0x61, spispeeds[spispeed_idx].speed, 0xff, + NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command Set SPI Speed 0x%x failed!\n", speed); + msg_perr("Command Set SPI Speed 0x%x failed!\n", spispeeds[spispeed_idx].speed); return 1; } return 0; } -#endif /* Bulk read interface, will read multiple 512 byte chunks aligned to 512 bytes. * @start start address @@ -736,6 +716,28 @@ return millivolt; } +static int dediprog_setup(void) +{ + /* URB 6. Command A. */ + if (dediprog_command_a()) { + return 1; + } + /* URB 7. Command A. */ + if (dediprog_command_a()) { + return 1; + } + /* URB 8. Command Prepare Receive Device String. */ + /* URB 9. Command Receive Device String. */ + if (dediprog_check_devicestring()) { + return 1; + } + /* URB 10. Command C. */ + if (dediprog_command_c()) { + return 1; + } + return 0; +} + static const struct spi_programmer spi_programmer_dediprog = { .type = SPI_CONTROLLER_DEDIPROG, .max_data_read = MAX_DATA_UNSPECIFIED, @@ -777,12 +779,21 @@ int dediprog_init(void) { struct usb_device *dev; - char *voltage; - int millivolt = 3500; - int ret; + char *voltage, *spispeed; + int spispeed_idx = 2, millivolt = 3500; + int i, ret; msg_pspew("%s\n", __func__); + spispeed = extract_programmer_param("spispeed"); + if (spispeed) { + for (i = 0; spispeeds[i].name; ++i) { + if (!strcasecmp(spispeeds[i].name, spispeed)) { + spispeed_idx = i; + break; + } + } + } voltage = extract_programmer_param("voltage"); if (voltage) { millivolt = parse_voltage(voltage); @@ -821,33 +832,26 @@ return 1; } dediprog_endpoint = 2; - + if (register_shutdown(dediprog_shutdown, NULL)) return 1; dediprog_set_leds(PASS_ON|BUSY_ON|ERROR_ON); - /* URB 6. Command A. */ - if (dediprog_command_a()) { + /* Perform basic setup. */ + if (dediprog_setup()) { dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); return 1; } - /* URB 7. Command A. */ - if (dediprog_command_a()) { + + /* After setting voltage and speed, perform setup again. */ + if (dediprog_set_spi_voltage(0) || + dediprog_set_spi_speed(spispeed_idx) || + dediprog_setup()) { dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); return 1; } - /* URB 8. Command Prepare Receive Device String. */ - /* URB 9. Command Receive Device String. */ - if (dediprog_check_devicestring()) { - dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); - return 1; - } - /* URB 10. Command C. */ - if (dediprog_command_c()) { - dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); - return 1; - } + /* URB 11. Command Set SPI Voltage. */ if (dediprog_set_spi_voltage(millivolt)) { dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); Index: flashrom.8 =================================================================== --- flashrom.8 (Revision 1596) +++ flashrom.8 (Arbeitskopie) @@ -641,6 +641,18 @@ can be .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V or the equivalent in mV. +.sp +An optional +.B spispeed +parameter specifies the frequency of the SPI bus. Syntax is +.sp +.B " flashrom \-p dediprog:spispeed=frequency" +.sp +where +.B frequency +can be +.BR 375k ", " 750k ", " 1.5M ", " 2.18M ", " 3M ", " 8M ", " 12M " or " 24M +(in Hz). The default is a frequency of 12 MHz. .SS .BR "rayer_spi " programmer The default I/O base address used for the parallel port is 0x378 and you can use

1 0

[PATCH v2] Add Altera USB Blaster SPI programmer
by Kyösti Mälkki 11 Sep '12

11 Sep '12

Adds support for the Altera USB-Blaster programming dongle in SPI mode. Tested on both original product and a clone dongle. Signed-off-by: James Laird <jhl(a)mafipulation.org> [km: Handle issues from review, cleanup and rebase.] Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> diff --git a/Makefile b/Makefile index 9309ce5..e88fbd3 100644 --- a/Makefile +++ b/Makefile @@ -105,7 +105,7 @@ UNSUPPORTED_FEATURES += CONFIG_PONY_SPI=yes else override CONFIG_PONY_SPI = no endif -# Dediprog and FT2232 are not supported under DOS (missing USB support). +# Dediprog, FT2232 and USB-Blaster are not supported under DOS (missing USB support). ifeq ($(CONFIG_DEDIPROG), yes) UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes else @@ -116,6 +116,11 @@ UNSUPPORTED_FEATURES += CONFIG_FT2232_SPI=yes else override CONFIG_FT2232_SPI = no endif +ifeq ($(CONFIG_USBBLASTER_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_USBBLASTER_SPI=yes +else +override CONFIG_USBBLASTER_SPI = no +endif endif # FIXME: Should we check for Cygwin/MSVC as well? @@ -217,7 +222,7 @@ UNSUPPORTED_FEATURES += CONFIG_SERPROG=yes else override CONFIG_SERPROG = no endif -# Dediprog and FT2232 are not supported with libpayload (missing libusb support) +# Dediprog, FT2232 and USB-Blaster are not supported with libpayload (missing libusb support) ifeq ($(CONFIG_DEDIPROG), yes) UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes else @@ -228,6 +233,11 @@ UNSUPPORTED_FEATURES += CONFIG_FT2232_SPI=yes else override CONFIG_FT2232_SPI = no endif +ifeq ($(CONFIG_USBBLASTER_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_USBBLASTER_SPI=yes +else +override CONFIG_USBBLASTER_SPI = no +endif endif ifneq ($(TARGET_OS), Linux) @@ -370,6 +380,9 @@ CONFIG_SATAMV ?= yes # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +# Always enable USB-Blaster SPI for now. +CONFIG_USBBLASTER_SPI ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -459,12 +472,29 @@ PROGRAMMER_OBJS += atahpt.o NEED_PCI := yes endif -ifeq ($(CONFIG_FT2232_SPI), yes) -FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") # This is a totally ugly hack. -FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'CONFIG_FT2232_SPI=1'") -FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") -PROGRAMMER_OBJS += ft2232_spi.o +WANT_LIBFTDI := no +HAVE_LIBFTDI := $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && echo "yes") +ifeq ($(CONFIG_FT2232_SPI), yes) + WANT_LIBFTDI := yes + ifeq ($(HAVE_LIBFTDI), yes) + FEATURE_CFLAGS += -DCONFIG_FT2232_SPI=1 + PROGRAMMER_OBJS += ft2232_spi.o + endif +endif +ifeq ($(CONFIG_USBBLASTER_SPI), yes) + WANT_LIBFTDI := yes + ifeq ($(HAVE_LIBFTDI), yes) + FEATURE_CFLAGS += -DCONFIG_USBBLASTER_SPI=1 + PROGRAMMER_OBJS += usbblaster_spi.o + endif +endif + +ifeq ($(WANT_LIBFTDI), yes) + ifeq ($(HAVE_LIBFTDI), yes) + FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") + FEATURE_LIBS += $(FTDILIBS) + endif endif ifeq ($(CONFIG_DUMMY), yes) @@ -745,7 +775,7 @@ export LINUX_SPI_TEST features: compiler @echo "FEATURES := yes" > .features.tmp -ifeq ($(CONFIG_FT2232_SPI), yes) +ifeq ($(WANT_LIBFTDI), yes) @printf "Checking for FTDI support... " @echo "$$FTDI_TEST" > .featuretest.c @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ diff --git a/README b/README index 8e812be..7f24cca 100644 --- a/README +++ b/README @@ -45,8 +45,8 @@ Build Instructions To build flashrom you need to install the following software: * pciutils+libpci (if you want support for mainboard or PCI device flashing) - * libusb (if you want FT2232 or Dediprog support) - * libftdi (if you want FT2232 support) + * libusb (if you want FT2232, Dediprog or USB-Blaster support) + * libftdi (if you want FT2232 or USB-Blaster support) Linux et al: diff --git a/flashrom.c b/flashrom.c index fdc5412..0bd3a4a 100644 --- a/flashrom.c +++ b/flashrom.c @@ -262,6 +262,16 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_USBBLASTER_SPI == 1 + { + .name = "usbblaster_spi", + .init = usbblaster_spi_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + {0}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; diff --git a/print.c b/print.c index 582a49e..e23e9e6 100644 --- a/print.c +++ b/print.c @@ -547,6 +547,11 @@ void print_supported(void) programmer_table[PROGRAMMER_LINUX_SPI].name); msg_ginfo("Device files /dev/spidev*.*\n"); #endif +#if CONFIG_USBBLASTER_SPI == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_USBBLASTER_SPI].name); + msg_ginfo("Altera USB-Blaster cable\n"); +#endif } #if CONFIG_INTERNAL == 1 diff --git a/programmer.h b/programmer.h index 51b9c40..2c2063c 100644 --- a/programmer.h +++ b/programmer.h @@ -87,6 +87,9 @@ enum programmer { #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +#if CONFIG_USBBLASTER_SPI == 1 + PROGRAMMER_USBBLASTER_SPI, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -434,6 +437,11 @@ extern const struct usbdev_status devs_ft2232spi[]; void print_supported_usbdevs(const struct usbdev_status *devs); #endif +/* usbblaster_spi.c */ +#if CONFIG_USBBLASTER_SPI == 1 +int usbblaster_spi_init(void); +#endif + /* rayer_spi.c */ #if CONFIG_RAYER_SPI == 1 int rayer_spi_init(void); @@ -512,6 +520,9 @@ enum spi_controller { #if CONFIG_SERPROG == 1 SPI_CONTROLLER_SERPROG, #endif +#if CONFIG_USBBLASTER_SPI == 1 + SPI_CONTROLLER_USBBLASTER, +#endif }; #define MAX_DATA_UNSPECIFIED 0 diff --git a/usbblaster_spi.c b/usbblaster_spi.c new file mode 100644 index 0000000..01fc722 --- /dev/null +++ b/usbblaster_spi.c @@ -0,0 +1,227 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2012 James Laird <jhl(a)mafipulation.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * Device should be connected as per "active serial" mode: + * + * +---------+------+-----------+ + * | SPI | Pin | Altera | + * +---------+------+-----------+ + * | SCLK | 1 | DCLK | + * | GND | 2,10 | GND | + * | VCC | 4 | VCC(TRGT) | + * | MISO | 7 | ASDO | + * | /CS | 8 | nCS | + * | MOSI | 9 | ASDI | + * +---------+------+-----------+ + */ + +#if CONFIG_USBBLASTER_SPI == 1 + +#include <stdio.h> +#include <string.h> +#include <stdlib.h> +#include <ctype.h> +#include "flash.h" +#include "programmer.h" +#include "spi.h" +#include <ftdi.h> + +/* Please keep sorted by vendor ID, then device ID. */ + +#define ALTERA_VID 0x09fb +#define ALTERA_USBBLASTER_PID 0x6001 + +const struct usbdev_status devs_usbblasterspi[] = { + {ALTERA_VID, ALTERA_USBBLASTER_PID, NT, "Altera", "USB-Blaster"}, + {}, +}; + +static const struct spi_programmer spi_programmer_usbblaster; + +static struct ftdi_context ftdic; + +// command bytes +#define BIT_BYTE (1<<7) // byte mode (rather than bitbang) +#define BIT_READ (1<<6) // read request + +#define BIT_LED (1<<5) +#define BIT_CS (1<<3) +#define BIT_CLK (1<<0) +#define BIT_TMS (1<<1) + +// The programmer shifts bits in the wrong order for SPI. +uint8_t reverse(uint8_t b) +{ + b = ((b * 0x0802LU & 0x22110LU) | (b * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16; + return b; +} + + +/* Returns 0 upon success, a negative number upon errors. */ +int usbblaster_spi_init(void) +{ + if (ftdi_init(&ftdic) < 0) + return -1; + + if (ftdi_usb_open(&ftdic, ALTERA_VID, ALTERA_USBBLASTER_PID) < 0) { + msg_perr("Failed to open USB-Blaster: %s\n", ftdic.error_str); + return -1; + } + + if (ftdi_usb_reset(&ftdic) < 0) { + msg_perr("Blaster reset failed\n"); + return -1; + } + + if (ftdi_set_latency_timer(&ftdic, 2) < 0) { + msg_perr("Blaster set latency timer failed\n"); + return -1; + } + + if (ftdi_write_data_set_chunksize(&ftdic, 4096) < 0 || + ftdi_read_data_set_chunksize(&ftdic, 64) < 0) { + msg_perr("Blaster set chunk size failed\n"); + return -1; + } + uint8_t buf[65]; + memset(buf, 0, sizeof(buf)); + buf[sizeof(buf)-1] = BIT_LED | BIT_CS; + if (ftdi_write_data(&ftdic, buf, sizeof(buf)) < 0) { + msg_perr("Blaster reset write failed\n"); + return -1; + } + if (ftdi_read_data(&ftdic, buf, sizeof(buf)) < 0) { + msg_perr("Blaster reset read failed\n"); + return -1; + } + + register_spi_programmer(&spi_programmer_usbblaster); + return 0; +} + +static int send_write(unsigned int writecnt, const unsigned char *writearr) +{ + uint8_t buf[64]; + int i; + + memset(buf, 0, sizeof(buf)); + while (writecnt) { + unsigned int n_write = writecnt; + if (n_write > 63) + n_write = 63; + + msg_pspew("writing %d-byte packet\n", n_write); + + buf[0] = BIT_BYTE | (uint8_t)n_write; + for (i=0; i<n_write; i++) { + buf[i+1] = reverse(writearr[i]); + } + if (ftdi_write_data(&ftdic, buf, n_write+1) < 0) { + msg_perr("Blaster write failed\n"); + return -1; + } + + writearr += n_write; + writecnt -= n_write; + } + return 0; +} + +static int send_read(unsigned int readcnt, unsigned char *readarr) +{ + uint8_t buf[64]; + int i; + + memset(buf, 0, sizeof(buf)); + unsigned int n_readout = readcnt; + while (readcnt) { + unsigned int n_read = readcnt; + if (n_read > 63) + n_read = 63; + + buf[0] = BIT_BYTE | BIT_READ | (uint8_t)n_read; + if (ftdi_write_data(&ftdic, buf, n_read + 1) < 0) { + msg_perr("Blaster write failed\n"); + return -1; + } + + readcnt -= n_read; + msg_pspew("reading %d-byte packet\n", n_read); + }; + + unsigned int n_read = n_readout; + while (n_read) { + int ret = ftdi_read_data(&ftdic, readarr, n_read); + if (ret < 0) { + msg_perr("Blaster read failed\n"); + return -1; + } + for (i=0; i<ret; i++) { + readarr[i] = reverse(readarr[i]); + } + n_read -= ret; + readarr += ret; + } + return 0; +} + +/* Returns 0 upon success, a negative number upon errors. */ +static int usbblaster_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) +{ + int ret = 0; + uint8_t cmd; + // assert /CS + cmd = BIT_LED; + if (ftdi_write_data(&ftdic, &cmd, 1) < 0) { + msg_perr("Blaster write failed\n"); + ret = -1; + } + + if (!ret && writecnt) + ret = send_write(writecnt, writearr); + + if (!ret && readcnt) + ret = send_read(readcnt, readarr); + + cmd = BIT_CS; + if (ftdi_write_data(&ftdic, &cmd, 1) < 0) { + msg_perr("Blaster write failed\n"); + ret = -1; + } + + return ret; +} + + +static const struct spi_programmer spi_programmer_usbblaster = { + .type = SPI_CONTROLLER_USBBLASTER, + .max_data_read = 256, + .max_data_write = 256, + .command = usbblaster_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, +}; + +#endif

1 0

Supermicro X9QRi-F+
by Matthias Hähnel 11 Sep '12

11 Sep '12

Hi, here is the flashrom output of an SuperMicro X9QRI-F+ please let me know if i can help you with some additional information. regards matthias hähnel ######## root@grml ~ # flashrom --programmer internal -Vr backup.bin flashrom v0.9.6.1-r1564 on Linux 3.3.0-3-grml-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (4 args): flashrom --programmer internal -Vr backup.bin Calibrating delay loop... OS timer resolution is 1 usecs, 2399M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10010 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Supermicro" DMI string system-product-name: "X9QR7-TF+/X9QRi-F+" DMI string system-version: "123456789" DMI string baseboard-manufacturer: "Supermicro" DMI string baseboard-product-name: "X9QR7-TF+/X9QRi-F+" DMI string baseboard-version: "123456789" DMI string chassis-type: "Desktop" Found chipset "Intel X79" with PCI ID 8086:1d41. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x2a WARNING: BIOS region SMM protection is enabled! Root Complex Register Block address = 0xfed1c000 GCS = 0xc21: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x6008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0 Programming OPCODES... done 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x00001a1b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b 0x54: 0x000f0000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x0000ffff) is read-only. 0x58: 0x0fff0800 FREG1: BIOS region (0x00800000-0x00ffffff) is read-write. 0x5C: 0x07ff0010 FREG2: WARNING: Management Engine region (0x00010000-0x007fffff) is locked. Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled. You can enforce write support with the ich_spi_force programmer option, but it will most likely harm your hardware! If you force flashrom you will get no support if something breaks. 0x90: 0x84 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xf84140 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=1, SME=0, SCF=0 0x94: 0x5006 (PREOP) 0x96: 0x463b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0xc79f0190 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00002005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) SPI Read Configuration: prefetching enabled, caching enabled, OK. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L12805" (16384 kB, SPI) at physical address 0xff000000. Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x17, id2 0x17 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x17, id2 0x17 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x17 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x17 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x17 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Unknown SFDP-capable chip, 0 kB: Parsing JEDEC flash parameter table... done. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2018 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x17 Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xdb, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Found Macronix flash chip "MX25L12805" (16384 kB, SPI). === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading flash... Transaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 Running OPCODE 0x03 failed at address 0x010000 (payload length was 64). Read operation failed! FAILED. Restoring MMIO space at 0x7f8110edc8a0 Restoring MMIO space at 0x7f8110edc89c Restoring MMIO space at 0x7f8110edc898 Restoring MMIO space at 0x7f8110edc896 Restoring MMIO space at 0x7f8110edc894 Restoring PCI config space for 00:1f:0 reg 0xdc -- Hofmeir Media GmbH Kranzhornstr. 3 81825 München Tel direkt: 089/48002914 Tel: 089/48951048 Fax: 089/4487505 http://www.premium-datacenter.de Geschäftsführer: Dipl.-Ing. (Univ.) Stefan Hofmeir Handelsregister AG München: HRB 130092 http://www.ipv6actnow.org

2 1

Flashing M/B Bios (Asus P5LD2-VM) goes wrong
by Emil Sirbu 07 Sep '12

07 Sep '12

Hello, I have an ASUS P5LD2-VM, and I try to update bios, first with flashrom v0.9.2-r1028 ( http://paste.flashrom.org/view.php?id=489 ) then with 0.9.3 ( http://paste.flashrom.org/view.php?id=490 also, the ROM is at http://paste.flashrom.org/uploads/491.bin ) but: Writing flash chip... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, 0x001000-0x001fff, 0x002000-0x002fff, 0x003000-0xff, 0x004000-0x004fff, 0x005000-0x005fff, ERASE FAILED at 0x00005760! Expected=0xff, Read=0x50, failed byte count from 0x00005000-0x00005fff: 0x87a ERASE FAILED! Can you help whit this? I'm carco on freenode/#flashrom channel Thank you, Emil Sirbu

3 4

[commit] r1596 - trunk
by repository service 07 Sep '12

07 Sep '12

Author: stefanct Date: Fri Sep 7 10:27:46 2012 New Revision: 1596 URL: http://flashrom.org/trac/flashrom/changeset/1596 Log: Add untested board enable for ASUS P5LD2-VM. Based on http://patchwork.coreboot.org/patch/2881/ but with the right pin (i.e. 16) according to Joshua Roys. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Sep 7 09:07:07 2012 (r1595) +++ trunk/board_enable.c Fri Sep 7 10:27:46 2012 (r1596) @@ -1663,6 +1663,7 @@ * - abit IP35: Intel P35 + ICH9R * - abit IP35 Pro: Intel P35 + ICH9R * - ASUS P5LD2 + * - ASUS P5LD2-VM */ static int intel_ich_gpio16_raise(void) { @@ -2349,6 +2350,7 @@ {0x8086, 0x27b8, 0x103c, 0x2a22, 0x8086, 0x2770, 0x103c, 0x2a22, "^LITHIUM$", NULL, NULL, P3, "ASUS", "P5LP-LE (Lithium-UL8E)",0, OK, intel_ich_gpio34_raise}, {0x8086, 0x27b8, 0x1043, 0x2a22, 0x8086, 0x2770, 0x1043, 0x2a22, "^P5LP-LE$", NULL, NULL, P3, "ASUS", "P5LP-LE (Epson OEM)", 0, OK, intel_ich_gpio34_raise}, {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8, 0x1043, 0x8179, "^P5LD2$", NULL, NULL, P3, "ASUS", "P5LD2", 0, NT, intel_ich_gpio16_raise}, + {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8, 0x1043, 0x8179, "^P5LD2-VM$", NULL, NULL, P3, "ASUS", "P5LD2-VM", 0, NT, intel_ich_gpio16_raise}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, P3, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x829E, "^P5N-D$", NULL, NULL, P3, "ASUS", "P5N-D", 0, OK, it8718f_gpio63_raise}, {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x8249, "^P5N-E SLI$",NULL, NULL, P3, "ASUS", "P5N-E SLI", 0, NT, it8718f_gpio63_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Fri Sep 7 09:07:07 2012 (r1595) +++ trunk/print.c Fri Sep 7 10:27:46 2012 (r1596) @@ -710,6 +710,7 @@ B("ASUS", "P5L-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL), B("ASUS", "P5L-VM 1394", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), B("ASUS", "P5LD2", NT, NULL, "Untested board enable."), + B("ASUS", "P5LD2-VM", NT, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM/", "Untested board enable."), B("ASUS", "P5LP-LE (Lithium-UL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prod…", "This is an OEM board from HP."), B("ASUS", "P5LP-LE (Epson OEM)", OK, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."), B("ASUS", "P5LP-LE", NT, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),

1 0

Re: [flashrom] [PATCH] Remove exit calls from sp_sync_read_timeout and sp_synchronize.
by Stefan Tauner 07 Sep '12

07 Sep '12

On Thu, 6 Sep 2012 23:52:01 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Add return values to sp_synchronize so we can signal a failure to the > only upstream caller (serprog_init), which is prepared to propagate a failure. > > sp_sync_read_timeout was harder to fix because it already used a return > value, but we needed to distinguish two different failure modes. This > solution distinguishes them by the sign of the return values, which maintains > readability as much as possible. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > serial.c | 1 + > serprog.c | 76 ++++++++++++++++++++++++++++++++++++++----------------------- > 2 files changed, 49 insertions(+), 28 deletions(-) > > … > diff --git a/serprog.c b/serprog.c > index dd86fd3..957e38f 100644 > --- a/serprog.c > +++ b/serprog.c > @@ -184,36 +190,48 @@ static void sp_synchronize(void) > … > for (n = 0; n < 10; n++) { > - c = sp_sync_read_timeout(5); /* wait up to 50ms */ > - if (c != S_NAK) > + unsigned char ret = sp_sync_read_timeout(50, &c); > + if (ret < 0) ouch :) but apart from that it seemed ok and i also tested it on hardware. i self-acked and committed the refined version in r1595. thanks niklas! -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1595 - trunk
by repository service 07 Sep '12

07 Sep '12

Author: stefanct Date: Fri Sep 7 09:07:07 2012 New Revision: 1595 URL: http://flashrom.org/trac/flashrom/changeset/1595 Log: Remove exit calls from sp_sync_read_timeout and sp_synchronize. Add return values to sp_synchronize so we can signal a failure to the only upstream caller (serprog_init), which is prepared to propagate a failure. sp_sync_read_timeout was harder to fix because it already used a return value, but we needed to distinguish two different failure modes. This solution distinguishes them by the sign of the return values, which maintains readability as much as possible. Thanks to Niklas Söderlund for the original patch and idea. Signed-off-by: Niklas Söderlund <niso(a)kth.se> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/serial.c trunk/serprog.c Modified: trunk/serial.c ============================================================================== --- trunk/serial.c Thu Sep 6 19:37:16 2012 (r1594) +++ trunk/serial.c Fri Sep 7 09:07:07 2012 (r1595) @@ -239,6 +239,7 @@ #ifdef _WIN32 PurgeComm(sp_fd, PURGE_RXCLEAR); #else + /* FIXME: error handling */ tcflush(sp_fd, TCIFLUSH); #endif return; Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Thu Sep 6 19:37:16 2012 (r1594) +++ trunk/serprog.c Fri Sep 7 09:07:07 2012 (r1595) @@ -138,20 +138,24 @@ return sock; } -static int sp_sync_read_timeout(int loops) +/* Returns 0 on success and places the character read into the location pointed to by c. + * Returns positive values on temporary errors and negative ones on permanent errors. + * An iteration of one loop takes up to 1ms. */ +static int sp_sync_read_timeout(unsigned int loops, unsigned char *c) { int i; - unsigned char c; for (i = 0; i < loops; i++) { ssize_t rv; - rv = read(sp_fd, &c, 1); + rv = read(sp_fd, c, 1); if (rv == 1) - return c; - if ((rv == -1) && (errno != EAGAIN)) - sp_die("read"); - usleep(10 * 1000); /* 10ms units */ + return 0; + if ((rv == -1) && (errno != EAGAIN)) { + msg_perr("read: %s\n", strerror(errno)); + return -1; + } + usleep(1000); /* 1ms units */ } - return -1; + return 1; } /* Synchronize: a bit tricky algorithm that tries to (and in my tests has * @@ -160,7 +164,7 @@ * blocking read - TODO: add an alarm() timer for the rest of the app on * * serial operations, though not such a big issue as the first thing to * * do is synchronize (eg. check that device is alive). */ -static void sp_synchronize(void) +static int sp_synchronize(void) { int i; int flags = fcntl(sp_fd, F_GETFL); @@ -171,8 +175,10 @@ * the device serial parser to get to a sane state, unless if it * * is waiting for a real long write-n. */ memset(buf, S_CMD_NOP, 8); - if (write(sp_fd, buf, 8) != 8) - sp_die("flush write"); + if (write(sp_fd, buf, 8) != 8) { + msg_perr("flush write: %s\n", strerror(errno)); + goto err_out; + } /* A second should be enough to get all the answers to the buffer */ usleep(1000 * 1000); sp_flush_incoming(); @@ -184,36 +190,48 @@ for (i = 0; i < 8; i++) { int n; unsigned char c = S_CMD_SYNCNOP; - if (write(sp_fd, &c, 1) != 1) - sp_die("sync write"); + if (write(sp_fd, &c, 1) != 1) { + msg_perr("sync write: %s\n", strerror(errno)); + goto err_out; + } msg_pdbg("."); fflush(stdout); for (n = 0; n < 10; n++) { - c = sp_sync_read_timeout(5); /* wait up to 50ms */ - if (c != S_NAK) + int ret = sp_sync_read_timeout(50, &c); + if (ret < 0) + goto err_out; + if (ret > 0 || c != S_NAK) continue; - c = sp_sync_read_timeout(2); - if (c != S_ACK) + ret = sp_sync_read_timeout(20, &c); + if (ret < 0) + goto err_out; + if (ret > 0 || c != S_ACK) continue; c = S_CMD_SYNCNOP; - if (write(sp_fd, &c, 1) != 1) - sp_die("sync write"); - c = sp_sync_read_timeout(50); - if (c != S_NAK) + if (write(sp_fd, &c, 1) != 1) { + msg_perr("sync write: %s\n", strerror(errno)); + return 1; + } + ret = sp_sync_read_timeout(500, &c); + if (ret < 0) + goto err_out; + if (ret > 0 || c != S_NAK) break; /* fail */ - c = sp_sync_read_timeout(10); + ret = sp_sync_read_timeout(100, &c); + if (ret > 0 || ret < 0) + goto err_out; if (c != S_ACK) break; /* fail */ /* Ok, synchronized; back to blocking reads and return. */ flags &= ~O_NONBLOCK; fcntl(sp_fd, F_SETFL, flags); msg_pdbg("\n"); - return; + return 0; } } - msg_perr("Error: cannot synchronize protocol " - "- check communications and reset device?\n"); - exit(1); +err_out: + msg_perr("Error: cannot synchronize protocol - check communications and reset device?\n"); + return 1; } static int sp_check_commandavail(uint8_t command) @@ -443,7 +461,8 @@ sp_check_avail_automatic = 0; - sp_synchronize(); + if (sp_synchronize()) + return 1; msg_pdbg(MSGHEADER "Synchronized\n"); @@ -743,7 +762,8 @@ msg_pspew("%s\n", __func__); if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) sp_execute_opbuf(); - close(sp_fd); + /* FIXME: fix sockets on windows(?), especially closing */ + serialport_shutdown(&sp_fd); if (sp_max_write_n) free(sp_write_n_buf); return 0;

1 0

[PATCH] remove exit calls from sp_sync_read_timeout and sp_synchronize
by Niklas Söderlund 06 Sep '12

06 Sep '12

Add return values to sp_synchronize so we can signal a failure to the only upstream caller, which is prepared to propagate a failure. The addition of a return code to signal a failure from the read syscall in sp_sync_read_timeout is a bit of a stretch and might look strange. But the only caller is in the loop in sp_synchronize and any sequential call to read will result in the same error and end result. But please take a extra look on this to make sure we don't miss any corner case. The alternative would be to differentiate between a read failure over fast detection of a EAGAIN. The end result would in my opinion only make the code harder to read. The cost is that upon read failure the user might be spammed up to 10 times with the same error message before flashrom dies. Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- serprog.c | 35 ++++++++++++++++++++++------------- 1 file changed, 22 insertions(+), 13 deletions(-) diff --git a/serprog.c b/serprog.c index 02996ea..f03d332 100644 --- a/serprog.c +++ b/serprog.c @@ -145,8 +145,10 @@ static int sp_sync_read_timeout(int loops) rv = read(sp_fd, &c, 1); if (rv == 1) return c; - if ((rv == -1) && (errno != EAGAIN)) - sp_die("read"); + if ((rv == -1) && (errno != EAGAIN)) { + msg_perr("read: %s\n", strerror(errno)); + return -1; + } usleep(10 * 1000); /* 10ms units */ } return -1; @@ -158,7 +160,7 @@ static int sp_sync_read_timeout(int loops) * blocking read - TODO: add an alarm() timer for the rest of the app on * * serial operations, though not such a big issue as the first thing to * * do is synchronize (eg. check that device is alive). */ -static void sp_synchronize(void) +static int sp_synchronize(void) { int i; int flags = fcntl(sp_fd, F_GETFL); @@ -169,8 +171,10 @@ static void sp_synchronize(void) * the device serial parser to get to a sane state, unless if it * * is waiting for a real long write-n. */ memset(buf, S_CMD_NOP, 8); - if (write(sp_fd, buf, 8) != 8) - sp_die("flush write"); + if (write(sp_fd, buf, 8) != 8) { + msg_perr("flush write: %s\n", strerror(errno)); + return 1; + } /* A second should be enough to get all the answers to the buffer */ usleep(1000 * 1000); sp_flush_incoming(); @@ -181,9 +185,11 @@ static void sp_synchronize(void) * attempt, ~1s if immediate success. */ for (i = 0; i < 8; i++) { int n; - unsigned char c = S_CMD_SYNCNOP; - if (write(sp_fd, &c, 1) != 1) - sp_die("sync write"); + int c = S_CMD_SYNCNOP; + if (write(sp_fd, &c, 1) != 1) { + msg_perr("sync write: %s\n", strerror(errno)); + return 1; + } msg_pdbg("."); fflush(stdout); for (n = 0; n < 10; n++) { @@ -194,8 +200,10 @@ static void sp_synchronize(void) if (c != S_ACK) continue; c = S_CMD_SYNCNOP; - if (write(sp_fd, &c, 1) != 1) - sp_die("sync write"); + if (write(sp_fd, &c, 1) != 1) { + msg_perr("sync write: %s\n", strerror(errno)); + return 1; + } c = sp_sync_read_timeout(50); if (c != S_NAK) break; /* fail */ @@ -206,12 +214,12 @@ static void sp_synchronize(void) flags &= ~O_NONBLOCK; fcntl(sp_fd, F_SETFL, flags); msg_pdbg("\n"); - return; + return 0; } } msg_perr("Error: cannot synchronize protocol " "- check communications and reset device?\n"); - exit(1); + return 1; } static int sp_check_commandavail(uint8_t command) @@ -432,7 +440,8 @@ int serprog_init(void) sp_check_avail_automatic = 0; - sp_synchronize(); + if (sp_synchronize()) + return 1; msg_pdbg(MSGHEADER "Synchronized\n"); -- 1.7.10.3

2 2

Re: [flashrom] [PATCH] Add support for Eon EN25F64.
by Stefan Tauner 06 Sep '12

06 Sep '12

On Mon, 14 May 2012 04:08:07 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Its ID was spotted in an descriptor region update by Jetway: > http://paste.flashrom.org/view.php?id=1217 > > No datasheet was found, so most values are just guessed from the EN25F32. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > > --- > what's our policy for such cases? i would guess that it will most probably just > work... but i did not dare to just commit it (like my EN25QH32 patch a few mins ago). our policy is to commit it, if we spot an actual use of the chip in the real world (i just made that up). self-acked and commited in r1594. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1594 - trunk
by repository service 06 Sep '12

06 Sep '12

Author: stefanct Date: Thu Sep 6 19:37:16 2012 New Revision: 1594 URL: http://flashrom.org/trac/flashrom/changeset/1594 Log: Add support for Eon EN25F64. Its ID was spotted in an ICH descriptor region update by Jetway: http://paste.flashrom.org/view.php?id=1217 and is used on ASUS P8B75-V boards according to some forum posts (2 chips per board actually). No datasheet was found, so most values are just guessed from the EN25F32. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Sep 4 05:55:04 2012 (r1593) +++ trunk/flashchips.c Thu Sep 6 19:37:16 2012 (r1594) @@ -3407,6 +3407,40 @@ { .vendor = "Eon", + .name = "EN25F64", + .bustype = BUS_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EON_EN25F32, + .total_size = 8192, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Eon", .name = "EN25Q40", .bustype = BUS_SPI, .manufacture_id = EON_ID_NOPREFIX, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Tue Sep 4 05:55:04 2012 (r1593) +++ trunk/flashchips.h Thu Sep 6 19:37:16 2012 (r1594) @@ -248,6 +248,7 @@ #define EON_EN25F80 0x3114 #define EON_EN25F16 0x3115 #define EON_EN25F32 0x3116 +#define EON_EN25F64 0x3117 /* guessed */ #define EON_EN25Q40 0x3013 #define EON_EN25Q80 0x3014 #define EON_EN25Q16 0x3015 /* Same as EN25D16 */

1 0

Acer aspire 5315 probe test
by Olcay Korkmaz 06 Sep '12

06 Sep '12

Hello I have a acer aspire 5315 and here is verbose log and extra info Reagards. extra info from bios release notes : KBC ................ ENE926 Super I/O ................ NONE BIOS ROM Part ................ MX25LV008BB verbose log flashrom v0.9.6.1-runknown on Linux 3.4.6-pmagic (i686) flashrom was built with libpci 3.1.8, GCC 4.6.3, little endian Command line (5 args): flashrom -V -p internal:laptop=this_is_not_a_laptop -o acer.txt Calibrating delay loop... OS timer resolution is 2 usecs, 1710M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1001 us, 10000 myus = 10083 us, 8 myus = 10 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Acer " DMI string system-product-name: "Aspire 5315 " DMI string system-version: "V1.45" DMI string baseboard-manufacturer: "Acer " DMI string baseboard-product-name: "Acadia " DMI string baseboard-version: "V1.45" DMI string chassis-type: "Other" DMI chassis-type is not specific enough. ======================================================================== WARNING! You may be running flashrom on an unsupported laptop. We could not detect this for sure because your vendor has not setup the SMBIOS tables correctly. You can enforce execution by adding '-p internal:laptop=this_is_not_a_laptop' to the command line, but please read the following warning if you are not sure. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Proceeding anyway because user forced us to. Found chipset "Intel ICH8M" with PCI ID 8086:2815. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0x9a0c60: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (LPC) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x04: 0x2000 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=0, SCIP=0, FDOPSS=1, FDV=0, FLOCKDN=0 Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0xd8, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x90, read w/ addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x9f, read w/o addr, none op[7]: 0xc7, write w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x50 0x08: 0x00000000 (FADDR) 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) 0x90: 0x00 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0x000000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 0x94: 0x5006 (PREOP) 0x96: 0x463b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0xc79f0190 (OPMENU+4) 0xA0: 0x00000000 (BBAR) BBAR offset is unknown on ICH8! SPI Read Configuration: prefetching disabled, caching enabled, OK. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L05PU, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L10PT, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L10PU, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L20PT, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L20PU, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L40PT, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L40PU, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L80P, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L16PT, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L16PU, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L512, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L010, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L020, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L040, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L080, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L016, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25L032, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for AMIC A25LQ032, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF021, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF041A, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF081, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF081A, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF161, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF321, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF321A, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DF641(A), 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25DQ161, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25F512B, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25FS010, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT25FS040, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT26DF041, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT26DF081A, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT26DF161, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT26DF161A, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT26F004, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45CS1282, 16896 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB011D, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB021D, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB041D, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB081D, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB161D, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB321C, 4224 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB321D, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel AT45DB642D, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for EMST F25L008A, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B05, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B05T, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B10, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B10T, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B20, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B20T, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B40, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B40T, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B80, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B80T, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B16T, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B32T, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B64, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25B64T, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25F05, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25F10, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25F20, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25F40, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25F80, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25F16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25F32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25Q40, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25Q80(A), 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25Q16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25Q32(A/B), 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25Q64, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25Q128, 16384 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25QH16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon EN25QH32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for GigaDevice GD25Q20, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for GigaDevice GD25Q40, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for GigaDevice GD25Q80, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for GigaDevice GD25Q16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for GigaDevice GD25Q32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for GigaDevice GD25Q64, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for GigaDevice GD25Q128, 16384 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L512, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L1005, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L2005, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L4005, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L8005, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L1605, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L1635D, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L1635E, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L3205, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L3235D, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L6405, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix MX25L12805, 16384 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Numonyx M25PE10, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Numonyx M25PE20, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Numonyx M25PE40, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Numonyx M25PE80, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Numonyx M25PE16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Numonyx N25Q064, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for PMC Pm25LV010, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for PMC Pm25LV016B, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for PMC Pm25LV020, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for PMC Pm25LV040, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for PMC Pm25LV080B, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for PMC Pm25LV512, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Sanyo LF25FW203A, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Spansion S25FL004A, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Spansion S25FL008A, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Spansion S25FL016A, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Spansion S25FL032A, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Spansion S25FL064A, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for SST SST25LF040A, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0xff, id2 0xff Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0xff, id2 0xff Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF016B, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for SST SST25VF032B, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for SST SST25VF064C, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF040B, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF080B, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P05-A, 64 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P05, 64 kB: probe_spi_res1: id 0xff Probing for ST M25P10-A, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P10, 128 kB: probe_spi_res1: id 0xff Probing for ST M25P20, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P40, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P40-old, 512 kB: probe_spi_res1: id 0xff Probing for ST M25P80, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P64, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25P128, 16384 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25PX16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25PX32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST M25PX64, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25Q80, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25Q16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25Q32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25Q64, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25Q128, 16384 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25X10, 128 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25X20, 256 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25X40, 512 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25X80, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25X16, 2048 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25X32, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Winbond W25X64, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Unknown SFDP-capable chip, 0 kB: program_opcodes: preop=5006 optype=462b opmenu=055a0302c79f0190 on-the-fly OPCODE (0x5A) re-programmed, op-pos=2 Signature = 0xffffffff (should be 0x50444653) No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Atmel unknown Atmel SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Eon unknown Eon SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Macronix unknown Macronix SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for PMC unknown PMC SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for SST unknown SST SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ST unknown ST SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Sanyo unknown Sanyo SPI chip, 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Generic unknown SPI chip (RDID), 0 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x02, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xb7, id2 0x6f, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring MMIO space at 0xb77460bc Restoring MMIO space at 0xb77460b8 Restoring MMIO space at 0xb77460b6 Restoring MMIO space at 0xb77460b4 Restoring PCI config space for 00:1f:0 reg 0xdc -- |By Olcay Korkmaz|

2 3

[PATCH] Add VIA VT6421A LPC programmer driver.
by Stefan Tauner 06 Sep '12

06 Sep '12

Due to the mysterious address handling of this chip the user can specify a base address with the offset parameter, e.g.: flashrom -p atavia:offset=0xFFF00000 Thanks to Idwer Vollering for his iterative testing of this code. TODO: remove or document the offset parameter. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- The last iteration did not work because the offset set by the macro was in *addition* to the standard 0xfff80000 offset, but probably no one noticed that. Also, there was a small bug in the prettyprint func. By default this version will use the standard offset, but one can force another one. Please do so if the default does not work and report back with a -VVV log, thanks! As always this patch is based on the latest svn (r1593). Makefile | 9 +++ atavia.c | 206 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flash.h | 3 +- flashrom.c | 17 ++++- print.c | 5 ++ programmer.h | 14 +++- 6 files changed, 248 insertions(+), 6 deletions(-) create mode 100644 atavia.c diff --git a/Makefile b/Makefile index 9309ce5..e4b364d 100644 --- a/Makefile +++ b/Makefile @@ -334,6 +334,9 @@ CONFIG_SATASII ?= yes # IMPORTANT: This code is not yet working! CONFIG_ATAHPT ?= no +# VIA VT6421A LPC memory support +CONFIG_ATAVIA ?= yes + # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes @@ -459,6 +462,12 @@ PROGRAMMER_OBJS += atahpt.o NEED_PCI := yes endif +ifeq ($(CONFIG_ATAVIA), yes) +FEATURE_CFLAGS += -D'CONFIG_ATAVIA=1' +PROGRAMMER_OBJS += atavia.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_FT2232_SPI), yes) FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") # This is a totally ugly hack. diff --git a/atavia.c b/atavia.c new file mode 100644 index 0000000..e21fed3 --- /dev/null +++ b/atavia.c @@ -0,0 +1,206 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2011 Jonathan Kollasch <jakllsch(a)kollasch.net> + * Copyright (C) 2012 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_VIA 0x1106 + +#define VIA_MAX_RETRIES 300 + +#define BROM_ADDR 0x60 + +#define BROM_DATA 0x64 + +#define BROM_ACCESS 0x68 +#define BROM_TRIGGER 0x80 +#define BROM_WRITE 0x40 +#define BROM_SIZE_MASK 0x30 +#define BROM_SIZE_64K 0x00 +#define BROM_SIZE_32K 0x10 +#define BROM_SIZE_16K 0x20 +#define BROM_SIZE_0K 0x30 +#define BROM_BYTE_ENABLE_MASK 0x0f + +#define BROM_STATUS 0x69 +#define BROM_ERROR_STATUS 0x80 + +/* Select the byte we want to access. This is done by clearing the bit corresponding to the byte we want to + * access, leaving the others set (yes, really). */ +#define ENABLE_BYTE(address) ((~(1 << ((address) & 3))) & BROM_BYTE_ENABLE_MASK) +#define BYTE_OFFSET(address) (((addr) & 3) * 8) + +const struct pcidev_status ata_via[] = { + {PCI_VENDOR_ID_VIA, 0x3249, NT, "VIA", "VT6421A"}, + + {}, +}; + +static const struct par_programmer lpc_programmer_atavia = { + .chip_readb = atavia_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = atavia_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static void *atavia_offset = NULL; + +static void atavia_prettyprint_access(uint8_t access) +{ + uint8_t bmask = access & BROM_BYTE_ENABLE_MASK; + uint8_t size = access & BROM_SIZE_MASK; + + msg_pspew("Accessing byte(s):%s%s%s%s\n", + ((bmask & (1<<3)) == 0) ? " 3" : "", + ((bmask & (1<<2)) == 0) ? " 2" : "", + ((bmask & (1<<1)) == 0) ? " 1" : "", + ((bmask & (1<<0)) == 0) ? " 0" : ""); + if (size == BROM_SIZE_0K) { + msg_pspew("No ROM device found.\n"); + } else + msg_pspew("ROM device with %s kB attached.\n", + (size == BROM_SIZE_64K) ? ">=64" : + (size == BROM_SIZE_32K) ? "32" : "16"); + msg_pspew("Access is a %s.\n", (access & BROM_WRITE) ? "write" : "read"); + msg_pspew("Device is %s.\n", (access & BROM_TRIGGER) ? "busy" : "ready"); +} + +static bool atavia_ready(void) +{ + int try; + uint8_t access, status; + bool ready = false; + + for (try = 0; try < VIA_MAX_RETRIES; try++) { + access = pci_read_byte(pcidev_dev, BROM_ACCESS); + status = pci_read_byte(pcidev_dev, BROM_STATUS); + if (((access & BROM_TRIGGER) == 0) && (status & BROM_ERROR_STATUS) == 0) { + ready = true; + break; + } else { + programmer_delay(1); + continue; + } + } + + msg_pdbg2("\n%s: %s after %d tries (access=0x%02x, status=0x%02x)\n", + __func__, ready ? "suceeded" : "failed", try, access, status); + atavia_prettyprint_access(access); + return ready; +} + +static int atavia_shutdown(void *data) +{ + pci_cleanup(pacc); + return 0; +} + +void *atavia_map(const char *descr, unsigned long phys_addr, size_t len) +{ + return (atavia_offset != 0) ? atavia_offset : (void *)phys_addr; +} + +int atavia_init(void) +{ + uint32_t tmp; + char *arg; + + arg = extract_programmer_param("offset"); + if (arg) { + if (strlen(arg) == 0) { + msg_perr("Missing argument for offset.\n"); + free(arg); + return ERROR_FATAL; + } + char *endptr; + atavia_offset = (void *)strtoul(arg, &endptr, 0); + if (*endptr) { + msg_perr("Error: Invalid offset specified: \"%s\".\n", arg); + free(arg); + return ERROR_FATAL; + } + msg_pinfo("Mapping addresses to base %p.\n", atavia_offset); + } + free(arg); + + if (rget_io_perms()) + return 1; + + pcidev_init(PCI_ROM_ADDRESS, ata_via); /* Acutally no BAR setup needed at all. */ + + if (register_shutdown(atavia_shutdown, NULL)) + return 1; + + /* Test if a flash chip is attached. */ + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK); + programmer_delay(90); + tmp = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + msg_pdbg2("BROM base=0x%08x\n", tmp); + if ((tmp & PCI_ROM_ADDRESS_MASK) == 0) { + msg_perr("Controller thinks there is no ROM attached.\n"); + } + + if (!atavia_ready()) { + msg_perr("Controller not ready.\n"); + } + + register_par_programmer(&lpc_programmer_atavia, BUS_LPC); + + return 0; +} + +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, const chipaddr addr) +{ + msg_pspew("%s: 0x%02x to 0x%08lx.\n", __func__, val, addr); + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_long(pcidev_dev, BROM_DATA, val << BYTE_OFFSET(addr)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); + + if (!atavia_ready()) { + msg_perr("not ready after write\n"); + } +} + +uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr) +{ + uint8_t val; + + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr)); + + if (!atavia_ready()) { + msg_perr("not ready after read\n"); + } + + val = (pci_read_long(pcidev_dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; + + msg_pspew("%s: 0x%02x from 0x%08lx.\n", __func__, val, addr); + return val; +} diff --git a/flash.h b/flash.h index 2990202..da26344 100644 --- a/flash.h +++ b/flash.h @@ -41,8 +41,7 @@ typedef unsigned long chipaddr; int register_shutdown(int (*function) (void *data), void *data); -void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, - size_t len); +void *programmer_map_flash_region(const char *const descr, unsigned long phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); void programmer_delay(int usecs); diff --git a/flashrom.c b/flashrom.c index fdc5412..43daa17 100644 --- a/flashrom.c +++ b/flashrom.c @@ -152,6 +152,16 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_ATAVIA == 1 + { + .name = "atavia", + .init = atavia_init, + .map_flash_region = atavia_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_FT2232_SPI == 1 { .name = "ft2232_spi", @@ -354,11 +364,12 @@ int programmer_shutdown(void) return ret; } -void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, +void *programmer_map_flash_region(const char *const descr, unsigned long phys_addr, size_t len) { - return programmer_table[programmer].map_flash_region(descr, - phys_addr, len); + void *ret = programmer_table[programmer].map_flash_region(descr, phys_addr, len); + msg_gspew("%s: mapping %s from 0x%08lx to %p\n", __func__, descr, phys_addr, ret); + return ret; } void programmer_unmap_flash_region(void *virt_addr, size_t len) diff --git a/print.c b/print.c index 582a49e..724f91c 100644 --- a/print.c +++ b/print.c @@ -487,6 +487,11 @@ void print_supported(void) programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif +#if CONFIG_ATAVIA == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_ATAVIA].name); + print_supported_pcidevs(ata_via); +#endif #if CONFIG_FT2232_SPI == 1 msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); diff --git a/programmer.h b/programmer.h index 51b9c40..1bbec51 100644 --- a/programmer.h +++ b/programmer.h @@ -54,6 +54,9 @@ enum programmer { #if CONFIG_ATAHPT == 1 PROGRAMMER_ATAHPT, #endif +#if CONFIG_ATAVIA == 1 + PROGRAMMER_ATAVIA, +#endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif @@ -239,7 +242,7 @@ int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_ATAVIA+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -420,6 +423,15 @@ int atahpt_init(void); extern const struct pcidev_status ata_hpt[]; #endif +/* atavia.c */ +#if CONFIG_ATAVIA == 1 +int atavia_init(void); +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr); +void *atavia_map(const char *descr, unsigned long phys_addr, size_t len); +extern const struct pcidev_status ata_via[]; +#endif + /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 struct usbdev_status { -- Kind regards, Stefan Tauner

1 0

[PATCH] Add VIA VT6421A LPC programmer driver.
by Stefan Tauner 05 Sep '12

05 Sep '12

Thanks to Idwer Vollering for his iterative testing of this code. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Now with less WTF... :) Makefile | 9 +++ atavia.c | 181 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashrom.c | 10 ++++ print.c | 5 ++ programmer.h | 13 ++++- 5 files changed, 217 insertions(+), 1 deletion(-) create mode 100644 atavia.c diff --git a/Makefile b/Makefile index 9309ce5..e4b364d 100644 --- a/Makefile +++ b/Makefile @@ -334,6 +334,9 @@ CONFIG_SATASII ?= yes # IMPORTANT: This code is not yet working! CONFIG_ATAHPT ?= no +# VIA VT6421A LPC memory support +CONFIG_ATAVIA ?= yes + # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes @@ -459,6 +462,12 @@ PROGRAMMER_OBJS += atahpt.o NEED_PCI := yes endif +ifeq ($(CONFIG_ATAVIA), yes) +FEATURE_CFLAGS += -D'CONFIG_ATAVIA=1' +PROGRAMMER_OBJS += atavia.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_FT2232_SPI), yes) FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") # This is a totally ugly hack. diff --git a/atavia.c b/atavia.c new file mode 100644 index 0000000..6045e2d --- /dev/null +++ b/atavia.c @@ -0,0 +1,181 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2011 Jonathan Kollasch <jakllsch(a)kollasch.net> + * Copyright (C) 2012 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdbool.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_VIA 0x1106 + +#define VIA_MAX_RETRIES 300 +#define VT6421A_OFF 0 + +#define BROM_ADDR 0x60 + +#define BROM_DATA 0x64 + +#define BROM_ACCESS 0x68 +#define BROM_TRIGGER 0x80 +#define BROM_WRITE 0x40 +#define BROM_SIZE_MASK 0x30 +#define BROM_SIZE_64K 0x00 +#define BROM_SIZE_32K 0x10 +#define BROM_SIZE_16K 0x20 +#define BROM_SIZE_0K 0x30 +#define BROM_BYTE_ENABLE_MASK 0x0f + +#define BROM_STATUS 0x69 +#define BROM_ERROR_STATUS 0x80 + +/* Select the byte we want to access. This is done by clearing the bit corresponding to the byte we want to + * access, leaving the others set (yes, really). */ +#define ENABLE_BYTE(address) ((~(1 << ((address) & 3))) & BROM_BYTE_ENABLE_MASK) +#define BYTE_OFFSET(address) (((addr) & 3) * 8) + +const struct pcidev_status ata_via[] = { + {PCI_VENDOR_ID_VIA, 0x3249, NT, "VIA", "VT6421A"}, + + {}, +}; + +static const struct par_programmer lpc_programmer_atavia = { + .chip_readb = atavia_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = atavia_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static void atavia_prettyprint_access(uint8_t access) +{ + uint8_t bmask = access & BROM_BYTE_ENABLE_MASK; + uint8_t size = access & BROM_SIZE_MASK; + + msg_pspew("Accessing byte(s):%s%s%s%s\n", + (bmask & (1<<3)) ? " 3" : "", + (bmask & (1<<2)) ? " 2" : "", + (bmask & (1<<1)) ? " 1" : "", + (bmask & (1<<0)) ? " 0" : ""); + if (size == BROM_SIZE_0K) { + msg_pspew("No ROM device found.\n"); + } else + msg_pspew("ROM device with %s kB attached.\n", + (size == BROM_SIZE_64K) ? "64" : + (size == BROM_SIZE_32K) ? "32" : "16"); + msg_pspew("Access is a %s.\n", (access & BROM_WRITE) ? "write" : "read"); + msg_pspew("Device is %s.\n", (access & BROM_TRIGGER) ? "busy" : "ready"); +} + +static bool atavia_ready(void) +{ + int try; + uint8_t access, status; + bool ready = false; + + for (try = 0; try < VIA_MAX_RETRIES; try++) { + access = pci_read_byte(pcidev_dev, BROM_ACCESS); + status = pci_read_byte(pcidev_dev, BROM_STATUS); + if (((access & BROM_TRIGGER) == 0) && (status & BROM_ERROR_STATUS) == 0) { + ready = true; + break; + } else { + programmer_delay(1); + continue; + } + } + + msg_pdbg2("%s: %s after %d tries (access=0x%02x, status=0x%02x)\n", + __func__, ready ? "suceeded" : "failed", try, access, status); + atavia_prettyprint_access(access); + return ready; +} + +static int atavia_shutdown(void *data) +{ + pci_cleanup(pacc); + return 0; +} + +int atavia_init(void) +{ + uint32_t tmp; + if (rget_io_perms()) + return 1; + + pcidev_init(PCI_ROM_ADDRESS, ata_via); /* Acutally no BAR setup needed at all. */ + + if (register_shutdown(atavia_shutdown, NULL)) + return 1; + + /* Test if a flash chip is attached. */ + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK); + programmer_delay(90); + tmp = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + msg_pdbg2("BROM base=0x%08x\n", tmp); + if ((tmp & PCI_ROM_ADDRESS_MASK) == 0) { + msg_perr("Controller thinks there is no ROM attached.\n"); + //return 1; + } + + if (!atavia_ready()) { + msg_perr("Controller not ready.\n"); + //return 1; + } + + atavia_prettyprint_access(pci_read_byte(pcidev_dev, BROM_ACCESS)); + register_par_programmer(&lpc_programmer_atavia, BUS_LPC); + + return 0; +} + +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) +{ + addr += VT6421A_OFF; + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_long(pcidev_dev, BROM_DATA, val << BYTE_OFFSET(addr)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); + + if (!atavia_ready()) { + msg_perr("not ready after write\n"); + } +} + +uint8_t atavia_chip_readb(const struct flashctx *flash, chipaddr addr) +{ + uint8_t val; + + addr += VT6421A_OFF; + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr)); + + if (!atavia_ready()) { + msg_perr("not ready after read\n"); + } + + val = (pci_read_long(pcidev_dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; + + return val; +} diff --git a/flashrom.c b/flashrom.c index fdc5412..f5bf45f 100644 --- a/flashrom.c +++ b/flashrom.c @@ -152,6 +152,16 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_ATAVIA == 1 + { + .name = "atavia", + .init = atavia_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_FT2232_SPI == 1 { .name = "ft2232_spi", diff --git a/print.c b/print.c index 582a49e..724f91c 100644 --- a/print.c +++ b/print.c @@ -487,6 +487,11 @@ void print_supported(void) programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif +#if CONFIG_ATAVIA == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_ATAVIA].name); + print_supported_pcidevs(ata_via); +#endif #if CONFIG_FT2232_SPI == 1 msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); diff --git a/programmer.h b/programmer.h index 51b9c40..105613c 100644 --- a/programmer.h +++ b/programmer.h @@ -54,6 +54,9 @@ enum programmer { #if CONFIG_ATAHPT == 1 PROGRAMMER_ATAHPT, #endif +#if CONFIG_ATAVIA == 1 + PROGRAMMER_ATAVIA, +#endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif @@ -239,7 +242,7 @@ int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_ATAVIA+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -420,6 +423,14 @@ int atahpt_init(void); extern const struct pcidev_status ata_hpt[]; #endif +/* atavia.c */ +#if CONFIG_ATAVIA == 1 +int atavia_init(void); +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr); +extern const struct pcidev_status ata_via[]; +#endif + /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 struct usbdev_status { -- Kind regards, Stefan Tauner

1 0

Gembird-PCI-VIA VT6421A-W39V040C
by Alexey 05 Sep '12

05 Sep '12

Hi! I'm going to flash Gembird PCI 3SATA+1IDE controller's BIOS, there is W39V040C. I found an excellent professionaly modified ROM for this device. I will try to do it on board of ASUS P4P800E-DELUX. Just let me know, is it possible in the moment or I have to wait for a new version of flashrom.exe? This device have unfriendly relations to Radeon X1600 AGP, on board of ASRock P4i45E MB, so I found only new modified ROM of PCI controller can help. Waiting for Your answer, Alexey.

2 4

[PATCH] Hack libpci not to exit(1) during init if PCI does not work
by Carl-Daniel Hailfinger 05 Sep '12

05 Sep '12

This patch is for testing only, and not for immediate merge. libpci unhelpfully calls exit(1) instead of reporting an error if init fails. Fortunately, that part of libpci has not changed since the year 2000, so we can use a really evil hack to avoid that. We supply an alternative error printing function (which does not exit(1)) and this function detects which error is happening and hacks internal libpci structures in a way that avoids a later segfault due to NULL pointer dereference. We MUST absolutely make sure that pci_init() in libpci will not change or this hack will explode spectacularly. Once we decide that this hack is the way to go, notifying the libpci maintainer is essential. Apply this patch, then compile flashrom with make CONFIG_DUMMY=no CONFIG_INTERNAL=o CONFIG_SERPROG=no CONFIG_RAYER_SPI=no CONFIG_NIC3COM=no CONFIG_GFXNVIDIA=no CONFIG_SATASII=no CONFIG_FT2232_SPI=no CONFIG_DRKAISER=no CONFIG_NICREALTEK=no CONFIG_NICINTEL_SPI=no CONFIG_BUSPIRATE_SPI=no CONFIG_OGP_SPI=no CONFIG_SATAMV=no CONFIG_NICINTEL=yes To check if the hack works, run "flashrom -V" and respond to this mail with the output. You should get a message near the end which says that programmer initialization failed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-libpci_hack_avoid_exit1_during_init/pcidev.c =================================================================== --- flashrom-libpci_hack_avoid_exit1_during_init/pcidev.c (Revision 1362) +++ flashrom-libpci_hack_avoid_exit1_during_init/pcidev.c (Arbeitskopie) @@ -21,6 +21,8 @@ #include <stdlib.h> #include <string.h> +#include <stdio.h> +#include <stdarg.h> #include "flash.h" #include "programmer.h" @@ -188,6 +190,58 @@ return 0; } +/* Ugliest hack ever in flashrom! Should work for all libpci versions released + * in the year 2000 or later. Checked to make sense until at least version + * 3.1.8-test1. + */ +static void fake_libpci_method_init(struct pci_access *foo) +{ + msg_pinfo("Working around another pcilib crash\n"); + return; +} + +static struct { + char *name; /* name in all libpci versions */ + char *dummy1; /* Only present in some libpci versions */ + void *dummy2; + void (*init1)(struct pci_access *); /* init in older versions */ + void (*init2)(struct pci_access *); /* init in newer versions */ + void *dummy3; + void *dummy4; + void *dummy5; + void *dummy6; + void *dummy7; + void *dummy8; + void *dummy9; + void *dummy10; +} fake_libpci_methods = { + .name = "None", + .init1 = &fake_libpci_method_init, + .init2 = &fake_libpci_method_init, +}; + +static int pci_init_failed = 0; + +static void my_libpci_generic_error(char *msg, ...) +{ + va_list ap; + + msg_pinfo("pcilib: "); + va_start(ap, msg); + vprintf(msg, ap); + va_end(ap); + msg_pinfo("\n"); + if (!strcmp(msg, "Cannot find any working access method.")) { + /* Workaround for crash, very ugly. */ + msg_pinfo("Working around pcilib crash\n"); + pacc->methods = (void *)&fake_libpci_methods; + pci_init_failed = 1; + } else { + /* Any error in libpci would result in exit(1) by default. */ + exit(1); + } +} + uintptr_t pcidev_init(int bar, const struct pcidev_status *devs) { struct pci_dev *dev; @@ -198,7 +252,14 @@ uintptr_t addr = 0, curaddr = 0; pacc = pci_alloc(); /* Get the pci_access structure */ + pacc->error = &my_libpci_generic_error; pci_init(pacc); /* Initialize the PCI library */ + /* pci_init returns void, so we have to hack it. */ + if (pci_init_failed) { + /* Yes, technically we would have to free stuff... */ + return 1; + } + pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); -- http://www.hailfinger.org/

4 7

Fw: flashing 0806 bios for P5WD2 PREMIUM
by Stefan Tauner 05 Sep '12

05 Sep '12

please always use the equivalent to a "reply all" button so that the mail ends up in the mailing list in the future. thanks for the logs. Begin forwarded message: Date: Wed, 5 Sep 2012 15:30:28 +1000 From: Mark Starikov <mr.mark.starikov(a)gmail.com> To: stefan.tauner(a)student.tuwien.ac.at Subject: Re: [flashrom] flashing 0806 bios for P5WD2 PREMIUM Thank you for the prompt reply Stefan, please find output of lspci and superiotool attached. I recon I'll give the "board-enable" from the wiki a go - never had a chance to descend into the DRAM land, this might be it. Besides it might help me with my VT-d experiments too :). If you find anything in the files provided - that'd be great, but thanks for your help anyway! Cheers, Mark. On Wed, Sep 5, 2012 at 2:31 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > On Wed, 5 Sep 2012 13:44:53 +1000 > Mark Starikov <mr.mark.starikov(a)gmail.com> wrote: > > > Please let me know if there is a quick fix that can get this board > flashed > > or(as this is very old hardware now) i would understand that support for > > such would be limited. > > Hello Mark, > > your board needs a board enable: http://flashrom.org/Board_Enable > Usually someone disassembles the BIOS to find the necessary procedure, > you can also try what is mentioned in the wiki. Since reverse > engineering this stuff has become boring for those that are able to do > it, dont expect it to be done by someone else soon-ish (sometimes > wonders happen though, the mighty assembler gods are unfathomable :) > > In any case please provide the output of lspci -nnvvvxxx run as root > and if possible also superiotool -deV, thanks. > -- > Kind regards/Mit freundlichen Grüßen, Stefan Tauner > -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] flashing 0806 bios for P5WD2 PREMIUM
by Stefan Tauner 05 Sep '12

05 Sep '12

On Wed, 5 Sep 2012 13:44:53 +1000 Mark Starikov <mr.mark.starikov(a)gmail.com> wrote: > Please let me know if there is a quick fix that can get this board flashed > or(as this is very old hardware now) i would understand that support for > such would be limited. Hello Mark, your board needs a board enable: http://flashrom.org/Board_Enable Usually someone disassembles the BIOS to find the necessary procedure, you can also try what is mentioned in the wiki. Since reverse engineering this stuff has become boring for those that are able to do it, dont expect it to be done by someone else soon-ish (sometimes wonders happen though, the mighty assembler gods are unfathomable :) In any case please provide the output of lspci -nnvvvxxx run as root and if possible also superiotool -deV, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

flashing 0806 bios for P5WD2 PREMIUM
by Mark Starikov 05 Sep '12

05 Sep '12

Dear Flashrom team, I was wondering if you could point me to the right direction: I'm trying to update BIOS on ASUS P5WD2 PREMIUM board(2 NICs). As usual, floppy is not available and your program always did wonders for me so I though I'll send you a quick note before resorting to other measures. the current ROM on the board is Version: 0601 and i'm trying to flash 0806 This fails with output from the attempt, flashrom -V and dmidecode attached as txt files. BIOS download location: http://www.asus.com/Motherboards/Intel_Socket_775/P5WD2_Premium/#download Please let me know if there is a quick fix that can get this board flashed or(as this is very old hardware now) i would understand that support for such would be limited. Thanks in advance. *Big fan of flashrom BTW. Mark.

1 0

asus p5n-mx: flashrom -V
by widhaya trisarnwadhana 05 Sep '12

05 Sep '12

ASUS P5N-MX Motherboard

1 0

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom