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flashrom dev meeting notes 30.06.22
by Anastasia Klimchuk 01 Jul '22

01 Jul '22

# 30th June 2022, 6:00 - 7:00 UTC+0 Attendees: Edward, Thomas, Stefan, Nikolai, Anastasia, Felix ## Decisions Summary * Raiden_debug_spi: Thomas will do a review of this programmer and add comments to the bug [https://ticket.coreboot.org/issues/358](https://ticket.coreboot.org/issues/… * As a result of in-depth discussion of lspcon_i2c_spi and realtek_mst_i2c_spi a bunch of bugs will be created (TODO for aklm). Some of them have wider scope like infra improvements. * Sb600spi work has started and needs reviewers attention * [https://review.coreboot.org/c/flashrom/+/65237](https://review.coreboot.org… * [https://review.coreboot.org/c/flashrom/+/65238](https://review.coreboot.org… * [https://review.coreboot.org/c/flashrom/+/65239](https://review.coreboot.org… ## Agenda * [aklm] Bugs for release “document this programmer”. Is there anything left to do, if yes then what is left? * [raiden_debug_spi](https://github.com/flashrom/flashrom/blob/master/raiden_d… [https://ticket.coreboot.org/issues/358](https://ticket.coreboot.org/issues/… (man page and code comments added - [https://review.coreboot.org/c/flashrom/+/62768](https://review.coreboot.org…) * Docs [https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/master/… * Thomas will review raiden_debug and add all comments to the bug * AI(quasisec) work with Tools team to document the hardware schematics to make it easier to find and nativage by putting all the docs in one place. * AI(quasisec) file bug to convert init code so that usb vid:pid pair are in the deventry. Basically FIX the FIXME in [https://github.com/flashrom/flashrom/blob/master/raiden_debug_spi.c#L352](h… and remove lines [https://github.com/flashrom/flashrom/blob/master/raiden_debug_spi.c#L1501](… * Would be nice to consider moving from using packed structs to serialisation functions. * * lspcon_i2c_spi [https://ticket.coreboot.org/issues/360](https://ticket.coreboot.org/issues/… (man page added) * There is nothing to add to the name it seems: no model * Is there a way to know which chip you are talking? * We can try to improve board_enable infra for i2c, and then we can hook i2c programmer. * Board enable is specific to internal programmer. We could make it more generic to support more than internal. So that it can say “this board supports this chip”, or “no lspcon detected”. * Lspcon should query some kind of board enable (not the current one), and then board enable can come back and say “you are safe to run / or not”. * For the release we need to make sure people can’t break their devices easily. * TODO needs a bug1 (upgrade board enable infra), not release blocking * Nik good suggest to have a programmer param of “I_want_a_brick=true” to avoid accidentally picking the wrong programmer. * Until we have the infrastructure for i2c drivers to allow listing drivers. * TODO needs a bug2 for I_want_brick=true, release blocking. Temp solution until bug1 fixed. * Lspcon_i2c_spi_set_mpu_active in init function, is it board specific? If I have another board, can I run the programmer, or does it leave some gpio open? * TODO update lspcon_i2c_spi_write_aai documentation, why it throws an error straight away, why it is not using default aai function. Release blocking. * Can we find out which specific chips lspcon supports? * TODO to add documentation at the top of the file that only very specific chips supported. Document as much as you can on the top. When it is working and when it is not working. Release blocking * [https://github.com/Pulse-Eight/libcec/issues/280](https://github.com/Pulse-… * Where are hardcoded SPI opcodes? * This is a good argument for converting to opaque. * `SWSPI_WDATA_*` defines appear to be JEDEC commands, at least numerically. So a code comment for now until we know more. * TODO needs a bug (converting to opaque), soft blocking release * realtek_mst_i2c_spi [https://ticket.coreboot.org/issues/361](https://ticket.coreboot.org/issues/… (man page added) * ditto I_wanna_brick. * https://review.coreboot.org/c/flashrom/+/65545 * TODO update the comment on `realtek_mst_i2c_spi_toggle_gpio_88_strap` * https://review.coreboot.org/c/flashrom/+/65546 * [https://ticket.coreboot.org/issues/376](https://ticket.coreboot.org/issues/… (it says review mediatek_i2c_spi) * ditto I_wanna_brick. * **_TL;DR All i2c drivers make the assumption that the user knows what they are doing. However this could be a dangerous assumption._** * Immediate fix to have get_param() “I_want_a_brick=true” || bail. * Long term fix, extend board_enable to be more generic. * AI(quasisec): Consolidate usb_device.c / usbdev.c into something more unified. * usb_device is only used by raiden debug * usbdev is only used by [developer_box](https://github.com/flashrom/flashrom/blob/master/developerbo… * TODO needs a bug, not release blocking * [quasisec]: Uploaded some patches to clean up sb600spi. Hard to get support directly from AMD however would like to get a heart beat going reviewing the patches. * [https://review.coreboot.org/c/flashrom/+/65237](https://review.coreboot.org… * [https://review.coreboot.org/c/flashrom/+/65238](https://review.coreboot.org… * [https://review.coreboot.org/c/flashrom/+/65239](https://review.coreboot.org… -- Anastasia.

1 0

What todo with the "document ... programmer" tickets
by Nico Huber 29 Jun '22

29 Jun '22

Hi Anastasia, I've seen you put some questions about the programmer tickets[1-4] on the meeting agenda. I hope I can provide some answers already. Looking at the tickets, I see there are already lists of things to do. But you ask what is left to do. So somewhere seems to be a misunderstanding. * raiden_debug_spi: Seems ok. I think this one was really only missing a manpage entry. Now that it has some context, I guess an independent developer could actually review it now. ^^ * lspcon_i2c_spi & realtek_mst_i2c_spi: There's a misunderstanding I guess. The tickets say "Document ... programmer". But they list actual problems. My idea when I wrote the long lists of issues was not to document issues. But, hopefully, to get them addressed, in code. We could also document the issues, e.g. by cluttering the code with FIXME comments. This might at least slow the spreading of such code down. But I would have to ask, why have these drivers on the master branch? In one of the tickets it even says the driver is not used in production. Does that mean it's abandoned? Like I mentioned elsewhere, many of the issues could be mitigated by going through the board_enabled infrastructure. This was also men- tioned in the review of the mediatek_i2c_spi driver. All these I2C drivers could share a similar design, AFAICT. One of the manpage entries also revealed a new problem: I think it implies that after running `flashrom -p realtek_mst_i2c_spi:bus=0 -E` the device would be broken after a reset. That's unacceptable for flashrom. Another sign that it should go through the infrastructure of the internal programmer. Documentation for the hardware interface would also be very welcome. Basically, everything that one needs to understand the code (and can't be derived from flashrom sources) should be publicly documented. I think we should make this a rule for vendor additions. * mediatek_i2c_spi: What I have to say about this, I did on Gerrit. What happened is clearly against our development guidelines. It's a copy of another driver, but we don't have the time to look into it so let the community take care of it? WTF? Nico [1] https://ticket.coreboot.org/issues/358 [2] https://ticket.coreboot.org/issues/360 [3] https://ticket.coreboot.org/issues/361 [4] https://ticket.coreboot.org/issues/376

3 5

Two-branch development
by Nico Huber 28 Jun '22

28 Jun '22

Hi flashrom fellows, something that's on the agenda for the next dev meeting (30th June)[1]: Should we look at forking flashrom between version 2 (Classic, Legacy, or “Stable” flashrom) and version3 of flashrom (Modern, Tested or Contemporary), where new features are added? I think such a question deserves more attention, hence this email. My own thoughts about the topic are quite mixed. First of all, it's not the first time the idea to work on two branches comes up. When we switched to Git and Gerrit in 2017, we started with a `stable` and a `staging` branch[2]. There were reservations, of course. Most of all that the `staging` branch could fall out-of-sync quickly, so it would be too hard to port anything from there to `stable`. Maybe such problems could be be avoided by allowing merges from `stable` to `staging`. Eventually, we had a lot of new patches on the `staging` branch, including many fixups, so the features could have been ported to `stable`. But they were not, and we renamed `staging` to `master` instead. This was due to personal issues and not technical ones, though. I guess we can't really say if the branch model failed. Now to the current proposition. Again, we have the idea to have one more and one less stable branch. But this time they would drift apart on purpose, focusing on different subsets of program- mers and chips, AIUI. I would not object to continue development on two branches. Personally, I would most likely work on the stable "version 2" only. However, the naming would really be a tough nut to crack. Given my experience with this project, I would expect a branch that focuses on stability to be the more "modern" one very soon. Simply because it's much easier to add new features to something stable. I wouldn't mind if people try such a "version 3". But it seems risky. I fear it might lose focus quickly and be abandoned again. Cheers, Nico [1] https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZkADzQSH6WF… [2] https://www.flashrom.org/index.php?title=Development_Guidelines&oldid=2252#…

6 10

New chip: GD25Q64C
by janemba 25 Jun '22

25 Jun '22

Hello, flashrom can extract the eeprom from a GD25Q64C chip in a generic way. I did it and all worked fine. Also, I check the eeprom and its valid. However, flashrom told me to send you an email with some information which you can find attached. However, this is the output while using "-r" switch along with the verbose mode. I hope it will be fine. Cheers,

1 1

Unsupported EEPROM/flash device report
by Armin 24 Jun '22

24 Jun '22

Hi, here is a report of an unsupported EEPROM/flash device: _flashrom output:_ flashrom v1.2 on Linux 5.15.0-40-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "AMD FP4". Enabling flash write... FCH device found but SMBus revision 0x59 does not match known values. Please report this to flashrom(a)flashrom.org and include this log and the output of lspci -nnvx, thanks!. Could not determine chipset generation.PROBLEMS, continuing anyway No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. _lspci -nnvx output:_ 00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Root Complex [1022:1450] Subsystem: ASRock Incorporation Family 17h (Models 00h-0fh) Root Complex [1849:1450] Flags: fast devsel, NUMA node 0 00: 22 10 50 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 50 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 0 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe GPP Bridge [1022:1453] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 26, NUMA node 0 Bus: primary=00, secondary=01, subordinate=07, sec-latency=0 I/O behind bridge: 00001000-00002fff [size=8K] Memory behind bridge: ba000000-ba9fffff [size=10M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 53 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 07 00 11 21 00 20 20: 00 ba 90 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 00:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 0 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 0 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 0 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 0 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Internal PCIe GPP Bridge 0 to Bus B [1022:1454] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 27, NUMA node 0 Bus: primary=00, secondary=08, subordinate=08, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: bab00000-badfffff [size=3M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 54 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 08 08 00 f1 01 00 00 20: b0 ba d0 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 0 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Internal PCIe GPP Bridge 0 to Bus B [1022:1454] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 29, NUMA node 0 Bus: primary=00, secondary=09, subordinate=09, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: bae00000-baefffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 54 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 09 09 00 f1 01 00 00 20: e0 ba e0 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 59) Subsystem: ASRock Incorporation FCH SMBus Controller [1849:ffff] Flags: 66MHz, medium devsel, NUMA node 0 Kernel driver in use: piix4_smbus Kernel modules: i2c_piix4, sp5100_tco 00: 22 10 0b 79 03 04 20 02 59 00 05 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 ff ff 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51) Subsystem: ASRock Incorporation FCH LPC Bridge [1849:ffff] Flags: bus master, 66MHz, medium devsel, latency 0, NUMA node 0 00: 22 10 0e 79 0f 00 20 02 51 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 ff ff 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 0 [1022:1460] Flags: fast devsel, NUMA node 0 00: 22 10 60 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 1 [1022:1461] Flags: fast devsel, NUMA node 0 00: 22 10 61 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 2 [1022:1462] Flags: fast devsel, NUMA node 0 00: 22 10 62 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 3 [1022:1463] Flags: fast devsel, NUMA node 0 Kernel driver in use: k10temp Kernel modules: k10temp 00: 22 10 63 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 4 [1022:1464] Flags: fast devsel, NUMA node 0 00: 22 10 64 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 5 [1022:1465] Flags: fast devsel, NUMA node 0 00: 22 10 65 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 6 [1022:1466] Flags: fast devsel, NUMA node 0 00: 22 10 66 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 7 [1022:1467] Flags: fast devsel, NUMA node 0 00: 22 10 67 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 0 [1022:1460] Flags: fast devsel, NUMA node 0 00: 22 10 60 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 1 [1022:1461] Flags: fast devsel, NUMA node 0 00: 22 10 61 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 2 [1022:1462] Flags: fast devsel, NUMA node 0 00: 22 10 62 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 3 [1022:1463] Flags: fast devsel, NUMA node 0 Kernel driver in use: k10temp Kernel modules: k10temp 00: 22 10 63 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 4 [1022:1464] Flags: fast devsel, NUMA node 0 00: 22 10 64 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 5 [1022:1465] Flags: fast devsel, NUMA node 0 00: 22 10 65 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 6 [1022:1466] Flags: fast devsel, NUMA node 0 00: 22 10 66 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:19.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Data Fabric: Device 18h; Function 7 [1022:1467] Flags: fast devsel, NUMA node 0 00: 22 10 67 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] X399 Series Chipset USB 3.1 xHCI Controller [1022:43ba] (rev 02) (prog-if 30 [XHCI]) Subsystem: ASMedia Technology Inc. X399 Series Chipset USB 3.1 xHCI Controller [1b21:1142] Flags: bus master, fast devsel, latency 0, IRQ 32, NUMA node 0 Memory at ba9a0000 (64-bit, non-prefetchable) [size=32K] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 ba 43 06 04 10 00 02 30 03 0c 10 00 80 00 10: 04 00 9a ba 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 21 1b 42 11 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 01:00.1 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] X399 Series Chipset SATA Controller [1022:43b6] (rev 02) (prog-if 01 [AHCI 1.0]) Subsystem: ASMedia Technology Inc. X399 Series Chipset SATA Controller [1b21:1062] Flags: bus master, fast devsel, latency 0, IRQ 87, NUMA node 0 Memory at ba980000 (32-bit, non-prefetchable) [size=128K] Expansion ROM at ba900000 [disabled] [size=512K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 22 10 b6 43 06 04 10 00 02 01 06 01 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 98 ba 00 00 00 00 21 1b 62 10 30: 00 00 90 ba 50 00 00 00 00 00 00 00 0a 02 00 00 01:00.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] X399 Series Chipset PCIe Bridge [1022:43b1] (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 31, NUMA node 0 Bus: primary=01, secondary=02, subordinate=07, sec-latency=0 I/O behind bridge: 00001000-00002fff [size=8K] Memory behind bridge: ba000000-ba8fffff [size=9M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 b1 43 07 04 10 00 02 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 01 02 07 00 11 21 00 00 20: 00 ba 80 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 03 12 00 02:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port [1022:43b4] (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 33, NUMA node 0 Bus: primary=02, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: ba000000-ba4fffff [size=5M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 b4 43 07 04 10 00 02 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 02 03 03 00 f1 01 00 00 20: 00 ba 40 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 12 00 02:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port [1022:43b4] (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 34, NUMA node 0 Bus: primary=02, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 00002000-00002fff [size=4K] Memory behind bridge: ba800000-ba8fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 b4 43 07 04 10 00 02 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 02 04 04 00 21 21 00 00 20: 80 ba 80 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 12 00 02:05.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port [1022:43b4] (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 36, NUMA node 0 Bus: primary=02, secondary=05, subordinate=05, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: ba700000-ba7fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 b4 43 07 04 10 00 02 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 02 05 05 00 f1 01 00 00 20: 70 ba 70 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 01 12 00 02:06.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port [1022:43b4] (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 37, NUMA node 0 Bus: primary=02, secondary=06, subordinate=06, sec-latency=0 I/O behind bridge: 00001000-00001fff [size=4K] Memory behind bridge: ba600000-ba6fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 b4 43 07 04 10 00 02 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 02 06 06 00 11 11 00 00 20: 60 ba 60 ba f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 12 00 02:07.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port [1022:43b4] (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 39, NUMA node 0 Bus: primary=02, secondary=07, subordinate=07, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 b4 43 07 04 10 00 02 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 02 07 07 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 12 00 03:00.0 Ethernet controller [0200]: Aquantia Corp. AQC107 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] [1d6a:d107] (rev 02) Subsystem: ASRock Incorporation AQC107 NBase-T/IEEE 802.3bz Ethernet Controller [AQtion] [1849:d107] Flags: bus master, fast devsel, latency 0, IRQ 32, NUMA node 0 Memory at ba440000 (64-bit, non-prefetchable) [size=64K] Memory at ba450000 (64-bit, non-prefetchable) [size=4K] Memory at ba000000 (64-bit, non-prefetchable) [size=4M] Expansion ROM at ba400000 [disabled] [size=256K] Capabilities: <access denied> Kernel driver in use: atlantic Kernel modules: atlantic 00: 6a 1d 07 d1 07 04 10 00 02 00 00 02 10 00 00 00 10: 04 00 44 ba 00 00 00 00 04 00 45 ba 00 00 00 00 20: 04 00 00 ba 00 00 00 00 00 00 00 00 49 18 07 d1 30: 00 00 40 ba 40 00 00 00 00 00 00 00 0b 01 00 00 04:00.0 Ethernet controller [0200]: Intel Corporation I211 Gigabit Network Connection [8086:1539] (rev 03) Subsystem: ASRock Incorporation I211 Gigabit Network Connection [1849:1539] Flags: bus master, fast devsel, latency 0, IRQ 32, NUMA node 0 Memory at ba800000 (32-bit, non-prefetchable) [size=128K] I/O ports at 2000 [size=32] Memory at ba820000 (32-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: igb Kernel modules: igb 00: 86 80 39 15 07 04 10 00 03 00 00 02 10 00 00 00 10: 00 00 80 ba 00 00 00 00 01 20 00 00 00 00 82 ba 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 39 15 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 00 00 05:00.0 Network controller [0280]: Intel Corporation Dual Band Wireless-AC 3168NGW [Stone Peak] [8086:24fb] (rev 10) Subsystem: Intel Corporation Dual Band Wireless-AC 3168NGW [Stone Peak] [8086:2110] Flags: bus master, fast devsel, latency 0, IRQ 136, NUMA node 0 Memory at ba700000 (64-bit, non-prefetchable) [size=8K] Capabilities: <access denied> Kernel driver in use: iwlwifi Kernel modules: iwlwifi 00: 86 80 fb 24 06 04 10 00 10 00 80 02 10 00 00 00 10: 04 00 70 ba 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 10 21 30: 00 00 00 00 c8 00 00 00 00 00 00 00 0a 01 00 00 06:00.0 Ethernet controller [0200]: Intel Corporation I211 Gigabit Network Connection [8086:1539] (rev 03) Subsystem: ASRock Incorporation I211 Gigabit Network Connection [1849:1539] Flags: bus master, fast devsel, latency 0, IRQ 30, NUMA node 0 Memory at ba600000 (32-bit, non-prefetchable) [size=128K] I/O ports at 1000 [size=32] Memory at ba620000 (32-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: igb Kernel modules: igb 00: 86 80 39 15 07 04 10 00 03 00 00 02 10 00 00 00 10: 00 00 60 ba 00 00 00 00 01 10 00 00 00 00 62 ba 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 39 15 30: 00 00 00 00 40 00 00 00 00 00 00 00 05 01 00 00 08:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Raven/Raven2 PCIe Dummy Function [1022:145a] Subsystem: Advanced Micro Devices, Inc. [AMD] Zeppelin/Raven/Raven2 PCIe Dummy Function [1022:145a] Flags: fast devsel, NUMA node 0 Capabilities: <access denied> 00: 22 10 5a 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 5a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 08:00.2 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Platform Security Processor [1022:1456] Subsystem: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Platform Security Processor [1022:1456] Flags: bus master, fast devsel, latency 0, IRQ 130, NUMA node 0 Memory at bac00000 (32-bit, non-prefetchable) [size=1M] Memory at bad00000 (32-bit, non-prefetchable) [size=8K] Capabilities: <access denied> Kernel driver in use: ccp Kernel modules: ccp 00: 22 10 56 14 06 04 10 00 00 00 80 10 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 c0 ba 00 00 00 00 20: 00 00 00 00 00 00 d0 ba 00 00 00 00 22 10 56 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 0a 02 00 00 08:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 Host controller [1022:145f] (prog-if 30 [XHCI]) Subsystem: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 Host controller [1022:d102] Flags: bus master, fast devsel, latency 0, IRQ 105, NUMA node 0 Memory at bab00000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 5f 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 b0 ba 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 02 d1 30: 00 00 00 00 48 00 00 00 00 00 00 00 05 03 00 00 09:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Renoir PCIe Dummy Function [1022:1455] Subsystem: Advanced Micro Devices, Inc. [AMD] Zeppelin/Renoir PCIe Dummy Function [1022:1455] Flags: fast devsel, NUMA node 0 Capabilities: <access denied> 00: 22 10 55 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 55 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 09:00.2 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] (rev 51) (prog-if 01 [AHCI 1.0]) Subsystem: ASRock Incorporation FCH SATA Controller [AHCI mode] [1849:ffff] Flags: bus master, fast devsel, latency 0, IRQ 104, NUMA node 0 Memory at bae08000 (32-bit, non-prefetchable) [size=4K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 22 10 01 79 07 04 10 00 51 01 06 01 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 80 e0 ba 00 00 00 00 49 18 ff ff 30: 00 00 00 00 48 00 00 00 00 00 00 00 05 02 00 00 09:00.3 Audio device [0403]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) HD Audio Controller [1022:1457] Subsystem: ASRock Incorporation Family 17h (Models 00h-0fh) HD Audio Controller [1849:1221] Flags: bus master, fast devsel, latency 0, IRQ 138, NUMA node 0 Memory at bae00000 (32-bit, non-prefetchable) [size=32K] Capabilities: <access denied> Kernel driver in use: snd_hda_intel Kernel modules: snd_hda_intel 00: 22 10 57 14 06 04 10 00 00 00 03 04 10 00 80 00 10: 00 00 e0 ba 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 21 12 30: 00 00 00 00 48 00 00 00 00 00 00 00 0b 03 00 00 40:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Root Complex [1022:1450] Subsystem: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Root Complex [1022:1450] Flags: fast devsel, NUMA node 1 00: 22 10 50 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 50 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 1 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:01.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe GPP Bridge [1022:1453] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 40, NUMA node 1 Bus: primary=40, secondary=41, subordinate=41, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: 9e600000-9e6fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 53 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 41 41 00 f1 01 00 20 20: 60 9e 60 9e f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 40:01.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe GPP Bridge [1022:1453] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 41, NUMA node 1 Bus: primary=40, secondary=42, subordinate=42, sec-latency=0 I/O behind bridge: 00003000-00003fff [size=4K] Memory behind bridge: 9d000000-9e0fffff [size=17M] Prefetchable memory behind bridge: 0000000080000000-0000000091ffffff [size=288M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 53 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 42 42 00 31 31 00 20 20: 00 9d 00 9e 01 80 f1 91 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 1a 00 40:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 1 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 1 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 1 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 1 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Internal PCIe GPP Bridge 0 to Bus B [1022:1454] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 42, NUMA node 1 Bus: primary=40, secondary=43, subordinate=43, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: 9e200000-9e4fffff [size=3M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 54 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 43 43 00 f1 01 00 00 20: 20 9e 40 9e f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 40:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) PCIe Dummy Host Bridge [1022:1452] Flags: fast devsel, NUMA node 1 00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Internal PCIe GPP Bridge 0 to Bus B [1022:1454] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 44, NUMA node 1 Bus: primary=40, secondary=44, subordinate=44, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: 9e500000-9e5fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 54 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 44 44 00 f1 01 00 00 20: 50 9e 50 9e f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 41:00.0 Non-Volatile memory controller [0108]: Samsung Electronics Co Ltd NVMe SSD Controller SM981/PM981/PM983 [144d:a808] (prog-if 02 [NVM Express]) Subsystem: Samsung Electronics Co Ltd SSD 970 EVO Plus 1TB [144d:a801] Flags: bus master, fast devsel, latency 0, IRQ 45, NUMA node 1 Memory at 9e600000 (64-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: nvme Kernel modules: nvme 00: 4d 14 08 a8 06 04 10 00 00 02 08 01 10 00 00 00 10: 04 00 60 9e 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 4d 14 01 a8 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 00 00 42:00.0 VGA compatible controller [0300]: NVIDIA Corporation GP104 [GeForce GTX 1070] [10de:1b81] (rev a1) (prog-if 00 [VGA controller]) Subsystem: Micro-Star International Co., Ltd. [MSI] GP104 [GeForce GTX 1070] [1462:3304] Flags: bus master, fast devsel, latency 0, IRQ 140, NUMA node 1 Memory at 9d000000 (32-bit, non-prefetchable) [size=16M] Memory at 80000000 (64-bit, prefetchable) [size=256M] Memory at 90000000 (64-bit, prefetchable) [size=32M] I/O ports at 3000 [size=128] Expansion ROM at 000c0000 [virtual] [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: nvidia Kernel modules: nvidiafb, nouveau, nvidia_drm, nvidia 00: de 10 81 1b 07 04 10 00 a1 00 00 03 00 00 80 00 10: 00 00 00 9d 0c 00 00 80 00 00 00 00 0c 00 00 90 20: 00 00 00 00 01 30 00 00 00 00 00 00 62 14 04 33 30: 00 00 00 00 60 00 00 00 00 00 00 00 0b 01 00 00 42:00.1 Audio device [0403]: NVIDIA Corporation GP104 High Definition Audio Controller [10de:10f0] (rev a1) Subsystem: Micro-Star International Co., Ltd. [MSI] GP104 High Definition Audio Controller [1462:3304] Flags: bus master, fast devsel, latency 0, IRQ 139, NUMA node 1 Memory at 9e080000 (32-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: snd_hda_intel Kernel modules: snd_hda_intel 00: de 10 f0 10 06 00 10 00 a1 00 03 04 10 00 80 00 10: 00 00 08 9e 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 04 33 30: 00 00 00 00 60 00 00 00 00 00 00 00 0a 02 00 00 43:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Raven/Raven2 PCIe Dummy Function [1022:145a] Subsystem: Advanced Micro Devices, Inc. [AMD] Zeppelin/Raven/Raven2 PCIe Dummy Function [1022:145a] Flags: fast devsel, NUMA node 1 Capabilities: <access denied> 00: 22 10 5a 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 5a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 43:00.2 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Platform Security Processor [1022:1456] Subsystem: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) Platform Security Processor [1022:1456] Flags: bus master, fast devsel, latency 0, IRQ 133, NUMA node 1 Memory at 9e300000 (32-bit, non-prefetchable) [size=1M] Memory at 9e400000 (32-bit, non-prefetchable) [size=8K] Capabilities: <access denied> Kernel driver in use: ccp Kernel modules: ccp 00: 22 10 56 14 06 04 10 00 00 00 80 10 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 30 9e 00 00 00 00 20: 00 00 00 00 00 00 40 9e 00 00 00 00 22 10 56 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 0a 02 00 00 43:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 Host controller [1022:145f] (prog-if 30 [XHCI]) Subsystem: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 Host controller [1022:145c] Flags: bus master, fast devsel, latency 0, IRQ 116, NUMA node 1 Memory at 9e200000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 5f 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 20 9e 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 5c 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 05 03 00 00 44:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Renoir PCIe Dummy Function [1022:1455] Subsystem: Advanced Micro Devices, Inc. [AMD] Zeppelin/Renoir PCIe Dummy Function [1022:1455] Flags: fast devsel, NUMA node 1 Capabilities: <access denied> 00: 22 10 55 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 55 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 44:00.2 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] (rev 51) (prog-if 01 [AHCI 1.0]) Subsystem: ASRock Incorporation FCH SATA Controller [AHCI mode] [1849:ffff] Flags: bus master, fast devsel, latency 0, IRQ 113, NUMA node 1 Memory at 9e500000 (32-bit, non-prefetchable) [size=4K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 22 10 01 79 07 04 10 00 51 01 06 01 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 50 9e 00 00 00 00 49 18 ff ff 30: 00 00 00 00 48 00 00 00 00 00 00 00 05 02 00 00 hopefully this flashing device can be supported. Greets

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One Build System Working Group
by Thomas Heijligen 21 Jun '22

21 Jun '22

Hi folks, we want to meet again to discuss the progress and problems under the One Build Sytem Topic. If you are interested, please participate on the poll [0] to find a suitable date. On Gerrit, relevant patches can be found under the `one_build_system` topic. [1] The working document can be found on Google Docs [3] and gets also posted in plain text to the mailing list after the meeting. -- Thomas [0] https://terminplaner4.dfn.de/Eha1mJJ8jS2z2dkw [1] https://review.coreboot.org/q/project:flashrom+topic:one_build_system [3] https://docs.google.com/document/d/1TVso_VbrLEbGc7BNrYxqlrP8jMxB23TuMqEI3Pn…

1 3

Flashrom failure
by Peter 21 Jun '22

21 Jun '22

Please refer attached, chip is Winbond 25Q80BVNIG

1 0

flashrom dev meeting notes 16.06.22
by Felix Singer 16 Jun '22

16 Jun '22

# 16th June 2022, 6:00 - 7:00 UTC+0 Attendees: Nikolai, Evan, Felix, Anastasia, Nico, Edward ## Decisions Summary * We want a maintainers file as coreboot has one. Felix will take care of adding one and hooking it up to Gerrit so that the magic happens. * Active members of the community need to take care of other people's patches/discussions and if something goes wrong, help. For example, join a discussion on Gerrit and try to help to calm down people; bring people to talk in-person (for example on the meeting) instead of texting; ask each other if everything is okay with a patch/feature etc. Take care of each other. ## Agenda * [FelixS] Reusing coreboot’s maintainer [file](https://github.com/coreboot/coreboot/blob/master/MAINTAINERS) mechanism for flashrom hooked up with the following [script](https://github.com/coreboot/coreboot/blob/51f3b3225504707ce6df81b12… ). * I think it would be great if we could add a maintainers file, like coreboot has one, where people can be assigned to specific files or folders, and hook this file up to Gerrit so that maintainers are notified. * Edward +1 for driver owners. * aklm +1 especially for new people. * AI Felix to create a patch to introduce the MAINTAINER file and aklm to review to get this idea going. * [Edward] How do we get the community to adopt the [https://flashrom.org/Friendliness](https://flashrom.org/Friendliness) policy for real? * Examples of violations are snide remarks of code reviews to poor grammar (non-native speaker), dissecting peoples speech and building up encyclopedias of text of authors motivations instead of straight to the point actionable items. * This *must* end! * How are remediation dealt with? * How are violations considered and what is the result of a violation? * Who (more than one person hopefully) is responsible for enforcement? * Maybe find a group of people outside of the flashrom community who could help with this? It seems like this is an issue that many groups struggle with. Maybe we can look at creating a group of people from various open source projects that can look objectively at any issues and make some decisions about how to deal with problems. Whether the projects want to accept and implement those decisions would be up to the individual project. My fear is that the flashrom project is too small to police these issues objectively. * [aklm] just for completeness: existing rules on the Friendliness page say the following: * “If you feel like you have been treated in an unfair way, we want to hear about it so we can fix it. Our arbitration committee (Carl-Daniel Hailfinger <email> and Stefan Reinauer <email>) can be contacted directly and will listen to you. If you don't get a response within a few days, your mail was probably lost. Feel free to resend your mail to another member of the arbitration committee in that case.” * Is this still up-to-date? Does this strategy work? * If code review goes bad , maybe pause for a moment . Maybe try to get a conversation in person? * Bring up very concerning issues in GVC. * It’s hard to admit fault or in trouble. * Take care of others to allow people to say they are in trouble. * If someone notices a discussion is going off the rails that person should be afforded the chance to try and help bring things back to the topic. * What to do (for active members of community) * First starting with the person is ok before deep diving into the technical issue that went off the rails. * Add yourself to the patch and comment on the patch, trying to extract relevant ideas * If a person is on the meeting , you can ask them if everything is alright with the patch/feature * Reach out to person by email , or private chat * Bring people to the meeting? * For new people: ask what they are trying to achieve? What are you trying to do? * Two separate patches should be considered independent. * Actively try to determine the point where things got misunderstood and try to refocus the discussion back to a simpler point to realign to make progress. * Less is more, simple points to bring things back to focus and help build bridges. * What can a person do who feels in trouble? * [aklm] I created a category in bugtracker “Easy Projects” so that we can have a collection of easy tasks (for example for new people). This may be easier to keep alive than [https://www.flashrom.org/Easy_projects](https://www.flashrom.org/Easy_proje… * Thanks!

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GSOC Project Thread - Optimising Erase Function Selection
by Aarya Chaumal 16 Jun '22

16 Jun '22

Hi, Today I had my first meet with my mentors Thomas and Simon, and we discussed a few things involving the timeline and initial tasks for the project. There are mainly two parts to the project : 1. Developing a strategy to optimize the selection of the erase function to reduce the overall time required to do the operation 2. Filtering out the erase functions that the programmer does not support For now, I'm working on the first one. Also, I will be writing a test case to check whether the erase functions in the flashchips struct are sorted according to the block size. Aarya

2 3

SMBus revision 0x61 (AMD FP4) unknown
by Adrien Dessemond 16 Jun '22

16 Jun '22

Hello, Flashrom reports an unsupported chipset. See below and the attached file for a lspci report. Motherboard is an ASRock Taichi x370 with a AMD 5900X processor. # flashrom --programmer internal flashrom v1.2 on Linux 5.17.14-gentoo-x86_64 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "AMD FP4". Enabling flash write... FCH device found but SMBus revision 0x61 does not match known values. Please report this to flashrom(a)flashrom.org and include this log and the output of lspci -nnvx, thanks!. Could not determine chipset generation.PROBLEMS, continuing anyway No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Best regards, -- Adrien Dessemond

1 0

(no subject)
by Eduardo Ferro 16 Jun '22

16 Jun '22

Hello, I would like to know if flashrom returns some value in percentage while writing or reading the file. I thank the attention Regards, Eduardo Ferro.

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Updated invitation: Flashrom Dev Meeting (monthly) @ Thu 16 Jun 2022 16:00 - 17:00 (AEST) (flashrom@flashrom.org)
by evanbenn＠google.com 15 Jun '22

15 Jun '22

This event has been changed. Title: Flashrom Dev Meeting (monthly) Monthly meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… When: Thu 16 Jun 2022 16:00 – 17:00 Eastern Australia Time - Sydney Where: AU-SYD-ODI-3-Lothlorien (7) [GVC] (changed) Joining info: Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 (PIN: 304642402) More phone numbers: https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Calendar: flashrom(a)flashrom.org Who: * aklm(a)chromium.org- creator * felix.singer12(a)gmail.com * david.hendricks(a)gmail.com * quasisec(a)google.com * nico.h(a)gmx.de * Martin Roth * src(a)posteo.de * martonmiklosqdev(a)gmail.com * piotr.krol(a)3mdeb.com * Maciej Pijanowski * michal.zygowski(a)3mdeb.com * th3fanbus(a)gmail.com * stefan.k.reinauer(a)gmail.com * nartemiev(a)google.com * arthur(a)aheymans.xyz * evanbenn(a)google.com * flashrom(a)flashrom.org * c-d.hailfinger.devel.2006(a)gmx.net Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account flashrom(a)flashrom.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively, you can sign up for a Google Account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organiser and be added to the guest list, invite others regardless of their own invitation status or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

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Updated invitation: Flashrom Dev Meeting (monthly) @ Every 2 weeks from 4pm to 5pm on Thursday (AEST) (flashrom@flashrom.org)
by aklm＠chromium.org 15 Jun '22

15 Jun '22

This event has been changed. Title: Flashrom Dev Meeting (monthly) Monthly meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… When: Every 2 weeks from 4pm to 5pm on Thursday Eastern Australia Time - Sydney Joining info: Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 (PIN: 304642402) More phone numbers: https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Calendar: flashrom(a)flashrom.org Who: * aklm(a)chromium.org - creator * felix.singer12(a)gmail.com * david.hendricks(a)gmail.com * quasisec(a)google.com * nico.h(a)gmx.de * Martin Roth * src(a)posteo.de * martonmiklosqdev(a)gmail.com * piotr.krol(a)3mdeb.com * Maciej Pijanowski * michal.zygowski(a)3mdeb.com * th3fanbus(a)gmail.com * stefan.k.reinauer(a)gmail.com * nartemiev(a)google.com * arthur(a)aheymans.xyz * flashrom(a)flashrom.org * c-d.hailfinger.devel.2006(a)gmx.net * evanbenn(a)google.com Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account flashrom(a)flashrom.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively you can sign up for a Google account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organizer and be added to the guest list, or invite others regardless of their own invitation status, or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

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Updated invitation: Flashrom Dev Meeting (monthly) @ Every 2 weeks from 4pm to 5pm on Thursday from Thu May 5 to Wed Jun 15 (AEST) (flashrom@flashrom.org)
by aklm＠chromium.org 15 Jun '22

15 Jun '22

This event has been changed. Title: Flashrom Dev Meeting (monthly) Monthly meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… When: Every 2 weeks from 4pm to 5pm on Thursday from Thu May 5 to Wed Jun 15 Eastern Australia Time - Sydney (changed) Joining info: Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 (PIN: 304642402) More phone numbers: https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Calendar: flashrom(a)flashrom.org Who: * aklm(a)chromium.org - creator * felix.singer12(a)gmail.com * david.hendricks(a)gmail.com * quasisec(a)google.com * nico.h(a)gmx.de * Martin Roth * src(a)posteo.de * martonmiklosqdev(a)gmail.com * piotr.krol(a)3mdeb.com * Maciej Pijanowski * michal.zygowski(a)3mdeb.com * th3fanbus(a)gmail.com * stefan.k.reinauer(a)gmail.com * nartemiev(a)google.com * arthur(a)aheymans.xyz * flashrom(a)flashrom.org * c-d.hailfinger.devel.2006(a)gmx.net Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account flashrom(a)flashrom.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively you can sign up for a Google account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organizer and be added to the guest list, or invite others regardless of their own invitation status, or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

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FlashRom error report
by 이준기 15 Jun '22

15 Jun '22

Hello. I'm Junki Lee and I'm using a translator, so please understand. I used flashrom on my laptop and it gave me an error. ubuntu@ubuntu:~/Documents$ sudo flashrom --programmer ch341a_spi -w X5BF.B08 -c MX25L6406E/MX25L6408E flashrom v1.2 on Linux 5.13.0-30-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found Macronix flash chip "MX25L6406E/MX25L6408E" (8192 kB, SPI) on ch341a_spi. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... FAILED at 0x0004801f! Expected=0x32, Found=0x22, failed byte count from 0x00000000-0x007fffff: 0x3c5a Your flash chip is in an unknown state. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks! The model name of the laptop is Aorus X5.(https://www.gigabyte.com/Laptop/X5) CH341A was used as equipment. The name of the EEPROM is MX25L6406E from Macronix. The rom file used was downloaded from the link above. I've used flashrom several times, but the error was almost the same. It was always the same up to the failed byte 0x007fffff part, only the hexadecimal number after it was slightly different. I also tried CH341A programmer and AsProgrammer. Tried with multiple versions, same error as above. The delete worked fine, but the write operation always throws an error. My laptop is bricked. Can you help me?

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flashrom for windows build/download
by JOHN WESTMORELAND 14 Jun '22

14 Jun '22

Hello, I was wondering if someone could point me in the right direction to find prebuilt binaries for windows. Thanks In Advance, John W.

2 1

Refactor arguments parser - GSOC project thread
by Chinmay Lonkar 10 Jun '22

10 Jun '22

Hello, Today I had a meeting with my mentors Felix and Anastasia. The project plan has been broken into phases. I'll work on the first phase, which will entail creating an alternative to extract_programmer_param() that will parse the programmer's sub-arguments according to the data type in which they have to be utilized in the code. So, I'll be reading through the code and working out a solution for this task, as well as analyzing all of the other parameters that the programmers utilize. Regards, Chinmay Lonkar

1 1

Verify problem with W25Q256JVEQ
by Mathieu Othacehe 08 Jun '22

08 Jun '22

Hello, I am trying to flash a Winbond 25Q256JVEQ with a dediprog programmer. The W25Q256JVEQ flash is put in a WSON8 socket. The socket pins are directly wired to the dediprog. The chip is detected and can be erased. However, the verification always fail this way: --8<---------------cut here---------------start------------->8--- Found Winbond flash chip "W25Q256.V" (32768 kB, SPI) on dediprog. Chip status register is 0x00. ... Found Winbond flash chip "W25Q256.V" (32768 kB, SPI). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:EW Erase/write done. Verifying flash... FAILED at 0x00000000! Expected=0x71, Found=0xff, failed byte count from 0x00000000-0x01ffffff: 0x268 Your flash chip is in an unknown state. --8<---------------cut here---------------end--------------->8--- I tried to add a 0.1uF decoupling resistor on VCC as well as pull-ups on CS, WP and HOLD pins and pull down on CLK as proposed in the "Winbond SPI NOR Flash Device APPLICATION NOTE", without any progress. I tried several W25Q256JVEQ flash memories and always observed the same behaviour. Any idea what could be wrong? Thanks, Mathieu

1 0

Good Afternoon, ( Bios Help )
by RED-LAB ? 03 Jun '22

03 Jun '22

Good Afternoon, Can You Guys Help Me I Have A Virus In My Bios My is Computer Booting and executing a code inside computer dell precision t5500 dual xeon my tel 954-305-1626 david

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flashrom dev meeting notes 2.06.22
by Felix Singer 03 Jun '22

03 Jun '22

# 2nd June 2022, 6:00 - 7:00 am UTC+0 Attendees: Felix Singer, Chinmay Lonkar, Edward O’Callaghan, Joursoir, Anastasia Klimchuk, Nikolai Artemiev, Evan Benn, Aarya Chaumal, Thomas Heijligen, Arthur Heymans ## Decisions Summary * We want to look into git hooks and build bot scripts which check the code style for compliance. Discussion thread will be opened on the mailing list. * We want to renew the flashrom website and we will look into static site generators. Discussion thread will be opened on the mailing list. ## Agenda * [aklm] Welcome our students! * Aarya * Chinmay * Joursoir * [aklm] We have people from 3 software companies here, and also independent developers. This makes 4 parties, each one is using flashrom in their own ways, each one has some critical use cases. Can we talk and describe to each other how we use flashrom, what are critical use cases (unless it’s confidential)? My main goal is that we have more understanding (and maybe more patience) of each other’s work. * Servers: LinuxBoot, e.g. for updating CrOS-style `vpd` variables. This usually necessitates static binaries which are currently quite large (>1MB). Short of re-writing relevant bits of Flashrom (e.g. in Go), is there a good way to shrink the flashrom binary size? Some users are compiling with musl, for example: [https://github.com/flashrom/flashrom/pull/155](https://github.com/flashrom/… * How to make binary smaller * [quasisec] * Convert flash chips. C into parseable database * Make more parts of flashrom as re-usable units - i.e., modularity, remove globals etc. * Reduce binary size via build system changes * Removing globals plays into this, it adds more modularity * Edward: Chrome OS uses flashrom to update EC and AP. There are few other components that are updated with flashrom. We go through the internal path. Main programmers are ichspi, sb600spi, linux_mtd. * Thomas: (from Simon) Making things with FPGA , nothing to do with coreboot. Completely writing the whole flash chips. * Flashrom is Swiss army knife * Thomas (Secunet) : Development of coreboot, external programmer to read/write chip. Internal programmer for spi. libflashrom on the payload base. * [FelixS] coreboot uses a git-hook to run clang-format stylecheck. Should we use it too? * [https://review.coreboot.org/c/flashrom/+/43602](https://review.coreboot.org… * The script aborts the creation of a commit if the changed code doesn’t comply with the style guidelines. * We need to add make target * Is the check-style script blocking? What if false-positives appear? * Maybe another target on the build bot? Comments are added into Gerrit patch. * Script will run on git commit, locally * Arthur: I tried to make coreboot tree consistent, but clang choked on this, had a runtime. ~1 month ago I was trying this. * Thomas : data structures can be hard to format, like flashchip.c * We can put exceptions in the tool, so that formatting is not touched. * Arthur: We can just try, have a play with it and maybe it works in the tree? * It is hard to configure for parts of file, usually whole file or nothing. * First step can be a page on the build bot, which is not blocking. Second step adding comments to gerrit. * The patch will install a hook with make, meson is not adding a hook at the moment. * TODO start a topic on the mailing list * [FelixS] Should we use a tool for code formatting? * uncrustify: [https://review.coreboot.org/c/flashrom/+/42556](https://review.coreboot.org… * clang-format: [https://review.coreboot.org/c/flashrom/+/38673](https://review.coreboot.org… * Arthur: Uncrisfity works on coreboot * quasisec@: I one word: Yes. * quasisec@: Actually we can go beyond syntax checking and perhaps add: * Scan-build as a buildbot target to check for possible bugs (overflows etc) * Also coccinelle semantic patching for common bad or good patterns that should be applied. https://www.kernel.org/doc/html/v4.14/dev-tools/coccinelle.html * [FelixS] Should we rework / rebuild / modernize the flashrom.org website? * The flashrom website looks like a site from the early 2000’s. That’s not very attractive for potential interested people. The site should be replaced with something which looks modern. * quasisec@ needs more shiny! :D * Static site generators are easy to manage, they reduce maintenance burden (e.g. less or no updates) and also the risk for server-side security issues. * quasisec@ +1, also easy for the community to check in changes under review. All just markdown. * FelixS: More democratic to make changes for the wider community. * quasisec@ suggestions: * [https://www.getzola.org/](https://www.getzola.org/) also, * [https://jaspervdj.be/hakyll/](https://jaspervdj.be/hakyll/) is fantastic. * Check out [https://jamstack.org/generators/](https://jamstack.org/generators/) * Furthermore, it makes hooking up Doxygen code documentation generation trivial. * We have to find out what we need and which framework supports what. Then, various frameworks need to be evaluated and we need a plan on how to migrate to the new site. * [aklm] how do we build a knowledge base for users? Ideally such that users can update content themselves? * TODO start thread on mailing list * aklm: Wiki has 33 users, but wiki is rarely updated * Chinmay: There is a tool docsify. Lots of themes, or you can make your own theme. I can show an example? Yes! * Thomas: we need to make a list of requirements * There is some C code which generates wiki markdown with the list of chips. It needs to be run manually. It can be run on buildbot. * Mediawiki edit page says “Please note that all contributions to flashrom may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here. You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see [flashrom:Copyrights](https://www.flashrom.org/index.php?title=flashrom:Copy… ) for details). Do not submit copyrighted work without permission!”

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Spansion S25FL128L readout
by Hilco de Lathouder 31 May '22

31 May '22

Hi All, I have a Spansion chip I want to read but it seems not supported by flashrom. I can connect and read JEDEC ID with BusPirate: it says 01-60-18 which corresponds with the Spansion S25FL128L (specs available online). Flashrom does not detect it. I tried reading it while forcing any of the other 128Mbit Spansion chips, but could not make anything of the rom with Binwalk. What would be the best strategy to get to the contents of this chip? Thanks in advance, Hilco

2 2

Decision making process
by Anastasia Klimchuk 30 May '22

30 May '22

Hello People, The topic initially came up in the “Gatekeeping” thread. However it was suggested that it should be a separate thread, which makes sense so I am starting one. So, straight to the point: it looks like we have a decision making process emerging! (below). What do people think about it? #1 Discuss things on the mailing list first. It could be ongoing for months - so that everyone who is interested has time to read and respond. However, it doesn’t have to be for months. #2 When/if the discussion seems to be settled and people are in agreement, the item can be added to the agenda of the meeting. #3 At the meeting the item can be discussed again, and a decision can be made (or not made, if people disagree). #4 After the meeting we send an email with meeting notes and “Decisions summary” on the top of the email. #5 Since stuff never gets done immediately, there always be some time to react on #4 If someone has objections/concerns, it would be great if you can propose improvements or alternative solutions. Please don’t just say “this is all wrong!” Many thanks for sharing your thoughts! -- Anastasia.

2 2

Request for clarification on "per-region file arguments" issue
by Daniel Campello 24 May '22

24 May '22

Hello, I decided to take a look at https://ticket.coreboot.org/issues/372 and I would like to get a better understanding of what is being requested on the issue tracker. I took a look at the submitted patch (comments and code diff) and everything seems in order to me. I appreciate any assistance you can provide, Regards, Daniel Campello

3 2

new chip - GD25LR256E
by Igor Omelchenko 24 May '22

24 May '22

Hello guys, trying to add a new chip GigaDevices into flashchips.c, without success. Can someone help me to add it. Thanks. trying something like this: { .vendor = "GigaDevice", .name = "GD25LR256E", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25LR256E, .total_size = 32768, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 8192} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {32 * 1024, 1024} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 512} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {32 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {32 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950},} -- *Omelchenko Igor* *0543-066-855*

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Any users of the flashrom_*_info querying functions in libflashrom API?
by Nico Huber 23 May '22

23 May '22

Hi folks, for a while now, we have some functions in the libflashrom API to query information about supported devices and such. The original patch[1] left some questions open. And, alas, as there was some broken code and no feedback, parts of it were dropped. So, I wonder if there are any users of this API already? Anything that might break if we change it? Why I'm picking this up is that there are some issues with the design. For instance, the exposed structs form an ABI that might need versioning if somebody wants to link a shared library. And the cleanup part of the API is too simple, i.e. flashrom_data_free() doesn't allow anything but a shallow free(). There's also an associated ticket[2]. Nico [1] https://review.coreboot.org/c/flashrom/+/34363 [2] https://ticket.coreboot.org/issues/355

1 0

My Bios Dell t5500 - help
by RED-LAB ? 22 May '22

22 May '22

Here My Bios hwinfo --all 01: None 00.0: 10105 BIOS [Created at bios.186] Unique ID: rdCR.lZF+r4EgHp4 Hardware Class: bios BIOS Keyboard LED Status: Scroll Lock: off Num Lock: on Caps Lock: off Base Memory: 637 kB PnP BIOS: @@@0000 BIOS32 Service Directory Entry: 0xffea0 SMBIOS Version: 2.5 Type 218 Record: #55808 Data 00: da 6b 00 da b2 00 17 4b 0e 38 00 00 00 00 80 01 Data 10: 00 00 00 02 80 01 00 00 00 00 a0 01 00 58 00 58 Data 20: 00 01 00 59 00 59 00 01 00 75 01 75 01 01 00 76 Data 30: 01 76 01 01 00 25 03 25 03 01 00 05 80 05 80 01 Data 40: 00 d1 01 19 00 01 00 15 02 19 00 02 00 1b 00 19 Data 50: 00 03 00 19 00 19 00 00 00 4a 02 4a 02 01 00 0c Data 60: 80 0c 80 01 00 ff ff 00 00 00 00 Type 218 Record: #55809 Data 00: da 5f 01 da b2 00 17 4b 0e 38 00 20 f3 20 f3 00 Data 10: 00 10 f3 10 f3 00 00 30 f3 30 f3 00 00 21 f3 21 Data 20: f3 00 00 11 f3 11 f3 00 00 31 f3 31 f3 00 00 10 Data 30: f5 10 f5 00 00 11 f5 11 f5 00 00 12 f5 12 f5 00 Data 40: 00 13 f5 13 f5 00 00 14 f5 14 f5 00 00 15 f5 15 Data 50: f5 00 00 16 f5 16 f5 00 00 ff ff 00 00 00 00 Type 218 Record: #55810 Data 00: da 71 02 da b2 00 17 4b 0e 38 00 20 f4 20 f4 00 Data 10: 00 10 f4 10 f4 00 00 30 f4 30 f4 00 00 40 f4 40 Data 20: f4 00 00 21 f4 21 f4 00 00 11 f4 11 f4 00 00 31 Data 30: f4 31 f4 00 00 41 f4 41 f4 00 00 22 f4 22 f4 00 Data 40: 00 12 f4 12 f4 00 00 32 f4 32 f4 00 00 42 f4 42 Data 50: f4 00 00 00 00 23 f4 00 00 00 00 13 f4 00 00 00 Data 60: 00 33 f4 00 00 00 00 43 f4 00 00 ff ff 00 00 00 Data 70: 00 Type 218 Record: #55811 Data 00: da a1 03 da b2 00 17 4b 0e 38 00 25 f4 25 f4 00 Data 10: 00 15 f4 15 f4 00 00 35 f4 35 f4 00 00 45 f4 45 Data 20: f4 00 00 26 f4 26 f4 00 00 16 f4 16 f4 00 00 36 Data 30: f4 36 f4 00 00 46 f4 46 f4 00 00 27 f4 27 f4 00 Data 40: 00 17 f4 17 f4 00 00 37 f4 37 f4 00 00 47 f4 47 Data 50: f4 00 00 28 f4 28 f4 00 00 18 f4 18 f4 00 00 38 Data 60: f4 38 f4 00 00 48 f4 48 f4 00 00 29 f4 29 f4 00 Data 70: 00 19 f4 19 f4 00 00 39 f4 39 f4 00 00 49 f4 49 Data 80: f4 00 00 2a f4 2a f4 00 00 1a f4 1a f4 00 00 3a Data 90: f4 3a f4 00 00 4a f4 4a f4 00 00 ff ff 00 00 00 Data a0: 00 Type 218 Record: #55812 Data 00: da fb 04 da b2 00 17 4b 0e 38 00 42 00 42 00 01 Data 10: 00 43 00 43 00 01 00 0f 00 0f 00 01 00 10 00 10 Data 20: 00 01 00 11 00 11 00 01 00 12 00 12 00 01 00 00 Data 30: 00 13 00 01 00 00 00 14 00 01 00 00 00 15 00 01 Data 40: 00 00 00 16 00 01 00 07 00 07 00 01 00 08 00 08 Data 50: 00 01 00 09 00 09 00 01 00 0a 00 0a 00 01 00 0b Data 60: 00 0b 00 01 00 0c 00 0c 00 01 00 0e 00 0e 00 01 Data 70: 00 01 f0 01 f0 01 00 0d 00 0d 00 01 00 a6 00 a6 Data 80: 00 01 00 a7 00 a7 00 01 00 05 01 05 01 01 00 06 Data 90: 01 06 01 01 00 8c 00 8c 00 01 00 8d 00 8d 00 01 Data a0: 00 9b 00 9b 00 01 00 9c 00 9c 00 01 00 09 01 09 Data b0: 01 01 00 a1 00 a1 00 01 00 a2 00 a2 00 01 00 a3 Data c0: 00 a3 00 01 00 9f 00 9f 00 01 00 a0 00 a0 00 01 Data d0: 00 9d 00 9d 00 01 00 9e 00 9e 00 01 00 54 01 54 Data e0: 01 01 00 55 01 55 01 01 00 04 80 04 80 01 00 01 Data f0: a0 01 a0 01 00 ff ff 00 00 00 00 Type 218 Record: #55813 Data 00: da cb 05 da b2 00 17 4b 0e 38 00 93 00 93 00 01 Data 10: 00 94 00 94 00 01 00 03 c0 03 c0 01 00 90 00 90 Data 20: 00 01 00 91 00 91 00 01 00 92 00 92 00 01 00 e2 Data 30: 00 e2 00 01 00 e3 00 e3 00 01 00 e4 00 e4 00 01 Data 40: 00 e5 00 e5 00 01 00 d1 00 d1 00 01 00 d2 00 d2 Data 50: 00 01 00 45 01 45 01 01 00 44 01 44 01 01 00 00 Data 60: 00 fa 02 01 00 00 00 f9 02 01 00 37 01 37 01 01 Data 70: 00 38 01 38 01 01 00 39 01 39 01 01 00 2b 01 2b Data 80: 01 01 00 2c 01 2c 01 01 00 4e 01 4e 01 01 00 4f Data 90: 01 4f 01 01 00 d4 01 d4 01 01 00 d5 01 d5 01 01 Data a0: 00 d2 01 d2 01 01 00 d3 01 d3 01 01 00 71 01 71 Data b0: 01 01 00 72 01 72 01 01 00 73 01 73 01 01 00 74 Data c0: 01 74 01 01 00 ff ff 00 00 00 00 Type 218 Record: #55814 Data 00: da fb 06 da b2 00 17 4b 0e 38 00 17 01 17 01 01 Data 10: 00 18 01 18 01 01 00 19 01 19 01 01 00 1a 01 1a Data 20: 01 01 00 1b 01 1b 01 01 00 1c 01 1c 01 01 00 1d Data 30: 01 1d 01 01 00 1e 01 1e 01 01 00 1f 01 1f 01 01 Data 40: 00 20 01 20 01 01 00 45 02 45 02 01 00 44 02 44 Data 50: 02 01 00 87 00 87 00 01 00 88 00 88 00 01 00 04 Data 60: 02 04 02 01 00 05 02 05 02 01 00 2d 00 2d 00 01 Data 70: 00 2e 00 2e 00 01 00 6e 00 6e 00 01 00 28 00 28 Data 80: 00 01 00 29 00 29 00 01 00 2a 00 2a 00 01 00 2b Data 90: 00 2b 00 01 00 2c 00 2c 00 01 00 55 00 55 00 01 Data a0: 00 6d 00 6d 00 01 00 8e 00 8e 00 01 00 8f 00 8f Data b0: 00 01 00 1c 00 1c 00 01 00 1d 00 1d 00 01 00 23 Data c0: 00 23 00 01 00 22 00 22 00 01 00 f5 00 f5 00 01 Data d0: 00 f6 00 f6 00 01 00 eb 00 eb 00 01 00 ea 00 ea Data e0: 00 01 00 40 01 40 01 01 00 41 01 41 01 01 00 ed Data f0: 00 ed 00 01 00 ff ff 00 00 00 00 Type 218 Record: #55815 Data 00: da b9 07 da b2 00 17 4b 0e 38 00 f0 00 f0 00 01 Data 10: 00 4a 01 4a 01 01 00 4b 01 4b 01 01 00 4c 01 4c Data 20: 01 01 00 4d 01 4d 01 01 00 68 01 68 01 01 00 69 Data 30: 01 69 01 01 00 c4 01 c4 01 01 00 c5 01 c5 01 01 Data 40: 00 c1 01 c1 01 01 00 c3 01 c3 01 01 00 c2 01 c2 Data 50: 01 01 00 55 02 55 02 01 00 56 02 56 02 01 00 4c Data 60: 02 4c 02 01 00 4b 02 4b 02 01 00 ea 01 ea 01 01 Data 70: 00 eb 01 eb 01 01 00 65 02 65 02 01 00 64 02 64 Data 80: 02 01 00 67 02 67 02 01 00 66 02 66 02 01 00 69 Data 90: 02 69 02 01 00 68 02 68 02 01 00 6d 02 6d 02 01 Data a0: 00 6c 02 6c 02 01 00 27 03 27 03 01 00 28 03 28 Data b0: 03 01 00 ff ff 00 00 00 00 BIOS Info: #0 Vendor: "Dell Inc." Version: "A18" Date: "10/15/2018" Start Address: 0xf0000 ROM Size: 2048 kB Features: 0x0703001f00003d29de80 PCI supported PnP supported APM supported BIOS flashable BIOS shadowing allowed ESCD supported CD boot supported Selectable boot supported EDD spec supported 1.2MB Toshiba Japanese Floppy supported 720kB Floppy supported Print Screen supported 8042 Keyboard Services supported Serial Services supported Printer Services supported ACPI supported USB Legacy supported BIOS Boot Spec supported F12 Network boot supported System Info: #256 Manufacturer: "Dell Inc." Product: "Precision WorkStation T5500" Serial: "9MF65P1" UUID: 4c4c4544-004d-4610-8036-b9c04f355031 Wake-up: 0x06 (Power Switch) Board Info: #512 Manufacturer: "Dell Inc." Product: "0CRH6C" Version: "A00" Serial: "..CN1374007D00XA." Chassis Info: #768 Manufacturer: "Dell Inc." Serial: "9MF65P1" Asset Tag: "11371137" Type: 0x07 (Tower) Bootup State: 0x03 (Safe) Power Supply State: 0x03 (Safe) Thermal State: 0x03 (Safe) Security Status: 0x03 (None) Processor Info: #1024 Socket: "CPU1" Socket Type: 0x14 (Other) Socket Status: Populated Type: 0x03 (CPU) Family: 0xb3 (Xeon) Manufacturer: "Intel" Processor ID: 0xbfebfbff000206c2 Status: 0x01 (Enabled) External Clock: 6400 MHz Max. Speed: 3800 MHz Current Speed: 2666 MHz L1 Cache: #1792 L2 Cache: #1793 L3 Cache: #1796 Processor Info: #1025 Socket: "CPU2" Socket Type: 0x14 (Other) Socket Status: Populated Type: 0x03 (CPU) Family: 0xb3 (Xeon) Manufacturer: "Intel" Processor ID: 0xbfebfbff000206c2 Status: 0x04 (Idle) External Clock: 6400 MHz Max. Speed: 3800 MHz Current Speed: 2666 MHz L1 Cache: #1794 L2 Cache: #1795 L3 Cache: #1797 Cache Info: #1792 Level: L1 State: Enabled Mode: 0x01 (Write Back) Location: 0x00 (Internal, Not Socketed) ECC: 0x03 (None) Type: 0x05 (Unified) Associativity: 0x08 (16-way Set-Associative) Max. Size: 384 kB Current Size: 384 kB Supported SRAM Types: 0x0001 (Other) Current SRAM Type: 0x0001 (Other) Cache Info: #1793 Level: L2 State: Enabled Mode: 0x02 (Varies with Memory Address) Location: 0x00 (Internal, Not Socketed) ECC: 0x05 (Single-bit) Type: 0x05 (Unified) Associativity: 0x08 (16-way Set-Associative) Max. Size: 1536 kB Current Size: 1536 kB Supported SRAM Types: 0x0001 (Other) Current SRAM Type: 0x0001 (Other) Cache Info: #1796 Level: L3 State: Enabled Mode: 0x02 (Varies with Memory Address) Location: 0x00 (Internal, Not Socketed) ECC: 0x05 (Single-bit) Type: 0x05 (Unified) Associativity: 0x10 (Other) Max. Size: 12288 kB Current Size: 12288 kB Supported SRAM Types: 0x0001 (Other) Current SRAM Type: 0x0001 (Other) Cache Info: #1794 Level: L1 State: Enabled Mode: 0x01 (Write Back) Location: 0x00 (Internal, Not Socketed) ECC: 0x03 (None) Type: 0x05 (Unified) Associativity: 0x08 (16-way Set-Associative) Max. Size: 384 kB Current Size: 384 kB Supported SRAM Types: 0x0001 (Other) Current SRAM Type: 0x0001 (Other) Cache Info: #1795 Level: L2 State: Enabled Mode: 0x02 (Varies with Memory Address) Location: 0x00 (Internal, Not Socketed) ECC: 0x05 (Single-bit) Type: 0x05 (Unified) Associativity: 0x08 (16-way Set-Associative) Max. Size: 1536 kB Current Size: 1536 kB Supported SRAM Types: 0x0001 (Other) Current SRAM Type: 0x0001 (Other) Cache Info: #1797 Level: L3 State: Enabled Mode: 0x02 (Varies with Memory Address) Location: 0x00 (Internal, Not Socketed) ECC: 0x05 (Single-bit) Type: 0x05 (Unified) Associativity: 0x10 (Other) Max. Size: 12288 kB Current Size: 12288 kB Supported SRAM Types: 0x0001 (Other) Current SRAM Type: 0x0001 (Other) Port Connector: #2048 Type: 0x02 (Parallel Port PS/2) Internal Designator: "PARALLEL" External Connector: 0x05 (DB-25 pin female) Port Connector: #2049 Type: 0x09 (Serial Port 16550A Compatible) Internal Designator: "SERIAL1" External Connector: 0x08 (DB-9 pin male) Inactive Record: #2050 Data 00: 7e 09 02 08 01 00 00 08 09 String 1: "SERIAL2" Port Connector: #2051 Type: 0x0d (Keyboard Port) Internal Designator: "KYBD" External Connector: 0x0f (PS/2) Port Connector: #2052 Type: 0x0e (Mouse Port) Internal Designator: "MOUSE" External Connector: 0x0f (PS/2) Port Connector: #2053 Type: 0x10 (USB) Internal Designator: "USB1" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2054 Type: 0x10 (USB) Internal Designator: "USB2" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2055 Type: 0x10 (USB) Internal Designator: "USB3" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2056 Type: 0x10 (USB) Internal Designator: "USB4" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2057 Type: 0x10 (USB) Internal Designator: "USB5" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2058 Type: 0x10 (USB) Internal Designator: "USB6" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2059 Type: 0x10 (USB) Internal Designator: "USB7" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2060 Type: 0x10 (USB) Internal Designator: "USB8" External Connector: 0x12 (Access Bus [USB]) Port Connector: #2061 Type: 0x1f (Network Port) Internal Designator: "ENET" External Connector: 0x0b (RJ-45) Port Connector: #2062 Type: 0x1d (Audio Port) Internal Designator: "MIC" External Connector: 0x1f (Mini-jack [headphones]) Port Connector: #2063 Type: 0x1d (Audio Port) Internal Designator: "LINE-OUT" External Connector: 0x1f (Mini-jack [headphones]) Port Connector: #2064 Type: 0x1d (Audio Port) Internal Designator: "LINE-IN" External Connector: 0x1f (Mini-jack [headphones]) Port Connector: #2065 Type: 0x1d (Audio Port) Internal Designator: "HP-OUT" External Connector: 0x1f (Mini-jack [headphones]) System Slot: #2305 Designation: "SLOT1" Type: 0xa5 (Other) Bus Width: 0x0b (Other) Status: 0x03 (Available) Length: 0x04 (Long) Slot ID: 1 Characteristics: 0x0104 (3.3 V, PME#) System Slot: #2306 Designation: "SLOT2" Type: 0xa5 (Other) Bus Width: 0x0d (Other) Status: 0x04 (In Use) Length: 0x04 (Long) Slot ID: 2 Characteristics: 0x0104 (3.3 V, PME#) System Slot: #2307 Designation: "SLOT3" Type: 0xa5 (Other) Bus Width: 0x0b (Other) Status: 0x03 (Available) Length: 0x04 (Long) Slot ID: 3 Characteristics: 0x0104 (3.3 V, PME#) System Slot: #2308 Designation: "SLOT4" Type: 0xa5 (Other) Bus Width: 0x0d (Other) Status: 0x03 (Available) Length: 0x04 (Long) Slot ID: 4 Characteristics: 0x0104 (3.3 V, PME#) System Slot: #2309 Designation: "SLOT5" Type: 0x06 (PCI) Bus Width: 0x05 (32 bit) Status: 0x03 (Available) Length: 0x04 (Long) Slot ID: 5 Characteristics: 0x0106 (5.0 V, 3.3 V, PME#) System Slot: #2310 Designation: "SLOT6" Type: 0x12 (PCI-X) Bus Width: 0x06 (64 bit) Status: 0x03 (Available) Length: 0x04 (Long) Slot ID: 6 Characteristics: 0x0104 (3.3 V, PME#) Inactive Record: #2311 Data 00: 7e 0d 07 09 01 06 05 03 04 07 00 06 01 Inactive Record: #2312 Data 00: 7e 0d 08 09 01 06 05 03 04 08 00 06 01 On Board Devices: #2562 Ethernet: "Intel Pro 1000 MT Network Connection" On Board Devices: #2563 Sound: "Intel(R) High Definition Audio Controller" OEM Strings: #2816 www.dell.com Language Info: #3328 Languages: en|US|iso8859-1 Current: en|US|iso8859-1 Type 15 Record: #3840 Data 00: 0f 21 00 0f 01 08 00 00 10 00 03 01 31 00 00 00 Data 10: 00 10 e0 ff 01 05 02 08 04 10 05 16 00 02 01 01 Data 20: 01 Physical Memory Array: #4096 Use: 0x03 (System memory) Location: 0x03 (Motherboard) Slots: 9 Max. Size: 144 GB ECC: 0x06 (Multi-bit) Memory Device: #4352 Location: "DIMM 1" Manufacturer: "80AD04B380AD" Serial: "1988B7E9" Asset Tag: "01110311" Part Number: "HMT125R7TFR8C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 2 GB Speed: 1333 MHz Memory Device: #4353 Location: "DIMM 2" Manufacturer: "80AD04B380AD" Serial: "1948B7C7" Asset Tag: "01110311" Part Number: "HMT125R7TFR8C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 2 GB Speed: 1333 MHz Memory Device: #4354 Location: "DIMM 3" Manufacturer: "80AD04B380AD" Serial: "1968B7E3" Asset Tag: "01110311" Part Number: "HMT125R7TFR8C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 2 GB Speed: 1333 MHz Memory Device: #4355 Location: "DIMM 4" Manufacturer: "80AD80B380AD" Serial: "5130540C" Asset Tag: "01110361" Part Number: "HMT31GR7BFR4C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 8 GB Speed: 1333 MHz Memory Device: #4356 Location: "DIMM 5" Manufacturer: "80AD80B380AD" Serial: "2B849B29" Asset Tag: "01104161" Part Number: "HMT31GR7BFR4C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 8 GB Speed: 1333 MHz Memory Device: #4357 Location: "DIMM 6" Manufacturer: "FFFFFFFFFFFF" Serial: "FFFFFFFF" Asset Tag: "FFFFFFFF" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x0080 (Synchronous) Data Width: 64 bits (+8 ECC bits) Size: No Memory Installed Memory Device: #4358 Location: "RISER DIMM 1" Manufacturer: "80AD04B380AD" Serial: "121876C8" Asset Tag: "01110311" Part Number: "HMT125R7TFR8C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 2 GB Speed: 1333 MHz Memory Device: #4359 Location: "RISER DIMM 2" Manufacturer: "80AD04B380AD" Serial: "1988B7BF" Asset Tag: "01110311" Part Number: "HMT125R7TFR8C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 2 GB Speed: 1333 MHz Memory Device: #4360 Location: "RISER DIMM 3" Manufacturer: "80AD04B380AD" Serial: "1288768D" Asset Tag: "01110311" Part Number: "HMT125R7TFR8C-H9" Memory Array: #4096 Error Info: No Error Form Factor: 0x09 (DIMM) Type: 0x18 (Other) Type Detail: 0x2000 () Data Width: 64 bits (+8 ECC bits) Size: 2 GB Speed: 1333 MHz Memory Array Mapping: #4864 Memory Array: #4096 Partition Width: 1 Start Address: 0x0000000000000000 End Address: 0x0000000700000000 Hardware Security: #6144 Power-on Password: 0x00 (Disabled) Keyboard Password: 0x02 (Not Implemented) Admin Password: 0x00 (Disabled) Front Panel Reset: 0x02 (Not Implemented) System Power Controls: #6400 Next Power-on: 00:00:00 00/00 Type 26 Record: #6656 Data 00: 1a 14 00 1a 01 67 f8 0c 00 00 4e 00 00 80 c8 00 Data 10: 00 dc 00 00 String 1: "CPU0 Voltage" Type 26 Record: #6657 Data 00: 1a 14 01 1a 01 67 c6 07 00 00 4e 00 00 80 c8 00 Data 10: 01 dc 00 00 String 1: "CPU1 Voltage" Type 26 Record: #6658 Data 00: 1a 14 02 1a 01 67 c6 07 00 00 4e 00 00 80 c8 00 Data 10: 02 dc 00 00 String 1: "+VTT" Inactive Record: #6659 Data 00: 7e 14 03 1a 01 67 f0 19 00 00 ab 00 00 80 c8 00 Data 10: 03 dc 00 00 String 1: "Reserved" Type 26 Record: #6660 Data 00: 1a 14 04 1a 01 67 f0 19 00 00 ab 00 00 80 c8 00 Data 10: 04 dc 00 00 String 1: "+VCC" Type 27 Record: #6928 Data 00: 1b 0c 10 1b ff ff 63 00 00 dd 00 00 Type 27 Record: #6929 Data 00: 1b 0c 11 1b ff ff 63 00 01 dd 00 00 Type 27 Record: #6930 Data 00: 1b 0c 12 1b ff ff 63 00 02 dd 00 00 Type 27 Record: #6931 Data 00: 1b 0c 13 1b ff ff 63 00 03 dd 00 00 Type 27 Record: #6932 Data 00: 1b 0c 14 1b ff ff 63 00 04 dd 00 00 Inactive Record: #6933 Data 00: 7e 0c 15 1b ff ff 63 00 05 dd 00 00 Inactive Record: #6934 Data 00: 7e 0c 16 1b ff ff 63 00 06 dd 00 00 Type 28 Record: #7168 Data 00: 1c 14 00 1c 01 63 f6 04 0a fb e8 03 00 80 00 80 Data 10: 11 dc 00 00 String 1: "CPU0" Type 28 Record: #7169 Data 00: 1c 14 01 1c 01 63 f6 04 0a fb e8 03 00 80 00 80 Data 10: 12 dc 00 00 String 1: "CPU1" Type 32 Record: #8192 Data 00: 20 0b 00 20 00 00 00 00 00 00 00 Type 177 Record: #45312 Data 00: b1 0c 00 b1 02 00 00 00 00 00 00 00 Type 136 Record: #34816 Data 00: 88 06 00 88 5a 5a Type 208 Record: #53248 Data 00: d0 0c 00 d0 01 03 fe 00 6e 02 01 02 String 1: "20101116" String 2: "20101209" Type 209 Record: #53504 Data 00: d1 0c 00 d1 78 03 07 03 04 0f 80 04 Type 210 Record: #53760 Data 00: d2 0c 00 d2 00 00 00 03 06 80 04 04 Inactive Record: #53761 Data 00: 7e 0c 01 d2 00 00 00 03 06 80 04 05 Type 212 Record: #54272 Data 00: d4 2f 00 d4 70 00 71 00 00 10 2d 2e 5c 00 78 bf Data 10: 40 5d 00 78 bf 00 2d 01 21 fe 01 2e 01 21 fe 00 Data 20: 2b 00 5a 00 00 2c 00 5b 00 00 ff ff 00 00 00 Type 220 Record: #56320 Data 00: dc 16 00 dc 20 f4 00 00 10 f4 00 00 00 00 30 f4 Data 10: 40 f4 00 00 00 00 Type 220 Record: #56321 Data 00: dc 16 01 dc 21 f4 00 00 11 f4 00 00 00 00 31 f4 Data 10: 41 f4 00 00 00 00 Type 220 Record: #56322 Data 00: dc 16 02 dc 22 f4 00 00 12 f4 00 00 00 00 32 f4 Data 10: 42 f4 00 00 00 00 Type 220 Record: #56323 Data 00: dc 16 03 dc 23 f4 00 00 13 f4 00 00 00 00 33 f4 Data 10: 43 f4 00 00 00 00 Type 220 Record: #56324 Data 00: dc 16 04 dc 24 f4 00 00 14 f4 00 00 00 00 34 f4 Data 10: 44 f4 00 00 00 00 Type 220 Record: #56337 Data 00: dc 16 11 dc 20 f3 00 00 10 f3 00 00 00 00 30 f3 Data 10: 00 00 00 00 00 00 Type 220 Record: #56338 Data 00: dc 16 12 dc 20 f3 00 00 11 f3 00 00 00 00 31 f3 Data 10: 00 00 00 00 00 00 Type 221 Record: #56576 Data 00: dd 13 00 dd 00 01 00 00 00 10 f5 00 00 00 00 00 Data 10: 00 00 00 Type 221 Record: #56577 Data 00: dd 13 01 dd 00 01 00 00 00 11 f5 00 00 00 00 00 Data 10: 00 00 00 Type 221 Record: #56578 Data 00: dd 13 02 dd 00 01 00 00 00 12 f5 00 00 00 00 00 Data 10: 00 00 00 Type 221 Record: #56579 Data 00: dd 13 03 dd 00 01 00 00 00 13 f5 00 00 00 00 00 Data 10: 00 00 00 Type 221 Record: #56580 Data 00: dd 13 04 dd 00 01 00 00 00 14 f5 00 00 00 00 00 Data 10: 00 00 00 Type 221 Record: #56581 Data 00: dd 13 05 dd 00 01 00 00 00 15 f5 00 00 00 00 00 Data 10: 00 00 00 Type 221 Record: #56582 Data 00: dd 13 06 dd 00 01 00 00 00 16 f5 00 00 00 00 00 Data 10: 00 00 00 Type 222 Record: #56832 Data 00: de 10 00 de c1 01 ff ff 00 00 00 00 00 00 00 01 Config Status: cfg=new, avail=yes, need=no, active=unknown 02: None 00.0: 10107 System [Created at sys.64] Unique ID: rdCR.n_7QNeEnh23 Hardware Class: system Model: "System" Formfactor: "desktop" Driver Info #0: Driver Status: thermal,fan are not active Driver Activation Cmd: "modprobe thermal; modprobe fan" Config Status: cfg=new, avail=yes, need=no, active=unknown 03: None 00.0: 10104 FPU [Created at misc.191] Unique ID: rdCR.EMpH5pjcahD Hardware Class: unknown Model: "FPU" I/O Ports: 0xf0-0xff (rw) Config Status: cfg=new, avail=yes, need=no, active=unknown 04: None 00.0: 0801 DMA controller (8237) [Created at misc.205] Unique ID: rdCR.f5u1ucRm+H9 Hardware Class: unknown Model: "DMA controller" I/O Ports: 0x00-0xcf7 (rw) I/O Ports: 0xc0-0xdf (rw) I/O Ports: 0x80-0x8f (rw) DMA: 4 Config Status: cfg=new, avail=yes, need=no, active=unknown 05: None 00.0: 0800 PIC (8259) [Created at misc.218] Unique ID: rdCR.8uRK7LxiIA2 Hardware Class: unknown Model: "PIC" I/O Ports: 0x20-0x21 (rw) I/O Ports: 0xa0-0xa1 (rw) Config Status: cfg=new, avail=yes, need=no, active=unknown 06: None 00.0: 0900 Keyboard controller [Created at misc.250] Unique ID: rdCR.9N+EecqykME Hardware Class: unknown Model: "Keyboard controller" I/O Port: 0x60 (rw) I/O Port: 0x64 (rw) Config Status: cfg=new, avail=yes, need=no, active=unknown 07: None 00.0: 10400 PS/2 Controller [Created at misc.303] Unique ID: rdCR.DziBbWO85o5 Hardware Class: unknown Model: "PS/2 Controller" Config Status: cfg=new, avail=yes, need=no, active=unknown 32: None 00.0: 10102 Main Memory [Created at memory.74] Unique ID: rdCR.CxwsZFjVASF Hardware Class: memory Model: "Main Memory" Memory Range: 0x00000000-0x6dca6bfff (rw) Memory Size: 28 GB Config Status: cfg=new, avail=yes, need=no, active=unknown 33: PCI 300.0: 0300 VGA compatible controller (VGA) [Created at pci.386] Unique ID: svHJ.viJhU_CLwi1 Parent ID: 3hqH.Cj3gOHl5O68 SysFS ID: /devices/pci0000:00/0000:00:03.0/0000:03:00.0 SysFS BusID: 0000:03:00.0 Hardware Class: graphics card Model: "nVidia GK107GL [Quadro K420]" Vendor: pci 0x10de "nVidia Corporation" Device: pci 0x0ff3 "GK107GL [Quadro K420]" SubVendor: pci 0x10de "nVidia Corporation" SubDevice: pci 0x1162 Revision: 0xa1 Driver: "nouveau" Driver Modules: "nouveau" Memory Range: 0xf6000000-0xf6ffffff (rw,non-prefetchable) Memory Range: 0xe0000000-0xefffffff (ro,non-prefetchable) Memory Range: 0xf0000000-0xf1ffffff (ro,non-prefetchable) I/O Ports: 0xdc80-0xdcff (rw) Memory Range: 0x000c0000-0x000dffff (rw,non-prefetchable,disabled) IRQ: 26 (223244 events) I/O Ports: 0x3c0-0x3df (rw) Module Alias: "pci:v000010DEd00000FF3sv000010DEsd00001162bc03sc00i00" Driver Info #0: Driver Status: nouveau is active Driver Activation Cmd: "modprobe nouveau" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #83 (PCI bridge) 34: PCI 3f06.1: 0600 Host bridge [Created at pci.386] Unique ID: eVYk.asgdt3uk9Y0 SysFS ID: /devices/pci0000:3f/0000:3f:06.1 SysFS BusID: 0000:3f:06.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Address" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db1 "Xeon 5600 Series Integrated Memory Controller Channel 2 Address" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB1sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 35: PCI 3e05.0: 0600 Host bridge [Created at pci.386] Unique ID: 0DpH.x7BuYxpOQ5D SysFS ID: /devices/pci0000:3e/0000:3e:05.0 SysFS BusID: 0000:3e:05.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da8 "Xeon 5600 Series Integrated Memory Controller Channel 1 Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA8sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 36: PCI 1f.2: 0106 SATA controller (AHCI 1.0) [Created at pci.386] Unique ID: w7Y8.sFmlmU+RkFF SysFS ID: /devices/pci0000:00/0000:00:1f.2 SysFS BusID: 0000:00:1f.2 Hardware Class: storage Model: "Intel 82801JI (ICH10 Family) SATA AHCI Controller" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a22 "82801JI (ICH10 Family) SATA AHCI Controller" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "ahci" Driver Modules: "ahci" I/O Ports: 0x1e00-0x1e07 (rw) I/O Ports: 0x1e10-0x1e13 (rw) I/O Ports: 0x1e20-0x1e27 (rw) I/O Ports: 0x1e30-0x1e33 (rw) I/O Ports: 0x1ec0-0x1edf (rw) Memory Range: 0xf2000000-0xf20007ff (rw,non-prefetchable) IRQ: 24 (no events) Module Alias: "pci:v00008086d00003A22sv00001028sd0000026Ebc01sc06i01" Driver Info #0: Driver Status: ahci is active Driver Activation Cmd: "modprobe ahci" Config Status: cfg=new, avail=yes, need=no, active=unknown 37: PCI 1c.0: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: z8Q3.MVcpzsxLb84 SysFS ID: /devices/pci0000:00/0000:00:1c.0 SysFS BusID: 0000:00:1c.0 Hardware Class: bridge Model: "Intel 82801JI (ICH10 Family) PCI Express Root Port 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a40 "82801JI (ICH10 Family) PCI Express Root Port 1" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "pcieport" IRQ: 16 (no events) Module Alias: "pci:v00008086d00003A40sv00001028sd0000026Ebc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 38: PCI 3f02.5: 0600 Host bridge [Created at pci.386] Unique ID: oMJC.8GFfQAEnPE7 SysFS ID: /devices/pci0000:3f/0000:3f:02.5 SysFS BusID: 0000:3f:02.5 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Physical 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d95 "Xeon 5600 Series QPI Physical 1" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D95sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 39: PCI 3f04.2: 0600 Host bridge [Created at pci.386] Unique ID: Mcxd.reWOgW6AGoA SysFS ID: /devices/pci0000:3f/0000:3f:04.2 SysFS BusID: 0000:3f:04.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Rank" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da2 "Xeon 5600 Series Integrated Memory Controller Channel 0 Rank" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA2sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 40: PCI 3e06.3: 0600 Host bridge [Created at pci.386] Unique ID: hIKG.chZ7rC79DJ1 SysFS ID: /devices/pci0000:3e/0000:3e:06.3 SysFS BusID: 0000:3e:06.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db3 "Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB3sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 41: PCI 3e03.1: 0600 Host bridge [Created at pci.386] Unique ID: kJCB.Cw0fLO2qWL7 SysFS ID: /devices/pci0000:3e/0000:3e:03.1 SysFS BusID: 0000:3e:03.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Target Address Decoder" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d99 "Xeon 5600 Series Integrated Memory Controller Target Address Decoder" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D99sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 42: PCI 1a.1: 0c03 USB Controller (UHCI) [Created at pci.386] Unique ID: gFpy.ptxbSgs8K73 SysFS ID: /devices/pci0000:00/0000:00:1a.1 SysFS BusID: 0000:00:1a.1 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB UHCI Controller #5" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a38 "82801JI (ICH10 Family) USB UHCI Controller #5" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "uhci_hcd" Driver Modules: "uhci_hcd" I/O Ports: 0x1f00-0x1f1f (rw) IRQ: 17 (74687 events) Module Alias: "pci:v00008086d00003A38sv00001028sd0000026Ebc0Csc03i00" Driver Info #0: Driver Status: uhci-hcd is active Driver Activation Cmd: "modprobe uhci-hcd" Config Status: cfg=new, avail=yes, need=no, active=unknown 43: PCI 1f.0: 0601 ISA bridge [Created at pci.386] Unique ID: BUZT.9TeDWDn7MX1 SysFS ID: /devices/pci0000:00/0000:00:1f.0 SysFS BusID: 0000:00:1f.0 Hardware Class: bridge Model: "Intel 82801JIR (ICH10R) LPC Interface Controller" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a16 "82801JIR (ICH10R) LPC Interface Controller" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "lpc_ich" Driver Modules: "lpc_ich" Module Alias: "pci:v00008086d00003A16sv00001028sd0000026Ebc06sc01i00" Driver Info #0: Driver Status: lpc_ich is active Driver Activation Cmd: "modprobe lpc_ich" Config Status: cfg=new, avail=yes, need=no, active=unknown 44: PCI 3f02.3: 0600 Host bridge [Created at pci.386] Unique ID: 3jKX.6RM9T1+MMT6 SysFS ID: /devices/pci0000:3f/0000:3f:02.3 SysFS BusID: 0000:3f:02.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Mirror Port Link 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d93 "Xeon 5600 Series Mirror Port Link 1" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D93sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 45: PCI 3f04.0: 0600 Host bridge [Created at pci.386] Unique ID: dyyy.ppduiNtlC1A SysFS ID: /devices/pci0000:3f/0000:3f:04.0 SysFS BusID: 0000:3f:04.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da0 "Xeon 5600 Series Integrated Memory Controller Channel 0 Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA0sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 46: PCI 3e06.1: 0600 Host bridge [Created at pci.386] Unique ID: zeLb.asgdt3uk9Y0 SysFS ID: /devices/pci0000:3e/0000:3e:06.1 SysFS BusID: 0000:3e:06.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Address" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db1 "Xeon 5600 Series Integrated Memory Controller Channel 2 Address" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB1sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 47: PCI 01.0: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: vSkL.AuAAR8WhKL7 SysFS ID: /devices/pci0000:00/0000:00:01.0 SysFS BusID: 0000:00:01.0 Hardware Class: bridge Model: "Intel 5520/5500/X58 I/O Hub PCI Express Root Port 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3408 "5520/5500/X58 I/O Hub PCI Express Root Port 1" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x22 Driver: "pcieport" IRQ: 16 (no events) Module Alias: "pci:v00008086d00003408sv00001028sd0000026Ebc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 48: PCI 1d.1: 0c03 USB Controller (UHCI) [Created at pci.386] Unique ID: vayM.Ge6M01ApkO3 SysFS ID: /devices/pci0000:00/0000:00:1d.1 SysFS BusID: 0000:00:1d.1 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB UHCI Controller #2" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a35 "82801JI (ICH10 Family) USB UHCI Controller #2" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "uhci_hcd" Driver Modules: "uhci_hcd" I/O Ports: 0x1f60-0x1f7f (rw) IRQ: 17 (74687 events) Module Alias: "pci:v00008086d00003A35sv00001028sd0000026Ebc0Csc03i00" Driver Info #0: Driver Status: uhci-hcd is active Driver Activation Cmd: "modprobe uhci-hcd" Config Status: cfg=new, avail=yes, need=no, active=unknown 49: PCI 3e02.5: 0600 Host bridge [Created at pci.386] Unique ID: 7W63.8GFfQAEnPE7 SysFS ID: /devices/pci0000:3e/0000:3e:02.5 SysFS BusID: 0000:3e:02.5 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Physical 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d95 "Xeon 5600 Series QPI Physical 1" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D95sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 50: PCI 3f05.3: 0600 Host bridge [Created at pci.386] Unique ID: I2Ux.UN08+eAW+EE SysFS ID: /devices/pci0000:3f/0000:3f:05.3 SysFS BusID: 0000:3f:05.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2dab "Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DABsv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 51: PCI 3f02.1: 0600 Host bridge [Created at pci.386] Unique ID: L3Ms.4cTfVulyIi5 SysFS ID: /devices/pci0000:3f/0000:3f:02.1 SysFS BusID: 0000:3f:02.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Physical 0" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d91 "Xeon 5600 Series QPI Physical 0" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D91sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 52: PCI 3e04.2: 0600 Host bridge [Created at pci.386] Unique ID: glkU.reWOgW6AGoA SysFS ID: /devices/pci0000:3e/0000:3e:04.2 SysFS BusID: 0000:3e:04.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Rank" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da2 "Xeon 5600 Series Integrated Memory Controller Channel 0 Rank" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA2sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 53: PCI 3f03.4: 0600 Host bridge [Created at pci.386] Unique ID: 09tq.l9sun5Px5V8 SysFS ID: /devices/pci0000:3f/0000:3f:03.4 SysFS BusID: 0000:3f:03.4 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Test Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d9c "Xeon 5600 Series Integrated Memory Controller Test Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D9Csv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 54: PCI 3e02.3: 0600 Host bridge [Created at pci.386] Unique ID: Os7O.6RM9T1+MMT6 SysFS ID: /devices/pci0000:3e/0000:3e:02.3 SysFS BusID: 0000:3e:02.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Mirror Port Link 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d93 "Xeon 5600 Series Mirror Port Link 1" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D93sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 55: PCI 1c.5: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: HnsE.We2JnZ7Psz7 SysFS ID: /devices/pci0000:00/0000:00:1c.5 SysFS BusID: 0000:00:1c.5 Hardware Class: bridge Model: "Intel 82801JI (ICH10 Family) PCI Express Root Port 6" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a4a "82801JI (ICH10 Family) PCI Express Root Port 6" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "pcieport" IRQ: 17 (74687 events) Module Alias: "pci:v00008086d00003A4Asv00001028sd0000026Ebc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 56: PCI 2009.0: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: 6MGH.ICk9HiSKYPA SysFS ID: /devices/pci0000:20/0000:20:09.0 SysFS BusID: 0000:20:09.0 Hardware Class: bridge Model: "Intel 7500/5520/5500/X58 I/O Hub PCI Express Root Port 9" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3410 "7500/5520/5500/X58 I/O Hub PCI Express Root Port 9" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x22 Driver: "pcieport" IRQ: 16 (no events) Module Alias: "pci:v00008086d00003410sv00001028sd0000026Ebc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 57: PCI 3f05.1: 0600 Host bridge [Created at pci.386] Unique ID: ZOVG.SY7e1Wx5yTD SysFS ID: /devices/pci0000:3f/0000:3f:05.1 SysFS BusID: 0000:3f:05.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Address" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da9 "Xeon 5600 Series Integrated Memory Controller Channel 1 Address" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA9sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 58: PCI 100.0: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: VCu0.3TKK2Y+NmvF Parent ID: vSkL.AuAAR8WhKL7 SysFS ID: /devices/pci0000:00/0000:00:01.0/0000:01:00.0 SysFS BusID: 0000:01:00.0 Hardware Class: bridge Model: "Pericom PCI Express to PCI-XPI7C9X130 PCI-X Bridge" Vendor: pci 0x12d8 "Pericom Semiconductor" Device: pci 0xe130 "PCI Express to PCI-XPI7C9X130 PCI-X Bridge" Revision: 0x04 IRQ: 11 (no events) Module Alias: "pci:v000012D8d0000E130sv00000000sd00000000bc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #47 (PCI bridge) 59: PCI 3e04.0: 0600 Host bridge [Created at pci.386] Unique ID: y5mp.ppduiNtlC1A SysFS ID: /devices/pci0000:3e/0000:3e:04.0 SysFS BusID: 0000:3e:04.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da0 "Xeon 5600 Series Integrated Memory Controller Channel 0 Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA0sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 60: PCI 1b.0: 0403 Audio device [Created at pci.386] Unique ID: u1Nb.nUAnDvPOys3 SysFS ID: /devices/pci0000:00/0000:00:1b.0 SysFS BusID: 0000:00:1b.0 Hardware Class: sound Model: "Intel 82801JI (ICH10 Family) HD Audio Controller" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a3e "82801JI (ICH10 Family) HD Audio Controller" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "snd_hda_intel" Driver Modules: "snd_hda_intel" Memory Range: 0xf7ffc000-0xf7ffffff (rw,non-prefetchable) IRQ: 27 (no events) Module Alias: "pci:v00008086d00003A3Esv00001028sd0000026Ebc04sc03i00" Driver Info #0: Driver Status: snd_hda_intel is active Driver Activation Cmd: "modprobe snd_hda_intel" Config Status: cfg=new, avail=yes, need=no, active=unknown 61: PCI 07.0: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: M71A.GNrfJZDwUe9 SysFS ID: /devices/pci0000:00/0000:00:07.0 SysFS BusID: 0000:00:07.0 Hardware Class: bridge Model: "Intel 5520/5500/X58 I/O Hub PCI Express Root Port 7" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x340e "5520/5500/X58 I/O Hub PCI Express Root Port 7" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x22 Driver: "pcieport" IRQ: 16 (no events) Module Alias: "pci:v00008086d0000340Esv00001028sd0000026Ebc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 62: PCI 14.1: 0800 PIC (8259) [Created at pci.386] Unique ID: Eu86.0KLZ2tODZDF SysFS ID: /devices/pci0000:00/0000:00:14.1 SysFS BusID: 0000:00:14.1 Hardware Class: unknown Model: "Intel 7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3422 "7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers" SubVendor: pci 0x0028 SubDevice: pci 0x006e Revision: 0x22 Module Alias: "pci:v00008086d00003422sv00000028sd0000006Ebc08sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 63: PCI 3f03.2: 0600 Host bridge [Created at pci.386] Unique ID: HVu9.jKzOqy9X2k7 SysFS ID: /devices/pci0000:3f/0000:3f:03.2 SysFS BusID: 0000:3f:03.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller RAS Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d9a "Xeon 5600 Series Integrated Memory Controller RAS Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D9Asv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 64: PCI 3e05.3: 0600 Host bridge [Created at pci.386] Unique ID: dBHo.UN08+eAW+EE SysFS ID: /devices/pci0000:3e/0000:3e:05.3 SysFS BusID: 0000:3e:05.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2dab "Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DABsv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 65: PCI 2014.2: 0800 PIC (8259) [Created at pci.386] Unique ID: gDn6.9J6y++4Lxf0 SysFS ID: /devices/pci0000:20/0000:20:14.2 SysFS BusID: 0000:20:14.2 Hardware Class: unknown Model: "Intel 7500/5520/5500/X58 I/O Hub Control Status and RAS Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3423 "7500/5520/5500/X58 I/O Hub Control Status and RAS Registers" Revision: 0x22 Module Alias: "pci:v00008086d00003423sv00000000sd00000000bc08sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 66: PCI 3f00.0: 0600 Host bridge [Created at pci.386] Unique ID: JWm4.QYngGuTyDy3 SysFS ID: /devices/pci0000:3f/0000:3f:00.0 SysFS BusID: 0000:3f:00.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series QuickPath Architecture Generic Non-core Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2c70 "Xeon 5600 Series QuickPath Architecture Generic Non-core Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002C70sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 67: PCI 3e02.1: 0600 Host bridge [Created at pci.386] Unique ID: fC9j.4cTfVulyIi5 SysFS ID: /devices/pci0000:3e/0000:3e:02.1 SysFS BusID: 0000:3e:02.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Physical 0" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d91 "Xeon 5600 Series QPI Physical 0" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D91sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 68: PCI 1e.0: 0604 PCI bridge (Subtractive decode) [Created at pci.386] Unique ID: 6NW+.lAzGZkSOq4B SysFS ID: /devices/pci0000:00/0000:00:1e.0 SysFS BusID: 0000:00:1e.0 Hardware Class: bridge Model: "Intel 82801 PCI Bridge" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x244e "82801 PCI Bridge" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x90 Module Alias: "pci:v00008086d0000244Esv00001028sd0000026Ebc06sc04i01" Config Status: cfg=new, avail=yes, need=no, active=unknown 69: PCI 3e03.4: 0600 Host bridge [Created at pci.386] Unique ID: KIgh.l9sun5Px5V8 SysFS ID: /devices/pci0000:3e/0000:3e:03.4 SysFS BusID: 0000:3e:03.4 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Test Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d9c "Xeon 5600 Series Integrated Memory Controller Test Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D9Csv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 70: PCI 300.1: 0403 Audio device [Created at pci.386] Unique ID: kEn8.Sylf75_c+U2 Parent ID: 3hqH.Cj3gOHl5O68 SysFS ID: /devices/pci0000:00/0000:00:03.0/0000:03:00.1 SysFS BusID: 0000:03:00.1 Hardware Class: sound Model: "nVidia GK107 HDMI Audio Controller" Vendor: pci 0x10de "nVidia Corporation" Device: pci 0x0e1b "GK107 HDMI Audio Controller" SubVendor: pci 0x10de "nVidia Corporation" SubDevice: pci 0x1162 Revision: 0xa1 Driver: "snd_hda_intel" Driver Modules: "snd_hda_intel" Memory Range: 0xf7dfc000-0xf7dfffff (rw,non-prefetchable) IRQ: 28 (787 events) Module Alias: "pci:v000010DEd00000E1Bsv000010DEsd00001162bc04sc03i00" Driver Info #0: Driver Status: snd_hda_intel is active Driver Activation Cmd: "modprobe snd_hda_intel" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #83 (PCI bridge) 71: PCI 3f06.2: 0600 Host bridge [Created at pci.386] Unique ID: Wq1a.5HdNMe+Rhw0 SysFS ID: /devices/pci0000:3f/0000:3f:06.2 SysFS BusID: 0000:3f:06.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Rank" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db2 "Xeon 5600 Series Integrated Memory Controller Channel 2 Rank" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB2sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 72: PCI 3f03.0: 0600 Host bridge [Created at pci.386] Unique ID: YrvU.hV4vspw6+y6 SysFS ID: /devices/pci0000:3f/0000:3f:03.0 SysFS BusID: 0000:3f:03.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d98 "Xeon 5600 Series Integrated Memory Controller Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D98sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 73: PCI 3e05.1: 0600 Host bridge [Created at pci.386] Unique ID: uXI7.SY7e1Wx5yTD SysFS ID: /devices/pci0000:3e/0000:3e:05.1 SysFS BusID: 0000:3e:05.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Address" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da9 "Xeon 5600 Series Integrated Memory Controller Channel 1 Address" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA9sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 74: PCI 1f.3: 0c05 SMBus [Created at pci.386] Unique ID: nS1_.j_G18kaOWjF SysFS ID: /devices/pci0000:00/0000:00:1f.3 SysFS BusID: 0000:00:1f.3 Hardware Class: unknown Model: "Intel 82801JI (ICH10 Family) SMBus Controller" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a30 "82801JI (ICH10 Family) SMBus Controller" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "i801_smbus" Driver Modules: "i2c_i801" Memory Range: 0xf7ffb000-0xf7ffb0ff (rw,non-prefetchable) I/O Ports: 0xece0-0xecff (rw) IRQ: 20 (no events) Module Alias: "pci:v00008086d00003A30sv00001028sd0000026Ebc0Csc05i00" Driver Info #0: Driver Status: i2c_i801 is active Driver Activation Cmd: "modprobe i2c_i801" Config Status: cfg=new, avail=yes, need=no, active=unknown 75: PCI 00.0: 0600 Host bridge [Created at pci.386] Unique ID: qLht.4DXqQuF3T5A SysFS ID: /devices/pci0000:00/0000:00:00.0 SysFS BusID: 0000:00:00.0 Hardware Class: bridge Model: "Intel 5520 I/O Hub to ESI Port" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3406 "5520 I/O Hub to ESI Port" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x22 IRQ: 11 (no events) Module Alias: "pci:v00008086d00003406sv00001028sd0000026Ebc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 76: PCI 2014.0: 0800 PIC (8259) [Created at pci.386] Unique ID: yZoR.qsUBIHO5kt4 SysFS ID: /devices/pci0000:20/0000:20:14.0 SysFS BusID: 0000:20:14.0 Hardware Class: unknown Model: "Intel 7500/5520/5500/X58 I/O Hub System Management Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x342e "7500/5520/5500/X58 I/O Hub System Management Registers" Revision: 0x22 Module Alias: "pci:v00008086d0000342Esv00000000sd00000000bc08sc00i00" Driver Info #0: Driver Status: i7core_edac is active Driver Activation Cmd: "modprobe i7core_edac" Config Status: cfg=new, avail=yes, need=no, active=unknown 77: PCI 3f04.3: 0600 Host bridge [Created at pci.386] Unique ID: DxQT.M3T895EtnAB SysFS ID: /devices/pci0000:3f/0000:3f:04.3 SysFS BusID: 0000:3f:04.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da3 "Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA3sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 78: PCI 3e03.2: 0600 Host bridge [Created at pci.386] Unique ID: beh0.jKzOqy9X2k7 SysFS ID: /devices/pci0000:3e/0000:3e:03.2 SysFS BusID: 0000:3e:03.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller RAS Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d9a "Xeon 5600 Series Integrated Memory Controller RAS Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D9Asv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 79: PCI 600.0: 0200 Ethernet controller [Created at pci.386] Unique ID: rBUF.DsYAG7C71z9 Parent ID: HnsE.We2JnZ7Psz7 SysFS ID: /devices/pci0000:00/0000:00:1c.5/0000:06:00.0 SysFS BusID: 0000:06:00.0 Hardware Class: network Model: "Broadcom NetXtreme BCM5761 Gigabit Ethernet PCIe" Vendor: pci 0x14e4 "Broadcom" Device: pci 0x1681 "NetXtreme BCM5761 Gigabit Ethernet PCIe" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x10 Driver: "tg3" Driver Modules: "tg3" Device File: eth0 Memory Range: 0xf5de0000-0xf5deffff (rw,non-prefetchable) Memory Range: 0xf5df0000-0xf5dfffff (rw,non-prefetchable) IRQ: 29 (126054 events) HW Address: b8:ac:6f:4a:e1:34 Permanent HW Address: b8:ac:6f:4a:e1:34 Link detected: yes Module Alias: "pci:v000014E4d00001681sv00001028sd0000026Ebc02sc00i00" Driver Info #0: Driver Status: tg3 is active Driver Activation Cmd: "modprobe tg3" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #55 (PCI bridge) 80: PCI 3e00.0: 0600 Host bridge [Created at pci.386] Unique ID: efZx.QYngGuTyDy3 SysFS ID: /devices/pci0000:3e/0000:3e:00.0 SysFS BusID: 0000:3e:00.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series QuickPath Architecture Generic Non-core Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2c70 "Xeon 5600 Series QuickPath Architecture Generic Non-core Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002C70sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 81: PCI 1a.2: 0c03 USB Controller (UHCI) [Created at pci.386] Unique ID: XaIo.KIuLxE_rrV3 SysFS ID: /devices/pci0000:00/0000:00:1a.2 SysFS BusID: 0000:00:1a.2 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB UHCI Controller #6" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a39 "82801JI (ICH10 Family) USB UHCI Controller #6" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "uhci_hcd" Driver Modules: "uhci_hcd" I/O Ports: 0x1c00-0x1c1f (rw) IRQ: 22 (62861 events) Module Alias: "pci:v00008086d00003A39sv00001028sd0000026Ebc0Csc03i00" Driver Info #0: Driver Status: uhci-hcd is active Driver Activation Cmd: "modprobe uhci-hcd" Config Status: cfg=new, avail=yes, need=no, active=unknown 82: PCI 3f06.0: 0600 Host bridge [Created at pci.386] Unique ID: nA3v.3SktOVm1e90 SysFS ID: /devices/pci0000:3f/0000:3f:06.0 SysFS BusID: 0000:3f:06.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db0 "Xeon 5600 Series Integrated Memory Controller Channel 2 Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB0sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 83: PCI 03.0: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: 3hqH.Cj3gOHl5O68 SysFS ID: /devices/pci0000:00/0000:00:03.0 SysFS BusID: 0000:00:03.0 Hardware Class: bridge Model: "Intel 5520/5500/X58 I/O Hub PCI Express Root Port 3" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x340a "5520/5500/X58 I/O Hub PCI Express Root Port 3" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x22 Driver: "pcieport" IRQ: 16 (no events) Module Alias: "pci:v00008086d0000340Asv00001028sd0000026Ebc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 84: PCI 3f02.4: 0600 Host bridge [Created at pci.386] Unique ID: x1qM.drIvxb64ur6 SysFS ID: /devices/pci0000:3f/0000:3f:02.4 SysFS BusID: 0000:3f:02.4 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Link 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d94 "Xeon 5600 Series QPI Link 1" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D94sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 85: PCI 3f04.1: 0600 Host bridge [Created at pci.386] Unique ID: UHSo.KEaeBy_SkPA SysFS ID: /devices/pci0000:3f/0000:3f:04.1 SysFS BusID: 0000:3f:04.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Address" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da1 "Xeon 5600 Series Integrated Memory Controller Channel 0 Address" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA1sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 86: PCI 3e06.2: 0600 Host bridge [Created at pci.386] Unique ID: qzqQ.5HdNMe+Rhw0 SysFS ID: /devices/pci0000:3e/0000:3e:06.2 SysFS BusID: 0000:3e:06.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Rank" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db2 "Xeon 5600 Series Integrated Memory Controller Channel 2 Rank" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB2sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 87: PCI 3e03.0: 0600 Host bridge [Created at pci.386] Unique ID: t_iL.hV4vspw6+y6 SysFS ID: /devices/pci0000:3e/0000:3e:03.0 SysFS BusID: 0000:3e:03.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d98 "Xeon 5600 Series Integrated Memory Controller Registers" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D98sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 88: PCI 1d.2: 0c03 USB Controller (UHCI) [Created at pci.386] Unique ID: mvRC.n236VbHWGn3 SysFS ID: /devices/pci0000:00/0000:00:1d.2 SysFS BusID: 0000:00:1d.2 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB UHCI Controller #3" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a36 "82801JI (ICH10 Family) USB UHCI Controller #3" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "uhci_hcd" Driver Modules: "uhci_hcd" I/O Ports: 0x1f40-0x1f5f (rw) IRQ: 18 (no events) Module Alias: "pci:v00008086d00003A36sv00001028sd0000026Ebc0Csc03i00" Driver Info #0: Driver Status: uhci-hcd is active Driver Activation Cmd: "modprobe uhci-hcd" Config Status: cfg=new, avail=yes, need=no, active=unknown 89: PCI 1a.0: 0c03 USB Controller (UHCI) [Created at pci.386] Unique ID: pwJ7.IT+rz5lRok2 SysFS ID: /devices/pci0000:00/0000:00:1a.0 SysFS BusID: 0000:00:1a.0 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB UHCI Controller #4" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a37 "82801JI (ICH10 Family) USB UHCI Controller #4" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "uhci_hcd" Driver Modules: "uhci_hcd" I/O Ports: 0x1f20-0x1f3f (rw) IRQ: 16 (no events) Module Alias: "pci:v00008086d00003A37sv00001028sd0000026Ebc0Csc03i00" Driver Info #0: Driver Status: uhci-hcd is active Driver Activation Cmd: "modprobe uhci-hcd" Config Status: cfg=new, avail=yes, need=no, active=unknown 90: PCI 3f02.2: 0600 Host bridge [Created at pci.386] Unique ID: COrh.b0QP_Stfq46 SysFS ID: /devices/pci0000:3f/0000:3f:02.2 SysFS BusID: 0000:3f:02.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Mirror Port Link 0" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d92 "Xeon 5600 Series Mirror Port Link 0" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D92sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 91: PCI 3e04.3: 0600 Host bridge [Created at pci.386] Unique ID: Y4EK.M3T895EtnAB SysFS ID: /devices/pci0000:3e/0000:3e:04.3 SysFS BusID: 0000:3e:04.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da3 "Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA3sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 92: PCI 3e06.0: 0600 Host bridge [Created at pci.386] Unique ID: 5Ksl.3SktOVm1e90 SysFS ID: /devices/pci0000:3e/0000:3e:06.0 SysFS BusID: 0000:3e:06.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db0 "Xeon 5600 Series Integrated Memory Controller Channel 2 Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB0sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 93: PCI 1d.0: 0c03 USB Controller (UHCI) [Created at pci.386] Unique ID: 1GTX.lDAcXS26D03 SysFS ID: /devices/pci0000:00/0000:00:1d.0 SysFS BusID: 0000:00:1d.0 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB UHCI Controller #1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a34 "82801JI (ICH10 Family) USB UHCI Controller #1" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "uhci_hcd" Driver Modules: "uhci_hcd" I/O Ports: 0x1f80-0x1f9f (rw) IRQ: 23 (no events) Module Alias: "pci:v00008086d00003A34sv00001028sd0000026Ebc0Csc03i00" Driver Info #0: Driver Status: uhci-hcd is active Driver Activation Cmd: "modprobe uhci-hcd" Config Status: cfg=new, avail=yes, need=no, active=unknown 94: PCI 3e02.4: 0600 Host bridge [Created at pci.386] Unique ID: FBdD.drIvxb64ur6 SysFS ID: /devices/pci0000:3e/0000:3e:02.4 SysFS BusID: 0000:3e:02.4 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Link 1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d94 "Xeon 5600 Series QPI Link 1" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D94sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 95: PCI 3f05.2: 0600 Host bridge [Created at pci.386] Unique ID: Rj_5.zy3OW43pTsD SysFS ID: /devices/pci0000:3f/0000:3f:05.2 SysFS BusID: 0000:3f:05.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Rank" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2daa "Xeon 5600 Series Integrated Memory Controller Channel 1 Rank" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DAAsv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 96: PCI 3f02.0: 0600 Host bridge [Created at pci.386] Unique ID: Tks0.ZBXv0KeFnJ5 SysFS ID: /devices/pci0000:3f/0000:3f:02.0 SysFS BusID: 0000:3f:02.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Link 0" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d90 "Xeon 5600 Series QPI Link 0" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D90sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 97: PCI 3e04.1: 0600 Host bridge [Created at pci.386] Unique ID: pQFf.KEaeBy_SkPA SysFS ID: /devices/pci0000:3e/0000:3e:04.1 SysFS BusID: 0000:3e:04.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 0 Address" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da1 "Xeon 5600 Series Integrated Memory Controller Channel 0 Address" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA1sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 98: PCI 1a.7: 0c03 USB Controller (EHCI) [Created at pci.386] Unique ID: sClz.NYJnf0qjyU9 SysFS ID: /devices/pci0000:00/0000:00:1a.7 SysFS BusID: 0000:00:1a.7 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB2 EHCI Controller #2" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a3c "82801JI (ICH10 Family) USB2 EHCI Controller #2" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "ehci-pci" Driver Modules: "ehci_pci" Memory Range: 0xf7ffa000-0xf7ffa3ff (rw,non-prefetchable) IRQ: 22 (62861 events) Module Alias: "pci:v00008086d00003A3Csv00001028sd0000026Ebc0Csc03i20" Driver Info #0: Driver Status: ehci-hcd is active Driver Activation Cmd: "modprobe ehci-hcd" Driver Info #1: Driver Status: ehci_pci is active Driver Activation Cmd: "modprobe ehci_pci" Config Status: cfg=new, avail=yes, need=no, active=unknown 99: PCI 14.2: 0800 PIC (8259) [Created at pci.386] Unique ID: 5Dex.XkHJXRWw4cF SysFS ID: /devices/pci0000:00/0000:00:14.2 SysFS BusID: 0000:00:14.2 Hardware Class: unknown Model: "Intel 7500/5520/5500/X58 I/O Hub Control Status and RAS Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3423 "7500/5520/5500/X58 I/O Hub Control Status and RAS Registers" SubVendor: pci 0x0028 SubDevice: pci 0x006e Revision: 0x22 Module Alias: "pci:v00008086d00003423sv00000028sd0000006Ebc08sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 100: PCI 3f00.1: 0600 Host bridge [Created at pci.386] Unique ID: BrFw.qzMgpmsgtZF SysFS ID: /devices/pci0000:3f/0000:3f:00.1 SysFS BusID: 0000:3f:00.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series QuickPath Architecture System Address Decoder" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d81 "Xeon 5600 Series QuickPath Architecture System Address Decoder" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D81sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 101: PCI 3e02.2: 0600 Host bridge [Created at pci.386] Unique ID: WXeY.b0QP_Stfq46 SysFS ID: /devices/pci0000:3e/0000:3e:02.2 SysFS BusID: 0000:3e:02.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Mirror Port Link 0" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d92 "Xeon 5600 Series Mirror Port Link 0" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D92sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 102: PCI 3f05.0: 0600 Host bridge [Created at pci.386] Unique ID: i30R.x7BuYxpOQ5D SysFS ID: /devices/pci0000:3f/0000:3f:05.0 SysFS BusID: 0000:3f:05.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2da8 "Xeon 5600 Series Integrated Memory Controller Channel 1 Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DA8sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 103: PCI 1d.7: 0c03 USB Controller (EHCI) [Created at pci.386] Unique ID: 5YuN.LjQHitaJvj8 SysFS ID: /devices/pci0000:00/0000:00:1d.7 SysFS BusID: 0000:00:1d.7 Hardware Class: usb controller Model: "Intel 82801JI (ICH10 Family) USB2 EHCI Controller #1" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3a3a "82801JI (ICH10 Family) USB2 EHCI Controller #1" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Driver: "ehci-pci" Driver Modules: "ehci_pci" Memory Range: 0xff980000-0xff9803ff (rw,non-prefetchable) IRQ: 23 (no events) Module Alias: "pci:v00008086d00003A3Asv00001028sd0000026Ebc0Csc03i20" Driver Info #0: Driver Status: ehci-hcd is active Driver Activation Cmd: "modprobe ehci-hcd" Driver Info #1: Driver Status: ehci_pci is active Driver Activation Cmd: "modprobe ehci_pci" Config Status: cfg=new, avail=yes, need=no, active=unknown 104: PCI 2007.0: 0604 PCI bridge (Normal decode) [Created at pci.386] Unique ID: y7AL.GNrfJZDwUe9 SysFS ID: /devices/pci0000:20/0000:20:07.0 SysFS BusID: 0000:20:07.0 Hardware Class: bridge Model: "Intel 5520/5500/X58 I/O Hub PCI Express Root Port 7" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x340e "5520/5500/X58 I/O Hub PCI Express Root Port 7" SubVendor: pci 0x1028 "Dell" SubDevice: pci 0x026e Revision: 0x22 Driver: "pcieport" IRQ: 16 (no events) Module Alias: "pci:v00008086d0000340Esv00001028sd0000026Ebc06sc04i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 105: PCI 3f06.3: 0600 Host bridge [Created at pci.386] Unique ID: N9XP.chZ7rC79DJ1 SysFS ID: /devices/pci0000:3f/0000:3f:06.3 SysFS BusID: 0000:3f:06.3 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2db3 "Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DB3sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 106: PCI 14.0: 0800 PIC (8259) [Created at pci.386] Unique ID: MZfG.CIgYpipgtp3 SysFS ID: /devices/pci0000:00/0000:00:14.0 SysFS BusID: 0000:00:14.0 Hardware Class: unknown Model: "Intel 7500/5520/5500/X58 I/O Hub System Management Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x342e "7500/5520/5500/X58 I/O Hub System Management Registers" SubVendor: pci 0x0028 SubDevice: pci 0x006e Revision: 0x22 Driver: "i7core_edac" Driver Modules: "i7core_edac" Module Alias: "pci:v00008086d0000342Esv00000028sd0000006Ebc08sc00i00" Driver Info #0: Driver Status: i7core_edac is active Driver Activation Cmd: "modprobe i7core_edac" Config Status: cfg=new, avail=yes, need=no, active=unknown 107: PCI 3f03.1: 0600 Host bridge [Created at pci.386] Unique ID: PAPK.Cw0fLO2qWL7 SysFS ID: /devices/pci0000:3f/0000:3f:03.1 SysFS BusID: 0000:3f:03.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Target Address Decoder" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d99 "Xeon 5600 Series Integrated Memory Controller Target Address Decoder" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D99sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 108: PCI 3e05.2: 0600 Host bridge [Created at pci.386] Unique ID: lsny.zy3OW43pTsD SysFS ID: /devices/pci0000:3e/0000:3e:05.2 SysFS BusID: 0000:3e:05.2 Hardware Class: bridge Model: "Intel Xeon 5600 Series Integrated Memory Controller Channel 1 Rank" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2daa "Xeon 5600 Series Integrated Memory Controller Channel 1 Rank" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002DAAsv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 109: PCI 2014.1: 0800 PIC (8259) [Created at pci.386] Unique ID: puHH.eu9CXRzdPH0 SysFS ID: /devices/pci0000:20/0000:20:14.1 SysFS BusID: 0000:20:14.1 Hardware Class: unknown Model: "Intel 7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x3422 "7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers" Revision: 0x22 Module Alias: "pci:v00008086d00003422sv00000000sd00000000bc08sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 110: PCI 3e02.0: 0600 Host bridge [Created at pci.386] Unique ID: otft.ZBXv0KeFnJ5 SysFS ID: /devices/pci0000:3e/0000:3e:02.0 SysFS BusID: 0000:3e:02.0 Hardware Class: bridge Model: "Intel Xeon 5600 Series QPI Link 0" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d90 "Xeon 5600 Series QPI Link 0" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D90sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 111: PCI 3e00.1: 0600 Host bridge [Created at pci.386] Unique ID: V_2n.qzMgpmsgtZF SysFS ID: /devices/pci0000:3e/0000:3e:00.1 SysFS BusID: 0000:3e:00.1 Hardware Class: bridge Model: "Intel Xeon 5600 Series QuickPath Architecture System Address Decoder" Vendor: pci 0x8086 "Intel Corporation" Device: pci 0x2d81 "Xeon 5600 Series QuickPath Architecture System Address Decoder" SubVendor: pci 0x8086 "Intel Corporation" SubDevice: pci 0x8086 Revision: 0x02 Module Alias: "pci:v00008086d00002D81sv00008086sd00008086bc06sc00i00" Config Status: cfg=new, avail=yes, need=no, active=unknown 112: None 00.0: 10002 LCD Monitor [Created at monitor.125] Unique ID: rdCR.0_Wg0xwWyS7 Parent ID: svHJ.viJhU_CLwi1 Hardware Class: monitor Model: "onn. TV" Vendor: ONN Device: eisa 0x007e "onn. TV" Resolution: 720x400@70Hz Resolution: 640x480@60Hz Resolution: 640x480@72Hz Resolution: 640x480@75Hz Resolution: 800x600@60Hz Resolution: 800x600@72Hz Resolution: 800x600@75Hz Resolution: 1024x768@60Hz Resolution: 1024x768@70Hz Resolution: 1024x768@75Hz Resolution: 1280x1024@75Hz Resolution: 1152x864@75Hz Resolution: 1280x960@60Hz Resolution: 1280x1024@60Hz Resolution: 1920x1080@60Hz Resolution: 3840x2160@60Hz Size: 800x450 mm Year of Manufacture: 2020 Week of Manufacture: 35 Detailed Timings #0: Resolution: 3840x2160 Horizontal: 3840 4016 4104 4400 (+176 +264 +560) +hsync Vertical: 2160 2168 2178 2250 (+8 +18 +90) +vsync Frequencies: 297.00 MHz, 67.50 kHz, 30.00 Hz Year of Manufacture: 2020 Week of Manufacture: 35 Detailed Timings #1: Resolution: 1920x1080 Horizontal: 1920 2008 2052 2200 (+88 +132 +280) +hsync Vertical: 1080 1084 1089 1125 (+4 +9 +45) +vsync Frequencies: 148.50 MHz, 67.50 kHz, 60.00 Hz Driver Info #0: Max. Resolution: 3840x2160 Vert. Sync Range: 23-76 Hz Hor. Sync Range: 15-81 kHz Bandwidth: 297 MHz Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #33 (VGA compatible controller) 113: SCSI 600.0: 10602 CD-ROM (DVD) [Created at block.249] Unique ID: 7bWa.ZzxXsiPM7lB Parent ID: sClz.NYJnf0qjyU9 SysFS ID: /class/block/sr0 SysFS BusID: 6:0:0:0 SysFS Device Link: /devices/pci0000:00/0000:00:1a.7/usb2/2-3/2-3:1.0/host6/target6:0:0/6:0:0:0 Hardware Class: cdrom Model: "HL-DT-ST DVDRAM SP80NB80" Vendor: usb 0x0e8d "HL-DT-ST" Device: usb 0x1887 "DVDRAM SP80NB80" Revision: "RF01" Serial ID: "M01L4DA1716" Driver: "usb-storage", "sr" Driver Modules: "usb_storage", "sr_mod" Device File: /dev/sr0 (/dev/sg0) Device Files: /dev/sr0, /dev/disk/by-uuid/2022-02-27-01-17-34-00, /dev/cdrom, /dev/disk/by-path/pci-0000:00:1a.7-usb-0:3:1.0-scsi-0:0:0:0, /dev/disk/by-label/Kali\x20Live, /dev/disk/by-id/usb-HL-DT-ST_DVDRAM_SP80NB80_M01L4DA1716-0:0 Device Number: block 11:0 (char 21:0) Features: CD-R, CD-RW, DVD, DVD-R, DVD-RW, DVD-R DL, DVD+R, DVD+RW, DVD+R DL, DVD-RAM, MRW, MRW-W Speed: 480 Mbps Module Alias: "usb:v0E8Dp1887d0000dc00dsc00dp00ic08isc02ip50in00" Driver Info #0: Driver Status: usb_storage is active Driver Activation Cmd: "modprobe usb_storage" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #98 (USB Controller) Drive Speed: 62 Volume ID: "Kali Live" Application: "KALI LINUX" Publisher: "KALI" Preparer: "LIVE-BUILD 20210902KALI2; HTTPS://SALSA.DEBIAN.ORG/LIVE-TEAM/LIVE-BUILD" Creation date: "2022022701173400" El Torito info: platform 0, bootable Boot Catalog: at sector 0x081c Media: none starting at sector 0x098d Load: 2048 bytes 114: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: 7eqy.v+N+B0xY+P6 Parent ID: 1GTX.lDAcXS26D03 SysFS ID: /devices/pci0000:00/0000:00:1d.0/usb6/6-0:1.0 SysFS BusID: 6-0:1.0 Hardware Class: hub Model: "Linux Foundation 1.1 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0001 "1.1 root hub" Revision: "5.16" Serial ID: "0000:00:1d.0" Driver: "hub" Driver Modules: "usbcore" Speed: 12 Mbps Module Alias: "usb:v1D6Bp0001d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #93 (USB Controller) 115: USB 00.1: 10503 USB Mouse [Created at usb.122] Unique ID: DlBy.anqLpZFcgY2 Parent ID: uIhY.7gZT0a5zLs5 SysFS ID: /devices/pci0000:00/0000:00:1a.1/usb3/3-2/3-2:1.1 SysFS BusID: 3-2:1.1 Hardware Class: mouse Model: "Logitech Unifying Receiver" Hotplug: USB Vendor: usb 0x046d "Logitech, Inc." Device: usb 0xc534 "Unifying Receiver" Revision: "29.01" Compatible to: int 0x0200 0x0001 "Generic USB Mouse" Driver: "usbhid" Driver Modules: "usbhid" Speed: 12 Mbps Module Alias: "usb:v046DpC534d2901dc00dsc00dp00ic03isc01ip02in01" Driver Info #0: XFree86 Protocol: explorerps/2 GPM Protocol: exps2 Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #116 (Hub) 116: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: uIhY.7gZT0a5zLs5 Parent ID: gFpy.ptxbSgs8K73 SysFS ID: /devices/pci0000:00/0000:00:1a.1/usb3/3-0:1.0 SysFS BusID: 3-0:1.0 Hardware Class: hub Model: "Linux Foundation 1.1 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0001 "1.1 root hub" Revision: "5.16" Serial ID: "0000:00:1a.1" Driver: "hub" Driver Modules: "usbcore" Speed: 12 Mbps Module Alias: "usb:v1D6Bp0001d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #42 (USB Controller) 117: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: BSFT.gkSaZmjGyhD Parent ID: vayM.Ge6M01ApkO3 SysFS ID: /devices/pci0000:00/0000:00:1d.1/usb7/7-0:1.0 SysFS BusID: 7-0:1.0 Hardware Class: hub Model: "Linux Foundation 1.1 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0001 "1.1 root hub" Revision: "5.16" Serial ID: "0000:00:1d.1" Driver: "hub" Driver Modules: "usbcore" Speed: 12 Mbps Module Alias: "usb:v1D6Bp0001d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #48 (USB Controller) 118: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: zPk0.9T1GDCLyFd9 Parent ID: 5YuN.LjQHitaJvj8 SysFS ID: /devices/pci0000:00/0000:00:1d.7/usb4/4-0:1.0 SysFS BusID: 4-0:1.0 Hardware Class: hub Model: "Linux Foundation 2.0 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0002 "2.0 root hub" Revision: "5.16" Serial ID: "0000:00:1d.7" Driver: "hub" Driver Modules: "usbcore" Speed: 480 Mbps Module Alias: "usb:v1D6Bp0002d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #103 (USB Controller) 119: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: FZIx.RTX9xWW_uz4 Parent ID: mvRC.n236VbHWGn3 SysFS ID: /devices/pci0000:00/0000:00:1d.2/usb8/8-0:1.0 SysFS BusID: 8-0:1.0 Hardware Class: hub Model: "Linux Foundation 1.1 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0001 "1.1 root hub" Revision: "5.16" Serial ID: "0000:00:1d.2" Driver: "hub" Driver Modules: "usbcore" Speed: 12 Mbps Module Alias: "usb:v1D6Bp0001d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #88 (USB Controller) 120: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: k4bc.MxUuepIFPaE Parent ID: pwJ7.IT+rz5lRok2 SysFS ID: /devices/pci0000:00/0000:00:1a.0/usb1/1-0:1.0 SysFS BusID: 1-0:1.0 Hardware Class: hub Model: "Linux Foundation 1.1 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0001 "1.1 root hub" Revision: "5.16" Serial ID: "0000:00:1a.0" Driver: "hub" Driver Modules: "usbcore" Speed: 12 Mbps Module Alias: "usb:v1D6Bp0001d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #89 (USB Controller) 122: USB 00.0: 10800 Keyboard [Created at usb.122] Unique ID: mZxt.f7mx8T6d61E Parent ID: uIhY.7gZT0a5zLs5 SysFS ID: /devices/pci0000:00/0000:00:1a.1/usb3/3-2/3-2:1.0 SysFS BusID: 3-2:1.0 Hardware Class: keyboard Model: "Logitech Unifying Receiver" Hotplug: USB Vendor: usb 0x046d "Logitech, Inc." Device: usb 0xc534 "Unifying Receiver" Revision: "29.01" Driver: "usbhid" Driver Modules: "usbhid" Speed: 12 Mbps Module Alias: "usb:v046DpC534d2901dc00dsc00dp00ic03isc01ip01in00" Driver Info #0: XkbRules: xfree86 XkbModel: pc104 Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #116 (Hub) 123: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: 2XnU.uOe2OKugI8D Parent ID: XaIo.KIuLxE_rrV3 SysFS ID: /devices/pci0000:00/0000:00:1a.2/usb5/5-0:1.0 SysFS BusID: 5-0:1.0 Hardware Class: hub Model: "Linux Foundation 1.1 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0001 "1.1 root hub" Revision: "5.16" Serial ID: "0000:00:1a.2" Driver: "hub" Driver Modules: "usbcore" Speed: 12 Mbps Module Alias: "usb:v1D6Bp0001d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #81 (USB Controller) 124: USB 00.0: 10a00 Hub [Created at usb.122] Unique ID: pBe4.cO89g+iefn1 Parent ID: sClz.NYJnf0qjyU9 SysFS ID: /devices/pci0000:00/0000:00:1a.7/usb2/2-0:1.0 SysFS BusID: 2-0:1.0 Hardware Class: hub Model: "Linux Foundation 2.0 root hub" Hotplug: USB Vendor: usb 0x1d6b "Linux Foundation" Device: usb 0x0002 "2.0 root hub" Revision: "5.16" Serial ID: "0000:00:1a.7" Driver: "hub" Driver Modules: "usbcore" Speed: 480 Mbps Module Alias: "usb:v1D6Bp0002d0516dc09dsc00dp00ic09isc00ip00in00" Driver Info #0: Driver Status: usbcore is active Driver Activation Cmd: "modprobe usbcore" Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #98 (USB Controller) 125: None 00.0: 10103 CPU [Created at cpu.465] Unique ID: rdCR.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 126: None 01.0: 10103 CPU [Created at cpu.465] Unique ID: wkFv.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 127: None 02.0: 10103 CPU [Created at cpu.465] Unique ID: +rIN.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 128: None 03.0: 10103 CPU [Created at cpu.465] Unique ID: 4zLr.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 129: None 04.0: 10103 CPU [Created at cpu.465] Unique ID: 94PJ.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 130: None 05.0: 10103 CPU [Created at cpu.465] Unique ID: EBSn.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 131: None 06.0: 10103 CPU [Created at cpu.465] Unique ID: JIVF.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 132: None 07.0: 10103 CPU [Created at cpu.465] Unique ID: OPYj.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1729 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 133: None 08.0: 10103 CPU [Created at cpu.465] Unique ID: TWbB.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1729 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 134: None 09.0: 10103 CPU [Created at cpu.465] Unique ID: Ydef.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1729 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 135: None 0a.0: 10103 CPU [Created at cpu.465] Unique ID: dkh7.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 136: None 0b.0: 10103 CPU [Created at cpu.465] Unique ID: hrkb.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 137: None 0c.0: 10103 CPU [Created at cpu.465] Unique ID: myn3.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 138: None 0d.0: 10103 CPU [Created at cpu.465] Unique ID: r3rX.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 139: None 0e.0: 10103 CPU [Created at cpu.465] Unique ID: wAu+.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 140: None 0f.0: 10103 CPU [Created at cpu.465] Unique ID: +HxT.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 141: None 10.0: 10103 CPU [Created at cpu.465] Unique ID: 4P_x.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 142: None 11.0: 10103 CPU [Created at cpu.465] Unique ID: 9W1Q.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.74 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 143: None 12.0: 10103 CPU [Created at cpu.465] Unique ID: Ed4u.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 144: None 13.0: 10103 CPU [Created at cpu.465] Unique ID: Jk7M.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 145: None 14.0: 10103 CPU [Created at cpu.465] Unique ID: OrAq.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1596 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 146: None 15.0: 10103 CPU [Created at cpu.465] Unique ID: TyDI.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1595 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 147: None 16.0: 10103 CPU [Created at cpu.465] Unique ID: X3Hm.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1729 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 148: None 17.0: 10103 CPU [Created at cpu.465] Unique ID: bthG.j8NaKXDZtZ6 Hardware Class: cpu Arch: X86-64 Vendor: "GenuineIntel" Model: 6.44.2 "Intel(R) Xeon(R) CPU X5650 @ 2.67GHz" Features: fpu,vme,de,pse,tsc,msr,pae,mce,cx8,apic,sep,mtrr,pge,mca,cmov,pat,pse36,clflush,dts,acpi,mmx,fxsr,sse,sse2,ht,tm,pbe,syscall,nx,pdpe1gb,rdtscp,lm,constant_tsc,arch_perfmon,pebs,bts,rep_good,nopl,xtopology,nonstop_tsc,cpuid,aperfmperf,pni,pclmulqdq,dtes64,monitor,ds_cpl,smx,est,tm2,ssse3,cx16,xtpr,pdcm,pcid,dca,sse4_1,sse4_2,popcnt,aes,lahf_lm,epb,pti,ssbd,ibrs,ibpb,stibp,dtherm,ida,arat,flush_l1d Clock: 1729 MHz BogoMips: 5319.78 Cache: 12288 kb Units/Processor: 32 Config Status: cfg=new, avail=yes, need=no, active=unknown 149: None 00.0: 10700 Loopback [Created at net.126] Unique ID: ZsBS.GQNx7L4uPNA SysFS ID: /class/net/lo Hardware Class: network interface Model: "Loopback network interface" Device File: lo Link detected: yes Config Status: cfg=new, avail=yes, need=no, active=unknown 150: None 00.0: 10701 Ethernet [Created at net.126] Unique ID: usDW.ndpeucax6V1 Parent ID: rBUF.DsYAG7C71z9 SysFS ID: /class/net/eth0 SysFS Device Link: /devices/pci0000:00/0000:00:1c.5/0000:06:00.0 Hardware Class: network interface Model: "Ethernet network interface" Driver: "tg3" Driver Modules: "tg3" Device File: eth0 HW Address: b8:ac:6f:4a:e1:34 Permanent HW Address: b8:ac:6f:4a:e1:34 Link detected: yes Config Status: cfg=new, avail=yes, need=no, active=unknown Attached to: #79 (Ethernet controller)

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Welcome our 2022 students!
by Anastasia Klimchuk 21 May '22

21 May '22

I am very proud because I have great news: we have 3 students joining the flashrom community to do projects! Aarya will be doing a GSoC project “Optimize Erase-Function Selection” with Thomas (Mentor), Simon (backup Mentor) and Nikolai. Chinmay will be doing a GSoC project “Refactor arguments parser” with Felix (Mentor), Anastasia (backup Mentor) and Evan. Joursoir is joining as an independent contributor and will be working on a project “Restructure shutdown functions and remove global state” with me and Thomas. This will be a more open-ended project and largely a continuation of the effort I was doing last year. Anyone who is also interested in supporting the projects and our students, yes please, you are very welcome! :) Aarya, Chinmay, Joursoir, it would be really great if you can join the next flashrom dev meeting on 2nd June, so that we can say hello to each other! Info in this thread: https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/5EMH… Between today and 2nd June you will be talking to your Mentors and discussing project plans in more detail. Please prepare: look at the timeline (https://developers.google.com/open-source/gsoc/timeline) and tell if you plan for example vacations so that we can adjust the project schedule. You will have a conversation with your Mentor(s) once a week. You will need to post to the mailing list at least once a week, to share with the community what’s going on your project. Remember if you have any questions, you can always ask your Mentor(s) and/or me or Felix. Especially if you are confused, not sure what to do: keep calm and talk to your Mentor(s) or Admin(s). So, what to do now? Celebrate! ;) And then prepare for next week's conversation with your Mentors. Good Luck! -- Anastasia.

5 4

Acer TravelMate P215-41 - 25LQ128DSIG - works
by A.F. 21 May '22

21 May '22

Hi, since GD25LQ128D is marked as untested I like to share my success. I have an Acer TravelMate P215-41. The BIOS was bricked due to an update issue. I successfully reflashed the Bios on the GD25LQ128D (25LQ128DSIG) using a CH341A programmer [1] and flashrom. I removed RAM, hard drive, CMOS battery and accumulator and connected the clip direct to the mainboard using the 1.8V adapter. Read, erase and write was successful. Kind regards Aaron [1] https://www.amazon.com/-/de/dp/B07VMPZFWH/ref=sr_1_4?keywords=ch341a+progra…

1 0

MT25QU256 works, ft2232_spi (Tigard) programmer
by Oleg Drokin 20 May '22

20 May '22

Hello! The chip detects as both MT25QU256 and N25Q256..1E: Found Micron/Numonyx/ST flash chip "N25Q256..1E" (32768 kB, SPI) on ft2232_spi. Found Micron flash chip "MT25QU256" (32768 kB, SPI) on ft2232_spi. Multiple flash chip definitions match the detected chip(s): "N25Q256..1E", "MT25QU256" I tried both for reads and both worked. writes/erases were only tried on MT25QU256 and that’s what I am attaching the log file for (it contains both read and erase/write portions so no duplicate ones are needed I imagine?)

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flashrom dev meeting notes 19.05.22
by Felix Singer 19 May '22

19 May '22

# 19th May 2022, 6:00 - 7:00 am UTC+0 Attendees: Anastasia, Nico, Edward, Martin, Felix, Thomas ## Decisions Summary * We are targeting v1.3 release between 1st August and 15th December. Until 1st August, we will fix as many bugs from the list as possible and then we will review the status. [https://ticket.coreboot.org/issues/353](https://ticket.coreboot.org/issues/… . * We will be discussing bugs for release more often in the meeting, to keep things moving. * Split programmer lifecycle tests into separate files per programmer. ## Agenda * [Martinr] When is the next flashrom release? It's been 2 years since the last release (v1.2). * [dhendrix] Should we start doing (semi-)automatic releases on a schedule, with point fixes to address specific problems that come up? We've tried the "wait until everything is perfect'' approach and it's resulted in years-long release cycles and countless forks. Now that we have unit tests we should be confident in doing more frequent releases. * [quasisec]: I would be in favor of a semi-auto release schedule +1. * [Nico] Currently we are rather exercising “wait until everything is broken”. When we set the bar higher in the past, releases were no issue. I think we should return to that. * [Edward] Using a bug tracker allows us to have release-blocker bugs and to know who is responsible for what to help clear up communication lines. * [Martin] Maybe create a release branch to fix any bugs without adding any more features that would introduce new bugs? * [aklm] At the meeting 2022-04-21 community decided that I am a release manager. I will do a release, but I very much appreciate any help and advice from people who have experience. I have never done any release before. I created a list of issues under parent task here [https://ticket.coreboot.org/issues/353](https://ticket.coreboot.org/issues/… some of them already assigned. * [aklm] Hopefully this year * [aklm] We’ve created a list of bugs that should be fixed before release. * After the tests are run. * Testing needs to be done for meson changes, and then another time before the release. * Once release branch is created, it needs to be tested * Martin: if we get qemu images I can add them to jenkins * Edward : intermediate step is one non-linux build bot * Breaking lifecycle tests into separate files : really nice to have * [martin]: Can we set a specific date for a release? That gives us something to aim for. If we need to postpone it, we can. * December? Too far away? * August 1? Is it too aggressive? * Nico: set up for jenkins builders should not affect the release * Thomas: not sure if we finish meson support. We can just document the meson builds for this release - it doesn’t have to be complete. * Edward: how about we have a release window between 1 Aug and 15 Dec * Nico: we can fix all bugs, or disable the code * Martin: We can work until 1 Aug and see how much is fixed. * [Martinr] Who is responsible for flashrom binaries? There don't seem to be links to binaries in [https://www.flashrom.org/Downloads](https://www.flashrom.org/Downloads) and I'm willing to bet that most of those maintainers aren't doing it any more. * [dhendrix] Upstream flashrom has only ever published sources (except for certain Windows binaries?). Package maintainers for various distros have been responsible for binary releases. * The reason I was asking was that the download page is very confusing and seems to be very out-of-date. [https://www.flashrom.org/Downloads](https://www.flashrom.org/Downloads) * Windows binaries are the only ones the users are asking for * Thomas: I can build binaries for meson build testing. * Felix: What about doing a static linux build? * Nico: Let’s postpone that until someone asks for it. * Nico: It could be useful to post a daily build off of master. * Martin: We could do a nightly build with jenkins? * Thomas: static libraries are libusb, libpci , libftdi , libjaylink. * TODO: add a bug for updating the Downloads page. * For linux systems use packaged binary, if you need latest, build off master * List of versions in each distro: [https://repology.org/badge/vertical-allrepos/flashrom.svg](https://repology… * [Martinr] What do we need to do for flashrom cross-platform build testing? * [Nico] We have a set of Docker containers prepared (util/manibuilder/). FelixS is looking into buildbot integration. If coreboot makes the switch eventually, it shouldn’t be an issue. * These are somewhat out of date. * Thomas has a number of qemu images as well. * TODO: file a bug to update containers * Martin or Nico will take care of updating these. * [Martinr] What's the current state of flashrom testing? * Is it mostly manual at this point? * Unit tests are running on every push, but these are just covering a very little bit. supplement documentation for what was intended for the patch. * Google is testing after downstreaming the code. Also get tested in the commit queue. AVL test of customer roms. * Martin: would this generate a bug upstream flashrom, or only within google? * The plan is to push all of these up to the flashrom bug tracker. * What tests are done for release? * We need to document this. * In the past, there has been testing on hardware, generate a release candidate and ask the community to test. * How do we test the different internal flashers? Just the community - there’s not much change in these programmers. * Martin: email alias flashrom-vvv to send logs ? something like coreboot board status. People can send email “I have tested in, here is an output” * RC branch, when you run it, please email the results * Edward: Do we want an owners file in the tree? “Here are drivers that are officially supported” * Felix: I have some ideas for a QA lab, like 9elements Lava QA but for flashrom. So we could test at least some programmers * Can we go through open patches manually? * What’s needed to continue work on meson? * Tests currently depend on libusb. So in the current setup at least one libusb programmer needs to be selected to run tests. However not all tests depend on libusb , only for some programmers. * Lets split lifecycle.c into per-programmer files and then we can run the tests that do not depend on libusb when the library is not present.

1 0

Open Source Firmware Hackathon 2022
by Felix Singer 18 May '22

18 May '22

Hi everyone, after two crazy years, we decided it's time to do a open source firmware hackathon. It will take place from 10th June - 12th June in Darmstadt, Germany. For more details and tickets, have a look on this site [1]. The hackathon will cover open source firmware projects, like coreboot, oreboot, flashrom, LinuxBoot and any topics related to them. We have two lecture rooms (2x 80 people) for discussions and presentations. Currently, only 17 tickets are left. Everyone is welcome, no matter if beginner or professional. 24h breakfast, snacks and soft drinks are provided for free. Would love to see you there! // Felix [1] https://osfw.foundation/events/osff-summer-hackathon-2022/

1 0

Failed Protectli fw6e coreboot (protectli_all_fw6_vault_kbl_v1.0.14.rom)
by John Caltry 18 May '22

18 May '22

Hello, Ubuntu 20.04 boot from USB (try Ubuntu) and attempted install using Protectli Flashli. Cut and paste follows, any advice is appreciated! John \ == \ /\ == \ /\ __ \ /\__ _\ /\ ___\ /\ ___\ /\__ _\ /\ \ /\ \ \ \ _-/ \ \ __< \ \ \/\ \ \/_/\ \/ \ \ __\ \ \ \____ \/_/\ \/ \ \ \____ \ \ \ \ \_\ \ \_\ \_\ \ \_____\ \ \_\ \ \_____\ \ \_____\ \ \_\ \ \_____\ \ \_\ \/_/ \/_/ /_/ \/_____/ \/_/ \/_____/ \/_____/ \/_/ \/_____/ \/_/ _________________________________________________________________________________________ =========================================FlashLi========================================= --Version 1.1.20-- Device: Protectli fw6e CPU: Intel(R) Core(TM) i7-8550U CPU @ 1.80GHz BIOS Mode: BIOS Available BIOS: [1]: ami (FW6_all_YKBR6L12.bin) [2]: coreboot (protectli_all_fw6_vault_kbl_v1.0.14.rom) Enter the [#] of an image file, or [0] to quit. Flahing will not begin yet > 2 ********************************************!******************************************** Are you sure you would like to flash this device? Flashing new firmware onto any hardware is potentially dangerous in that if the procedure is interrupted or otherwise not able to complete, your hardware may be rendered useless. Please proceed with caution. If there are any questions, please contact Protectli support BEFORE proceeding. Unless there is a compelling reason to update the BIOS, we recommend to stay with your current known working BIOS version ********************************************!******************************************** Acknowledgement Yes [Y]: y flashrom v1.2-326-gf57486e on Linux 5.13.0-30-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "Intel Kaby Lake U w/ iHDCP2.2 Prem.". Enabling flash write... SPI Configuration is locked down. Enabling hardware sequencing because some important opcode is locked. OK. Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Reading ich descriptor... done. Using region: "bios". Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... FAILED at 0x00103056! Expected=0xff, Found=0xc5, failed byte count from 0x00000000-0x007fffff: 0x99c Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! BIOS Flash failed, is this script running with root permissions? Please try again, but if problems persist, please let us know. TODO: Collect info and display instructions on how to submit a Github issue.

3 2

Flashrom Dev Meeting summary info
by Anastasia Klimchuk 17 May '22

17 May '22

Hello People, I wanted to summarise the information on the time of Dev meeting. At some point there was an idea to alternate times, but then we discovered that we got really lucky and there is one time which everyone agrees on. That was an open question at the last meeting, to confirm the time with those US folks who were not present. Since no one was replying to the mailing list, I reached out to folks and confirmed the time is fine. —------------- SUMMARY —------------- #1 Between November and March (inclusive) time of meeting: Wednesday 21:00-22:00 UTC+0 also known as Wednesday 13.00-14.00 Pacific Standard Time UTC-8 Wednesday 22.00-23.00 Central European Time UTC+1 Thursday 8.00-9.00am Australian Eastern Daylight Time UTC+11 #2 Between April and September (inclusive) time of meeting: Thursday 6.00-7.00am UTC+0 also known as Wednesday 11pm-midnight Pacific Daylight Time UTC-7 Thursday 8.00-9.00am Central European Summer Time UTC+2 Thursday 16.00-17.00 Australian Eastern Standard Time UTC+10 #3 Note that in the last week of March and 4 weeks of October there will be no meetings, because daylight saving time changes are happening on different dates in different locations, and setting up meeting time becomes too complicated. Once the regularity is stable, I will add info about Dev meeting on the Contacts page. Meanwhile: —---- FAQ —---- #1 When is the next meeting? Look into the meeting notes document <https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZkADzQSH6WF…>. The top entry, on the first page, with the date in the future, and empty list of attendees - is the next meeting. #2 How to join the meeting? Look into the meeting notes document <https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZkADzQSH6WF…>. On the top it says “to join, click the link”, click the link. #3 Where is that document? Meeting notes document is linked to the Home page of flashrom.org, Developers menu at the bottom of the page. #4 Do I need an invitation to join the meeting? No, just join. -- Anastasia.

1 1

Is anyone interested in OTP support patchset?
by Sergii Dmytruk 17 May '22

17 May '22

Hello, Some time ago I've revived an old patchset by Hatim Kanchwala and extended it with support for more devices and unit tests. It wasn't reviewed for a while and now that reviewing makes sense (changes it's based on were accepted) it's not really needed for 3mdeb's project anymore... The question is whether there is a need for it? If there is interest and wiliness to test it (wasn't tested on hardware), pursuing review still makes sense. Someone can even take over the patches and I'll become a reviewer and help along the way. If OTP isn't needed at the moment, the patchset will be abandoned at least until some project which requires OTP in flashrom or until someone else will pick it up. The first change of the series is (no topic yet) https://review.coreboot.org/c/flashrom/+/59402 To give you an idea of the amount of work it might take to upstream: Makefile | 2 chipdrivers.h | 5 cli_classic.c | 243 dummyflasher.c | 351 flash.h | 6 flashchips.c | 61 flashrom.8.tmpl | 81 libflashrom.h | 18 meson.build | 2 otp.c | 490 otp.h | 91 otp_layouts.c | 210 spi.h | 40 spi25.c | 89 spi25_statusreg.c | 90 tests/chip_otp.c | 470 tests/meson.build | 1 tests/tests.c | 14 tests/tests.h | 12 19 files changed, 2186 insertions(+), 90 deletions(-) Conflicts with current master for a couple of month, should be easy to fix (I'll do that if someone else will take over). I also have a bash script to test new CLI options via dummyflasher. Best regards, Sergii

1 0

Release preparations
by Nico Huber 17 May '22

17 May '22

Hi folks, people often ask me about a potential next release and what is holding me back. Long story short, I knew about some bad things in our master branch that make a release impossible and I was very much afraid that there could be more that I don't know about. I've been scrolling through the commit log from v1.1 (the last release I was involved) to today's master. Some of the things I found are simple like something missing for a flash chip entry. But most of it are things I'd rather not have on a release branch. And the list turned out to be much longer than I expected. OTOH, I didn't find issues of the worst kind I expected. Not sure how to go on from here. As this is a lot to do, I suggest that we freeze the master branch for everything that is neither a fix nor on the list (or a similar case that I missed). I noted sometimes that we could just drop the code from a release branch. If we'd decide to do that, we'd also need a plan how to stop the rot on the master branch. Below are my raw notes, I don't have the time to write things up nicely. I noted the commit hash where things began, but tried to take the cur- rent state into account. For instance, when it's about a new programmer driver, I was looking at the file, not the initial patch. Cheers, Nico Recommended clean-ups and investigations before v1.3 ==================================================== * cb973683 Added partial meson support which confuses package main- tainers. Should we remove it from or disable CLI building on release branches? * 71b706f5 Adds some libflashrom APIs with questionable design, buggy implementation and no visible user. Would be easiest to drop and add back when somebody needs it. Open comment. Partially fixed up. * 86fc9cf7 Open comment. Partially fixed up. * 05c629be Looks incomplete, flash would be fully erased with programmers that lack native 4BA command support. * ad08aef6 Undocumented programmer. disable? drop from realease branch? * 703de983 Added `spireadmode` param to sb600spi. (How) does it work? * 13a2ef6c Added `lspcon_i2c_spi`. Too generic name: LSPCon is a concept but driver seems to be about a specific vendor/chip. No pro- bing just starts to write to hardcoded addresses. WP code contains magic numbers, board specific? Implements `spi_ master` but contains hard-coded SPI opcodes. Not documented? disable? drop from release branch? * d97f87b0 Added `realtek_mst_i2c_spi`. No probing, starts by toggling a GPIO. Are GPIO settings board specific? Timeout checks seem to have regressed since original commit. Not documented? Changes clock settings, is this board specific? Implements `spi_master` with special cases in an opcode LUT, doesn't bail out on unknown codes. Falls back on unaligned reads/ writes, were these paths tested? Fixups suggest that the original code wasn't properly tested, was it by now? disable? drop from release branch? * be4682dc Might miss some block erasers. * f82dd300 Might miss some block erasers. * a2dc4f7f It seems `clear_spi_id_cache()` is never called. Probably, should be before probing. * 3149822c Added variable size in `dummy_programmer`. Didn't look at it right now, but I remember it caused a lot of trouble. Probably not fully fixed up yet. * cb9f3cd0 Possible division by zero. * ca2e3bce Fixed some libpci usage. IIRC, there are many more similar cases that might need a fix now that libpci is more strict. * 0386aa17 sb600spi refactoring. Looks like it dropped an error message from many error paths. * f745d0e6, adbae0e2 Added infrastructure for S25F chips. Code style looks a bit outdated. Probably needs upstream review. * 8fa792fb Added chips with oddities and w/o reasoning, e.g: .total_size = 16384, /* This is just half the size.... */ Complete patch needs review. * 855d6b6f Added Ryzen support to sb600spi. API violations. Stalled other cleanup work. Soft bricks machines with >16MiB flash. Patches on Gerrit. drop from release branch? * 32f4cb4f Looks like copy-pasta from Winbond chips. Might miss some block erasers. Missing 4BA_WRITE is probably wrong. * 45d50a10 Added support code for per-region file arguments. Review was interrupted, IIRC. Rebase was borked shortly before merge. Work never finished. * d4063bf3 Missed to update the manpage. Literal `-` shouldn't be in `<>`. * ce983bcc Missed to update the manpage. Filters only spaces when converting region names to file names. * 51e1d0e4 Still selects the wrong chipset, IIRC. * e98b2d11 Review never really started. See comments on Gerrit. Backport candidates =================== * 4ca575dc usbdev: Only match requested USB devices * 8bbb7648 spi95: Check for success before using send_command's returned data * b07c53d7 spi25: Debug flashrom crash when Write Protect is ON Looks like this covers up a general problem with flash-chip entries. Why would we know how to disable block protection if we don't know how to report it? Should probably be added to self checks. * 51261541 it87spi.c: Prevent use-after-free bug * da0825f0 chipset_enable.c: check return value from rphysmap() call * 705212da chipset_enable.c: Validate physmap() return rcrb value * b76d2810 dediprog: Fix segmentation fault on no device found * 1a21cc70 helpers.c: Fix undefined behavior in strndup() * a2f2f3f5 linux_mtd: Disable buffering on the mtd device * ab623c65 jlink_spi: Reduce transfer size * Many fixes in dummy_flasher, not sure if they were applicable earlier. * aedfb7eb flashrom.8: add missing entry for `--flash-contents` * 89c73b5a linux_mtd: check ioctl() return value properly

11 25

Updating Intel idaville BIOS failed.
by Jackie Tang 17 May '22

17 May '22

Hi Team, Excuse me, I am currently working on the BIOS of the Intel idaville platform, and the BIOS chip used is a 64M WINBOND W25Q512JVFIQ. After the machine boots into CentOS, I use the command "flashrom -w BIOS.ROM -p linux-spi" and it will return "No spi device given", and the BIOS update fails. May I ask what method can be used to solve this problem or update the BIOS with flashrom in the OS successfully, or how can I successfully mount the flash? Waiting for your reply. Best Regards, Celestica Technology Consultancy (Shanghai) Co.,Ltd Jackie

1 0

Gatekeeping, ACLs and Review Rules
by Nico Huber 16 May '22

16 May '22

Dear fellow flashrom developers, I've been reflecting lately about written and unwritten rules around our review process and our related privileges on Gerrit. I couldn't identify anything that works well, or let's say well enough. So it might be time we discuss some things and make changes :) Before the dawn of our Git repository and using Gerrit as a review plat- form, we had a Subversion repository. With very few people, usually one or two I think, that had write access. So practically we had gatekeepers that watched over the code. Eventually, they became a bottleneck so we widened that a little when starting the work on Gerrit. Today, I often catch myself falling back into such a gatekeeper mode. Which is futile anyway because I'm not the only one who can write to the repository. But I still wonder why this happens and if it's necessary. I guess first everyone needs to understand how we imagined things with Gerrit and how it looks like today. As mentioned above we set up a group "flashrom developers" which has exclusive write access to the reposi- tory. The idea was to only have people in this group who are long-term (I was thinking about years) contributors to flashrom, know each other from real-time communication (IRC) and trust each other. For the review right "+2", we used the "Reviewers" group from coreboot. IIRC, I pushed for the latter. I was hoping to grow the communities a little together that seemed to have gone separate ways in the years before. After all, a lot of coreboot developers use flashrom in their everyday work. Combined with the "flashrom developers" group it shouldn't have been an issue that people with little flashrom knowledge would review. Since the original setup (about 2017) things went on rather uncon- trolled. I think the gist of it is that people didn't expect that flashrom would need/have different rules compared to coreboot. At some point somebody whom I only knew from their work on coreboot sud- denly merged patches for flashrom. And I guess people pushing patches today pretty much expect that there is nothing more to be done once they see the first +2. No matter if the reviewer knows anything about flashrom. When reviewers disagree then, it can become frustrating for everyone. So currently, I lean towards aligning our process more with that of coreboot. The big difference seems to be that at coreboot merging patches, i.e. hitting the "Submit" button, is more or less considered an administrative task unrelated to one's opinion on the code. While for us it was supposed to replace the gatekeeping. Changing this would imply that we need our own group of reviewers. With this, a +2 would become both rarer and stronger. If this idea meets some consent, I would propose to copy the "flashrom developers" group for a start. And when we identify somebody over time who shows in-depth knowledge about at least a part of flashrom and good self-judgement if they are experienced enough for a +2, we could add them. Right now, some candidates come to mind already, Peter, Nikolai, and Thomas. The "flashrom developers" group also grants the privilege to block "-2" a change. I have very conflicting feelings about this. On one hand, this is a tool that is only ever necessary when people in said group can't trust each other. On the other, that seems to be the status quo already. Maybe we should have another group on top for this? This time really only for trusted, established, long-term contributors? Or maybe for those who maintain the codebase beyond what they are paid for? There is one related idea for a rule that crossed my mind: How about we forbid blocking reverts that fix a regression and apply cleanly (i.e. without needing to revert anything else in advance). Also, let them pass after review without waiting 24 hours. At least for myself this would reduce a lot pressure to fall back to gatekeeping if I knew I could keep things safe and sound without discussion. For maintainers, the patches that are already merged matter the most, cause the most work. This should also be the case for contributors, but alas many don't see it like this and don't help to fix things after a patch is merged. Easing reverts would push the hard work back to the people who break things. Looks a bit longer than what I intended to write, as usual when one starts writing ;) If we come to a conclusion wrt. Gerrit privileges, we could also discuss more rules for each role. While I'm not a fan of too many rules and would rather keep things to common sense, these things depend much on the people we add to the respective groups. I hope it's not too much to digest at once ;) Cheers, Nico

5 17

Questions regarding Easy project and GSoC
by Aarya Chaumal 16 May '22

16 May '22

Hello there, I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom. I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this? As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it? Thank you for looking into this for me. Sincerely, Aarya Chaumal

7 34

flash intel network adapter
by Denis 16 May '22

16 May '22

Hello. Do you have any plans to add support for 8086:1583 - Intel Ethernet Converged Network Adapter XL710-QDA2 ? After an unsuccessful firmware... BootUtil writes "Cannot initialize adapter". No standard ways to make rollback :((( It would be great to flash with your utility. Thanks in advance

1 0

how to enable the internal programmer
by Selva Harris 15 May '22

15 May '22

Hi, I have an Intel Apollo lake board. I want to read the SPI chip. When I run 'flashrom -p internal', this is the message I get: flashrom v1.2-735-gb728f4b on Linux 4.5.5-300.fc24.x86_64 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Error: Unknown programmer "internal". Valid choices are: dummy, serprog, buspirate_spi, rayer_spi, pony_spi, linux_mtd, linux_spi. Please run "flashrom --help" for usage info. Thanks in advance, Selva

2 2

[PATCH] Add voltage data for chips
by Chinmay Lonkar 11 May '22

11 May '22

From: ChinmayLonkar <chinmay20220(a)gmail.com> This patch adds voltage data for following chips: * Intel 28F002BC/BL/BV/BX-T * Intel 28F004B5/BE/BV/BX-B * Intel 28F004B5/BE/BV/BX-T * Intel 28F008S3/S5/SC * Intel 28F400BV/BX/CE/CV-B * Intel 28F400BV/BX/CE/CV-T * Micron/Numonyx/ST M25P40-old * SyncMOS/MoselVitelic {F,S,V}29C51002T * Winbond W29C010(M)/W29C011A/W29EE011/W29EE012 * Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old Change-Id: I42bc546e03a899086c034c026231955088a7d400 Signed-off-by: Chinmay Lonkar <chinmay20220(a)gmail.com> --- flashchips.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/flashchips.c b/flashchips.c index d155b24..f9cb0cd 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8112,6 +8112,7 @@ const struct flashchip flashchips[] = { }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -8139,6 +8140,7 @@ const struct flashchip flashchips[] = { }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -8166,6 +8168,7 @@ const struct flashchip flashchips[] = { }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -8189,6 +8192,7 @@ const struct flashchip flashchips[] = { .unlock = unlock_28f004s5, .write = write_82802ab, .read = read_memmapped, + .voltage = {2700, 3300}, }, { @@ -8217,6 +8221,7 @@ const struct flashchip flashchips[] = { }, .write = write_82802ab, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -8245,6 +8250,7 @@ const struct flashchip flashchips[] = { }, .write = write_82802ab, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -10521,6 +10527,7 @@ const struct flashchip flashchips[] = { .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2300, 3600}, }, { @@ -16884,6 +16891,7 @@ const struct flashchip flashchips[] = { }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500} }, { @@ -16910,6 +16918,7 @@ const struct flashchip flashchips[] = { }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500} }, { @@ -18607,6 +18616,7 @@ const struct flashchip flashchips[] = { }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -18630,6 +18640,7 @@ const struct flashchip flashchips[] = { }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { -- 2.25.1

2 2

Flashrom sp_stream_buffer_op() API issue
by Chinmay Lonkar 07 May '22

07 May '22

Hi, I'm trying to fix the build errors of flashrom and came across an API error "Argument with 'nonnull' attribute passed null" which occurred in memcpy() function called inside sp_stream_buffer_op() in file serprog.c. We are passing the third argument of sp_stream_buffer_op() as NULL which gets passed on to the second argument of memcpy() and it expects that argument to be nonnull. Can anybody please provide me with the info and docs for knowing exactly what sp_stream_buffer_op() function does? Also, should we report an error when the third argument passed in the sp_stream_buffer_op() is NULL? Thank You! Regards, Chinmay Lonkar

2 2

flashrom dev meeting notes 5.05.22
by Felix Singer 05 May '22

05 May '22

# 5th May 2022, 6:00 - 7:00 am UTC+0 Attendees: Anastasia, David, Edward, Felix, Nico, Nikolai, Thomas ## Decisions Summary * Thomas gets submit rights * We want a separate reviewers group for flashrom so that reviewers are not mixed across different projects * Different tags for bug IDs are needed so that Google IDs (non-public) are not mixed with tickets from the flashrom issue tracker (public) * The mailing list should be used more for design discussions ## Agenda * [aklm] I wanted to remind that we have an ongoing item “to figure out criteria to give people submit rights”. It was raised on the very first meeting. I think it is in many people's heads. * There is a thread on the mailing list “Gatekeeping, ACLs and Review Rules” ([link](https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/threa… )). The topic is in scope of the thread. Currently the last message is mine, I can’t just talk to myself on the topic. Please share your thoughts! * In the absence of criteria I want to nominate Thomas to get submit rights. This is also an idea from the very first meeting. * In addition to commit stats that Martin gave in the first meeting, I have more points * Thomas is active on the project for a while, * he will be a gsoc Mentor, teaching our new contributors * Reachable and responding on the irc, by email, mailing list * Yes, no objections! * We need rules for this. Not too many people should just get submit rights so that we can keep track. * Separate Reviewers group for flashrom, everyone agrees. * Nik: better have a restricted group for Reviewers, and everyone can submit. * Let’s give Thomas submit rights. Congrats! * Anything that’s left to discuss from the item: “(in case somebody knows) What is Google’s current strategy to avoid repeating mistakes of the past?” * [dhendrix] Is this the kind of finger pointing that Edward mentioned above? At this point, CrOS has proved more than happy to move upstream. The Github mirror is probably more of a concern. Perhaps upstream should consider how to get developers to choose upstream rather than the Github mirror or some other fork. * [Nico] Pointing at Google, actually. If one company forks and later wants their code upstream without proper review, something seems wrong. As if they never reflected about the problems. * [aklm] I am not sure we are on the same page on what are “mistakes of the past”. Everyone has their own idea on what the mistakes were. I can start from myself. From my observations, converging the code was considered a purely technical task, and so it was done as a technical task. However, converging the code means converging the people/the teams, converging very different workflows and work cultures. This does not seem to be thought through or ever discussed, and to me this is a mistake. * Thomas : put GOOGLE_BUG tag and BUG is for public issue tracker * Edward BUG=g:1234566,b:544 * Edward: happens more on board bringup * Nikolai: maybe keep b: prefix for google bugs BUG=b:google_id,f:flashrom_id * Felix : [https://doc.coreboot.org/infrastructure/services.html#issue-tracker](https:… * [quasisec] I am also unclear how CrOS convergence had really much of an impact on upstream considering >99% of the work was adjusting the CrOS fork to realign with upstream. Only an extremely small amount of alignment was in the form of upstream commits, e.g., missing raiden_debug and some unfortunate part of sb600spi. Is there a specific area that stands out? * [Nico] No idea if related to the original reasons for the fork, but that the convergence is stalling new releases for years stands out pretty much. * [Nico]: How can we teach developers who got to know the [Chrome OS] fork first about the upstream project (if not during review)? * [PatrickG] Once upstream-first is established, downstream patches aren’t reviewed anymore and redirected to upstream. * [quasisec] I am not sure anyone really “got to know the fork” as such. The problem was the fork was treated as a means to an end. Hence all the additional investment in improving flashrom such as life-cycle API and unit-testing to name some recent examples. Other examples include upstreaming additional hardware support such as lspcon, mst’s and raiden or later generation PCH rev’s. * [quasisec]: Regarding “teaching” can you elaborate on what this actually means as I think there is more than one dimension to the intent of that. * [Nico] I see a lack of a forum to teach people about the project. Because the mailing list is basically rejected by Google developers (with exceptions of course), and people ask to keep comments on Gerrit to very specific “actionable” items, where should we teach people about the project, how we do things and what to focus on? Etc. * [quasisec]: No one “rejected” anything, the commit you refer to Nico is here [https://review.coreboot.org/c/flashrom/+/62768](https://review.coreboot.org… and the issue is the tone of the review. I’ll leave others to judge. * Nico: we need to use mailing list for design discussions, before starting the work * Edward: how to decide what is big and what is small? * **dunning kruger effect** * Nico: early engagement before writing code. * New programmers should be discussed first. * Infra change * Change touching multiple layers * aklm: What happens when the developer has already started? * Threshold to decide whether to send a patch without any prior discussion or conversation: are you ok to re-write the patch if the idea is not supported as is? * Price of the mistake? * quasisec: how to make the price not so high that we don’t scare people away also? * Felix: mention in the guidelines , recommend to discuss on mailing list first * Aklm: this is already recommended on the guidelines * Edward: developers think in code first, they think of design and write some draft code * Nik: whatever tool works best * Felix: An account is needed for Gerrit and thus not everyone is able to join the discussion. * Aklm: for a patch you need to know whom to add as reviewers. On the mailing list, you just post, everyone reads. * quasisec: How to make things like adding programmers a bit more template’ty? Common pattern guidance? Make flashrom API’s better? * Edward: can the code say “file a bug” instead of “write to the mailing list”? * Nico: it could be another mailing list? * Edward: prefix in the subject line, so that people can filter if they want, or not do anything. Create a bug, bug updates are sent on the mailing list. User has a handle on the issue. * Felix: people need an account to create bugs on redmine, but for the mailing list no account is needed.

1 0

Updated invitation: Flashrom Dev Meeting (monthly) @ Every 2 weeks from 4pm to 5pm on Thursday (AEST) (flashrom@flashrom.org)
by aklm＠chromium.org 03 May '22

03 May '22

This event has been changed. Title: Flashrom Dev Meeting (monthly) Monthly meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… When: Every 2 weeks from 4pm to 5pm on Thursday Eastern Australia Time - Sydney Joining info: Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 (PIN: 304642402) More phone numbers: https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Calendar: flashrom(a)flashrom.org Who: * aklm(a)chromium.org - creator * felix.singer12(a)gmail.com * david.hendricks(a)gmail.com * quasisec(a)google.com * nico.h(a)gmx.de * Martin Roth * src(a)posteo.de * martonmiklosqdev(a)gmail.com * piotr.krol(a)3mdeb.com * Maciej Pijanowski * michal.zygowski(a)3mdeb.com * th3fanbus(a)gmail.com * stefan.k.reinauer(a)gmail.com * nartemiev(a)google.com * arthur(a)aheymans.xyz * flashrom(a)flashrom.org Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account flashrom(a)flashrom.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively you can sign up for a Google account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organizer and be added to the guest list, or invite others regardless of their own invitation status, or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

1 0

Updated invitation: Flashrom Dev Meeting (monthly) @ Every 2 weeks from 4pm to 5pm on Thursday (AEST) (flashrom@flashrom.org)
by aklm＠chromium.org 03 May '22

03 May '22

This event has been changed. Title: Flashrom Dev Meeting (monthly) Monthly meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… When: Every 2 weeks from 4pm to 5pm on Thursday Eastern Australia Time - Sydney Joining info: Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 (PIN: 304642402) More phone numbers: https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Calendar: flashrom(a)flashrom.org Who: * aklm(a)chromium.org - creator * felix.singer12(a)gmail.com * david.hendricks(a)gmail.com * quasisec(a)google.com * nico.h(a)gmx.de * Martin Roth * src(a)posteo.de * martonmiklosqdev(a)gmail.com * piotr.krol(a)3mdeb.com * Maciej Pijanowski * michal.zygowski(a)3mdeb.com * th3fanbus(a)gmail.com * stefan.k.reinauer(a)gmail.com * nartemiev(a)google.com * arthur(a)aheymans.xyz * flashrom(a)flashrom.org * c-d.hailfinger.devel.2006(a)gmx.net Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account flashrom(a)flashrom.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively you can sign up for a Google account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organizer and be added to the guest list, or invite others regardless of their own invitation status, or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

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MX25L12833F
by Jon Bowen 02 May '22

02 May '22

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Found Generic flash chip "unknown SPI chip (REMS)" (0 kB, SPI) on serprog.
by Gabriel Lopes da Silva Saraiva 30 Apr '22

30 Apr '22

The CHIP IC is: 25QL128CSIG I submitted a ticket on github, but but the BOT shut down, I tried to submit it a second time. sudo flashrom -p serprog:dev=/dev/ttyACM0:4000000 -r file-to-save.binflashrom unknown on Linux 5.11.0-46-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). serprog: Programmer name is "stm32-vserprog" serprog: requested mapping AT45CS1282 is incompatible: 0x1080000 bytes at 0x00000000fef80000. serprog: requested mapping GD25Q256D is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping IS25LP256 is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping IS25WP256 is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping MX25L25635F/MX25L25645G is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping MX25U25635F is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping MX25U51245G is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping MX66L51235F/MX25L51245G is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping MX66L1G45G is incompatible: 0x8000000 bytes at 0x00000000f8000000. serprog: requested mapping N25Q00A..1G is incompatible: 0x8000000 bytes at 0x00000000f8000000. serprog: requested mapping N25Q00A..3G is incompatible: 0x8000000 bytes at 0x00000000f8000000. serprog: requested mapping N25Q256..1E is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping N25Q256..3E is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping N25Q512..1G is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping N25Q512..3G is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping MT25QL01G is incompatible: 0x8000000 bytes at 0x00000000f8000000. serprog: requested mapping MT25QU01G is incompatible: 0x8000000 bytes at 0x00000000f8000000. serprog: requested mapping MT25QL02G is incompatible: 0x10000000 bytes at 0x00000000f0000000. serprog: requested mapping MT25QU02G is incompatible: 0x10000000 bytes at 0x00000000f0000000. serprog: requested mapping MT25QL256 is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping MT25QU256 is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping MT25QL512 is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping MT25QU512 is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping S25FL256S......0 is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping S25FL512S is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping W25Q256.V is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping W25Q256JV_M is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping W25Q256.W is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping W25Q256JW_DTR is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping W25Q512JV is incompatible: 0x4000000 bytes at 0x00000000fc000000. serprog: requested mapping XM25QH256C is incompatible: 0x2000000 bytes at 0x00000000fe000000. serprog: requested mapping XM25QU256C is incompatible: 0x2000000 bytes at 0x00000000fe000000. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Att, Utherbone (Gabriel) <http://speedtec.gq/> <http://speedtec.gq/> <http://gabrielsaraiva.xyz/>

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[flashrom - Bug #352] (New) test issue for mailing list
by Felix Singer 25 Apr '22

25 Apr '22

Issue #352 has been reported by Felix Singer. ---------------------------------------- Bug #352: test issue for mailing list https://ticket.coreboot.org/issues/352 * Author: Felix Singer * Status: New * Priority: Normal * Target version: none * Start date: 2022-04-25 ---------------------------------------- This is a test issue for the flashrom mailing list. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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Unsupported chip AT25SF128A
by Staffan Ulfberg 23 Apr '22

23 Apr '22

Datasheet at: https://www.dialog-semiconductor.com/sites/default/files/2021-02/DS-AT25SF1… Probing for Unknown SFDP-capable chip, 0 kB: SFDP revision = 1.0 SFDP number of parameter headers is 2 (NPH = 1). SFDP parameter table header 0/1: ID 0x00, version 1.0 Length 36 B, Parameter Table Pointer 0x000030 Parsing JEDEC flash parameter table... 3-Byte only addressing. Status register is non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR. Write chunk size is at least 64 B. Flash chip size is 16384 kB. Block eraser 0: 4096 x 4096 B with opcode 0x20 Tried to add a duplicate block eraser: 4096 x 4096 B with opcode 0x20. Block eraser 1: 512 x 32768 B with opcode 0x52 Block eraser 2: 256 x 65536 B with opcode 0xd8 done. SFDP parameter table header 1/1: ID 0x1f, version 1.0 Length 12 B, Parameter Table Pointer 0x000060 === SFDP has autodetected a flash chip which is not natively supported by flashrom yet. All standard operations (read, verify, erase and write) should work, but to support all possible features we need to add them manually. You can help us by mailing us the output of the following command to flashrom(a)flashrom.org: 'flashrom -VV [plus the -p/--programmer parameter]' Thanks for your help! ===

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Code Reviews guidelines discussion
by Anastasia Klimchuk 22 Apr '22

22 Apr '22

Hello People, Few weeks ago at the flashrom meeting we had a discussion about code reviews and the situations that sometimes happen. We decided that it would be good to have some guidelines… and then we decided that I will start writing something. I have been thinking about it since then. I even started writing something, but I wasn’t happy at all: it felt like composing a wall of text that no one would be reading. I decided to think about: what problems are we solving? And then it got much better. I gathered the list of problems that I think are present and repeatedly happen during code reviews. All of the below is RFC and of course, if there is a problem that is missing, please tell. I would really appreciate everyone’s opinions on this! What I suggest is: after agreeing on the list of problems, compose and agree the answers to them (yes easier to say then to do :)), and then it can be like “Code Reviews FAQ” or something like that? Especially if we can encourage people to read the other point of view first. —-------------------------------------- ## Contributor point of view ## —-------------------------------------- #1 Is this comment a conversation or an action item? #2 Is this comment blocking patch from merging or non-blocking? #3 Are we waiting for anyone [else] to have a look at this patch? #4 Is my patch ready to be merged? / Why is my patch not being merged? #5 Who are the best reviewers for this patch? #6 This patch is a real emergency, what is the process for that? —----------------------------------------------------- ## Reviewer / Maintainer point of view ## —----------------------------------------------------- #1 My important comment(s) got ignored and the patch was merged regardless. #2 I have so many code reviews, and everyone wants it fast and complains reviews are too slow. #3 A patch that was merged broke something, but people don't want to revert. #4 I asked the patch owner to fix something, but they are arguing with me instead, and wasting everyone's time. #5 What this patch is doing, and why is it needed? #6 I want to review the patch, but I am busy for the next X weeks. -- Anastasia.

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