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[commit] r1757 - trunk
by repository service 02 Oct '13

02 Oct '13

Author: stefanct Date: Wed Oct 2 03:22:17 2013 New Revision: 1757 URL: http://flashrom.org/trac/flashrom/changeset/1757 Log: rayer_spi: Fix Xilinx DLC-5 cable. Pin 6 on LPT controls a pulldown on MISO/TDO signal. Whether there exists an unbuffered clone is unknown. The author of the original patch confirmed in private correspondence that the patch was incomplete. There has been no sign of an unbuffered version on the interwebs, hence just change the existing driver to disable the pulldown. Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/rayer_spi.c Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Wed Oct 2 03:22:11 2013 (r1756) +++ trunk/rayer_spi.c Wed Oct 2 03:22:17 2013 (r1757) @@ -63,11 +63,16 @@ .miso_bit = 6, }; +static void dlc5_preinit(const void *); +static int dlc5_shutdown(void *); + static const struct rayer_pinout xilinx_dlc5 = { .cs_bit = 2, .sck_bit = 1, .mosi_bit = 0, .miso_bit = 4, + .preinit = dlc5_preinit, + .shutdown = dlc5_shutdown, }; static void byteblaster_preinit(const void *); @@ -256,6 +261,21 @@ OUTB(lpt_outbyte, lpt_iobase); return 0; } + +static void dlc5_preinit(const void *data) { + msg_pdbg("dlc5_preinit\n"); + /* Assert pin 6 to receive MISO. */ + lpt_outbyte |= (1<<4); + OUTB(lpt_outbyte, lpt_iobase); +} + +static int dlc5_shutdown(void *data) { + msg_pdbg("dlc5_shutdown\n"); + /* De-assert pin 6 to force MISO low. */ + lpt_outbyte &= ~(1<<4); + OUTB(lpt_outbyte, lpt_iobase); + return 0; +} #else #error PCI port I/O access is not supported on this architecture yet.

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[commit] r1756 - trunk
by repository service 02 Oct '13

02 Oct '13

Author: stefanct Date: Wed Oct 2 03:22:11 2013 New Revision: 1756 URL: http://flashrom.org/trac/flashrom/changeset/1756 Log: rayer_spi: Add pinout for Wiggler LPT. Signed-off-by: Maksim Kuleshov <mmcx(a)mail.ru> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: Maksim Kuleshov <mmcx(a)mail.ru> Acked-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Modified: trunk/flashrom.8.tmpl trunk/rayer_spi.c Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Wed Oct 2 03:22:02 2013 (r1755) +++ trunk/flashrom.8.tmpl Wed Oct 2 03:22:11 2013 (r1756) @@ -760,7 +760,7 @@ .B model can be .BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \ -STK200/300, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)." +STK200/300, " wiggler " for the Macraigor Wiggler, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)." .sp More information about the RayeR hardware is available at .nh @@ -768,6 +768,9 @@ The Altera ByteBlasterMV datasheet can be obtained from .nh .BR "http://www.altera.co.jp/literature/ds/dsbytemv.pdf " . +For more information about the Macraigor Wiggler see +.nh +.BR "http://www.macraigor.com/wiggler.htm " . The schematic of the Xilinx DLC 5 was published in .nh .BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " . Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Wed Oct 2 03:22:02 2013 (r1755) +++ trunk/rayer_spi.c Wed Oct 2 03:22:11 2013 (r1756) @@ -94,11 +94,19 @@ .shutdown = stk200_shutdown, }; +static const struct rayer_pinout wiggler_lpt = { + .cs_bit = 1, + .sck_bit = 2, + .mosi_bit = 3, + .miso_bit = 7, +}; + static const struct rayer_programmer rayer_spi_types[] = { {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv}, {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200}, + {"wiggler", OK, "Wiggler LPT", &wiggler_lpt}, {0}, };

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[commit] r1755 - trunk
by repository service 02 Oct '13

02 Oct '13

Author: stefanct Date: Wed Oct 2 03:22:02 2013 New Revision: 1755 URL: http://flashrom.org/trac/flashrom/changeset/1755 Log: rayer_spi: Add pinout for Atmel STK200/300. Signed-off-by: Maksim Kuleshov <mmcx(a)mail.ru> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Acked-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Modified: trunk/flashrom.8.tmpl trunk/rayer_spi.c Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Wed Oct 2 03:21:57 2013 (r1754) +++ trunk/flashrom.8.tmpl Wed Oct 2 03:22:02 2013 (r1755) @@ -759,8 +759,8 @@ syntax where .B model can be -.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, or " xilinx \ -" for the Xilinx Parallel Cable III (DLC 5)." +.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \ +STK200/300, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)." .sp More information about the RayeR hardware is available at .nh Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Wed Oct 2 03:21:57 2013 (r1754) +++ trunk/rayer_spi.c Wed Oct 2 03:22:02 2013 (r1755) @@ -82,10 +82,23 @@ .shutdown = byteblaster_shutdown, }; +static void stk200_preinit(const void *); +static int stk200_shutdown(void *); + +static const struct rayer_pinout atmel_stk200 = { + .cs_bit = 7, + .sck_bit = 4, + .mosi_bit = 5, + .miso_bit = 6, + .preinit = stk200_preinit, + .shutdown = stk200_shutdown, +}; + static const struct rayer_programmer rayer_spi_types[] = { {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv}, + {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200}, {0}, }; @@ -221,6 +234,21 @@ return 0; } +static void stk200_preinit(const void *data) { + msg_pdbg("stk200_init\n"); + /* Assert #EN signals, set LED signal. */ + lpt_outbyte = (1 << 6) ; + OUTB(lpt_outbyte, lpt_iobase); +} + +static int stk200_shutdown(void *data) { + msg_pdbg("stk200_shutdown\n"); + /* Assert #EN signals, clear LED signal. */ + lpt_outbyte = (1 << 2) | (1 << 3); + OUTB(lpt_outbyte, lpt_iobase); + return 0; +} + #else #error PCI port I/O access is not supported on this architecture yet. #endif

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[commit] r1754 - trunk
by repository service 02 Oct '13

02 Oct '13

Author: stefanct Date: Wed Oct 2 03:21:57 2013 New Revision: 1754 URL: http://flashrom.org/trac/flashrom/changeset/1754 Log: rayer_spi: Add pinout for Altera ByteBlasterMV. There is a ByteBlasterII product that is only almost compatible. Signed-off-by: Maksim Kuleshov <mmcx(a)mail.ru> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: Maksim Kuleshov <mmcx(a)mail.ru> Acked-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashrom.8.tmpl trunk/rayer_spi.c Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Wed Oct 2 03:21:45 2013 (r1753) +++ trunk/flashrom.8.tmpl Wed Oct 2 03:21:57 2013 (r1754) @@ -759,12 +759,15 @@ syntax where .B model can be -.BR rayer " for the RayeR cable or " xilinx " for the Xilinx Parallel Cable III -(DLC 5). +.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, or " xilinx \ +" for the Xilinx Parallel Cable III (DLC 5)." .sp More information about the RayeR hardware is available at .nh .BR "http://rayer.ic.cz/elektro/spipgm.htm " . +The Altera ByteBlasterMV datasheet can be obtained from +.nh +.BR "http://www.altera.co.jp/literature/ds/dsbytemv.pdf " . The schematic of the Xilinx DLC 5 was published in .nh .BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " . Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Wed Oct 2 03:21:45 2013 (r1753) +++ trunk/rayer_spi.c Wed Oct 2 03:21:57 2013 (r1754) @@ -70,9 +70,22 @@ .miso_bit = 4, }; +static void byteblaster_preinit(const void *); +static int byteblaster_shutdown(void *); + +static const struct rayer_pinout altera_byteblastermv = { + .cs_bit = 1, + .sck_bit = 0, + .mosi_bit = 6, + .miso_bit = 7, + .preinit = byteblaster_preinit, + .shutdown = byteblaster_shutdown, +}; + static const struct rayer_programmer rayer_spi_types[] = { {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, + {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv}, {0}, }; @@ -195,6 +208,19 @@ return 0; } +static void byteblaster_preinit(const void *data){ + msg_pdbg("byteblaster_preinit\n"); + /* Assert #EN signal. */ + OUTB(2, lpt_iobase + 2 ); +} + +static int byteblaster_shutdown(void *data){ + msg_pdbg("byteblaster_shutdown\n"); + /* De-Assert #EN signal. */ + OUTB(0, lpt_iobase + 2 ); + return 0; +} + #else #error PCI port I/O access is not supported on this architecture yet. #endif

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[commit] r1753 - trunk
by repository service 02 Oct '13

02 Oct '13

Author: stefanct Date: Wed Oct 2 03:21:45 2013 New Revision: 1753 URL: http://flashrom.org/trac/flashrom/changeset/1753 Log: rayer_spi: Improve support for different pinouts. Create a list of programmer types with names, test state and linked layouts. This list could be listed with flashrom -L in follow-up patches. Handle a bit in status register that is inverted, this will be used in different future programmer types. Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: Maksim Kuleshov <mmcx(a)mail.ru> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashrom.8.tmpl trunk/rayer_spi.c Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Mon Sep 23 17:32:25 2013 (r1752) +++ trunk/flashrom.8.tmpl Wed Oct 2 03:21:45 2013 (r1753) @@ -208,8 +208,7 @@ .sp .BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)" .sp -.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport " -or Xilinx DLC5 compatible cable) +.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)" .sp .BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port " bitbanging adapter) @@ -766,9 +765,9 @@ More information about the RayeR hardware is available at .nh .BR "http://rayer.ic.cz/elektro/spipgm.htm " . -The schematic of the Xilinx DLC 5 was published at +The schematic of the Xilinx DLC 5 was published in .nh -.BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " . +.BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " . .SS .BR "pony_spi " programmer The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Mon Sep 23 17:32:25 2013 (r1752) +++ trunk/rayer_spi.c Wed Oct 2 03:21:45 2013 (r1753) @@ -17,11 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* Driver for the SPIPGM hardware by "RayeR" Martin Rehak. - * See http://rayer.ic.cz/elektro/spipgm.htm for schematics and instructions. - */ - -/* This driver uses non-portable direct I/O port accesses which won't work on +/* Driver for various LPT adapters. + * + * This driver uses non-portable direct I/O port accesses which won't work on * any non-x86 platform, and even on x86 there is a high chance there will be * collisions with any loaded parallel port drivers. * The big advantage of direct port I/O is OS independence and speed because @@ -37,21 +35,48 @@ #include "programmer.h" #include "hwaccess.h" -enum rayer_type { - TYPE_RAYER, - TYPE_XILINX_DLC5, -}; - /* We have two sets of pins, out and in. The numbers for both sets are * independent and are bitshift values, not real pin numbers. * Default settings are for the RayeR hardware. */ -/* Pins for master->slave direction */ -static int rayer_cs_bit = 5; -static int rayer_sck_bit = 6; -static int rayer_mosi_bit = 7; -/* Pins for slave->master direction */ -static int rayer_miso_bit = 6; + +struct rayer_programmer { + const char *type; + const enum test_state status; + const char *description; + const void *dev_data; +}; + +struct rayer_pinout { + uint8_t cs_bit; + uint8_t sck_bit; + uint8_t mosi_bit; + uint8_t miso_bit; + void (*preinit)(const void *); + int (*shutdown)(void *); +}; + +static const struct rayer_pinout rayer_spipgm = { + .cs_bit = 5, + .sck_bit = 6, + .mosi_bit = 7, + .miso_bit = 6, +}; + +static const struct rayer_pinout xilinx_dlc5 = { + .cs_bit = 2, + .sck_bit = 1, + .mosi_bit = 0, + .miso_bit = 4, +}; + +static const struct rayer_programmer rayer_spi_types[] = { + {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, + {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, + {0}, +}; + +static const struct rayer_pinout *pinout = NULL; static uint16_t lpt_iobase; @@ -60,22 +85,22 @@ static void rayer_bitbang_set_cs(int val) { - lpt_outbyte &= ~(1 << rayer_cs_bit); - lpt_outbyte |= (val << rayer_cs_bit); + lpt_outbyte &= ~(1 << pinout->cs_bit); + lpt_outbyte |= (val << pinout->cs_bit); OUTB(lpt_outbyte, lpt_iobase); } static void rayer_bitbang_set_sck(int val) { - lpt_outbyte &= ~(1 << rayer_sck_bit); - lpt_outbyte |= (val << rayer_sck_bit); + lpt_outbyte &= ~(1 << pinout->sck_bit); + lpt_outbyte |= (val << pinout->sck_bit); OUTB(lpt_outbyte, lpt_iobase); } static void rayer_bitbang_set_mosi(int val) { - lpt_outbyte &= ~(1 << rayer_mosi_bit); - lpt_outbyte |= (val << rayer_mosi_bit); + lpt_outbyte &= ~(1 << pinout->mosi_bit); + lpt_outbyte |= (val << pinout->mosi_bit); OUTB(lpt_outbyte, lpt_iobase); } @@ -83,8 +108,8 @@ { uint8_t tmp; - tmp = INB(lpt_iobase + 1); - tmp = (tmp >> rayer_miso_bit) & 0x1; + tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted + tmp = (tmp >> pinout->miso_bit) & 0x1; return tmp; } @@ -99,8 +124,8 @@ int rayer_spi_init(void) { + const struct rayer_programmer *prog = rayer_spi_types; char *arg = NULL; - enum rayer_type rayer_type = TYPE_RAYER; /* Non-default port requested? */ arg = extract_programmer_param("iobase"); @@ -138,36 +163,20 @@ arg = extract_programmer_param("type"); if (arg) { - if (!strcasecmp(arg, "rayer")) { - rayer_type = TYPE_RAYER; - } else if (!strcasecmp(arg, "xilinx")) { - rayer_type = TYPE_XILINX_DLC5; - } else { + for (; prog->type != NULL; prog++) { + if (strcasecmp(arg, prog->type) == 0) { + break; + } + } + if (prog->type == NULL) { msg_perr("Error: Invalid device type specified.\n"); free(arg); return 1; } + free(arg); } - free(arg); - switch (rayer_type) { - case TYPE_RAYER: - msg_pdbg("Using RayeR SPIPGM pinout.\n"); - /* Bits for master->slave direction */ - rayer_cs_bit = 5; - rayer_sck_bit = 6; - rayer_mosi_bit = 7; - /* Bits for slave->master direction */ - rayer_miso_bit = 6; - break; - case TYPE_XILINX_DLC5: - msg_pdbg("Using Xilinx Parallel Cable III (DLC 5) pinout.\n"); - /* Bits for master->slave direction */ - rayer_cs_bit = 2; - rayer_sck_bit = 1; - rayer_mosi_bit = 0; - /* Bits for slave->master direction */ - rayer_miso_bit = 4; - } + msg_pinfo("Using %s pinout.\n", prog->description); + pinout = (struct rayer_pinout *)prog->dev_data; if (rget_io_perms()) return 1; @@ -175,6 +184,11 @@ /* Get the initial value before writing to any line. */ lpt_outbyte = INB(lpt_iobase); + if (pinout->shutdown) + register_shutdown(pinout->shutdown, (void*)pinout); + if (pinout->preinit) + pinout->preinit(pinout); + if (bitbang_spi_init(&bitbang_spi_master_rayer)) return 1;

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Re: [flashrom] [not working] Abit IS7 (P4)
by san 01 Oct '13

01 Oct '13

Hi again! I'm trying to "Try & Error method on GPIO pins" but not sure what to do: ====================== san@flashrom:~$ lspci | grep ISA 00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (ICH5/ICH5R) LPC Interface Bridge (rev 02) ====================== seems to be fine, but can not find anything usefull at: ====================== san@flashrom:~$ cat /proc/ioports 0000-001f : dma1 0020-0021 : pic1 0040-0043 : timer0 0050-0053 : timer1 0060-0060 : keyboard 0064-0064 : keyboard 0070-0073 : rtc0 0080-008f : dma page reg 00a0-00a1 : pic2 00c0-00df : dma2 00f0-00ff : fpu 0170-0177 : 0000:00:1f.1 0170-0177 : ata_piix 01f0-01f7 : 0000:00:1f.1 01f0-01f7 : ata_piix 0294-0297 : pnp 00:01 0376-0376 : 0000:00:1f.1 0376-0376 : ata_piix 0378-037a : parport0 03f2-03f2 : floppy 03f4-03f5 : floppy 03f6-03f6 : 0000:00:1f.1 03f6-03f6 : ata_piix 03f7-03f7 : floppy 03f8-03ff : serial 0400-04bf : pnp 00:0a 0400-0403 : ACPI PM1a_EVT_BLK 0404-0405 : ACPI PM1a_CNT_BLK 0408-040b : ACPI PM_TMR 0428-042f : ACPI GPE0_BLK 04d0-04d1 : pnp 00:01 0500-051f : 0000:00:1f.3 0a78-0a7b : pnp 00:01 0b78-0b7b : pnp 00:01 0bbc-0bbf : pnp 00:01 0cf8-0cff : PCI conf1 0e78-0e7b : pnp 00:01 0f78-0f7b : pnp 00:01 0fbc-0fbf : pnp 00:01 a000-afff : PCI Bus 0000:02 a000-a0ff : 0000:02:02.0 a000-a0ff : 8139too b000-b01f : 0000:00:1d.1 b000-b01f : uhci_hcd b400-b41f : 0000:00:1d.2 b400-b41f : uhci_hcd b800-b81f : 0000:00:1d.3 b800-b81f : uhci_hcd bc00-bc1f : 0000:00:1d.0 bc00-bc1f : uhci_hcd c000-c007 : 0000:00:1f.2 c000-c007 : ata_piix c400-c403 : 0000:00:1f.2 c400-c403 : ata_piix c800-c807 : 0000:00:1f.2 c800-c807 : ata_piix cc00-cc03 : 0000:00:1f.2 cc00-cc03 : ata_piix d000-d00f : 0000:00:1f.2 d000-d00f : ata_piix d800-d8ff : 0000:00:1f.5 d800-d8ff : Intel ICH5 dc00-dc3f : 0000:00:1f.5 dc00-dc3f : Intel ICH5 f000-f00f : 0000:00:1f.1 f000-f00f : ata_piix ====================== You can find bios dump on my server ( http://www.e-san.info/Go!/deeper!/Flashrom-Przemo/) and other files. Regards. 2013/10/1 san <san(a)plusnet.pl> > Hi! > > I'm trying to run flashrom on my platform but no luck. All info, bios etc. > are avalaible here: http://www.e-san.info/Go!/deeper!/Flashrom-Przemo/ > but i'll attach it too (without bios). > > Best Regards! > > -- > [ e-San.info | San(a)plusnet.pl ] > -- [ e-San.info | San(a)plusnet.pl ]

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[not working] Abit IS7 (P4)
by san 01 Oct '13

01 Oct '13

Hi! I'm trying to run flashrom on my platform but no luck. All info, bios etc. are avalaible here: http://www.e-san.info/Go!/deeper!/Flashrom-Przemo/ but i'll attach it too (without bios). Best Regards! -- [ e-San.info | San(a)plusnet.pl ]

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W836xx: ASUS A7N8X-X: flashrom -V
by Markas 29 Sep '13

29 Sep '13

Greetings flashrom folks, Below is some hopefully helpful output. Many thanks, Mark flashrom v0.9.6.1-r1705 on Linux 3.9.5-301.fc19.i686 (i686) flashrom was built with libpci 3.2.0, GCC 4.8.1 20130603 (Red Hat 4.8.1-1), little endian Command line (3 args): flashrom -V -o flashrom.log Using default programmer "internal". Calibrating delay loop... OS timer resolution is 1 usecs, 958M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1005 us, 10000 myus = 15085 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "ASUSTeK Computer INC." DMI string system-product-name: "A7N8X-X" DMI string system-version: "REV 2.xx" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "A7N8X-X" DMI string baseboard-version: "REV 2.xx" DMI string chassis-type: "Desktop" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 87. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found ITE Super I/O, ID 0x8708 on port 0x2e Found chipset "NVIDIA NForce2" with PCI ID 10de:0060. Enabling flash write... OK. Super I/O ID 0x8708 is not on the list of flash capable controllers. The following protocols are supported: Non-SPI. Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49(H)F010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49F080, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49F080T, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for ESMT F49B002UA, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0x2589, id2 0x002d Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2d Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2d Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x25, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x25, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0xaa, id2 0x6e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Found SST flash chip "SST49LF020" (256 kB, LPC) at physical address 0xfffc0000. Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xbf, id2 0x61 Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2d Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2d Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x66, id2 0x58, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xaa, id2 0x6e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x25, id2 0x53, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39F010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39L010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39L020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x61 Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xbf, id2 0x61 Found SST flash chip "SST49LF020" (256 kB, LPC). No operations were specified. Restoring PCI config space for 00:01:0 reg 0x6d Restoring PCI config space for 00:01:0 reg 0x92

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test flashrom on Gigabyte GA-Z68MA-D2H-B3 (rev. 1.3) mainboard
by Vangelis Skarmoutsos 28 Sep '13

28 Sep '13

The flashing succeeded. All worked perfect. Attachments: dump1 (flashrom -p internal -V) dump2 (lspci -nnvvxxx) dump3 (superiotool -deV) * * I would prefer if "-p internal" was the default (less typing). The tool is really easy to use but a GUI would be preferred. Thank you anyway for this wonderful tool.

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Donations in Bitcoin
by Fabián Rodríguez 28 Sep '13

28 Sep '13

Hi, I am attending the GNU 30th anniversary hackathon/events and when I asked about donating in Bitcoin it was suggested I asked here. I'd like to make a donation, perhaps a project member can take it personally and then use it in the project. It would be nice to be able to donate on the site directly too. I prefer not to donate in cash in person as I need the currency for local use. Cheers, Fabian -- Fabián Rodríguez http://fsf.magicfab.ca

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Detailed Log for untested Asrock B75M-ITX
by M. Duell 28 Sep '13

28 Sep '13

Hi, in the attachment is the detailed log as requested by flashrom -r backup.img -p internal. (I am using the current debian testing package of flashrom) Best, M. Duell

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Re: [flashrom] problem with SST25VF040B
by Carl-Daniel Hailfinger 27 Sep '13

27 Sep '13

Hello Fabio, Am 25.09.2013 15:01 schrieb Fabio: > hello, I'm trying to retrieve a notebook with SST25VF040B, but is not > recognized by flashrom. I'm using a asus motherboard with Intel P67, > Winbond is that mounts originally riconoscituo while the SST25VF040B not. > What could I check? > thanks > > [...] > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x7d, id2 0x52bf > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x7d, id2 0x535f > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x7d, id2 0x72bf > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x7d, id2 0x72ff > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x7d, id2 0x73ff > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0x7d, id2 0x7fff > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xfa, id2 0xa6bf > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xfa, id2 0xe57f > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xfa, id2 0xffff > RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xfc, id2 0xafff > [...] A SST25VF040B should have id1 0xbf, id2 0x258d. The values above look like some sort of corruption. All IDs returned by probe_spi_rdid_generic should have been identical. This corruption can be caused by: 1. Wrong voltage for the flash chip. flashrom can't change the default voltage on Intel chipsets. The SST25VF040B expects 2.7V-3.6V. 2. Wrong speed for the flash chip. flashrom uses 20 MHz on Intel chipsets. 3. Unstable connection to the flash chip. Are the wires too long (longer than 5 cm) or is there a soldering problem? You could try to use another programmer (e.g. Intel network card) for this flash chip. Maybe that works better. Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] flashrom upgrade
by Carl-Daniel Hailfinger 27 Sep '13

27 Sep '13

Hi, it seems a part of your mail is missing. All we got was a partial log from flashrom and we don't know if you need help or if you want to report success or if there's anything else you need. Regards, Carl-Daniel Am 12.09.2013 20:44 schrieb it(a)sca-uk.com: > Super I/O ID 0x8712 is not on the list of flash capable controllers. > The following protocols are supported: SPI. > Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Chip status register is 00 > Chip status register: Status Register Write Disable (SRWD) is not set > Chip status register: Bit 6 is not set > Chip status register: Bit 5 / Block Protect 3 (BP3) is not set > Chip status register: Bit 4 / Block Protect 2 (BP2) is not set > Chip status register: Bit 3 / Block Protect 1 (BP1) is not set > Chip status register: Bit 2 / Block Protect 0 (BP0) is not set > Chip status register: Write Enable Latch (WEL) is not set > Chip status register: Write In Progress (WIP/BUSY) is not set > Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address > 0xfff00000. > Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 > Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 > Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 > Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 > Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 > Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. > Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. > Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. > Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. > Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, > id2 0x2014 > Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 > 0xc2, id2 0x2014 > Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, > id2 0x2014 > Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: > id1 0xc2, id2 0x2014 > Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, > id2 0x2014 > Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, > id2 0x2014 > Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 > 0x2014 > Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 > 0xc2, id2 0x2014 > Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 > 0xc2, id2 0x2014 > Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 > 0x13 > Found Macronix flash chip "MX25L8005" (1024 kB, SPI). > No operations were specified. -- http://www.hailfinger.org/

1 0

W836xx: ???: flashrom -V
by King,Michael A 25 Sep '13

25 Sep '13

Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "Intel ICH7/ICH7R". Enabling flash write... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. root@aptosidbox:/home/mk# flashrom -V flashrom v0.9.6.1-r1563 on Linux 3.7-1.slh.1-aptosid-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.6.2, little endian Command line (1 args): flashrom -V Please select a programmer with the --programmer parameter. Valid choices are: internal, dummy, nic3com, nicrealtek, gfxnvidia, drkaiser, satasii, ft2232_spi, serprog, buspirate_spi, rayer_spi, pony_spi, nicintel, nicintel_spi, ogp_spi, satamv root@aptosidbox:/home/mk# flashrom -p internal -V flashrom v0.9.6.1-r1563 on Linux 3.7-1.slh.1-aptosid-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.6.2, little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 1 usecs, 1305M loops per second, delay more than 10% too short (got 66% of expected delay), recalculating... 1974M loops per second, 10 myus = 13 us, 100 myus = 130 us, 1000 myus = 1027 us, 10000 myus = 10740 us, 4 myus = 7 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "IBM" DMI string system-product-name: "82121QU" DMI string system-version: "ThinkCentre M52" DMI string baseboard-manufacturer: "IBM" DMI string baseboard-product-name: "IBM" DMI string baseboard-version: "Not Specified" DMI string chassis-type: "Desktop" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 18. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: fe. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "Intel ICH7/ICH7R" with PCI ID 8086:27b8. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 Root Complex Register Block address = 0xfed1c000 GCS = 0x260c65: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (LPC) Top Swap : not enabled OK. The following protocols are supported: FWH. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x8e, id2 0x60, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x8e, id2 0x60, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x8e, id2 0x60, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x1e, id2 0x2b, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x8e, id2 0x60, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x8e, id2 0x60, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically.

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Gigabit 6GA-M5S-S3: flashrom -V
by Erkki Markus 25 Sep '13

25 Sep '13

Hi! I have a Gigabit GA-M56S-S3 and flashrom -V produced the following results: Best wishes, Erkki Markus erkkimarkus@erkki-arvuti:~$ sudo flashrom -V flashrom v0.9.5.2-r1517 on Linux 3.2.0-39-generic-pae (i686), built with libpci 3.1.8, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1103M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1008 us, 10000 myus = 9998 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." DMI string system-product-name: "M56S-S3" DMI string system-version: " " DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "6GA-M5S-S3" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8716 on port 0x2e Found chipset "NVIDIA MCP65" with PCI ID 10de:0441. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Flash bus type is LPC Found SMBus device 10de:0446 at 00:01:1 MCP SPI BAR is at 0xfec80000 Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled Serial flash pin 29 Serial flash port 0x0820 The following protocols are supported: LPC, SPI. Probing for AMIC A25L05PT, 64 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L05PU, 64 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L10PT, 128 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L10PU, 128 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L20PT, 256 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L20PU, 256 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L40PT, 512 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L40PU, 512 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L80P, 1024 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L16PT, 2048 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L16PU, 2048 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L4005" (512 kB, SPI) at physical address 0xfff80000. Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x12, id2 0x12 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x12, id2 0x12 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: 4 byte RDID not supported on this SPI controller Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0x23, id2 0x2d, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Found Macronix flash chip "MX25L4005" (512 kB, SPI). No operations were specified. Restoring PCI config space for 00:01:0 reg 0x6d Restoring PCI config space for 00:01:0 reg 0x90 Restoring PCI config space for 00:01:0 reg 0x8c Restoring PCI config space for 00:01:0 reg 0x88

1 0

problem with SST25VF040B
by Fabio 25 Sep '13

25 Sep '13

hello, I'm trying to retrieve a notebook with SST25VF040B, but is not recognized by flashrom. I'm using a asus motherboard with Intel P67, Winbond is that mounts originally riconoscituo while the SST25VF040B not. What could I check? thanks -- ** Prima di stampare questa e-mail, pensa all'ambiente!

1 0

[PATCH 6/6] [WIP] layout: Bailout early in process_include_args() if region file is inaccessible.
by Stefan Tauner 24 Sep '13

24 Sep '13

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- layout.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/layout.c b/layout.c index d522348..66b7d5b 100644 --- a/layout.c +++ b/layout.c @@ -19,6 +19,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef __LIBPAYLOAD__ +#include <sys/types.h> +#include <sys/stat.h> +#include <unistd.h> +#endif #include <stdio.h> #include <stdlib.h> #include <string.h> @@ -443,6 +448,25 @@ int process_include_args(void) msg_gerr("Error: No file I/O support in libpayload\n"); return 1; #else + if (access(file, R_OK) != 0) { + msg_gerr("Region file name \"%s\" seems to be unreadable: %s\n", + file, strerror(errno)); + return 1; + } + + struct stat file_stat; + if (stat((file), &file_stat) != 0) { + msg_gerr("Error: getting metadata of file \"%s\" failed: %s\n", + file, strerror(errno)); + return 1; + } + chipoff_t size = rom_entries[idx].end - rom_entries[idx].start + 1; + if (file_stat.st_size != size) { + msg_gerr("Error: Region file size (%jd B) doesn't match the region's size (%" + PRIuCHIPSIZE " B)!\n", (intmax_t)file_stat.st_size, size); + return 1; + } + file = strdup(file); if (file == NULL) { msg_gerr("Out of memory!\n"); -- Kind regards, Stefan Tauner

1 0

[PATCH 5/6] layout: Add preliminary support for flags.
by Stefan Tauner 24 Sep '13

24 Sep '13

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashrom.8.tmpl | 14 ++++++++------ layout.c | 27 ++++++++++++++++++++------- 2 files changed, 28 insertions(+), 13 deletions(-) diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index 765d7f6..b4fd5c9 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -218,27 +218,29 @@ quotes, or else only the part before the first space will be recognized. Each layout entry describes an address region of the flash chip and gives it a name (hereinafter referred to as a region). One entry per line is allowed with the following syntax: .sp -.B " startaddr:endaddr regionname" +.B " startaddr:endaddr regionname [flags]" .sp .BR "startaddr " "and " "endaddr " are addresses within the ROM image representing the flash ROM contents. They are interpreted in the 'usual' form i.e.\ a leading 0 means octal, leading 0x or 0X means hexadecimal, everything else is just decimal. Negative numbers are interpreted as addresses aligned to the top of the current chip's address space, for example -.sp - 0:-0 "whole chip" -.sp +.B 0:-0 will always describe the complete flash space no matter which chip is used. This syntax is useful for specifying -"the top 1MB" (-0x100000:-0) etc. +"the top 1MB" (-0xfffff:-0) etc. .sp .BR "regionname " "is the name for the region from " "startaddr " "to " "endaddr " "(both addresses included)." If the name contains spaces it has to be written in double quotes, or else only the part before the first space will be used. .sp +.B flags +is an optional field to further describe regions by a list of possibly quoted strings separated by commas. +.RB "Currently only " rw " is supported which denotes a region to be readable and writeable." +.sp Example content of file rom.layout: .sp # flashrom layout v2 source /home/flashrom/include.layout - 0x00000000:0x00008fff "gfx rom" + 0x00000000:0x00008fff "gfx rom" rw 0x00009000:0x0003ffff normal 0x00040000:0x0007ffff fallback .sp diff --git a/layout.c b/layout.c index d94cbe0..d522348 100644 --- a/layout.c +++ b/layout.c @@ -54,7 +54,7 @@ static char *include_args[MAX_ROMLAYOUT]; static int num_include_args = 0; /* the number of valid include_args. */ /* returns the index of the entry (or a negative value if it is not found) */ -static int find_romentry(char *name) +static int find_romentry(const char *name) { int i; msg_gspew("Looking for region \"%s\"... ", name); @@ -200,10 +200,23 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr "Could not find region name in \"%s\".\n", file_name, linecnt, buf); return -1; } + const char *region_name = tmp_str; + + /* Parse flags. */ + tmp_str = endptr + strspn(endptr, WHITESPACE_CHARS); + strtok_r(tmp_str, ",", &endptr); + while (tmp_str != NULL && *tmp_str != '\0') { + if (strcmp(tmp_str, "rw") != 0) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Invalid flag \"%s\" detected.\n", file_name, linecnt, tmp_str); + return -1; + } + tmp_str = strtok_r(NULL, ",", &endptr); + } msg_gdbg2("Parsed entry: 0x%" PRIxCHIPADDR " (%s) : 0x%" PRIxCHIPADDR " (%s) named \"%s\"\n", start, start_topalign ? "top-aligned" : "bottom-aligned", - end, end_topalign ? "top-aligned" : "bottom-aligned", tmp_str); + end, end_topalign ? "top-aligned" : "bottom-aligned", region_name); /* We can only check address ranges if the chip size is available in case one address is relative to * the top and the other to the bottom. But if they are both relative to the same end we can without @@ -211,13 +224,13 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr if ((!start_topalign && !end_topalign && start > end) || (start_topalign && end_topalign && start < end)) { msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" - "Length of region \"%s\" is not positive.\n", file_name, linecnt, tmp_str); + "Length of region \"%s\" is not positive.\n", file_name, linecnt, region_name); return -1; } - if (find_romentry(tmp_str) >= 0) { + if (find_romentry(region_name) >= 0) { msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" - "Region name \"%s\" used multiple times.\n", file_name, linecnt, tmp_str); + "Region name \"%s\" used multiple times.\n", file_name, linecnt, region_name); return -1; } @@ -225,11 +238,11 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr if (strlen(endptr) != 0) msg_gwarn("Warning parsing version 2 layout entry in file \"%s\" at line %d:\n" "Region name \"%s\" is not followed by white space only.\n", - file_name, linecnt, tmp_str); + file_name, linecnt, region_name); if (entry != NULL) { - entry->name = strdup(tmp_str); + entry->name = strdup(region_name); if (entry->name == NULL) { msg_gerr("Out of memory!\n"); return -1; -- Kind regards, Stefan Tauner

1 0

[PATCH 4/6] layout: Add support for top-aligned addresses.
by Stefan Tauner 24 Sep '13

24 Sep '13

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashrom.8.tmpl | 9 ++++++++- layout.c | 57 +++++++++++++++++++++++++++++++++++++++++++-------------- 2 files changed, 51 insertions(+), 15 deletions(-) diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index 06282f6..765d7f6 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -222,7 +222,14 @@ a region). One entry per line is allowed with the following syntax: .sp .BR "startaddr " "and " "endaddr " are addresses within the ROM image representing the flash ROM contents. They are interpreted in the 'usual' form -i.e.\ a leading 0 means octal, leading 0x or 0X means hexadecimal, everything else is just decimal. +i.e.\ a leading 0 means octal, leading 0x or 0X means hexadecimal, everything else is just decimal. Negative +numbers are interpreted as addresses aligned to the top of the current chip's address space, for example +.sp + 0:-0 "whole chip" +.sp +will always describe the complete flash space no matter which chip is used. This syntax is useful for specifying +"the top 1MB" (-0x100000:-0) etc. +.sp .BR "regionname " "is the name for the region from " "startaddr " "to " "endaddr " "(both addresses included)." If the name contains spaces it has to be written in double quotes, or else only the part before the first space will be used. diff --git a/layout.c b/layout.c index 6150e7e..d94cbe0 100644 --- a/layout.c +++ b/layout.c @@ -37,6 +37,8 @@ typedef struct { chipoff_t start; chipoff_t end; + bool start_topalign; + bool end_topalign; bool included; char *name; char *file; @@ -146,14 +148,15 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr "Could not convert start address in \"%s\".\n", file_name, linecnt, buf); return -1; } - if (tmp_addr < 0 || tmp_addr > FL_MAX_CHIPADDR) { + bool start_topalign = (tmp_str[0] == '-'); + if (llabs(tmp_addr) > FL_MAX_CHIPADDR) { msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" "Start address (%s0x%llx) in \"%s\" is beyond the supported range (max 0x%" - PRIxCHIPADDR ").\n", file_name, linecnt, (tmp_addr < 0) ? "-" : "", + PRIxCHIPADDR ").\n", file_name, linecnt, start_topalign ? "-" : "", llabs(tmp_addr), buf, FL_MAX_CHIPADDR); return -1; } - chipoff_t start = (chipoff_t)tmp_addr; + chipoff_t start = (chipoff_t)llabs(tmp_addr); tmp_str = endptr + strspn(endptr, WHITESPACE_CHARS); if (*tmp_str != ':') { @@ -172,14 +175,15 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr "Could not convert end address in \"%s\".\n", file_name, linecnt, buf); return -1; } - if (tmp_addr < 0 || tmp_addr > FL_MAX_CHIPADDR) { + bool end_topalign = (tmp_str[0] == '-'); + if (llabs(tmp_addr) > FL_MAX_CHIPADDR) { msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" "End address (%s0x%llx) in \"%s\" is beyond the supported range (max 0x%" - PRIxCHIPADDR ").\n", file_name, linecnt, (tmp_addr < 0) ? "-" : "", + PRIxCHIPADDR ").\n", file_name, linecnt, end_topalign ? "-" : "", llabs(tmp_addr), buf, FL_MAX_CHIPADDR); return -1; } - chipoff_t end = (chipoff_t)tmp_addr; + chipoff_t end = (chipoff_t)llabs(tmp_addr); size_t skip = strspn(endptr, WHITESPACE_CHARS); if (skip == 0) { @@ -197,10 +201,15 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr return -1; } - msg_gdbg2("Parsed entry: 0x%" PRIxCHIPADDR " - 0x%" PRIxCHIPADDR " named \"%s\"\n", - start, end, tmp_str); + msg_gdbg2("Parsed entry: 0x%" PRIxCHIPADDR " (%s) : 0x%" PRIxCHIPADDR " (%s) named \"%s\"\n", + start, start_topalign ? "top-aligned" : "bottom-aligned", + end, end_topalign ? "top-aligned" : "bottom-aligned", tmp_str); - if (start >= end) { + /* We can only check address ranges if the chip size is available in case one address is relative to + * the top and the other to the bottom. But if they are both relative to the same end we can without + * knowing the complete size. This allows us to bail out before probing. */ + if ((!start_topalign && !end_topalign && start > end) || + (start_topalign && end_topalign && start < end)) { msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" "Length of region \"%s\" is not positive.\n", file_name, linecnt, tmp_str); return -1; @@ -218,6 +227,7 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr "Region name \"%s\" is not followed by white space only.\n", file_name, linecnt, tmp_str); + if (entry != NULL) { entry->name = strdup(tmp_str); if (entry->name == NULL) { @@ -228,6 +238,8 @@ static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentr entry->start = start; entry->end = end; entry->included = 0; + entry->start_topalign = start_topalign; + entry->end_topalign = end_topalign; entry->file = NULL; } return 0; @@ -496,15 +508,32 @@ int normalize_romentries(const struct flashctx *flash) int i; for (i = 0; i < num_rom_entries; i++) { - if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { + romentry_t *cur = &rom_entries[i]; + /* Normalize top-aligned address. */ + if (cur->start_topalign || cur->end_topalign) { + if (cur->start_topalign) { + cur->start = total_size - cur->start - 1; + cur->start_topalign = 0; + } + + if (cur->end_topalign) { + cur->end = total_size - cur->end - 1; + cur->end_topalign = 0; + } + + msg_gspew("Normalized entry %d \"%s\": 0x%" PRIxCHIPADDR " - 0x%" PRIxCHIPADDR "\n", + i, cur->name, cur->start, cur->end); + } + + if (cur->start >= total_size || cur->end >= total_size) { msg_gwarn("Warning: Address range of region \"%s\" exceeds the current chip's " - "address space.\n", rom_entries[i].name); - if (rom_entries[i].included) + "address space.\n", cur->name); + if (cur->included) ret = 1; } - if (rom_entries[i].start > rom_entries[i].end) { + if (cur->start > cur->end) { msg_gerr("Error: Size of the address range of region \"%s\" is not positive.\n", - rom_entries[i].name); + cur->name); ret = 1; } } -- Kind regards, Stefan Tauner

1 0

[PATCH 3/6] layout: Better file parsing.
by Stefan Tauner 24 Sep '13

24 Sep '13

A complete rewrite of the layout file parser: - safe (unlike before) - support for comments - supports including/sourcing of other layout files (relative to the including file as well as via absolute paths) up to predefined nesting level - checks for duplicate region names - can handle region names and layout file names with spaces etc correctly - way better diagnostics - no more character arrays in struct romentry_t but pointers only To help with migrating legacy layout files add a script for converting them to format 2. Also, document the whole layout handling including the new features a bit better and refine wording regarding files, images, layouts and regions as discussed. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashrom.8.tmpl | 130 ++++++++++------ layout.c | 332 +++++++++++++++++++++++++++++++++------- util/convert_layout_v1_to_v2.sh | 79 ++++++++++ 3 files changed, 437 insertions(+), 104 deletions(-) create mode 100755 util/convert_layout_v1_to_v2.sh diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index b507a97..06282f6 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -3,10 +3,10 @@ flashrom \- detect, read, write, verify and erase flash chips .SH SYNOPSIS .B flashrom \fR[\fB\-h\fR|\fB\-R\fR|\fB\-L\fR|\fB\-z\fR|\ -\fB\-p\fR <programmername>[:<parameters>] - [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>] \ +\fB\-p\fR <programmername>[:<parameter>[,<parameter>]...]] + [\fB\-E\fR|\fB\-r\fR <imagefile>|\fB\-w\fR <imagefile>|\fB\-v\fR <imagefile>] \ [\fB\-c\fR <chipname>] - [\fB\-l\fR <file> [\fB\-i\fR <image>]] [\fB\-n\fR] [\fB\-f\fR]] + [\fB\-l\fR <layoutfile> [\fB\-i\fR <regionname>[:<regionfile>]]...] [\fB\-n\fR] [\fB\-f\fR]] [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>] .SH DESCRIPTION .B flashrom @@ -38,14 +38,14 @@ before you try to write a new image. All operations involving any chip access (p .B -p/--programmer option to be used (please see below). .TP -.B "\-r, \-\-read <file>" +.B "\-r, \-\-read <imagefile>" Read flash ROM contents and save them into the given -.BR <file> . +.BR <imagefile> . If the file already exists, it will be overwritten. .TP -.B "\-w, \-\-write <file>" +.B "\-w, \-\-write <imagefile>" Write -.B <file> +.B <imagefile> into flash ROM. This will first automatically .B erase the chip, then write to it. @@ -65,14 +65,14 @@ recommended, you should only use it if you know what you are doing and if you feel that the time for verification takes too long. .sp Typical usage is: -.B "flashrom \-p prog \-n \-w <file>" +.B "flashrom \-p prog \-n \-w <imagefile>" .sp This option is only useful in combination with .BR \-\-write . .TP -.B "\-v, \-\-verify <file>" +.B "\-v, \-\-verify <imagefile>" Verify the flash ROM contents against the given -.BR <file> . +.BR <imagefile> . .TP .B "\-E, \-\-erase" Erase the flash ROM chip. @@ -102,46 +102,6 @@ size for the flash bus. .sp * Force write even if write is known bad. .TP -.B "\-l, \-\-layout <file>" -Read ROM layout from -.BR <file> . -.sp -flashrom supports ROM layouts. This allows you to flash certain parts of -the flash chip only. A ROM layout file contains multiple lines with the -following syntax: -.sp -.B " startaddr:endaddr imagename" -.sp -.BR "startaddr " "and " "endaddr " -are hexadecimal addresses within the ROM file and do not refer to any -physical address. Please note that using a 0x prefix for those hexadecimal -numbers is not necessary, but you can't specify decimal/octal numbers. -.BR "imagename " "is an arbitrary name for the region/image from" -.BR " startaddr " "to " "endaddr " "(both addresses included)." -.sp -Example: -.sp - 00000000:00008fff gfxrom - 00009000:0003ffff normal - 00040000:0007ffff fallback -.sp -If you only want to update the image named -.BR "normal " "in a ROM based on the layout above, run" -.sp -.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom" -.sp -To update only the images named -.BR "normal " "and " "fallback" ", run:" -.sp -.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom" -.sp -Overlapping sections are not supported. -.TP -.B "\-i, \-\-image <imagename>" -Only flash region/image -.B <imagename> -from flash layout. -.TP .B "\-L, \-\-list\-supported" List the flash chips, chipsets, mainboards, and external programmers (including PCI, USB, parallel port, and serial port based devices) @@ -226,6 +186,76 @@ Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER SPECIFIC INFO section. Support for some programmers can be disabled at compile time. +.TP +flashrom supports reading/writing/erasing/verifying flash chips in whole (default) or in part. To access only \ +parts of a chip one has to use layout files and respective arguments described below. +.TP +.B "\-l, \-\-layout <layoutfile>" +Read layout entries from +.BR <layoutfile> . +.sp +A layout file can contain comments which are +started by a pound sign (#) and causes all following characters on the same line to be ignored with one +exception: Every layout file +.B must +start with a comment in the following form to define the version of the file. Example for the current version 2: +.sp +.B " # flashrom layout v2" +.sp +Every other line may contain either a command to include another layout file, a layout entry or white space +(and an optional comment at the end). +.sp +To include another file you can use the +.sp +.B " source <path>" +.sp +syntax where +.B path +specifies the absolute or relative path to the file to be included. Relative paths are interpreted to be +relative to the file containing the include command. If the path contains spaces it has to be written in double +quotes, or else only the part before the first space will be recognized. +.sp +Each layout entry describes an address region of the flash chip and gives it a name (hereinafter referred to as +a region). One entry per line is allowed with the following syntax: +.sp +.B " startaddr:endaddr regionname" +.sp +.BR "startaddr " "and " "endaddr " +are addresses within the ROM image representing the flash ROM contents. They are interpreted in the 'usual' form +i.e.\ a leading 0 means octal, leading 0x or 0X means hexadecimal, everything else is just decimal. +.BR "regionname " "is the name for the region from " "startaddr " "to " "endaddr " "(both addresses included)." +If the name contains spaces it has to be written in double quotes, or else only the part before the first space +will be used. +.sp +Example content of file rom.layout: +.sp + # flashrom layout v2 + source /home/flashrom/include.layout + 0x00000000:0x00008fff "gfx rom" + 0x00009000:0x0003ffff normal + 0x00040000:0x0007ffff fallback +.sp +.TP +.B "\-i, \-\-include <name>[:<regionfile>]" +Work on the flash region +.B name +instead of the full address space if a layout file is given and parsed correctly. +Multiple such include parameters can be used to work on the union of different regions. +.sp +The optional +.B regionfile +parameter specifies the name of a file that is used to map the contents of that very region only. +The optional file parameter causes the contents of this region to be replaced by the contents of the file +specified here. +.sp +If you only want to update the regions named +.BR "normal " "and " "gfx rom " "in a ROM based on the layout mentioned above, run" +.sp +.B " flashrom \-p prog \-l rom.layout \-i normal -i ""gfx rom"" \-w some.rom" +.sp +Overlapping regions are resolved in an implementation-dependent manner (or may even yield an error) - do +.BR "not " "rely on it." +.sp .B "flashrom \-h" lists all supported programmers. .TP diff --git a/layout.c b/layout.c index 7e2e904..6150e7e 100644 --- a/layout.c +++ b/layout.c @@ -22,17 +22,23 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> +#include <ctype.h> +#include <errno.h> #include <limits.h> #include "flash.h" #include "programmer.h" #define MAX_ROMLAYOUT 32 +#define MAX_ENTRY_LEN 1024 +#define WHITESPACE_CHARS " \t" +#define INCLUDE_INSTR "source" +#define MAX_NESTING_LVL 5 typedef struct { chipoff_t start; chipoff_t end; - unsigned int included; - char name[256]; + bool included; + char *name; char *file; } romentry_t; @@ -45,58 +51,289 @@ static int num_rom_entries = 0; /* the number of successfully parsed rom_entries static char *include_args[MAX_ROMLAYOUT]; static int num_include_args = 0; /* the number of valid include_args. */ -#ifndef __LIBPAYLOAD__ -int read_romlayout(char *name) +/* returns the index of the entry (or a negative value if it is not found) */ +static int find_romentry(char *name) { - FILE *romlayout; - char tempstr[256]; int i; + msg_gspew("Looking for region \"%s\"... ", name); + for (i = 0; i < num_rom_entries; i++) { + if (strcmp(rom_entries[i].name, name) == 0) { + msg_gspew("found.\n"); + return i; + } + } + msg_gspew("not found.\n"); + return -1; +} + +/* FIXME: While libpayload has no file I/O itself, code using libflashrom could still provide layout information + * obtained by other means like user input or by fetching it from somewhere else. Therefore the parsing code + * should be separated from the file reading code eventually. */ +#ifndef __LIBPAYLOAD__ +/** Parse one line in a layout file. + * @param file_name The name of the file this line originates from. + * @param linecnt Line number the input string originates from. + * @param entry If not NULL fill it with the parsed data, else just detect errors and print diagnostics. + * @return -1 on error, + * 0 if the line could be parsed into a layout entry succesfully, + * 1 if a file was successfully sourced. + */ +static int parse_entry(char *file_name, unsigned int linecnt, char *buf, romentry_t *entry) +{ + msg_gdbg2("String to parse: \"%s\".\n", buf); + + /* Skip all white space in the beginning. */ + char *tmp_str = buf + strspn(buf, WHITESPACE_CHARS); + char *endptr; + + /* Check for include command. */ + if (strncmp(tmp_str, INCLUDE_INSTR, strlen(INCLUDE_INSTR)) == 0) { + tmp_str += strlen(INCLUDE_INSTR); + tmp_str += strspn(tmp_str, WHITESPACE_CHARS); + if (unquote_string(&tmp_str, NULL, WHITESPACE_CHARS) != 0) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Could not find file name in \"%s\".\n", + file_name, linecnt, buf); + return -1; + } + msg_gspew("Source command found with filename \"%s\".\n", tmp_str); + + static unsigned int nesting_lvl = 0; + if (nesting_lvl >= MAX_NESTING_LVL) { + msg_gerr("Error: Nesting level exeeded limit of %u.\n", MAX_NESTING_LVL); + msg_gerr("Unable to import \"%s\" in layout file \"%s\".\n", tmp_str, file_name); + return -1; + } + + nesting_lvl++; + int ret; + /* If a relative path is given, append it to the dirname of the current file. */ + if (*tmp_str != '/') { + /* We need space for: dirname of file_name, '/' , the file name in tmp_strand and '\0'. + * Since the dirname of file_name is shorter than file_name this is more than enough: */ + char *path = malloc(strlen(file_name) + strlen(tmp_str) + 2); + if (path == NULL) { + msg_gerr("Out of memory!\n"); + return -1; + } + strcpy(path, file_name); + + /* A less insane but incomplete dirname implementation... */ + endptr = strrchr(path, '/'); + if (endptr != NULL) { + endptr[0] = '/'; + endptr[1] = '\0'; + } else { + /* This is safe because the original file name was at least one char. */ + path[0] = '.'; + path[1] = '/'; + path[2] = '\0'; + } + strcat(path, tmp_str); + ret = read_romlayout(path); + free(path); + } else + ret = read_romlayout(tmp_str); + nesting_lvl--; + return ret >= 0 ? 1 : -1; /* Only return values < 0 are errors. */ + } - romlayout = fopen(name, "r"); + /* Parse start address. */ + errno = 0; + long long tmp_addr = strtoll(tmp_str, &endptr, 0); + if (errno != 0 || endptr == tmp_str) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Could not convert start address in \"%s\".\n", file_name, linecnt, buf); + return -1; + } + if (tmp_addr < 0 || tmp_addr > FL_MAX_CHIPADDR) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Start address (%s0x%llx) in \"%s\" is beyond the supported range (max 0x%" + PRIxCHIPADDR ").\n", file_name, linecnt, (tmp_addr < 0) ? "-" : "", + llabs(tmp_addr), buf, FL_MAX_CHIPADDR); + return -1; + } + chipoff_t start = (chipoff_t)tmp_addr; - if (!romlayout) { - msg_gerr("ERROR: Could not open layout file (%s).\n", - name); + tmp_str = endptr + strspn(endptr, WHITESPACE_CHARS); + if (*tmp_str != ':') { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Address separator does not follow start address in \"%s\".\n", + file_name, linecnt, buf); return -1; } + tmp_str++; + + /* Parse end address. */ + errno = 0; + tmp_addr = strtoll(tmp_str, &endptr, 0); + if (errno != 0 || endptr == tmp_str) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Could not convert end address in \"%s\".\n", file_name, linecnt, buf); + return -1; + } + if (tmp_addr < 0 || tmp_addr > FL_MAX_CHIPADDR) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "End address (%s0x%llx) in \"%s\" is beyond the supported range (max 0x%" + PRIxCHIPADDR ").\n", file_name, linecnt, (tmp_addr < 0) ? "-" : "", + llabs(tmp_addr), buf, FL_MAX_CHIPADDR); + return -1; + } + chipoff_t end = (chipoff_t)tmp_addr; - while (!feof(romlayout)) { - char *tstr1, *tstr2; + size_t skip = strspn(endptr, WHITESPACE_CHARS); + if (skip == 0) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "End address is not followed by white space in \"%s\"\n", file_name, linecnt, buf); + return -1; + } - if (num_rom_entries >= MAX_ROMLAYOUT) { - msg_gerr("Maximum number of entries (%i) in layout file reached.\n", MAX_ROMLAYOUT); - return 1; + /* Parse region name. */ + tmp_str = endptr + skip; + /* The region name is either enclosed by quotes or ends with the first whitespace. */ + if (unquote_string(&tmp_str, &endptr, WHITESPACE_CHARS) != 0) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Could not find region name in \"%s\".\n", file_name, linecnt, buf); + return -1; + } + + msg_gdbg2("Parsed entry: 0x%" PRIxCHIPADDR " - 0x%" PRIxCHIPADDR " named \"%s\"\n", + start, end, tmp_str); + + if (start >= end) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Length of region \"%s\" is not positive.\n", file_name, linecnt, tmp_str); + return -1; + } + + if (find_romentry(tmp_str) >= 0) { + msg_gerr("Error parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Region name \"%s\" used multiple times.\n", file_name, linecnt, tmp_str); + return -1; + } + + endptr += strspn(endptr, WHITESPACE_CHARS); + if (strlen(endptr) != 0) + msg_gwarn("Warning parsing version 2 layout entry in file \"%s\" at line %d:\n" + "Region name \"%s\" is not followed by white space only.\n", + file_name, linecnt, tmp_str); + + if (entry != NULL) { + entry->name = strdup(tmp_str); + if (entry->name == NULL) { + msg_gerr("Out of memory!\n"); + return -1; } - if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[num_rom_entries].name)) - continue; -#if 0 - // fscanf does not like arbitrary comments like that :( later - if (tempstr[0] == '#') { - continue; + + entry->start = start; + entry->end = end; + entry->included = 0; + entry->file = NULL; + } + return 0; +} + +/* Scan the first line for the determinant version comment and parse it, or assume it is version 1. */ +static int detect_layout_version(FILE *romlayout) +{ + int c; + do { /* Skip white space */ + c = fgetc(romlayout); + if (c == EOF) + return -1; + } while (isblank(c)); + ungetc(c, romlayout); + + const char* vcomment = "# flashrom layout v"; + char buf[strlen(vcomment) + 1]; /* comment + \0 */ + if (fgets(buf, sizeof(buf), romlayout) == NULL) + return -1; + if (strcmp(vcomment, buf) != 0) + return 1; + int version; + if (fscanf(romlayout, "%d", &version) != 1) + return -1; + if (version < 2) { + msg_gwarn("Warning: Layout file declares itself to be version %d, but self declaration has\n" + "only been possible since version 2. Continuing anyway.\n", version); + } + return version; +} + +int read_romlayout(char *name) +{ + FILE *romlayout = fopen(name, "r"); + if (romlayout == NULL) { + msg_gerr("ERROR: Could not open layout file \"%s\".\n", name); + return -1; + } + + const int version = detect_layout_version(romlayout); + if (version < 0) { + msg_gerr("Could not determine version of layout file \"%s\".\n", name); + fclose(romlayout); + return 1; + } + if (version != 2) { + msg_gerr("Layout file version %d is not supported in this version of flashrom.\n", version); + fclose(romlayout); + return 1; + } + rewind(romlayout); + + msg_gdbg("Parsing layout file \"%s\" according to version %d.\n", name, version); + unsigned int linecnt = 0; + while (!feof(romlayout)) { + char buf[MAX_ENTRY_LEN]; + char *curchar = buf; + + while (true) { + /* Make sure that we ignore various newline sequences by checking for \r too. + * NB: This might introduce empty lines. */ + char c = fgetc(romlayout); + if (c == '#') { + do { /* Skip characters in comments */ + c = fgetc(romlayout); + } while (c != EOF && c != '\n' && c != '\r'); + linecnt++; + continue; + } + if (c == EOF || c == '\n' || c == '\r') { + *curchar = '\0'; + linecnt++; + break; + } + if (curchar == &buf[MAX_ENTRY_LEN - 1]) { + msg_gerr("Line %d of layout file \"%s\" is longer than the allowed %d chars.\n", + linecnt, name, MAX_ENTRY_LEN); + fclose(romlayout); + return 1; + } + *curchar = c; + curchar++; } -#endif - tstr1 = strtok(tempstr, ":"); - tstr2 = strtok(NULL, ":"); - if (!tstr1 || !tstr2) { - msg_gerr("Error parsing layout file. Offending string: \"%s\"\n", tempstr); + msg_gspew("Parsing line %d of \"%s\".\n", linecnt, name); + + /* Skip all whitespace or empty lines */ + if (strspn(buf, WHITESPACE_CHARS) == strlen(buf)) + continue; + + romentry_t *entry = (num_rom_entries >= MAX_ROMLAYOUT) ? NULL : &rom_entries[num_rom_entries]; + int ret = parse_entry(name, linecnt, buf, entry); + if (ret < 0) { fclose(romlayout); return 1; } - rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); - rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); - rom_entries[num_rom_entries].included = 0; - rom_entries[num_rom_entries].file = NULL; - num_rom_entries++; + /* Only 0 indicates the successfully parsing of an entry, others are errors or imports. */ + if (ret == 0) + num_rom_entries++; } - - for (i = 0; i < num_rom_entries; i++) { - msg_gdbg("romlayout %08x - %08x named %s\n", - rom_entries[i].start, - rom_entries[i].end, rom_entries[i].name); - } - fclose(romlayout); - + if (num_rom_entries >= MAX_ROMLAYOUT) { + msg_gerr("Found %d entries in layout file which is more than the %i allowed.\n", + num_rom_entries + 1, MAX_ROMLAYOUT); + return 1; + } return 0; } #endif @@ -135,21 +372,6 @@ int register_include_arg(char *name) return 0; } -/* returns the index of the entry (or a negative value if it is not found) */ -static int find_romentry(char *name) -{ - int i; - msg_gspew("Looking for region \"%s\"... ", name); - for (i = 0; i < num_rom_entries; i++) { - if (strcmp(rom_entries[i].name, name) == 0) { - msg_gspew("found.\n"); - return i; - } - } - msg_gspew("not found.\n"); - return -1; -} - /* process -i arguments * returns 0 to indicate success, >0 to indicate failure */ @@ -230,6 +452,8 @@ void layout_cleanup(void) num_include_args = 0; for (i = 0; i < num_rom_entries; i++) { + free(rom_entries[i].name); + rom_entries[i].name = NULL; free(rom_entries[i].file); rom_entries[i].file = NULL; rom_entries[i].included = 0; diff --git a/util/convert_layout_v1_to_v2.sh b/util/convert_layout_v1_to_v2.sh new file mode 100755 index 0000000..712de87 --- /dev/null +++ b/util/convert_layout_v1_to_v2.sh @@ -0,0 +1,79 @@ +#!/bin/sh +# +# Copyright 2013 Stefan Tauner +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301, USA. +# +# +# +# This script converts legacy layout files as understood by flashrom up to version 0.9.7 to format version 2. +# It converts all files given as parameters in place and creates backups (with the suffix ".old") of the old +# contents unless --nobackup is given. +# +# It does... +# - check if the file exists and if its format is already in v2 format +# - prefix addresses with 0x if they have not been already +# - remove superfluous white space (i.e. more than one consecutive space) +# - remove white space from otherwise empty lines + +usage () +{ + echo "Usage: $0 [--nobackup] FILE..." + exit 1 +} + +if [ $# -eq 0 ]; then + usage +fi + +if [ $1 = "--nobackup" ]; then + sed_opt="-i" + shift + if [ $# -eq 0 ]; then + usage + fi +else + sed_opt="-i.old" +fi + +# Test if all files are really there before starting conversion +ret=0 +for f in "$@" ; do + if [ ! -e "$f" ]; then + echo "File not found: $f">&2 + ret=1 + fi +done +if [ "$ret" -ne 0 ]; then + echo "Aborting" + return 1 +fi + +for f in "$@" ; do + if grep -q 'flashrom layout v2\b' "$f" ; then + echo "File already in new format: $f" + continue + fi + + sed $sed_opt -e " + 1i # flashrom layout v2 + s/ *$0x\|$$[0-9a-fA-F][0-9a-fA-F]*$ *: *$0x\|$$[0-9a-fA-F][0-9a-fA-F]*$ */0x\2:0x\4 / + s/ */ / + s/^ *$// + " "$f" + echo "$f done" +done +echo "Done!" -- Kind regards, Stefan Tauner

1 0

[PATCH 2/6] layout: Add -i <region>[:<file>] support.
by Stefan Tauner 24 Sep '13

24 Sep '13

Add an optional sub-parameter to the -i parameter to allow building the image to be written from multiple files. This will also allow regions to be read from flash and written to separate image files in a later patch. Existing function read_buf_from_file() is refined and reused to read the file. based on chromiumos' d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- cli_classic.c | 9 ++++--- dummyflasher.c | 2 +- flash.h | 2 +- flashrom.c | 18 +++++++++----- layout.c | 78 ++++++++++++++++++++++++++++++++++++++++++++-------------- 5 files changed, 78 insertions(+), 31 deletions(-) diff --git a/cli_classic.c b/cli_classic.c index a0c2d64..ed6d6aa 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -40,8 +40,8 @@ static void cli_classic_usage(const char *name) #if CONFIG_PRINT_WIKI == 1 "-z|" #endif - "-p <programmername>[:<parameters>] [-c <chipname>]\n" - "[-E|(-r|-w|-v) <file>] [-l <layoutfile> [-i <imagename>]...] [-n] [-f]]\n" + "-p <programmername>[:<parameter>[,<parameter>]...] [-c <chipname>]\n" + "[-E|(-r|-w|-v) <imagefile>] [-l <layoutfile> [-i <region>[:<regionfile>]...] [-n] [-f]]\n" "[-V[V[V]]] [-o <logfile>]\n\n", name); printf(" -h | --help print this help text\n" @@ -54,8 +54,9 @@ static void cli_classic_usage(const char *name) " -c | --chip <chipname> probe only for specified flash chip\n" " -f | --force force specific operations (see man page)\n" " -n | --noverify don't auto-verify\n" - " -l | --layout <layoutfile> read ROM layout from <layoutfile>\n" - " -i | --image <name> only flash image <name> from flash layout\n" + " -l | --layout <layoutfile> read layout from <layoutfile>\n" + " -i | --include <region>[<:file>] only flash image <region> from layout \n" + " (optionally with data from <file>)\n" " -o | --output <logfile> log output to <logfile>\n" " -L | --list-supported print supported devices\n" #if CONFIG_PRINT_WIKI == 1 diff --git a/dummyflasher.c b/dummyflasher.c index 9c0d868..90d2261 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -389,7 +389,7 @@ int dummy_init(void) msg_pdbg("matches.\n"); msg_pdbg("Reading %s\n", emu_persistent_image); read_buf_from_file(flashchip_contents, emu_chip_size, - emu_persistent_image); + emu_persistent_image, NULL); } else { msg_pdbg("doesn't match.\n"); } diff --git a/flash.h b/flash.h index a942b9b..be5918b 100644 --- a/flash.h +++ b/flash.h @@ -261,7 +261,7 @@ void print_banner(void); void list_programmers_linebreak(int startcol, int cols, int paren); int selfcheck(void); int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it); -int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename); +int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename, const char *size_msg); int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename); /* helpers.c */ diff --git a/flashrom.c b/flashrom.c index afab57c..7db2696 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1165,8 +1165,7 @@ notfound: return chip - flashchips; } -int read_buf_from_file(unsigned char *buf, unsigned long size, - const char *filename) +int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename, const char *size_msg) { #ifdef __LIBPAYLOAD__ msg_gerr("Error: No file I/O support in libpayload\n"); @@ -1186,8 +1185,10 @@ int read_buf_from_file(unsigned char *buf, unsigned long size, return 1; } if (image_stat.st_size != size) { - msg_gerr("Error: Image size (%jd B) doesn't match the flash chip's size (%lu B)!\n", - (intmax_t)image_stat.st_size, size); + if (size_msg == NULL) + size_msg = "the expected size"; + msg_gerr("Error: Image size (%jd B) doesn't match %s (%lu B)!\n", + (intmax_t)image_stat.st_size, size_msg, size); fclose(image); return 1; } @@ -1968,7 +1969,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, } if (write_it || verify_it) { - if (read_buf_from_file(newcontents, size, filename)) { + if (read_buf_from_file(newcontents, size, filename, "the flash chip's size")) { ret = 1; goto out; } @@ -2002,7 +2003,12 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, msg_cinfo("done.\n"); /* Build a new image taking the given layout into account. */ - build_new_image(flash, oldcontents, newcontents); + if (build_new_image(flash, oldcontents, newcontents)) { + msg_gerr("Could not prepare the data to be written due to problems with the layout,\n" + "aborting.\n"); + ret = 1; + goto out; + } // //////////////////////////////////////////////////////////// diff --git a/layout.c b/layout.c index 08cc776..7e2e904 100644 --- a/layout.c +++ b/layout.c @@ -33,6 +33,7 @@ typedef struct { chipoff_t end; unsigned int included; char name[256]; + char *file; } romentry_t; /* rom_entries store the entries specified in a layout file and associated run-time data */ @@ -54,7 +55,7 @@ int read_romlayout(char *name) romlayout = fopen(name, "r"); if (!romlayout) { - msg_gerr("ERROR: Could not open ROM layout (%s).\n", + msg_gerr("ERROR: Could not open layout file (%s).\n", name); return -1; } @@ -63,8 +64,7 @@ int read_romlayout(char *name) char *tstr1, *tstr2; if (num_rom_entries >= MAX_ROMLAYOUT) { - msg_gerr("Maximum number of ROM images (%i) in layout " - "file reached.\n", MAX_ROMLAYOUT); + msg_gerr("Maximum number of entries (%i) in layout file reached.\n", MAX_ROMLAYOUT); return 1; } if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[num_rom_entries].name)) @@ -85,6 +85,7 @@ int read_romlayout(char *name) rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); rom_entries[num_rom_entries].included = 0; + rom_entries[num_rom_entries].file = NULL; num_rom_entries++; } @@ -138,14 +139,9 @@ int register_include_arg(char *name) static int find_romentry(char *name) { int i; - - if (num_rom_entries == 0) - return -1; - msg_gspew("Looking for region \"%s\"... ", name); for (i = 0; i < num_rom_entries; i++) { - if (!strcmp(rom_entries[i].name, name)) { - rom_entries[i].included = 1; + if (strcmp(rom_entries[i].name, name) == 0) { msg_gspew("found.\n"); return i; } @@ -165,27 +161,61 @@ int process_include_args(void) if (num_include_args == 0) return 0; - /* User has specified an area, but no layout file is loaded. */ + /* User has specified an include argument, but no layout file is loaded. */ if (num_rom_entries == 0) { - msg_gerr("Region requested (with -i \"%s\"), " - "but no layout data is available.\n", + msg_gerr("Region requested (with -i/--include \"%s\"),\n" + "but no layout data is available. To include one use the -l/--layout syntax).\n", include_args[0]); return 1; } for (i = 0; i < num_include_args; i++) { - if (find_romentry(include_args[i]) < 0) { - msg_gerr("Invalid region specified: \"%s\".\n", - include_args[i]); + char *file; + char *name = include_args[i]; + int ret = unquote_string(&name, &file, ":"); /* -i <region>[:<file>] */ + if (ret != 0) { + msg_gerr("Invalid include argument specified: \"%s\".\n", name); return 1; } + int idx = find_romentry(name); + if (idx < 0) { + msg_gerr("Invalid region name specified: \"%s\".\n", name); + return 1; + } + rom_entries[idx].included = 1; found++; + + if (file[0] != '\0') { + /* The remaining characters are interpreted as possible quoted filename. */ + ret = unquote_string(&file, NULL, NULL); + if (ret != 0) { + msg_gerr("Invalid region file name specified: \"%s\".\n", file); + return 1; + } +#ifdef __LIBPAYLOAD__ + msg_gerr("Error: No file I/O support in libpayload\n"); + return 1; +#else + file = strdup(file); + if (file == NULL) { + msg_gerr("Out of memory!\n"); + return 1; + } + rom_entries[idx].file = file; +#endif + } } - msg_ginfo("Using region%s: \"%s\"", num_include_args > 1 ? "s" : "", - include_args[0]); - for (i = 1; i < num_include_args; i++) - msg_ginfo(", \"%s\"", include_args[i]); + msg_ginfo("Using region%s: ", num_rom_entries > 1 ? "s" : ""); + bool first = true; + for (i = 0; i < num_rom_entries; i++) + if (rom_entries[i].included) { + if (first) + first = false; + else + msg_ginfo(", "); + msg_ginfo("\"%s\"", rom_entries[i].name); + } msg_ginfo(".\n"); return 0; } @@ -200,6 +230,8 @@ void layout_cleanup(void) num_include_args = 0; for (i = 0; i < num_rom_entries; i++) { + free(rom_entries[i].file); + rom_entries[i].file = NULL; rom_entries[i].included = 0; } num_rom_entries = 0; @@ -283,6 +315,14 @@ int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t if (entry->start > start) memcpy(newcontents + start, oldcontents + start, entry->start - start); + /* If a file name is specified for this region, read the file contents and + * overwrite @newcontents in the range specified by @entry. */ + if (entry->file != NULL) { + if (read_buf_from_file(newcontents + entry->start, entry->end - entry->start + 1, + entry->file, "the region's size") != 0) + return 1; + } + /* Skip to location after current romentry. */ start = entry->end + 1; /* Catch overflow. */ -- Kind regards, Stefan Tauner

1 0

[PATCH 1/6] Introduce helpers.c and unquote_string().
by Stefan Tauner 24 Sep '13

24 Sep '13

The unquoting function is the first to be moved to the new file which will host various utility functions to be shared by multiple files but which do not fit elsewhere. unquote_string() extracts a possibly quoted phrase from a string by using a set of separator characters, which is useful to allow user input to be optionally quoted to support spaces within names such a region or file names. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Makefile | 2 +- flash.h | 3 +++ helpers.c | 88 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 92 insertions(+), 1 deletion(-) create mode 100644 helpers.c diff --git a/Makefile b/Makefile index 346d46a..69e0b9c 100644 --- a/Makefile +++ b/Makefile @@ -338,7 +338,7 @@ CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ ############################################################################### # Library code. -LIB_OBJS = layout.o flashrom.o udelay.o programmer.o +LIB_OBJS = layout.o flashrom.o udelay.o programmer.o helpers.o ############################################################################### # Frontend related stuff. diff --git a/flash.h b/flash.h index e320ced..a942b9b 100644 --- a/flash.h +++ b/flash.h @@ -264,6 +264,9 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, i int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename); int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename); +/* helpers.c */ +int unquote_string(char **startp, char **endp, const char *delimiters); + enum test_state { OK = 0, NT = 1, /* Not tested */ diff --git a/helpers.c b/helpers.c new file mode 100644 index 0000000..ba82a0f --- /dev/null +++ b/helpers.c @@ -0,0 +1,88 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2013 Carl-Daniel Hailfinger + * Copyright (C) 2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include "flash.h" + +/** Parse a \em possibly quoted string. + * + * \a startp points to the string which should be parsed. If the string does not start with a quote, it is + * terminated at the first character contained in \a delimiters by replacing it with '\0'. If the string starts + * with a quote, it is terminated at the second quote by replacing it with '\0'. In the latter case a character + * contained in \a delimiters has to follow the terminating quote. + * + * If \a delimiters is NULL an empty set is assumed. + * + * After returning \a startp will point to a string that is either the first quoted part of the + * original string with the quotation marks removed, or the first word of that string before any delimiter. + * + * If \a endp is not NULL it will be set to point to the first character after the parsed string + * (i.e. a delimiter), or to the '\0' at the end of the string if there are no more subsequent characters. + * + * @param start Points to the input string. + * @param end Is set to the first char following the input string (possibly NULL). + * @param delimiters Set of characters which terminate a string (possibly NULL). + * @return -1 if a quotation mark is not matched, + * 0 on success, + * 1 if the parsed string is empty. + */ +int unquote_string(char **startp, char **endp, const char *delimiters) +{ + msg_gspew("unquoting \'%s\'\n", *startp); + + if (delimiters == NULL) + delimiters = ""; + + char *end; + if (**startp == '"') { + (*startp)++; + size_t len = strcspn(*startp, "\""); + end = *startp + len + 1; + /* Catch unclosed quotes and string not followed immediately by delimiter or end-of-string. */ + if ((*startp)[len] == '\0' && strcspn(end, delimiters) != 0) + return -1; + + /* Eliminate closing quote. */ + (*startp)[len] = '\0'; + } else { + size_t len = strcspn(*startp, delimiters); + /* Check for (forbidden) quotes in the middle. */ + if (strcspn(*startp, "\"") < len) + return -1; + end = *startp + len; + } + + /* end points to the first character after the (possibly quoted) string, i.e. the delimiter or \0. */ + if (*end != '\0') { + *end = '\0'; + end++; + } + if (endp != NULL) + *endp = end; + + if (strlen(*startp) == 0) { + *startp = '\0'; + return 1; + } + + msg_gspew("%s: start=\'%s\', end=\'%s\'\n", __func__, *startp, end); + return 0; +} -- Kind regards, Stefan Tauner

1 0

[PATCH 0/6] layout patches 4.0
by Stefan Tauner 24 Sep '13

24 Sep '13

Implementation of unquote_string() combining ideas from CD and myself. Refined parser, new support for top-aligned address and flags. And the last patch is open for discussion... it tests readability and size of the --include files while parsing it and before actually reading them (which only happens after a full chip read). It is obviously useful for slow programmers because it can bail out early when there are obvious problems with the file, but it is still quite some overhead and it feels rather dumb to check this twice. Maybe we should already read them in early instead of just checking? The disadvantage is that we would need to allocate extra buffers for them. The late read writes directly to newcontents and hence does not need an extra buffer. Stefan Tauner (6): Introduce helpers.c and unquote_string(). layout: Add -i <region>[:<file>] support. layout: Better file parsing. layout: Add support for top-aligned addresses. layout: Add preliminary support for flags. [WIP] layout: Bailout early in process_include_args() if region file is inaccessible. Makefile | 2 +- cli_classic.c | 9 +- dummyflasher.c | 2 +- flash.h | 5 +- flashrom.8.tmpl | 139 +++++++----- flashrom.c | 18 +- helpers.c | 88 ++++++++ layout.c | 478 +++++++++++++++++++++++++++++++++------- util/convert_layout_v1_to_v2.sh | 79 +++++++ 9 files changed, 683 insertions(+), 137 deletions(-) create mode 100644 helpers.c create mode 100755 util/convert_layout_v1_to_v2.sh -- Kind regards, Stefan Tauner

1 0

[PATCH] Fix layout parser bugs
by Carl-Daniel Hailfinger 23 Sep '13

23 Sep '13

Fix 3 parser bugs, details later. Code now. Untested, compiles. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-parserbugs/layout.c =================================================================== --- flashrom-parserbugs/layout.c (Revision 1750) +++ flashrom-parserbugs/layout.c (Arbeitskopie) @@ -60,30 +60,33 @@ } while (!feof(romlayout)) { - char *tstr1, *tstr2; + char *tstr1, *tstr2, *tstr3, *tstr4; if (num_rom_entries >= MAX_ROMLAYOUT) { msg_gerr("Maximum number of ROM images (%i) in layout " "file reached.\n", MAX_ROMLAYOUT); + fclose(romlayout); return 1; } - if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[num_rom_entries].name)) - continue; -#if 0 - // fscanf does not like arbitrary comments like that :( later - if (tempstr[0] == '#') { - continue; + if (!fgets(tempstr, 256, romlayout)) { + printf("Failing fgets without EOF should not happen!\n"); + break; } -#endif + tstr1 = strtok(tempstr, ":"); - tstr2 = strtok(NULL, ":"); - if (!tstr1 || !tstr2) { - msg_gerr("Error parsing layout file. Offending string: \"%s\"\n", tempstr); + tstr2 = strtok(NULL, " \t"); + tstr3 = strtok(NULL, " \t\r\n"); + tstr4 = strtok(NULL, " \t\r\n"); + if (!tstr1 || !tstr2 || !tstr3 || tstr4) { + msg_gerr("Error parsing layout file. Offending string after parsing: \"%s:%s %s%s\"\n", tstr1 ? : "(null)", tstr2 ? : "(null)", tstr3 ? : "(null)", tstr4 ? "trailing garbage" : ""); fclose(romlayout); - return 1; + return 2; } + printf("strlen(tempstr)=%lu, strlen(name)=%lu\n", strlen(tempstr), strlen(rom_entries[num_rom_entries].name)); rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); + /* strcpy is actually safe here because tstr3 is shorter than 256 bytes because strlen(tempstr)<256. */ + strcpy(rom_entries[num_rom_entries].name, tstr3); rom_entries[num_rom_entries].included = 0; num_rom_entries++; } -- http://www.hailfinger.org/

1 0

Re: [flashrom] [PATCH] layout: Verify layout entries before building a new image using them.
by Carl-Daniel Hailfinger 23 Sep '13

23 Sep '13

Am 23.09.2013 05:42 schrieb Stefan Tauner: > This fixes a SEGFAULT if a layout entry is included that addresses memory > outside the current chip's address range. > > Also, abort for non-write operations if a layout file is given. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Thanks for your patch! Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> with one small comment (no need to change the code, just think about it) > --- > cli_classic.c | 6 ++++++ > flash.h | 11 ++++++++++- > flashrom.c | 11 ++++++++--- > layout.c | 33 +++++++++++++++++++++++++++++---- > 4 files changed, 53 insertions(+), 8 deletions(-) > > diff --git a/layout.c b/layout.c > index 86351b8..5254115 100644 > --- a/layout.c > +++ b/layout.c > @@ -232,7 +232,32 @@ romentry_t *get_next_included_romentry(unsigned int start) > return best_entry; > } > > -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) > +/* Validate and - if needed - normalize layout entries. */ > +int normalize_romentries(const struct flashctx *flash) > +{ > + chipsize_t total_size = flash->chip->total_size * 1024; > + int ret = 0; > + > + int i; > + for (i = 0; i < num_rom_entries; i++) { > + if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { > + msg_gwarn("Warning: Address range of region \"%s\" exceeds the current chip's " > + "address space.\n", rom_entries[i].name); > + if (rom_entries[i].included) Shouldn't we warn about invalid rom entries in all cases, not just when they are active/included? I'm a bit torn on that question. > + ret = 1; > + } > + if (rom_entries[i].start > rom_entries[i].end) { > + msg_gwarn("Warning: Size of the address range of region \"%s\" is not positive.\n", > + rom_entries[i].name); > + if (rom_entries[i].included) Same here. > + ret = 1; > + } > + } > + > + return ret; > +} > + > +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) > { > unsigned int start = 0; > romentry_t *entry; Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1752 - branches/0.9.7
by repository service 23 Sep '13

23 Sep '13

Author: stefanct Date: Mon Sep 23 17:32:25 2013 New Revision: 1752 URL: http://flashrom.org/trac/flashrom/changeset/1752 Log: layout: Verify layout entries before building a new image using them. This fixes a SEGFAULT if a layout entry is included that addresses memory outside the current chip's address range. flashrom will only abort if the offending region(s) is/are included else it will just warn. It will print warnings for regions with negative or zero-length address ranges too, but it will only abort if they are included with -i/--image to reduce the potential of regressions. This is different to the patch committed to the development branch in r1751. Also, abort for non-write operations if a layout file is given because there is no layout support for non-write operations yet, and some reports show that users expect it to work at least for -r/--read. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: branches/0.9.7/cli_classic.c branches/0.9.7/flash.h branches/0.9.7/flashrom.8 branches/0.9.7/flashrom.c branches/0.9.7/layout.c Modified: branches/0.9.7/cli_classic.c ============================================================================== --- branches/0.9.7/cli_classic.c Mon Sep 23 16:21:06 2013 (r1751) +++ branches/0.9.7/cli_classic.c Mon Sep 23 17:32:25 2013 (r1752) @@ -372,6 +372,12 @@ ret = 1; goto out; } + if (layoutfile != NULL && !write_it) { + msg_gerr("Layout files are currently supported for write operations only.\n"); + ret = 1; + goto out; + } + if (process_include_args()) { ret = 1; goto out; Modified: branches/0.9.7/flash.h ============================================================================== --- branches/0.9.7/flash.h Mon Sep 23 16:21:06 2013 (r1751) +++ branches/0.9.7/flash.h Mon Sep 23 17:32:25 2013 (r1752) @@ -45,6 +45,14 @@ typedef uintptr_t chipaddr; #define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2)) +/* Types and macros regarding the maximum flash space size supported by generic code. */ +typedef uint32_t chipoff_t; /* Able to store any addressable offset within a supported flash memory. */ +typedef uint32_t chipsize_t; /* Able to store the number of bytes of any supported flash memory. */ +#define FL_MAX_CHIPADDR_BITS (24) +#define FL_MAX_CHIPADDR ((chipoff_t)(1ULL<<FL_MAX_CHIPADDR_BITS)-1) +#define PRIxCHIPADDR "06"PRIx32 +#define PRIuCHIPSIZE PRIu32 + int register_shutdown(int (*function) (void *data), void *data); void *programmer_map_flash_region(const char *descr, uintptr_t phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); @@ -319,7 +327,8 @@ int register_include_arg(char *name); int process_include_args(void); int read_romlayout(char *name); -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); +int normalize_romentries(const struct flashctx *flash); +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); /* spi.c */ struct spi_command { Modified: branches/0.9.7/flashrom.8 ============================================================================== --- branches/0.9.7/flashrom.8 Mon Sep 23 16:21:06 2013 (r1751) +++ branches/0.9.7/flashrom.8 Mon Sep 23 17:32:25 2013 (r1752) @@ -106,7 +106,7 @@ Read ROM layout from .BR <file> . .sp -flashrom supports ROM layouts. This allows you to flash certain parts of +flashrom supports ROM layouts in write operations only. This allows you to flash certain parts of the flash chip only. A ROM layout file contains multiple lines with the following syntax: .sp Modified: branches/0.9.7/flashrom.c ============================================================================== --- branches/0.9.7/flashrom.c Mon Sep 23 16:21:06 2013 (r1751) +++ branches/0.9.7/flashrom.c Mon Sep 23 17:32:25 2013 (r1752) @@ -1904,6 +1904,12 @@ goto out_nofree; } + if (normalize_romentries(flash)) { + msg_cerr("Requested regions can not be handled. Aborting.\n"); + ret = 1; + goto out_nofree; + } + /* Given the existence of read locks, we want to unlock for read, * erase and write. */ @@ -1983,9 +1989,8 @@ } msg_cinfo("done.\n"); - // This should be moved into each flash part's code to do it - // cleanly. This does the job. - handle_romentries(flash, oldcontents, newcontents); + /* Build a new image taking the given layout into account. */ + build_new_image(flash, oldcontents, newcontents); // //////////////////////////////////////////////////////////// Modified: branches/0.9.7/layout.c ============================================================================== --- branches/0.9.7/layout.c Mon Sep 23 16:21:06 2013 (r1751) +++ branches/0.9.7/layout.c Mon Sep 23 17:32:25 2013 (r1752) @@ -30,8 +30,8 @@ #define MAX_ROMLAYOUT 32 typedef struct { - unsigned int start; - unsigned int end; + chipoff_t start; + chipoff_t end; unsigned int included; char name[256]; } romlayout_t; @@ -217,7 +217,32 @@ return best_entry; } -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) +/* Validate and - if needed - normalize layout entries. */ +int normalize_romentries(const struct flashctx *flash) +{ + chipsize_t total_size = flash->chip->total_size * 1024; + int ret = 0; + + int i; + for (i = 0; i < romimages; i++) { + if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { + msg_gwarn("Warning: Address range of region \"%s\" exceeds the current chip's " + "address space.\n", rom_entries[i].name); + if (rom_entries[i].included) + ret = 1; + } + if (rom_entries[i].start > rom_entries[i].end) { + msg_gwarn("Warning: Size of the address range of region \"%s\" is not positive.\n", + rom_entries[i].name); + if (rom_entries[i].included) + ret = 1; + } + } + + return ret; +} + +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) { unsigned int start = 0; romlayout_t *entry;

1 0

[commit] r1751 - trunk
by repository service 23 Sep '13

23 Sep '13

Author: stefanct Date: Mon Sep 23 16:21:06 2013 New Revision: 1751 URL: http://flashrom.org/trac/flashrom/changeset/1751 Log: layout: Verify layout entries before building a new image using them. This fixes a SEGFAULT if a layout entry is included that addresses memory outside the current chip's address range. flashrom will only abort if the offending region(s) is/are included else it will just warn. It will print warnings for regions with negative or zero-length address ranges and bail out after checking all of them. Also, abort for non-write operations if a layout file is given because there is no layout support for other operations yet. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/cli_classic.c trunk/flash.h trunk/flashrom.c trunk/layout.c Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Sun Sep 15 16:17:39 2013 (r1750) +++ trunk/cli_classic.c Mon Sep 23 16:21:06 2013 (r1751) @@ -370,6 +370,12 @@ ret = 1; goto out; } + if (layoutfile != NULL && !write_it) { + msg_gerr("Layout files are currently supported for write operations only.\n"); + ret = 1; + goto out; + } + if (process_include_args()) { ret = 1; goto out; Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun Sep 15 16:17:39 2013 (r1750) +++ trunk/flash.h Mon Sep 23 16:21:06 2013 (r1751) @@ -45,6 +45,14 @@ typedef uintptr_t chipaddr; #define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2)) +/* Types and macros regarding the maximum flash space size supported by generic code. */ +typedef uint32_t chipoff_t; /* Able to store any addressable offset within a supported flash memory. */ +typedef uint32_t chipsize_t; /* Able to store the number of bytes of any supported flash memory. */ +#define FL_MAX_CHIPADDR_BITS (24) +#define FL_MAX_CHIPADDR ((chipoff_t)(1ULL<<FL_MAX_CHIPADDR_BITS)-1) +#define PRIxCHIPADDR "06"PRIx32 +#define PRIuCHIPSIZE PRIu32 + int register_shutdown(int (*function) (void *data), void *data); void *programmer_map_flash_region(const char *descr, uintptr_t phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); @@ -319,7 +327,8 @@ int register_include_arg(char *name); int process_include_args(void); int read_romlayout(char *name); -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); +int normalize_romentries(const struct flashctx *flash); +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); void layout_cleanup(void); /* spi.c */ Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Sep 15 16:17:39 2013 (r1750) +++ trunk/flashrom.c Mon Sep 23 16:21:06 2013 (r1751) @@ -1916,6 +1916,12 @@ goto out_nofree; } + if (normalize_romentries(flash)) { + msg_cerr("Requested regions can not be handled. Aborting.\n"); + ret = 1; + goto out_nofree; + } + /* Given the existence of read locks, we want to unlock for read, * erase and write. */ @@ -1995,9 +2001,8 @@ } msg_cinfo("done.\n"); - // This should be moved into each flash part's code to do it - // cleanly. This does the job. - handle_romentries(flash, oldcontents, newcontents); + /* Build a new image taking the given layout into account. */ + build_new_image(flash, oldcontents, newcontents); // //////////////////////////////////////////////////////////// Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Sun Sep 15 16:17:39 2013 (r1750) +++ trunk/layout.c Mon Sep 23 16:21:06 2013 (r1751) @@ -29,15 +29,15 @@ #define MAX_ROMLAYOUT 32 typedef struct { - unsigned int start; - unsigned int end; + chipoff_t start; + chipoff_t end; unsigned int included; char name[256]; } romentry_t; /* rom_entries store the entries specified in a layout file and associated run-time data */ static romentry_t rom_entries[MAX_ROMLAYOUT]; -static int num_rom_entries = 0; /* the number of valid rom_entries */ +static int num_rom_entries = 0; /* the number of successfully parsed rom_entries */ /* include_args holds the arguments specified at the command line with -i. They must be processed at some point * so that desired regions are marked as "included" in the rom_entries list. */ @@ -232,7 +232,31 @@ return best_entry; } -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) +/* Validate and - if needed - normalize layout entries. */ +int normalize_romentries(const struct flashctx *flash) +{ + chipsize_t total_size = flash->chip->total_size * 1024; + int ret = 0; + + int i; + for (i = 0; i < num_rom_entries; i++) { + if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { + msg_gwarn("Warning: Address range of region \"%s\" exceeds the current chip's " + "address space.\n", rom_entries[i].name); + if (rom_entries[i].included) + ret = 1; + } + if (rom_entries[i].start > rom_entries[i].end) { + msg_gerr("Error: Size of the address range of region \"%s\" is not positive.\n", + rom_entries[i].name); + ret = 1; + } + } + + return ret; +} + +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) { unsigned int start = 0; romentry_t *entry;

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Re: [flashrom] [PATCH] layout: Verify layout entries before building a new image using them.
by Carl-Daniel Hailfinger 23 Sep '13

23 Sep '13

Am 22.09.2013 21:10 schrieb Stefan Tauner: > This fixes a SEGFAULT if a layout entry is included that addresses memory > outside the current chip's address range. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > > Before continuing with the other layout patches, I'd like to fix this > issue (and copy the patch that fixes this also to the .7 stable branch). Good idea. > The macros are open for discussion not only regarding naming... > e.g. it might be easier to declare a macro that provides the full printf > format specification for the address, '0x06" PRIx32 "' to make the > resulting code more readable. > > flash.h | 11 ++++++++++- > flashrom.c | 11 ++++++++--- > layout.c | 29 +++++++++++++++++++++++++++-- > 3 files changed, 45 insertions(+), 6 deletions(-) > > diff --git a/flash.h b/flash.h > index 7b88477..a5033ef 100644 > --- a/flash.h > +++ b/flash.h > @@ -45,6 +45,14 @@ > typedef uintptr_t chipaddr; > #define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2)) > > +/* To be used in technology-independent code. */ > +#define FL_MAX_CHIPADDR (24) This looks suspiciously like the number of address bits. It's not, and that confused me. > +#define FL_MAX_CHIPSIZE ((1<<FL_MAX_CHIPADDR)-1) AFAICS it should be 1ULL, not 1. > +#define PRIxCHIPADDR_WIDTH ((int)(FL_MAX_CHIPADDR/4)) Incorrect rounding. If FL_MAX_CHIPADDR=23, PRIxCHIPADDR_WIDTH is 5, but it should be 6. Suggested fix: Replace FL_MAX_CHIPADDR/4 with (FL_MAX_CHIPADDR+3)/4. > +typedef uint32_t chipoff_t; /* Able to store any addressable offset within a supported flash memory. */ > +typedef uint32_t chipsize_t; /* Able to store the number of bytes of any supported flash memory. */ > +#define PRIxCHIPADDR PRIx32 > + > int register_shutdown(int (*function) (void *data), void *data); > void *programmer_map_flash_region(const char *descr, uintptr_t phys_addr, size_t len); > void programmer_unmap_flash_region(void *virt_addr, size_t len); > @@ -319,7 +327,8 @@ __attribute__((format(printf, 2, 3))); > int register_include_arg(char *name); > int process_include_args(void); > int read_romlayout(char *name); > -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); > +int normalize_romentries(const struct flashctx *flash); > +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); Good idea. > void layout_cleanup(void); > > /* spi.c */ > diff --git a/flashrom.c b/flashrom.c > index 9169620..afab57c 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -1916,6 +1916,12 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > goto out_nofree; > } > > + if (normalize_romentries(flash)) { > + msg_cerr("Requested regions can not be handled. Aborting.\n"); > + ret = 1; > + goto out_nofree; > + } > + > /* Given the existence of read locks, we want to unlock for read, > * erase and write. > */ > @@ -1995,9 +2001,8 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > } > msg_cinfo("done.\n"); > > - // This should be moved into each flash part's code to do it > - // cleanly. This does the job. > - handle_romentries(flash, oldcontents, newcontents); > + /* Build a new image taking the given layout into account. */ > + build_new_image(flash, oldcontents, newcontents); > > // //////////////////////////////////////////////////////////// > > diff --git a/layout.c b/layout.c > index 86351b8..5adec67 100644 > --- a/layout.c > +++ b/layout.c > @@ -37,7 +37,7 @@ typedef struct { > > /* rom_entries store the entries specified in a layout file and associated run-time data */ > static romentry_t rom_entries[MAX_ROMLAYOUT]; > -static int num_rom_entries = 0; /* the number of valid rom_entries */ > +static int num_rom_entries = 0; /* the number of successfully parsed rom_entries */ > > /* include_args holds the arguments specified at the command line with -i. They must be processed at some point > * so that desired regions are marked as "included" in the rom_entries list. */ > @@ -232,7 +232,32 @@ romentry_t *get_next_included_romentry(unsigned int start) > return best_entry; > } > > -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) > +/* Validate and - if needed - normalize layout entries. */ > +int normalize_romentries(const struct flashctx *flash) > +{ > + chipsize_t total_size = flash->chip->total_size * 1024; > + int ret = 0; > + > + int i; > + for (i = 0; i < num_rom_entries; i++) { > + if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { If you want to do this, please make sure struct romentry has members start/end with type chipoff_t. Otherwise that check may backfire eventually. > + msg_gwarn("Warning: Address range of region \"%s\" exeeds the current chip's " > + "address space.\n", rom_entries[i].name); > + if (rom_entries[i].included) > + ret = 1; > + } > + if (rom_entries[i].start >= rom_entries[i].end) { Off-by-one: If start==end, the length is 1, but this check will trigger. The check should be > instead of >=. > + msg_gwarn("Warning: Size of the address range of region \"%s\" is not positive.\n", > + rom_entries[i].name); > + if (rom_entries[i].included) > + ret = 1; > + } > + } > + > + return ret; > +} > + > +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) > { > unsigned int start = 0; > romentry_t *entry; Looks good otherwise. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[PATCH] layout: Verify layout entries before building a new image using them.
by Stefan Tauner 22 Sep '13

22 Sep '13

This fixes a SEGFAULT if a layout entry is included that addresses memory outside the current chip's address range. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Before continuing with the other layout patches, I'd like to fix this issue (and copy the patch that fixes this also to the .7 stable branch). The macros are open for discussion not only regarding naming... e.g. it might be easier to declare a macro that provides the full printf format specification for the address, '0x06" PRIx32 "' to make the resulting code more readable. flash.h | 11 ++++++++++- flashrom.c | 11 ++++++++--- layout.c | 29 +++++++++++++++++++++++++++-- 3 files changed, 45 insertions(+), 6 deletions(-) diff --git a/flash.h b/flash.h index 7b88477..a5033ef 100644 --- a/flash.h +++ b/flash.h @@ -45,6 +45,14 @@ typedef uintptr_t chipaddr; #define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2)) +/* To be used in technology-independent code. */ +#define FL_MAX_CHIPADDR (24) +#define FL_MAX_CHIPSIZE ((1<<FL_MAX_CHIPADDR)-1) +#define PRIxCHIPADDR_WIDTH ((int)(FL_MAX_CHIPADDR/4)) +typedef uint32_t chipoff_t; /* Able to store any addressable offset within a supported flash memory. */ +typedef uint32_t chipsize_t; /* Able to store the number of bytes of any supported flash memory. */ +#define PRIxCHIPADDR PRIx32 + int register_shutdown(int (*function) (void *data), void *data); void *programmer_map_flash_region(const char *descr, uintptr_t phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); @@ -319,7 +327,8 @@ __attribute__((format(printf, 2, 3))); int register_include_arg(char *name); int process_include_args(void); int read_romlayout(char *name); -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); +int normalize_romentries(const struct flashctx *flash); +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); void layout_cleanup(void); /* spi.c */ diff --git a/flashrom.c b/flashrom.c index 9169620..afab57c 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1916,6 +1916,12 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, goto out_nofree; } + if (normalize_romentries(flash)) { + msg_cerr("Requested regions can not be handled. Aborting.\n"); + ret = 1; + goto out_nofree; + } + /* Given the existence of read locks, we want to unlock for read, * erase and write. */ @@ -1995,9 +2001,8 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, } msg_cinfo("done.\n"); - // This should be moved into each flash part's code to do it - // cleanly. This does the job. - handle_romentries(flash, oldcontents, newcontents); + /* Build a new image taking the given layout into account. */ + build_new_image(flash, oldcontents, newcontents); // //////////////////////////////////////////////////////////// diff --git a/layout.c b/layout.c index 86351b8..5adec67 100644 --- a/layout.c +++ b/layout.c @@ -37,7 +37,7 @@ typedef struct { /* rom_entries store the entries specified in a layout file and associated run-time data */ static romentry_t rom_entries[MAX_ROMLAYOUT]; -static int num_rom_entries = 0; /* the number of valid rom_entries */ +static int num_rom_entries = 0; /* the number of successfully parsed rom_entries */ /* include_args holds the arguments specified at the command line with -i. They must be processed at some point * so that desired regions are marked as "included" in the rom_entries list. */ @@ -232,7 +232,32 @@ romentry_t *get_next_included_romentry(unsigned int start) return best_entry; } -int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) +/* Validate and - if needed - normalize layout entries. */ +int normalize_romentries(const struct flashctx *flash) +{ + chipsize_t total_size = flash->chip->total_size * 1024; + int ret = 0; + + int i; + for (i = 0; i < num_rom_entries; i++) { + if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { + msg_gwarn("Warning: Address range of region \"%s\" exeeds the current chip's " + "address space.\n", rom_entries[i].name); + if (rom_entries[i].included) + ret = 1; + } + if (rom_entries[i].start >= rom_entries[i].end) { + msg_gwarn("Warning: Size of the address range of region \"%s\" is not positive.\n", + rom_entries[i].name); + if (rom_entries[i].included) + ret = 1; + } + } + + return ret; +} + +int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) { unsigned int start = 0; romentry_t *entry; -- Kind regards, Stefan Tauner

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Report: Gigabyte Z77-DS3H F10f read
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.5.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Desktop/DPCIManager_ML/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Desktop/DPCIManager_ML/Gigabyte Z77-DS3H F10f.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 521M loops per second, 10 myus = 9 us, 100 myus = 135 us, 1000 myus = 1037 us, 10000 myus = 10057 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." DMI string system-product-name: "To be filled by O.E.M." DMI string system-version: "To be filled by O.E.M." DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "Z77-DS3H" DMI string baseboard-version: "x.x" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8728 on port 0x2e Found chipset "Intel Z77" with PCI ID 8086:1e44. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0xc64: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 Warning: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0x20, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x9f, read w/o addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x0020536d (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0000 FREG1: BIOS region (0x00000000-0x007fffff) is read-write. 0x5C: 0x01ff0001 FREG2: Management Engine region (0x00001000-0x001fffff) is read-write. 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf94010 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x07ff0000 FLREG2 0x01ff0001 FLREG3 0x00001fff FLREG4 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00000000 - 0x007fffff Region 2 (ME ) 0x00001000 - 0x001fffff Region 3 (GbE ) is unused. Region 4 (Platf.) is unused. === Master Section === FLMSTR1 0xffff0000 FLMSTR2 0xffff0000 FLMSTR3 0xffff0118 --- Details --- Descr. BIOS ME GbE Platf. BIOS rw rw rw rw rw ME rw rw rw rw rw GbE rw rw rw rw rw SPI Read Configuration: prefetching enabled, caching enabled, OK. Super I/O ID 0x8728 is not on the list of flash capable controllers. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032/A25LQ32A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512, 64 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F512A, 64 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F1024(A), 128 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F2048, 256 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F4096, 512 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20(B), 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16(B), 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25T80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005(C), 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005(A/C), 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005/MX25V8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605A/MX25L1606E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605D/MX25L1608D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205(A), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3206E, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405(D), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Macronix MX25L6406E/MX25L6436E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Macronix MX25L6445E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6445E" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E" Please specify which chip definition to use with the -c <chipname> option. Restoring MMIO space at 0x1082618a0 Restoring PCI config space for 00:1f:0 reg 0xdc

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Report: LENOVO INVALID 5ECN96WW(V9.01) write
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.5.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Desktop/DPCIManager_ML/DPCIManager.app/Contents/MacOS/flashrom -VV -w /var/folders/h1/13t69tz54s7djznmw4fbp5300000gn/T/DPCIc8acwg.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 424M loops per second, 10 myus = 11 us, 100 myus = 106 us, 1000 myus = 1110 us, 10000 myus = 9910 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: "LENOVO" DMI string system-product-name: "Lenovo G580" DMI string system-version: "Lenovo G580" DMI string baseboard-manufacturer: "LENOVO" DMI string baseboard-product-name: "INVALID" DMI string baseboard-version: "00000000INVALID " DMI string chassis-type: "Notebook" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

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Report: ASUSTeK P8B75-M LX 1308 read
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.5.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Downloads/DPCIManager_ML/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Desktop/ASUSTeK P8B75-M LX 1308.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 484M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1011 us, 10000 myus = 10806 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK COMPUTER INC." DMI string baseboard-product-name: "P8B75-M LX" DMI string baseboard-version: "Rev X.0x" DMI string chassis-type: "Desktop" Found chipset "Intel B75" with PCI ID 8086:1e49. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x0a: BIOS Lock Enable: enabled, BIOS Write Enable: disabled Warning: Setting Bios Control at 0xdc from 0x0a to 0x0b on B75 failed. New value is 0x0a. Root Complex Register Block address = 0xfed1c000 GCS = 0xc65: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 Warning: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0x20, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x9f, read w/o addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00807882 (FADDR) 0x50: 0x00000a0b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b 0x54: 0x00000000 FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x0fff0800 FREG1: BIOS region (0x00800000-0x00ffffff) is read-write. 0x5C: 0x07ff0001 FREG2: Warning: Management Engine region (0x00001000-0x007fffff) is locked. 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00001fff FREG4: Platform Data region is unused. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see http://flashrom.org/ME for details. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) Writes have been disabled for safety reasons. You can enforce write support with the ich_spi_force programmer option, but you will most likely harm your hardware! If you force flashrom you will get no support if something breaks. On a few mainboards it is possible to enable write access by setting a jumper (see its documentation or the board itself). 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf94010 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040103 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 2 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 density: 8 MB Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x0fff0800 FLREG2 0x07ff0001 FLREG3 0x00001fff FLREG4 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00800000 - 0x00ffffff Region 2 (ME ) 0x00001000 - 0x007fffff Region 3 (GbE ) is unused. Region 4 (Platf.) is unused. === Master Section === FLMSTR1 0x0a0b0000 FLMSTR2 0x0c0d0000 FLMSTR3 0x08080118 --- Details --- Descr. BIOS ME GbE Platf. BIOS r rw rw ME r rw rw GbE rw Enabling hardware sequencing due to multiple flash chips detected. SPI Read Configuration: prefetching enabled, caching enabled, PROBLEMS, continuing anyway The following protocols are supported: FWH, Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found 2 attached SPI flash chips with a combined density of 16384 kB. There is only one partition containing the whole address space (0x000000 - 0xffffff). There are 4096 erase blocks with 4096 B each. Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) at physical address 0x0. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x50, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific). Reading flash... Reading 16777216 bytes starting at 0x000000. Transaction error between offset 0x00001000 and 0x0000103f (= 0x00001000 + 63)! HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 Read operation failed! FAILED. Restoring MMIO space at 0x10ea118a0 Restoring PCI config space for 00:1f:0 reg 0xdc

1 0

Report: Intel DX58SO SOX5810J.86A.5600.2013.0729.2250 read
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.5.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Desktop/DPCIManager_ML/DPCIManager.app/Contents/MacOS/flashrom -VV -r /var/folders/mn/5ls503m51dvg7wh77z9p7x1r0000gn/T/DPCIoF4ZyH.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 534M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 988 us, 10000 myus = 9883 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: "Intel Corporation" DMI string baseboard-product-name: "DX58SO" DMI string baseboard-version: "AAE29331-703" DMI string chassis-type: "Unknown" DMI chassis-type is not specific enough. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: f1. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. ======================================================================== WARNING! You may be running flashrom on an unsupported laptop. We could not detect this for sure because your vendor has not setup the SMBIOS tables correctly. You can enforce execution by adding '-p internal:laptop=this_is_not_a_laptop' to the command line, but please read the following warning if you are not sure. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

1 0

Report: Hewlett-Packard 17F6 68IRR Ver. F.41 read
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.5.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Downloads/DPCIManager_ML/DPCIManager.app/Contents/MacOS/flashrom -VV -r /var/folders/y4/mz6b52v9181c2t4ct96133dm0000gn/T/DPCIXu0rtJ.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 426M loops per second, 10 myus = 11 us, 100 myus = 114 us, 1000 myus = 1089 us, 10000 myus = 10273 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "HP ProBook 4540s" DMI string system-version: "A1018C1100" DMI string baseboard-manufacturer: "Hewlett-Packard" DMI string baseboard-product-name: "17F6" DMI string baseboard-version: "KBC Version 58.1E" DMI string chassis-type: "Notebook" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

1 0

Report: Gigabyte Z77X-D3H F17f read
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.5.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Downloads/DPCIManager_Lion/DPCIManager.app/Contents/MacOS/flashrom -VV -r /var/folders/1y/nmb1pz117g78v7j8zfqwpxb80000gn/T/DPCIHwXkUY.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 455M loops per second, 10 myus = 9 us, 100 myus = 91 us, 1000 myus = 948 us, 10000 myus = 9116 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." DMI string system-product-name: "To be filled by O.E.M." DMI string system-version: "To be filled by O.E.M." DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "Z77X-D3H" DMI string baseboard-version: "x.x" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8728 on port 0x2e Found chipset "Intel Z77" with PCI ID 8086:1e44. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0xc64: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 Warning: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0x20, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x9f, read w/o addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00213f5b (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0000 FREG1: BIOS region (0x00000000-0x007fffff) is read-write. 0x5C: 0x01ff0001 FREG2: Management Engine region (0x00001000-0x001fffff) is read-write. 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf94010 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x07ff0000 FLREG2 0x01ff0001 FLREG3 0x00001fff FLREG4 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00000000 - 0x007fffff Region 2 (ME ) 0x00001000 - 0x001fffff Region 3 (GbE ) is unused. Region 4 (Platf.) is unused. === Master Section === FLMSTR1 0xffff0000 FLMSTR2 0xffff0000 FLMSTR3 0xffff0118 --- Details --- Descr. BIOS ME GbE Platf. BIOS rw rw rw rw rw ME rw rw rw rw rw GbE rw rw rw rw rw SPI Read Configuration: prefetching enabled, caching enabled, OK. Super I/O ID 0x8728 is not on the list of flash capable controllers. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032/A25LQ32A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512, 64 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F512A, 64 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F1024(A), 128 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F2048, 256 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F4096, 512 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25S64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20(B), 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16(B), 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25T80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005(C), 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005(A/C), 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005/MX25V8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605A/MX25L1606E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605D/MX25L1608D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205(A), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3206E, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405(D), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Macronix MX25L6406E/MX25L6436E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Macronix MX25L6445E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6445E" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E" Please specify which chip definition to use with the -c <chipname> option. Restoring MMIO space at 0x10be048a0 Restoring PCI config space for 00:1f:0 reg 0xdc

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Report: Dell 0J048T A08 read
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.4.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Downloads/DPCIManager_ML/DPCIManager.app/Contents/MacOS/flashrom -VV -r /var/folders/69/8lkkrhz52bz_xzwkkybpysd00000gn/T/DPCI0E53if.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 356M loops per second, 10 myus = 9 us, 100 myus = 102 us, 1000 myus = 1013 us, 10000 myus = 11188 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: "Dell Inc." DMI string system-product-name: "Vostro 1520" DMI string system-version: "Null" DMI string baseboard-manufacturer: "Dell Inc." DMI string baseboard-product-name: "0J048T" DMI string baseboard-version: " " DMI string chassis-type: "Portable" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

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Report: ASUSTeK P8B75-V 1501 write
by dpcimanager＠users.sourceforge.net 22 Sep '13

22 Sep '13

flashrom v0.9.7-r1711 on Darwin 12.5.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian Command line (5 args): ~/Downloads/DPCIManager_ML/DPCIManager.app/Contents/MacOS/flashrom -VV -w /var/folders/qg/zb0nbl_x67zcx9vtlktx_1fh0000gn/T/DPCI81XDks.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 205M loops per second, 10 myus = 9 us, 100 myus = 91 us, 1000 myus = 6232 us, 10000 myus = 10427 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400. No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK COMPUTER INC." DMI string baseboard-product-name: "P8B75-V" DMI string baseboard-version: "Rev X.0x" DMI string chassis-type: "Desktop" Found chipset "Intel B75" with PCI ID 8086:1e49. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x0a: BIOS Lock Enable: enabled, BIOS Write Enable: disabled Warning: Setting Bios Control at 0xdc from 0x0a to 0x0b on B75 failed. New value is 0x0a. Root Complex Register Block address = 0xfed1c000 GCS = 0xc65: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 Warning: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0x20, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x9f, read w/o addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x00 0x06: 0x3f00 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 0x08: 0x00ffffc0 (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x0fff0800 FREG1: BIOS region (0x00800000-0x00ffffff) is read-write. 0x5C: 0x07ff0001 FREG2: Management Engine region (0x00001000-0x007fffff) is read-write. 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf94010 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040103 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 2 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 density: 8 MB Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x0fff0800 FLREG2 0x07ff0001 FLREG3 0x00001fff FLREG4 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00800000 - 0x00ffffff Region 2 (ME ) 0x00001000 - 0x007fffff Region 3 (GbE ) is unused. Region 4 (Platf.) is unused. === Master Section === FLMSTR1 0xffff0000 FLMSTR2 0xffff0000 FLMSTR3 0xffff0118 --- Details --- Descr. BIOS ME GbE Platf. BIOS rw rw rw rw rw ME rw rw rw rw rw GbE rw rw rw rw rw Enabling hardware sequencing due to multiple flash chips detected. SPI Read Configuration: prefetching enabled, caching enabled, PROBLEMS, continuing anyway The following protocols are supported: FWH, Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found 2 attached SPI flash chips with a combined density of 16384 kB. There is only one partition containing the whole address space (0x000000 - 0xffffff). There are 4096 erase blocks with 4096 B each. Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) at physical address 0x0. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x45, id2 0x10, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific). Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... Reading 16777216 bytes starting at 0x000000. done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:S, 0x001000-0x001fff:S, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S, 0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff:S, 0x010000-0x010fff:S, 0x011000-0x011fff:S, 0x012000-0x012fff:S, 0x013000-0x013fff:S, 0x014000-0x014fff:S, 0x015000-0x015fff:S, 0x016000-0x016fff:S, 0x017000-0x017fff:S, 0x018000-0x018fff:S, 0x019000-0x019fff:S, 0x01a000-0x01afff:S, 0x01b000-0x01bfff:S, 0x01c000-0x01cfff:S, 0x01d000-0x01dfff:S, 0x01e000-0x01efff:S, 0x01f000-0x01ffff:S, 0x020000-0x020fff:S, 0x021000-0x021fff:S, 0x022000-0x022fff:S, 0x023000-0x023fff:S, 0x024000-0x024fff:S, 0x025000-0x025fff:S, 0x026000-0x026fff:S, 0x027000-0x027fff:S, 0x028000-0x028fff:S, 0x029000-0x029fff:S, 0x02a000-0x02afff:S, 0x02b000-0x02bfff:S, 0x02c000-0x02cfff:S, 0x02d000-0x02dfff:S, 0x02e000-0x02efff:S, 0x02f000-0x02ffff:S, 0x030000-0x030fff:S, 0x031000-0x031fff:S, 0x032000-0x032fff:S, 0x033000-0x033fff:S, 0x034000-0x034fff:S, 0x035000-0x035fff:S, 0x036000-0x036fff:S, 0x037000-0x037fff:S, 0x038000-0x038fff:S, 0x039000-0x039fff:S, 0x03a000-0x03afff:S, 0x03b000-0x03bfff:S, 0x03c000-0x03cfff:S, 0x03d000-0x03dfff:S, 0x03e000-0x03efff:S, 0x03f000-0x03ffff:S, 0x040000-0x040fff:S, 0x041000-0x041fff:S, 0x042000-0x042fff:S, 0x043000-0x043fff:S, 0x044000-0x044fff:S, 0x045000-0x045fff:S, 0x046000-0x046fff:S, 0x047000-0x047fff:S, 0x048000-0x048fff:S, 0x049000-0x049fff:S, 0x04a000-0x04afff:S, 0x04b000-0x04bfff:S, 0x04c000-0x04cfff:S, 0x04d000-0x04dfff:S, 0x04e000-0x04efff:S, 0x04f000-0x04ffff:S, 0x050000-0x050fff:S, 0x051000-0x051fff:S, 0x052000-0x052fff:S, 0x053000-0x053fff:S, 0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x056000-0x056fff:S, 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S, 0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S, 0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S, 0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S, 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S, 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S, 0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S, 0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S, 0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S, 0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S, 0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S, 0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S, 0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S, 0x07e000-0x07efff:S, 0x07f000-0x07ffff:S, 0x080000-0x080fff:S, 0x081000-0x081fff:S, 0x082000-0x082fff:S, 0x083000-0x083fff:S, 0x084000-0x084fff:S, 0x085000-0x085fff:S, 0x086000-0x086fff:S, 0x087000-0x087fff:S, 0x088000-0x088fff:S, 0x089000-0x089fff:S, 0x08a000-0x08afff:S, 0x08b000-0x08bfff:S, 0x08c000-0x08cfff:S, 0x08d000-0x08dfff:S, 0x08e000-0x08efff:S, 0x08f000-0x08ffff:S, 0x090000-0x090fff:S, 0x091000-0x091fff:S, 0x092000-0x092fff:S, 0x093000-0x093fff:S, 0x094000-0x094fff:S, 0x095000-0x095fff:S, 0x096000-0x096fff:S, 0x097000-0x097fff:S, 0x098000-0x098fff:S, 0x099000-0x099fff:S, 0x09a000-0x09afff:S, 0x09b000-0x09bfff:S, 0x09c000-0x09cfff:S, 0x09d000-0x09dfff:S, 0x09e000-0x09efff:S, 0x09f000-0x09ffff:S, 0x0a0000-0x0a0fff:S, 0x0a1000-0x0a1fff:S, 0x0a2000-0x0a2fff:S, 0x0a3000-0x0a3fff:S, 0x0a4000-0x0a4fff:S, 0x0a5000-0x0a5fff:S, 0x0a6000-0x0a6fff:S, 0x0a7000-0x0a7fff:S, 0x0a8000-0x0a8fff:S, 0x0a9000-0x0a9fff:S, 0x0aa000-0x0aafff:S, 0x0ab000-0x0abfff:S, 0x0ac000-0x0acfff:S, 0x0ad000-0x0adfff:S, 0x0ae000-0x0aefff:S, 0x0af000-0x0affff:S, 0x0b0000-0x0b0fff:S, 0x0b1000-0x0b1fff:S, 0x0b2000-0x0b2fff:S, 0x0b3000-0x0b3fff:S, 0x0b4000-0x0b4fff:S, 0x0b5000-0x0b5fff:S, 0x0b6000-0x0b6fff:S, 0x0b7000-0x0b7fff:S, 0x0b8000-0x0b8fff:S, 0x0b9000-0x0b9fff:S, 0x0ba000-0x0bafff:S, 0x0bb000-0x0bbfff:S, 0x0bc000-0x0bcfff:S, 0x0bd000-0x0bdfff:S, 0x0be000-0x0befff:S, 0x0bf000-0x0bffff:S, 0x0c0000-0x0c0fff:S, 0x0c1000-0x0c1fff:S, 0x0c2000-0x0c2fff:S, 0x0c3000-0x0c3fff:S, 0x0c4000-0x0c4fff:S, 0x0c5000-0x0c5fff:S, 0x0c6000-0x0c6fff:S, 0x0c7000-0x0c7fff:S, 0x0c8000-0x0c8fff:S, 0x0c9000-0x0c9fff:S, 0x0ca000-0x0cafff:S, 0x0cb000-0x0cbfff:S, 0x0cc000-0x0ccfff:S, 0x0cd000-0x0cdfff:S, 0x0ce000-0x0cefff:S, 0x0cf000-0x0cffff:S, 0x0d0000-0x0d0fff:S, 0x0d1000-0x0d1fff:S, 0x0d2000-0x0d2fff:S, 0x0d3000-0x0d3fff:S, 0x0d4000-0x0d4fff:S, 0x0d5000-0x0d5fff:S, 0x0d6000-0x0d6fff:S, 0x0d7000-0x0d7fff:S, 0x0d8000-0x0d8fff:S, 0x0d9000-0x0d9fff:S, 0x0da000-0x0dafff:S, 0x0db000-0x0dbfff:S, 0x0dc000-0x0dcfff:S, 0x0dd000-0x0ddfff:S, 0x0de000-0x0defff:S, 0x0df000-0x0dffff:S, 0x0e0000-0x0e0fff:S, 0x0e1000-0x0e1fff:S, 0x0e2000-0x0e2fff:S, 0x0e3000-0x0e3fff:S, 0x0e4000-0x0e4fff:S, 0x0e5000-0x0e5fff:S, 0x0e6000-0x0e6fff:S, 0x0e7000-0x0e7fff:S, 0x0e8000-0x0e8fff:S, 0x0e9000-0x0e9fff:S, 0x0ea000-0x0eafff:S, 0x0eb000-0x0ebfff:S, 0x0ec000-0x0ecfff:S, 0x0ed000-0x0edfff:S, 0x0ee000-0x0eefff:S, 0x0ef000-0x0effff:S, 0x0f0000-0x0f0fff:S, 0x0f1000-0x0f1fff:S, 0x0f2000-0x0f2fff:S, 0x0f3000-0x0f3fff:S, 0x0f4000-0x0f4fff:S, 0x0f5000-0x0f5fff:S, 0x0f6000-0x0f6fff:S, 0x0f7000-0x0f7fff:S, 0x0f8000-0x0f8fff:S, 0x0f9000-0x0f9fff:S, 0x0fa000-0x0fafff:S, 0x0fb000-0x0fbfff:S, 0x0fc000-0x0fcfff:S, 0x0fd000-0x0fdfff:S, 0x0fe000-0x0fefff:S, 0x0ff000-0x0fffff:S, 0x100000-0x100fff:S, 0x101000-0x101fff:S, 0x102000-0x102fff:S, 0x103000-0x103fff:S, 0x104000-0x104fff:S, 0x105000-0x105fff:S, 0x106000-0x106fff:S, 0x107000-0x107fff:S, 0x108000-0x108fff:S, 0x109000-0x109fff:S, 0x10a000-0x10afff:S, 0x10b000-0x10bfff:S, 0x10c000-0x10cfff:S, 0x10d000-0x10dfff:S, 0x10e000-0x10efff:S, 0x10f000-0x10ffff:S, 0x110000-0x110fff:S, 0x111000-0x111fff:S, 0x112000-0x112fff:S, 0x113000-0x113fff:S, 0x114000-0x114fff:S, 0x115000-0x115fff:S, 0x116000-0x116fff:S, 0x117000-0x117fff:S, 0x118000-0x118fff:S, 0x119000-0x119fff:S, 0x11a000-0x11afff:S, 0x11b000-0x11bfff:S, 0x11c000-0x11cfff:S, 0x11d000-0x11dfff:S, 0x11e000-0x11efff:S, 0x11f000-0x11ffff:S, 0x120000-0x120fff:S, 0x121000-0x121fff:S, 0x122000-0x122fff:S, 0x123000-0x123fff:S, 0x124000-0x124fff:S, 0x125000-0x125fff:S, 0x126000-0x126fff:S, 0x127000-0x127fff:S, 0x128000-0x128fff:S, 0x129000-0x129fff:S, 0x12a000-0x12afff:S, 0x12b000-0x12bfff:S, 0x12c000-0x12cfff:S, 0x12d000-0x12dfff:S, 0x12e000-0x12efff:S, 0x12f000-0x12ffff:S, 0x130000-0x130fff:S, 0x131000-0x131fff:S, 0x132000-0x132fff:S, 0x133000-0x133fff:S, 0x134000-0x134fff:S, 0x135000-0x135fff:S, 0x136000-0x136fff:S, 0x137000-0x137fff:S, 0x138000-0x138fff:S, 0x139000-0x139fff:S, 0x13a000-0x13afff:S, 0x13b000-0x13bfff:S, 0x13c000-0x13cfff:S, 0x13d000-0x13dfff:S, 0x13e000-0x13efff:S, 0x13f000-0x13ffff:S, 0x140000-0x140fff:S, 0x141000-0x141fff:S, 0x142000-0x142fff:S, 0x143000-0x143fff:S, 0x144000-0x144fff:S, 0x145000-0x145fff:S, 0x146000-0x146fff:S, 0x147000-0x147fff:S, 0x148000-0x148fff:S, 0x149000-0x149fff:S, 0x14a000-0x14afff:S, 0x14b000-0x14bfff:S, 0x14c000-0x14cfff:S, 0x14d000-0x14dfff:S, 0x14e000-0x14efff:S, 0x14f000-0x14ffff:S, 0x150000-0x150fff:S, 0x151000-0x151fff:S, 0x152000-0x152fff:S, 0x153000-0x153fff:S, 0x154000-0x154fff:S, 0x155000-0x155fff:S, 0x156000-0x156fff:S, 0x157000-0x157fff:S, 0x158000-0x158fff:S, 0x159000-0x159fff:S, 0x15a000-0x15afff:S, 0x15b000-0x15bfff:S, 0x15c000-0x15cfff:S, 0x15d000-0x15dfff:S, 0x15e000-0x15efff:S, 0x15f000-0x15ffff:S, 0x160000-0x160fff:S, 0x161000-0x161fff:S, 0x162000-0x162fff:S, 0x163000-0x163fff:S, 0x164000-0x164fff:S, 0x165000-0x165fff:S, 0x166000-0x166fff:S, 0x167000-0x167fff:S, 0x168000-0x168fff:S, 0x169000-0x169fff:S, 0x16a000-0x16afff:S, 0x16b000-0x16bfff:S, 0x16c000-0x16cfff:S, 0x16d000-0x16dfff:S, 0x16e000-0x16efff:S, 0x16f000-0x16ffff:S, 0x170000-0x170fff:S, 0x171000-0x171fff:S, 0x172000-0x172fff:S, 0x173000-0x173fff:S, 0x174000-0x174fff:S, 0x175000-0x175fff:S, 0x176000-0x176fff:S, 0x177000-0x177fff:S, 0x178000-0x178fff:S, 0x179000-0x179fff:S, 0x17a000-0x17afff:S, 0x17b000-0x17bfff:S, 0x17c000-0x17cfff:S, 0x17d000-0x17dfff:S, 0x17e000-0x17efff:S, 0x17f000-0x17ffff:S, 0x180000-0x180fff:S, 0x181000-0x181fff:S, 0x182000-0x182fff:S, 0x183000-0x183fff:S, 0x184000-0x184fff:S, 0x185000-0x185fff:S, 0x186000-0x186fff:S, 0x187000-0x187fff:S, 0x188000-0x188fff:S, 0x189000-0x189fff:S, 0x18a000-0x18afff:S, 0x18b000-0x18bfff:S, 0x18c000-0x18cfff:S, 0x18d000-0x18dfff:S, 0x18e000-0x18efff:S, 0x18f000-0x18ffff:S, 0x190000-0x190fff:S, 0x191000-0x191fff:S, 0x192000-0x192fff:S, 0x193000-0x193fff:S, 0x194000-0x194fff:S, 0x195000-0x195fff:S, 0x196000-0x196fff:S, 0x197000-0x197fff:S, 0x198000-0x198fff:S, 0x199000-0x199fff:S, 0x19a000-0x19afff:S, 0x19b000-0x19bfff:S, 0x19c000-0x19cfff:S, 0x19d000-0x19dfff:S, 0x19e000-0x19efff:S, 0x19f000-0x19ffff:S, 0x1a0000-0x1a0fff:S, 0x1a1000-0x1a1fff:S, 0x1a2000-0x1a2fff:S, 0x1a3000-0x1a3fff:S, 0x1a4000-0x1a4fff:S, 0x1a5000-0x1a5fff:S, 0x1a6000-0x1a6fff:S, 0x1a7000-0x1a7fff:S, 0x1a8000-0x1a8fff:S, 0x1a9000-0x1a9fff:S, 0x1aa000-0x1aafff:S, 0x1ab000-0x1abfff:S, 0x1ac000-0x1acfff:S, 0x1ad000-0x1adfff:S, 0x1ae000-0x1aefff:S, 0x1af000-0x1affff:S, 0x1b0000-0x1b0fff:S, 0x1b1000-0x1b1fff:S, 0x1b2000-0x1b2fff:S, 0x1b3000-0x1b3fff:S, 0x1b4000-0x1b4fff:S, 0x1b5000-0x1b5fff:S, 0x1b6000-0x1b6fff:S, 0x1b7000-0x1b7fff:S, 0x1b8000-0x1b8fff:S, 0x1b9000-0x1b9fff:S, 0x1ba000-0x1bafff:S, 0x1bb000-0x1bbfff:S, 0x1bc000-0x1bcfff:S, 0x1bd000-0x1bdfff:S, 0x1be000-0x1befff:S, 0x1bf000-0x1bffff:S, 0x1c0000-0x1c0fff:S, 0x1c1000-0x1c1fff:S, 0x1c2000-0x1c2fff:S, 0x1c3000-0x1c3fff:S, 0x1c4000-0x1c4fff:S, 0x1c5000-0x1c5fff:S, 0x1c6000-0x1c6fff:S, 0x1c7000-0x1c7fff:S, 0x1c8000-0x1c8fff:S, 0x1c9000-0x1c9fff:S, 0x1ca000-0x1cafff:S, 0x1cb000-0x1cbfff:S, 0x1cc000-0x1ccfff:S, 0x1cd000-0x1cdfff:S, 0x1ce000-0x1cefff:S, 0x1cf000-0x1cffff:S, 0x1d0000-0x1d0fff:S, 0x1d1000-0x1d1fff:S, 0x1d2000-0x1d2fff:S, 0x1d3000-0x1d3fff:S, 0x1d4000-0x1d4fff:S, 0x1d5000-0x1d5fff:S, 0x1d6000-0x1d6fff:S, 0x1d7000-0x1d7fff:S, 0x1d8000-0x1d8fff:S, 0x1d9000-0x1d9fff:S, 0x1da000-0x1dafff:S, 0x1db000-0x1dbfff:S, 0x1dc000-0x1dcfff:S, 0x1dd000-0x1ddfff:S, 0x1de000-0x1defff:S, 0x1df000-0x1dffff:S, 0x1e0000-0x1e0fff:S, 0x1e1000-0x1e1fff:S, 0x1e2000-0x1e2fff:S, 0x1e3000-0x1e3fff:S, 0x1e4000-0x1e4fff:S, 0x1e5000-0x1e5fff:S, 0x1e6000-0x1e6fff:S, 0x1e7000-0x1e7fff:S, 0x1e8000-0x1e8fff:S, 0x1e9000-0x1e9fff:S, 0x1ea000-0x1eafff:S, 0x1eb000-0x1ebfff:S, 0x1ec000-0x1ecfff:S, 0x1ed000-0x1edfff:S, 0x1ee000-0x1eefff:S, 0x1ef000-0x1effff:S, 0x1f0000-0x1f0fff:S, 0x1f1000-0x1f1fff:S, 0x1f2000-0x1f2fff:S, 0x1f3000-0x1f3fff:S, 0x1f4000-0x1f4fff:S, 0x1f5000-0x1f5fff:S, 0x1f6000-0x1f6fff:S, 0x1f7000-0x1f7fff:S, 0x1f8000-0x1f8fff:S, 0x1f9000-0x1f9fff:S, 0x1fa000-0x1fafff:S, 0x1fb000-0x1fbfff:S, 0x1fc000-0x1fcfff:S, 0x1fd000-0x1fdfff:S, 0x1fe000-0x1fefff:S, 0x1ff000-0x1fffff:S, 0x200000-0x200fff:S, 0x201000-0x201fff:S, 0x202000-0x202fff:S, 0x203000-0x203fff:S, 0x204000-0x204fff:S, 0x205000-0x205fff:S, 0x206000-0x206fff:S, 0x207000-0x207fff:S, 0x208000-0x208fff:S, 0x209000-0x209fff:S, 0x20a000-0x20afff:S, 0x20b000-0x20bfff:S, 0x20c000-0x20cfff:S, 0x20d000-0x20dfff:S, 0x20e000-0x20efff:S, 0x20f000-0x20ffff:S, 0x210000-0x210fff:S, 0x211000-0x211fff:S, 0x212000-0x212fff:S, 0x213000-0x213fff:S, 0x214000-0x214fff:S, 0x215000-0x215fff:S, 0x216000-0x216fff:S, 0x217000-0x217fff:S, 0x218000-0x218fff:S, 0x219000-0x219fff:S, 0x21a000-0x21afff:S, 0x21b000-0x21bfff:S, 0x21c000-0x21cfff:S, 0x21d000-0x21dfff:S, 0x21e000-0x21efff:S, 0x21f000-0x21ffff:S, 0x220000-0x220fff:S, 0x221000-0x221fff:S, 0x222000-0x222fff:S, 0x223000-0x223fff:S, 0x224000-0x224fff:S, 0x225000-0x225fff:S, 0x226000-0x226fff:S, 0x227000-0x227fff:S, 0x228000-0x228fff:S, 0x229000-0x229fff:S, 0x22a000-0x22afff:S, 0x22b000-0x22bfff:S, 0x22c000-0x22cfff:S, 0x22d000-0x22dfff:S, 0x22e000-0x22efff:S, 0x22f000-0x22ffff:S, 0x230000-0x230fff:S, 0x231000-0x231fff:S, 0x232000-0x232fff:S, 0x233000-0x233fff:S, 0x234000-0x234fff:S, 0x235000-0x235fff:S, 0x236000-0x236fff:S, 0x237000-0x237fff:S, 0x238000-0x238fff:S, 0x239000-0x239fff:S, 0x23a000-0x23afff:S, 0x23b000-0x23bfff:S, 0x23c000-0x23cfff:S, 0x23d000-0x23dfff:S, 0x23e000-0x23efff:S, 0x23f000-0x23ffff:S, 0x240000-0x240fff:S, 0x241000-0x241fff:S, 0x242000-0x242fff:S, 0x243000-0x243fff:S, 0x244000-0x244fff:S, 0x245000-0x245fff:S, 0x246000-0x246fff:S, 0x247000-0x247fff:S, 0x248000-0x248fff:S, 0x249000-0x249fff:S, 0x24a000-0x24afff:S, 0x24b000-0x24bfff:S, 0x24c000-0x24cfff:S, 0x24d000-0x24dfff:S, 0x24e000-0x24efff:S, 0x24f000-0x24ffff:S, 0x250000-0x250fff:S, 0x251000-0x251fff:S, 0x252000-0x252fff:S, 0x253000-0x253fff:S, 0x254000-0x254fff:S, 0x255000-0x255fff:S, 0x256000-0x256fff:S, 0x257000-0x257fff:S, 0x258000-0x258fff:S, 0x259000-0x259fff:S, 0x25a000-0x25afff:S, 0x25b000-0x25bfff:S, 0x25c000-0x25cfff:S, 0x25d000-0x25dfff:S, 0x25e000-0x25efff:S, 0x25f000-0x25ffff:S, 0x260000-0x260fff:S, 0x261000-0x261fff:S, 0x262000-0x262fff:S, 0x263000-0x263fff:S, 0x264000-0x264fff:S, 0x265000-0x265fff:S, 0x266000-0x266fff:S, 0x267000-0x267fff:S, 0x268000-0x268fff:S, 0x269000-0x269fff:S, 0x26a000-0x26afff:S, 0x26b000-0x26bfff:S, 0x26c000-0x26cfff:S, 0x26d000-0x26dfff:S, 0x26e000-0x26efff:S, 0x26f000-0x26ffff:S, 0x270000-0x270fff:S, 0x271000-0x271fff:S, 0x272000-0x272fff:S, 0x273000-0x273fff:S, 0x274000-0x274fff:S, 0x275000-0x275fff:S, 0x276000-0x276fff:S, 0x277000-0x277fff:S, 0x278000-0x278fff:S, 0x279000-0x279fff:S, 0x27a000-0x27afff:S, 0x27b000-0x27bfff:S, 0x27c000-0x27cfff:S, 0x27d000-0x27dfff:S, 0x27e000-0x27efff:S, 0x27f000-0x27ffff:S, 0x280000-0x280fff:S, 0x281000-0x281fff:S, 0x282000-0x282fff:S, 0x283000-0x283fff:S, 0x284000-0x284fff:S, 0x285000-0x285fff:S, 0x286000-0x286fff:S, 0x287000-0x287fff:S, 0x288000-0x288fff:S, 0x289000-0x289fff:S, 0x28a000-0x28afff:S, 0x28b000-0x28bfff:S, 0x28c000-0x28cfff:S, 0x28d000-0x28dfff:S, 0x28e000-0x28efff:S, 0x28f000-0x28ffff:S, 0x290000-0x290fff:S, 0x291000-0x291fff:S, 0x292000-0x292fff:S, 0x293000-0x293fff:S, 0x294000-0x294fff:S, 0x295000-0x295fff:S, 0x296000-0x296fff:S, 0x297000-0x297fff:S, 0x298000-0x298fff:S, 0x299000-0x299fff:S, 0x29a000-0x29afff:S, 0x29b000-0x29bfff:S, 0x29c000-0x29cfff:S, 0x29d000-0x29dfff:S, 0x29e000-0x29efff:S, 0x29f000-0x29ffff:S, 0x2a0000-0x2a0fff:S, 0x2a1000-0x2a1fff:S, 0x2a2000-0x2a2fff:S, 0x2a3000-0x2a3fff:S, 0x2a4000-0x2a4fff:S, 0x2a5000-0x2a5fff:S, 0x2a6000-0x2a6fff:S, 0x2a7000-0x2a7fff:S, 0x2a8000-0x2a8fff:S, 0x2a9000-0x2a9fff:S, 0x2aa000-0x2aafff:S, 0x2ab000-0x2abfff:S, 0x2ac000-0x2acfff:S, 0x2ad000-0x2adfff:S, 0x2ae000-0x2aefff:S, 0x2af000-0x2affff:S, 0x2b0000-0x2b0fff:S, 0x2b1000-0x2b1fff:S, 0x2b2000-0x2b2fff:S, 0x2b3000-0x2b3fff:S, 0x2b4000-0x2b4fff:S, 0x2b5000-0x2b5fff:S, 0x2b6000-0x2b6fff:S, 0x2b7000-0x2b7fff:S, 0x2b8000-0x2b8fff:S, 0x2b9000-0x2b9fff:S, 0x2ba000-0x2bafff:S, 0x2bb000-0x2bbfff:S, 0x2bc000-0x2bcfff:S, 0x2bd000-0x2bdfff:S, 0x2be000-0x2befff:S, 0x2bf000-0x2bffff:S, 0x2c0000-0x2c0fff:S, 0x2c1000-0x2c1fff:S, 0x2c2000-0x2c2fff:S, 0x2c3000-0x2c3fff:S, 0x2c4000-0x2c4fff:S, 0x2c5000-0x2c5fff:S, 0x2c6000-0x2c6fff:S, 0x2c7000-0x2c7fff:S, 0x2c8000-0x2c8fff:S, 0x2c9000-0x2c9fff:S, 0x2ca000-0x2cafff:S, 0x2cb000-0x2cbfff:S, 0x2cc000-0x2ccfff:S, 0x2cd000-0x2cdfff:S, 0x2ce000-0x2cefff:S, 0x2cf000-0x2cffff:S, 0x2d0000-0x2d0fff:S, 0x2d1000-0x2d1fff:S, 0x2d2000-0x2d2fff:S, 0x2d3000-0x2d3fff:S, 0x2d4000-0x2d4fff:S, 0x2d5000-0x2d5fff:S, 0x2d6000-0x2d6fff:S, 0x2d7000-0x2d7fff:S, 0x2d8000-0x2d8fff:S, 0x2d9000-0x2d9fff:S, 0x2da000-0x2dafff:S, 0x2db000-0x2dbfff:S, 0x2dc000-0x2dcfff:S, 0x2dd000-0x2ddfff:S, 0x2de000-0x2defff:S, 0x2df000-0x2dffff:S, 0x2e0000-0x2e0fff:S, 0x2e1000-0x2e1fff:S, 0x2e2000-0x2e2fff:S, 0x2e3000-0x2e3fff:S, 0x2e4000-0x2e4fff:S, 0x2e5000-0x2e5fff:S, 0x2e6000-0x2e6fff:S, 0x2e7000-0x2e7fff:S, 0x2e8000-0x2e8fff:S, 0x2e9000-0x2e9fff:S, 0x2ea000-0x2eafff:S, 0x2eb000-0x2ebfff:S, 0x2ec000-0x2ecfff:S, 0x2ed000-0x2edfff:S, 0x2ee000-0x2eefff:S, 0x2ef000-0x2effff:S, 0x2f0000-0x2f0fff:S, 0x2f1000-0x2f1fff:S, 0x2f2000-0x2f2fff:S, 0x2f3000-0x2f3fff:S, 0x2f4000-0x2f4fff:S, 0x2f5000-0x2f5fff:S, 0x2f6000-0x2f6fff:S, 0x2f7000-0x2f7fff:S, 0x2f8000-0x2f8fff:S, 0x2f9000-0x2f9fff:S, 0x2fa000-0x2fafff:S, 0x2fb000-0x2fbfff:S, 0x2fc000-0x2fcfff:S, 0x2fd000-0x2fdfff:S, 0x2fe000-0x2fefff:S, 0x2ff000-0x2fffff:S, 0x300000-0x300fff:S, 0x301000-0x301fff:S, 0x302000-0x302fff:S, 0x303000-0x303fff:S, 0x304000-0x304fff:S, 0x305000-0x305fff:S, 0x306000-0x306fff:S, 0x307000-0x307fff:S, 0x308000-0x308fff:S, 0x309000-0x309fff:S, 0x30a000-0x30afff:S, 0x30b000-0x30bfff:S, 0x30c000-0x30cfff:S, 0x30d000-0x30dfff:S, 0x30e000-0x30efff:S, 0x30f000-0x30ffff:S, 0x310000-0x310fff:S, 0x311000-0x311fff:S, 0x312000-0x312fff:S, 0x313000-0x313fff:S, 0x314000-0x314fff:S, 0x315000-0x315fff:S, 0x316000-0x316fff:S, 0x317000-0x317fff:S, 0x318000-0x318fff:S, 0x319000-0x319fff:S, 0x31a000-0x31afff:S, 0x31b000-0x31bfff:S, 0x31c000-0x31cfff:S, 0x31d000-0x31dfff:S, 0x31e000-0x31efff:S, 0x31f000-0x31ffff:S, 0x320000-0x320fff:S, 0x321000-0x321fff:S, 0x322000-0x322fff:S, 0x323000-0x323fff:S, 0x324000-0x324fff:S, 0x325000-0x325fff:S, 0x326000-0x326fff:S, 0x327000-0x327fff:S, 0x328000-0x328fff:S, 0x329000-0x329fff:S, 0x32a000-0x32afff:S, 0x32b000-0x32bfff:S, 0x32c000-0x32cfff:S, 0x32d000-0x32dfff:S, 0x32e000-0x32efff:S, 0x32f000-0x32ffff:S, 0x330000-0x330fff:S, 0x331000-0x331fff:S, 0x332000-0x332fff:S, 0x333000-0x333fff:S, 0x334000-0x334fff:S, 0x335000-0x335fff:S, 0x336000-0x336fff:S, 0x337000-0x337fff:S, 0x338000-0x338fff:S, 0x339000-0x339fff:S, 0x33a000-0x33afff:S, 0x33b000-0x33bfff:S, 0x33c000-0x33cfff:S, 0x33d000-0x33dfff:S, 0x33e000-0x33efff:S, 0x33f000-0x33ffff:S, 0x340000-0x340fff:S, 0x341000-0x341fff:S, 0x342000-0x342fff:S, 0x343000-0x343fff:S, 0x344000-0x344fff:S, 0x345000-0x345fff:S, 0x346000-0x346fff:S, 0x347000-0x347fff:S, 0x348000-0x348fff:S, 0x349000-0x349fff:S, 0x34a000-0x34afff:S, 0x34b000-0x34bfff:S, 0x34c000-0x34cfff:S, 0x34d000-0x34dfff:S, 0x34e000-0x34efff:S, 0x34f000-0x34ffff:S, 0x350000-0x350fff:S, 0x351000-0x351fff:S, 0x352000-0x352fff:S, 0x353000-0x353fff:S, 0x354000-0x354fff:S, 0x355000-0x355fff:S, 0x356000-0x356fff:S, 0x357000-0x357fff:S, 0x358000-0x358fff:S, 0x359000-0x359fff:S, 0x35a000-0x35afff:S, 0x35b000-0x35bfff:S, 0x35c000-0x35cfff:S, 0x35d000-0x35dfff:S, 0x35e000-0x35efff:S, 0x35f000-0x35ffff:S, 0x360000-0x360fff:S, 0x361000-0x361fff:S, 0x362000-0x362fff:S, 0x363000-0x363fff:S, 0x364000-0x364fff:S, 0x365000-0x365fff:S, 0x366000-0x366fff:S, 0x367000-0x367fff:S, 0x368000-0x368fff:S, 0x369000-0x369fff:S, 0x36a000-0x36afff:S, 0x36b000-0x36bfff:S, 0x36c000-0x36cfff:S, 0x36d000-0x36dfff:S, 0x36e000-0x36efff:S, 0x36f000-0x36ffff:S, 0x370000-0x370fff:S, 0x371000-0x371fff:S, 0x372000-0x372fff:S, 0x373000-0x373fff:S, 0x374000-0x374fff:S, 0x375000-0x375fff:S, 0x376000-0x376fff:S, 0x377000-0x377fff:S, 0x378000-0x378fff:S, 0x379000-0x379fff:S, 0x37a000-0x37afff:S, 0x37b000-0x37bfff:S, 0x37c000-0x37cfff:S, 0x37d000-0x37dfff:S, 0x37e000-0x37efff:S, 0x37f000-0x37ffff:S, 0x380000-0x380fff:S, 0x381000-0x381fff:S, 0x382000-0x382fff:S, 0x383000-0x383fff:S, 0x384000-0x384fff:S, 0x385000-0x385fff:S, 0x386000-0x386fff:S, 0x387000-0x387fff:S, 0x388000-0x388fff:S, 0x389000-0x389fff:S, 0x38a000-0x38afff:S, 0x38b000-0x38bfff:S, 0x38c000-0x38cfff:S, 0x38d000-0x38dfff:S, 0x38e000-0x38efff:S, 0x38f000-0x38ffff:S, 0x390000-0x390fff:S, 0x391000-0x391fff:S, 0x392000-0x392fff:S, 0x393000-0x393fff:S, 0x394000-0x394fff:S, 0x395000-0x395fff:S, 0x396000-0x396fff:S, 0x397000-0x397fff:S, 0x398000-0x398fff:S, 0x399000-0x399fff:S, 0x39a000-0x39afff:S, 0x39b000-0x39bfff:S, 0x39c000-0x39cfff:S, 0x39d000-0x39dfff:S, 0x39e000-0x39efff:S, 0x39f000-0x39ffff:S, 0x3a0000-0x3a0fff:S, 0x3a1000-0x3a1fff:S, 0x3a2000-0x3a2fff:S, 0x3a3000-0x3a3fff:S, 0x3a4000-0x3a4fff:S, 0x3a5000-0x3a5fff:S, 0x3a6000-0x3a6fff:S, 0x3a7000-0x3a7fff:S, 0x3a8000-0x3a8fff:S, 0x3a9000-0x3a9fff:S, 0x3aa000-0x3aafff:S, 0x3ab000-0x3abfff:S, 0x3ac000-0x3acfff:S, 0x3ad000-0x3adfff:S, 0x3ae000-0x3aefff:S, 0x3af000-0x3affff:S, 0x3b0000-0x3b0fff:S, 0x3b1000-0x3b1fff:S, 0x3b2000-0x3b2fff:S, 0x3b3000-0x3b3fff:S, 0x3b4000-0x3b4fff:S, 0x3b5000-0x3b5fff:S, 0x3b6000-0x3b6fff:S, 0x3b7000-0x3b7fff:S, 0x3b8000-0x3b8fff:S, 0x3b9000-0x3b9fff:S, 0x3ba000-0x3bafff:S, 0x3bb000-0x3bbfff:S, 0x3bc000-0x3bcfff:S, 0x3bd000-0x3bdfff:S, 0x3be000-0x3befff:S, 0x3bf000-0x3bffff:S, 0x3c0000-0x3c0fff:S, 0x3c1000-0x3c1fff:S, 0x3c2000-0x3c2fff:S, 0x3c3000-0x3c3fff:S, 0x3c4000-0x3c4fff:S, 0x3c5000-0x3c5fff:S, 0x3c6000-0x3c6fff:S, 0x3c7000-0x3c7fff:S, 0x3c8000-0x3c8fff:S, 0x3c9000-0x3c9fff:S, 0x3ca000-0x3cafff:S, 0x3cb000-0x3cbfff:S, 0x3cc000-0x3ccfff:S, 0x3cd000-0x3cdfff:S, 0x3ce000-0x3cefff:S, 0x3cf000-0x3cffff:S, 0x3d0000-0x3d0fff:S, 0x3d1000-0x3d1fff:S, 0x3d2000-0x3d2fff:S, 0x3d3000-0x3d3fff:S, 0x3d4000-0x3d4fff:S, 0x3d5000-0x3d5fff:S, 0x3d6000-0x3d6fff:S, 0x3d7000-0x3d7fff:S, 0x3d8000-0x3d8fff:S, 0x3d9000-0x3d9fff:S, 0x3da000-0x3dafff:S, 0x3db000-0x3dbfff:S, 0x3dc000-0x3dcfff:S, 0x3dd000-0x3ddfff:S, 0x3de000-0x3defff:S, 0x3df000-0x3dffff:S, 0x3e0000-0x3e0fff:S, 0x3e1000-0x3e1fff:S, 0x3e2000-0x3e2fff:S, 0x3e3000-0x3e3fff:S, 0x3e4000-0x3e4fff:S, 0x3e5000-0x3e5fff:S, 0x3e6000-0x3e6fff:S, 0x3e7000-0x3e7fff:S, 0x3e8000-0x3e8fff:S, 0x3e9000-0x3e9fff:S, 0x3ea000-0x3eafff:S, 0x3eb000-0x3ebfff:S, 0x3ec000-0x3ecfff:S, 0x3ed000-0x3edfff:S, 0x3ee000-0x3eefff:S, 0x3ef000-0x3effff:S, 0x3f0000-0x3f0fff:S, 0x3f1000-0x3f1fff:S, 0x3f2000-0x3f2fff:S, 0x3f3000-0x3f3fff:S, 0x3f4000-0x3f4fff:S, 0x3f5000-0x3f5fff:S, 0x3f6000-0x3f6fff:S, 0x3f7000-0x3f7fff:S, 0x3f8000-0x3f8fff:S, 0x3f9000-0x3f9fff:S, 0x3fa000-0x3fafff:S, 0x3fb000-0x3fbfff:S, 0x3fc000-0x3fcfff:S, 0x3fd000-0x3fdfff:S, 0x3fe000-0x3fefff:S, 0x3ff000-0x3fffff:S, 0x400000-0x400fff:S, 0x401000-0x401fff:S, 0x402000-0x402fff:S, 0x403000-0x403fff:S, 0x404000-0x404fff:S, 0x405000-0x405fff:S, 0x406000-0x406fff:S, 0x407000-0x407fff:S, 0x408000-0x408fff:S, 0x409000-0x409fff:S, 0x40a000-0x40afff:S, 0x40b000-0x40bfff:S, 0x40c000-0x40cfff:S, 0x40d000-0x40dfff:S, 0x40e000-0x40efff:S, 0x40f000-0x40ffff:S, 0x410000-0x410fff:S, 0x411000-0x411fff:S, 0x412000-0x412fff:S, 0x413000-0x413fff:S, 0x414000-0x414fff:S, 0x415000-0x415fff:S, 0x416000-0x416fff:S, 0x417000-0x417fff:S, 0x418000-0x418fff:S, 0x419000-0x419fff:S, 0x41a000-0x41afff:S, 0x41b000-0x41bfff:S, 0x41c000-0x41cfff:S, 0x41d000-0x41dfff:S, 0x41e000-0x41efff:S, 0x41f000-0x41ffff:S, 0x420000-0x420fff:S, 0x421000-0x421fff:S, 0x422000-0x422fff:S, 0x423000-0x423fff:S, 0x424000-0x424fff:S, 0x425000-0x425fff:S, 0x426000-0x426fff:S, 0x427000-0x427fff:S, 0x428000-0x428fff:S, 0x429000-0x429fff:S, 0x42a000-0x42afff:S, 0x42b000-0x42bfff:S, 0x42c000-0x42cfff:S, 0x42d000-0x42dfff:S, 0x42e000-0x42efff:S, 0x42f000-0x42ffff:S, 0x430000-0x430fff:S, 0x431000-0x431fff:S, 0x432000-0x432fff:S, 0x433000-0x433fff:S, 0x434000-0x434fff:S, 0x435000-0x435fff:S, 0x436000-0x436fff:S, 0x437000-0x437fff:S, 0x438000-0x438fff:S, 0x439000-0x439fff:S, 0x43a000-0x43afff:S, 0x43b000-0x43bfff:S, 0x43c000-0x43cfff:S, 0x43d000-0x43dfff:S, 0x43e000-0x43efff:S, 0x43f000-0x43ffff:S, 0x440000-0x440fff:S, 0x441000-0x441fff:S, 0x442000-0x442fff:S, 0x443000-0x443fff:S, 0x444000-0x444fff:S, 0x445000-0x445fff:S, 0x446000-0x446fff:S, 0x447000-0x447fff:S, 0x448000-0x448fff:S, 0x449000-0x449fff:S, 0x44a000-0x44afff:S, 0x44b000-0x44bfff:S, 0x44c000-0x44cfff:S, 0x44d000-0x44dfff:S, 0x44e000-0x44efff:S, 0x44f000-0x44ffff:S, 0x450000-0x450fff:S, 0x451000-0x451fff:S, 0x452000-0x452fff:S, 0x453000-0x453fff:S, 0x454000-0x454fff:S, 0x455000-0x455fff:S, 0x456000-0x456fff:S, 0x457000-0x457fff:S, 0x458000-0x458fff:S, 0x459000-0x459fff:S, 0x45a000-0x45afff:S, 0x45b000-0x45bfff:S, 0x45c000-0x45cfff:S, 0x45d000-0x45dfff:S, 0x45e000-0x45efff:S, 0x45f000-0x45ffff:S, 0x460000-0x460fff:S, 0x461000-0x461fff:S, 0x462000-0x462fff:S, 0x463000-0x463fff:S, 0x464000-0x464fff:S, 0x465000-0x465fff:S, 0x466000-0x466fff:S, 0x467000-0x467fff:S, 0x468000-0x468fff:S, 0x469000-0x469fff:S, 0x46a000-0x46afff:S, 0x46b000-0x46bfff:S, 0x46c000-0x46cfff:S, 0x46d000-0x46dfff:S, 0x46e000-0x46efff:S, 0x46f000-0x46ffff:S, 0x470000-0x470fff:S, 0x471000-0x471fff:S, 0x472000-0x472fff:S, 0x473000-0x473fff:S, 0x474000-0x474fff:S, 0x475000-0x475fff:S, 0x476000-0x476fff:S, 0x477000-0x477fff:S, 0x478000-0x478fff:S, 0x479000-0x479fff:S, 0x47a000-0x47afff:S, 0x47b000-0x47bfff:S, 0x47c000-0x47cfff:S, 0x47d000-0x47dfff:S, 0x47e000-0x47efff:S, 0x47f000-0x47ffff:S, 0x480000-0x480fff:S, 0x481000-0x481fff:S, 0x482000-0x482fff:S, 0x483000-0x483fff:S, 0x484000-0x484fff:S, 0x485000-0x485fff:S, 0x486000-0x486fff:S, 0x487000-0x487fff:S, 0x488000-0x488fff:S, 0x489000-0x489fff:S, 0x48a000-0x48afff:S, 0x48b000-0x48bfff:S, 0x48c000-0x48cfff:S, 0x48d000-0x48dfff:S, 0x48e000-0x48efff:S, 0x48f000-0x48ffff:S, 0x490000-0x490fff:S, 0x491000-0x491fff:S, 0x492000-0x492fff:S, 0x493000-0x493fff:S, 0x494000-0x494fff:S, 0x495000-0x495fff:S, 0x496000-0x496fff:S, 0x497000-0x497fff:S, 0x498000-0x498fff:S, 0x499000-0x499fff:S, 0x49a000-0x49afff:S, 0x49b000-0x49bfff:S, 0x49c000-0x49cfff:S, 0x49d000-0x49dfff:S, 0x49e000-0x49efff:S, 0x49f000-0x49ffff:S, 0x4a0000-0x4a0fff:S, 0x4a1000-0x4a1fff:S, 0x4a2000-0x4a2fff:S, 0x4a3000-0x4a3fff:S, 0x4a4000-0x4a4fff:S, 0x4a5000-0x4a5fff:S, 0x4a6000-0x4a6fff:S, 0x4a7000-0x4a7fff:S, 0x4a8000-0x4a8fff:S, 0x4a9000-0x4a9fff:S, 0x4aa000-0x4aafff:S, 0x4ab000-0x4abfff:S, 0x4ac000-0x4acfff:S, 0x4ad000-0x4adfff:S, 0x4ae000-0x4aefff:S, 0x4af000-0x4affff:S, 0x4b0000-0x4b0fff:S, 0x4b1000-0x4b1fff:S, 0x4b2000-0x4b2fff:S, 0x4b3000-0x4b3fff:S, 0x4b4000-0x4b4fff:S, 0x4b5000-0x4b5fff:S, 0x4b6000-0x4b6fff:S, 0x4b7000-0x4b7fff:S, 0x4b8000-0x4b8fff:S, 0x4b9000-0x4b9fff:S, 0x4ba000-0x4bafff:S, 0x4bb000-0x4bbfff:S, 0x4bc000-0x4bcfff:S, 0x4bd000-0x4bdfff:S, 0x4be000-0x4befff:S, 0x4bf000-0x4bffff:S, 0x4c0000-0x4c0fff:S, 0x4c1000-0x4c1fff:S, 0x4c2000-0x4c2fff:S, 0x4c3000-0x4c3fff:S, 0x4c4000-0x4c4fff:S, 0x4c5000-0x4c5fff:S, 0x4c6000-0x4c6fff:S, 0x4c7000-0x4c7fff:S, 0x4c8000-0x4c8fff:S, 0x4c9000-0x4c9fff:S, 0x4ca000-0x4cafff:S, 0x4cb000-0x4cbfff:S, 0x4cc000-0x4ccfff:S, 0x4cd000-0x4cdfff:S, 0x4ce000-0x4cefff:S, 0x4cf000-0x4cffff:S, 0x4d0000-0x4d0fff:S, 0x4d1000-0x4d1fff:S, 0x4d2000-0x4d2fff:S, 0x4d3000-0x4d3fff:S, 0x4d4000-0x4d4fff:S, 0x4d5000-0x4d5fff:S, 0x4d6000-0x4d6fff:S, 0x4d7000-0x4d7fff:S, 0x4d8000-0x4d8fff:S, 0x4d9000-0x4d9fff:S, 0x4da000-0x4dafff:S, 0x4db000-0x4dbfff:S, 0x4dc000-0x4dcfff:S, 0x4dd000-0x4ddfff:S, 0x4de000-0x4defff:S, 0x4df000-0x4dffff:S, 0x4e0000-0x4e0fff:S, 0x4e1000-0x4e1fff:S, 0x4e2000-0x4e2fff:S, 0x4e3000-0x4e3fff:S, 0x4e4000-0x4e4fff:S, 0x4e5000-0x4e5fff:S, 0x4e6000-0x4e6fff:S, 0x4e7000-0x4e7fff:S, 0x4e8000-0x4e8fff:S, 0x4e9000-0x4e9fff:S, 0x4ea000-0x4eafff:S, 0x4eb000-0x4ebfff:S, 0x4ec000-0x4ecfff:S, 0x4ed000-0x4edfff:S, 0x4ee000-0x4eefff:S, 0x4ef000-0x4effff:S, 0x4f0000-0x4f0fff:S, 0x4f1000-0x4f1fff:S, 0x4f2000-0x4f2fff:S, 0x4f3000-0x4f3fff:S, 0x4f4000-0x4f4fff:S, 0x4f5000-0x4f5fff:S, 0x4f6000-0x4f6fff:S, 0x4f7000-0x4f7fff:S, 0x4f8000-0x4f8fff:S, 0x4f9000-0x4f9fff:S, 0x4fa000-0x4fafff:S, 0x4fb000-0x4fbfff:S, 0x4fc000-0x4fcfff:S, 0x4fd000-0x4fdfff:S, 0x4fe000-0x4fefff:S, 0x4ff000-0x4fffff:S, 0x500000-0x500fff:S, 0x501000-0x501fff:S, 0x502000-0x502fff:S, 0x503000-0x503fff:S, 0x504000-0x504fff:S, 0x505000-0x505fff:S, 0x506000-0x506fff:S, 0x507000-0x507fff:S, 0x508000-0x508fff:S, 0x509000-0x509fff:S, 0x50a000-0x50afff:S, 0x50b000-0x50bfff:S, 0x50c000-0x50cfff:S, 0x50d000-0x50dfff:S, 0x50e000-0x50efff:S, 0x50f000-0x50ffff:S, 0x510000-0x510fff:S, 0x511000-0x511fff:S, 0x512000-0x512fff:S, 0x513000-0x513fff:S, 0x514000-0x514fff:S, 0x515000-0x515fff:S, 0x516000-0x516fff:S, 0x517000-0x517fff:S, 0x518000-0x518fff:S, 0x519000-0x519fff:S, 0x51a000-0x51afff:S, 0x51b000-0x51bfff:S, 0x51c000-0x51cfff:S, 0x51d000-0x51dfff:S, 0x51e000-0x51efff:S, 0x51f000-0x51ffff:S, 0x520000-0x520fff:S, 0x521000-0x521fff:S, 0x522000-0x522fff:S, 0x523000-0x523fff:S, 0x524000-0x524fff:S, 0x525000-0x525fff:S, 0x526000-0x526fff:S, 0x527000-0x527fff:S, 0x528000-0x528fff:S, 0x529000-0x529fff:S, 0x52a000-0x52afff:S, 0x52b000-0x52bfff:S, 0x52c000-0x52cfff:S, 0x52d000-0x52dfff:S, 0x52e000-0x52efff:S, 0x52f000-0x52ffff:S, 0x530000-0x530fff:S, 0x531000-0x531fff:S, 0x532000-0x532fff:S, 0x533000-0x533fff:S, 0x534000-0x534fff:S, 0x535000-0x535fff:S, 0x536000-0x536fff:S, 0x537000-0x537fff:S, 0x538000-0x538fff:S, 0x539000-0x539fff:S, 0x53a000-0x53afff:S, 0x53b000-0x53bfff:S, 0x53c000-0x53cfff:S, 0x53d000-0x53dfff:S, 0x53e000-0x53efff:S, 0x53f000-0x53ffff:S, 0x540000-0x540fff:S, 0x541000-0x541fff:S, 0x542000-0x542fff:S, 0x543000-0x543fff:S, 0x544000-0x544fff:S, 0x545000-0x545fff:S, 0x546000-0x546fff:S, 0x547000-0x547fff:S, 0x548000-0x548fff:S, 0x549000-0x549fff:S, 0x54a000-0x54afff:S, 0x54b000-0x54bfff:S, 0x54c000-0x54cfff:S, 0x54d000-0x54dfff:S, 0x54e000-0x54efff:S, 0x54f000-0x54ffff:S, 0x550000-0x550fff:S, 0x551000-0x551fff:S, 0x552000-0x552fff:S, 0x553000-0x553fff:S, 0x554000-0x554fff:S, 0x555000-0x555fff:S, 0x556000-0x556fff:S, 0x557000-0x557fff:S, 0x558000-0x558fff:S, 0x559000-0x559fff:S, 0x55a000-0x55afff:S, 0x55b000-0x55bfff:S, 0x55c000-0x55cfff:S, 0x55d000-0x55dfff:S, 0x55e000-0x55efff:S, 0x55f000-0x55ffff:S, 0x560000-0x560fff:S, 0x561000-0x561fff:S, 0x562000-0x562fff:S, 0x563000-0x563fff:S, 0x564000-0x564fff:S, 0x565000-0x565fff:S, 0x566000-0x566fff:S, 0x567000-0x567fff:S, 0x568000-0x568fff:S, 0x569000-0x569fff:S, 0x56a000-0x56afff:S, 0x56b000-0x56bfff:S, 0x56c000-0x56cfff:S, 0x56d000-0x56dfff:S, 0x56e000-0x56efff:S, 0x56f000-0x56ffff:S, 0x570000-0x570fff:S, 0x571000-0x571fff:S, 0x572000-0x572fff:S, 0x573000-0x573fff:S, 0x574000-0x574fff:S, 0x575000-0x575fff:S, 0x576000-0x576fff:S, 0x577000-0x577fff:S, 0x578000-0x578fff:S, 0x579000-0x579fff:S, 0x57a000-0x57afff:S, 0x57b000-0x57bfff:S, 0x57c000-0x57cfff:S, 0x57d000-0x57dfff:S, 0x57e000-0x57efff:S, 0x57f000-0x57ffff:S, 0x580000-0x580fff:S, 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0xaa5000-0xaa5fff:S, 0xaa6000-0xaa6fff:S, 0xaa7000-0xaa7fff:S, 0xaa8000-0xaa8fff:S, 0xaa9000-0xaa9fff:S, 0xaaa000-0xaaafff:S, 0xaab000-0xaabfff:S, 0xaac000-0xaacfff:S, 0xaad000-0xaadfff:S, 0xaae000-0xaaefff:S, 0xaaf000-0xaaffff:S, 0xab0000-0xab0fff:S, 0xab1000-0xab1fff:S, 0xab2000-0xab2fff:S, 0xab3000-0xab3fff:S, 0xab4000-0xab4fff:S, 0xab5000-0xab5fff:S, 0xab6000-0xab6fff:S, 0xab7000-0xab7fff:S, 0xab8000-0xab8fff:S, 0xab9000-0xab9fff:S, 0xaba000-0xabafff:S, 0xabb000-0xabbfff:S, 0xabc000-0xabcfff:S, 0xabd000-0xabdfff:S, 0xabe000-0xabefff:S, 0xabf000-0xabffff:S, 0xac0000-0xac0fff:S, 0xac1000-0xac1fff:S, 0xac2000-0xac2fff:S, 0xac3000-0xac3fff:S, 0xac4000-0xac4fff:S, 0xac5000-0xac5fff:S, 0xac6000-0xac6fff:S, 0xac7000-0xac7fff:S, 0xac8000-0xac8fff:S, 0xac9000-0xac9fff:S, 0xaca000-0xacafff:S, 0xacb000-0xacbfff:S, 0xacc000-0xaccfff:S, 0xacd000-0xacdfff:S, 0xace000-0xacefff:S, 0xacf000-0xacffff:S, 0xad0000-0xad0fff:S, 0xad1000-0xad1fff:S, 0xad2000-0xad2fff:S, 0xad3000-0xad3fff:S, 0xad4000-0xad4fff:S, 0xad5000-0xad5fff:S, 0xad6000-0xad6fff:S, 0xad7000-0xad7fff:S, 0xad8000-0xad8fff:S, 0xad9000-0xad9fff:S, 0xada000-0xadafff:S, 0xadb000-0xadbfff:S, 0xadc000-0xadcfff:S, 0xadd000-0xaddfff:S, 0xade000-0xadefff:S, 0xadf000-0xadffff:S, 0xae0000-0xae0fff:S, 0xae1000-0xae1fff:S, 0xae2000-0xae2fff:S, 0xae3000-0xae3fff:S, 0xae4000-0xae4fff:S, 0xae5000-0xae5fff:S, 0xae6000-0xae6fff:S, 0xae7000-0xae7fff:S, 0xae8000-0xae8fff:S, 0xae9000-0xae9fff:S, 0xaea000-0xaeafff:S, 0xaeb000-0xaebfff:S, 0xaec000-0xaecfff:S, 0xaed000-0xaedfff:S, 0xaee000-0xaeefff:S, 0xaef000-0xaeffff:S, 0xaf0000-0xaf0fff:S, 0xaf1000-0xaf1fff:S, 0xaf2000-0xaf2fff:S, 0xaf3000-0xaf3fff:S, 0xaf4000-0xaf4fff:S, 0xaf5000-0xaf5fff:S, 0xaf6000-0xaf6fff:S, 0xaf7000-0xaf7fff:S, 0xaf8000-0xaf8fff:S, 0xaf9000-0xaf9fff:S, 0xafa000-0xafafff:S, 0xafb000-0xafbfff:S, 0xafc000-0xafcfff:S, 0xafd000-0xafdfff:S, 0xafe000-0xafefff:S, 0xaff000-0xafffff:S, 0xb00000-0xb00fff:S, 0xb01000-0xb01fff:S, 0xb02000-0xb02fff:S, 0xb03000-0xb03fff:S, 0xb04000-0xb04fff:S, 0xb05000-0xb05fff:S, 0xb06000-0xb06fff:S, 0xb07000-0xb07fff:S, 0xb08000-0xb08fff:S, 0xb09000-0xb09fff:S, 0xb0a000-0xb0afff:S, 0xb0b000-0xb0bfff:S, 0xb0c000-0xb0cfff:S, 0xb0d000-0xb0dfff:S, 0xb0e000-0xb0efff:S, 0xb0f000-0xb0ffff:S, 0xb10000-0xb10fff:S, 0xb11000-0xb11fff:S, 0xb12000-0xb12fff:S, 0xb13000-0xb13fff:S, 0xb14000-0xb14fff:S, 0xb15000-0xb15fff:S, 0xb16000-0xb16fff:S, 0xb17000-0xb17fff:S, 0xb18000-0xb18fff:S, 0xb19000-0xb19fff:S, 0xb1a000-0xb1afff:S, 0xb1b000-0xb1bfff:S, 0xb1c000-0xb1cfff:S, 0xb1d000-0xb1dfff:S, 0xb1e000-0xb1efff:S, 0xb1f000-0xb1ffff:S, 0xb20000-0xb20fff:S, 0xb21000-0xb21fff:S, 0xb22000-0xb22fff:S, 0xb23000-0xb23fff:S, 0xb24000-0xb24fff:S, 0xb25000-0xb25fff:S, 0xb26000-0xb26fff:S, 0xb27000-0xb27fff:S, 0xb28000-0xb28fff:S, 0xb29000-0xb29fff:S, 0xb2a000-0xb2afff:S, 0xb2b000-0xb2bfff:S, 0xb2c000-0xb2cfff:S, 0xb2d000-0xb2dfff:S, 0xb2e000-0xb2efff:S, 0xb2f000-0xb2ffff:S, 0xb30000-0xb30fff:S, 0xb31000-0xb31fff:S, 0xb32000-0xb32fff:S, 0xb33000-0xb33fff:S, 0xb34000-0xb34fff:S, 0xb35000-0xb35fff:S, 0xb36000-0xb36fff:S, 0xb37000-0xb37fff:S, 0xb38000-0xb38fff:S, 0xb39000-0xb39fff:S, 0xb3a000-0xb3afff:S, 0xb3b000-0xb3bfff:S, 0xb3c000-0xb3cfff:S, 0xb3d000-0xb3dfff:S, 0xb3e000-0xb3efff:S, 0xb3f000-0xb3ffff:S, 0xb40000-0xb40fff:S, 0xb41000-0xb41fff:S, 0xb42000-0xb42fff:S, 0xb43000-0xb43fff:S, 0xb44000-0xb44fff:S, 0xb45000-0xb45fff:S, 0xb46000-0xb46fff:S, 0xb47000-0xb47fff:S, 0xb48000-0xb48fff:S, 0xb49000-0xb49fff:S, 0xb4a000-0xb4afff:S, 0xb4b000-0xb4bfff:S, 0xb4c000-0xb4cfff:S, 0xb4d000-0xb4dfff:S, 0xb4e000-0xb4efff:S, 0xb4f000-0xb4ffff:S, 0xb50000-0xb50fff:S, 0xb51000-0xb51fff:S, 0xb52000-0xb52fff:S, 0xb53000-0xb53fff:S, 0xb54000-0xb54fff:S, 0xb55000-0xb55fff:S, 0xb56000-0xb56fff:S, 0xb57000-0xb57fff:S, 0xb58000-0xb58fff:S, 0xb59000-0xb59fff:S, 0xb5a000-0xb5afff:S, 0xb5b000-0xb5bfff:S, 0xb5c000-0xb5cfff:S, 0xb5d000-0xb5dfff:S, 0xb5e000-0xb5efff:S, 0xb5f000-0xb5ffff:S, 0xb60000-0xb60fff:S, 0xb61000-0xb61fff:S, 0xb62000-0xb62fff:S, 0xb63000-0xb63fff:S, 0xb64000-0xb64fff:S, 0xb65000-0xb65fff:S, 0xb66000-0xb66fff:S, 0xb67000-0xb67fff:S, 0xb68000-0xb68fff:S, 0xb69000-0xb69fff:S, 0xb6a000-0xb6afff:S, 0xb6b000-0xb6bfff:S, 0xb6c000-0xb6cfff:S, 0xb6d000-0xb6dfff:S, 0xb6e000-0xb6efff:S, 0xb6f000-0xb6ffff:S, 0xb70000-0xb70fff:S, 0xb71000-0xb71fff:S, 0xb72000-0xb72fff:S, 0xb73000-0xb73fff:S, 0xb74000-0xb74fff:S, 0xb75000-0xb75fff:S, 0xb76000-0xb76fff:S, 0xb77000-0xb77fff:S, 0xb78000-0xb78fff:S, 0xb79000-0xb79fff:S, 0xb7a000-0xb7afff:S, 0xb7b000-0xb7bfff:S, 0xb7c000-0xb7cfff:S, 0xb7d000-0xb7dfff:S, 0xb7e000-0xb7efff:S, 0xb7f000-0xb7ffff:S, 0xb80000-0xb80fff:S, 0xb81000-0xb81fff:S, 0xb82000-0xb82fff:S, 0xb83000-0xb83fff:S, 0xb84000-0xb84fff:S, 0xb85000-0xb85fff:S, 0xb86000-0xb86fff:S, 0xb87000-0xb87fff:S, 0xb88000-0xb88fff:S, 0xb89000-0xb89fff:S, 0xb8a000-0xb8afff:S, 0xb8b000-0xb8bfff:S, 0xb8c000-0xb8cfff:S, 0xb8d000-0xb8dfff:S, 0xb8e000-0xb8efff:S, 0xb8f000-0xb8ffff:S, 0xb90000-0xb90fff:S, 0xb91000-0xb91fff:S, 0xb92000-0xb92fff:S, 0xb93000-0xb93fff:S, 0xb94000-0xb94fff:S, 0xb95000-0xb95fff:S, 0xb96000-0xb96fff:S, 0xb97000-0xb97fff:S, 0xb98000-0xb98fff:S, 0xb99000-0xb99fff:S, 0xb9a000-0xb9afff:S, 0xb9b000-0xb9bfff:S, 0xb9c000-0xb9cfff:S, 0xb9d000-0xb9dfff:S, 0xb9e000-0xb9efff:S, 0xb9f000-0xb9ffff:S, 0xba0000-0xba0fff:S, 0xba1000-0xba1fff:S, 0xba2000-0xba2fff:S, 0xba3000-0xba3fff:S, 0xba4000-0xba4fff:S, 0xba5000-0xba5fff:S, 0xba6000-0xba6fff:S, 0xba7000-0xba7fff:S, 0xba8000-0xba8fff:S, 0xba9000-0xba9fff:S, 0xbaa000-0xbaafff:S, 0xbab000-0xbabfff:S, 0xbac000-0xbacfff:S, 0xbad000-0xbadfff:S, 0xbae000-0xbaefff:S, 0xbaf000-0xbaffff:S, 0xbb0000-0xbb0fff:S, 0xbb1000-0xbb1fff:S, 0xbb2000-0xbb2fff:S, 0xbb3000-0xbb3fff:S, 0xbb4000-0xbb4fff:S, 0xbb5000-0xbb5fff:S, 0xbb6000-0xbb6fff:S, 0xbb7000-0xbb7fff:S, 0xbb8000-0xbb8fff:S, 0xbb9000-0xbb9fff:S, 0xbba000-0xbbafff:S, 0xbbb000-0xbbbfff:S, 0xbbc000-0xbbcfff:S, 0xbbd000-0xbbdfff:S, 0xbbe000-0xbbefff:S, 0xbbf000-0xbbffff:S, 0xbc0000-0xbc0fff:S, 0xbc1000-0xbc1fff:S, 0xbc2000-0xbc2fff:S, 0xbc3000-0xbc3fff:S, 0xbc4000-0xbc4fff:S, 0xbc5000-0xbc5fff:S, 0xbc6000-0xbc6fff:S, 0xbc7000-0xbc7fff:S, 0xbc8000-0xbc8fff:S, 0xbc9000-0xbc9fff:S, 0xbca000-0xbcafff:S, 0xbcb000-0xbcbfff:S, 0xbcc000-0xbccfff:S, 0xbcd000-0xbcdfff:S, 0xbce000-0xbcefff:S, 0xbcf000-0xbcffff:S, 0xbd0000-0xbd0fff:S, 0xbd1000-0xbd1fff:S, 0xbd2000-0xbd2fff:S, 0xbd3000-0xbd3fff:S, 0xbd4000-0xbd4fff:S, 0xbd5000-0xbd5fff:S, 0xbd6000-0xbd6fff:S, 0xbd7000-0xbd7fff:S, 0xbd8000-0xbd8fff:S, 0xbd9000-0xbd9fff:S, 0xbda000-0xbdafff:S, 0xbdb000-0xbdbfff:S, 0xbdc000-0xbdcfff:S, 0xbdd000-0xbddfff:S, 0xbde000-0xbdefff:S, 0xbdf000-0xbdffff:S, 0xbe0000-0xbe0fff:S, 0xbe1000-0xbe1fff:S, 0xbe2000-0xbe2fff:S, 0xbe3000-0xbe3fff:S, 0xbe4000-0xbe4fff:S, 0xbe5000-0xbe5fff:S, 0xbe6000-0xbe6fff:S, 0xbe7000-0xbe7fff:S, 0xbe8000-0xbe8fff:S, 0xbe9000-0xbe9fff:S, 0xbea000-0xbeafff:S, 0xbeb000-0xbebfff:S, 0xbec000-0xbecfff:S, 0xbed000-0xbedfff:S, 0xbee000-0xbeefff:S, 0xbef000-0xbeffff:S, 0xbf0000-0xbf0fff:S, 0xbf1000-0xbf1fff:S, 0xbf2000-0xbf2fff:S, 0xbf3000-0xbf3fff:S, 0xbf4000-0xbf4fff:S, 0xbf5000-0xbf5fff:S, 0xbf6000-0xbf6fff:S, 0xbf7000-0xbf7fff:S, 0xbf8000-0xbf8fff:S, 0xbf9000-0xbf9fff:S, 0xbfa000-0xbfafff:S, 0xbfb000-0xbfbfff:S, 0xbfc000-0xbfcfff:S, 0xbfd000-0xbfdfff:S, 0xbfe000-0xbfefff:S, 0xbff000-0xbfffff:S, 0xc00000-0xc00fff:S, 0xc01000-0xc01fff:S, 0xc02000-0xc02fff:S, 0xc03000-0xc03fff:S, 0xc04000-0xc04fff:S, 0xc05000-0xc05fff:S, 0xc06000-0xc06fff:S, 0xc07000-0xc07fff:S, 0xc08000-0xc08fff:S, 0xc09000-0xc09fff:EErasing 4096 bytes starting at 0xc09000. HSFC used for block erasing: HSFC: FGO=1, FCYCLE=3, FDBC=63, SME=0 Transaction error between offset 0x00c09000 and 0x00c09fff (= 0x00c09000 + 4095)! HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 HSFC: FGO=0, FCYCLE=3, FDBC=63, SME=0 Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything changed. Reading 16777216 bytes starting at 0x000000. Good. It seems nothing was changed. Writing to the flash chip apparently didn't do anything. This means we have to add special support for your board, programmer or flash chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks! ------------------------------------------------------------------------------- You may now reboot or simply leave the machine running. Restoring MMIO space at 0x100b7a8a0 Restoring PCI config space for 00:1f:0 reg 0xdc

1 0

ASUS P8H77-M PRO
by Ankur Kothari 22 Sep '13

22 Sep '13

Hi, Thank you for writing this amazing program. Unfortunately, I didn't keep a log, but I can report a successful BIOS update on my ASUS P8H77-M PRO motherboard using flashrom. Please let me know if I should provide any further information. (I'm not subscribed to this list). -- Ankur

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Re: [flashrom] [PATCH 1/2] layout: Add -i <region>[:<file>] support.
by Carl-Daniel Hailfinger 22 Sep '13

22 Sep '13

Am 19.09.2013 01:29 schrieb Stefan Tauner: > Add an optional sub-parameter to the -i parameter to allow building the > image to be written from multiple files. This will also allow regions to > be read from flash and written to separate image files in a later patch. > Existing function read_buf_from_file() is refined and reused to read the file. > > Document the whole layout handling including the new features a bit better > and refine wording regarding files, images, layouts and regions as discussed. > > Also, finally introduce helpers.c: a module containing utility functions to be > shared which do not fit elsewhere. The first function to be added is > unquote_string() which is used throughout this patch. > > Abort for non-write operations if a layout file is given. > > based on chromiumos' > d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8 > Signed-off-by: David Hendricks <dhendrix(a)chromium.org> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Counter-proposal for helpers.c, addressing all my complaints: - The first token must either be completely enclosed in double quotes or not quoted at all. - There must be end-of-string or delimiter after the closing quote. - The first token shall not have stray quotes anywhere. Function description is yours. Tested with the following inputs (input/output in single quotes): # ./unqote '' Input '' ret=1 First token '', remaining text '' # ./unqote '""' Input '""' ret=1 First token '', remaining text '' # ./unqote 'foo' Input 'foo' ret=0 First token 'foo', remaining text '' # ./unqote ' foo ' Input ' foo ' ret=0 First token 'foo', remaining text '' # ./unqote '"foo"' Input '"foo"' ret=0 First token 'foo', remaining text '' # ./unqote ' "foo" ' Input ' "foo" ' ret=0 First token 'foo', remaining text ' ' # ./unqote ' " foo " ' Input ' " foo " ' ret=0 First token ' foo ', remaining text ' ' # ./unqote 'foo bar' Input 'foo bar' ret=0 First token 'foo', remaining text 'bar' # ./unqote ' foo bar ' Input ' foo bar ' ret=0 First token 'foo', remaining text ' bar ' # ./unqote ' "foo" bar ' Input ' "foo" bar ' ret=0 First token 'foo', remaining text ' bar ' # ./unqote ' "foo bar ' Input ' "foo bar ' ret=-1 Aborting. # ./unqote ' "foo"" bar ' Input ' "foo"" bar ' ret=-1 Aborting. # ./unqote ' "foo"""' Input ' "foo"""' ret=-1 Aborting. # ./unqote ' "foo"bar' Input ' "foo"bar' ret=-1 Aborting. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> --- /dev/null 2013-08-19 11:01:03.588011829 +0200 +++ helpers.c 2013-09-20 03:31:28.000000000 +0200 @@ -0,0 +1,86 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2013 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> + +#include <string.h> +#include "flash.h" + +/** Parse a \em possibly quoted string. + * + * The function expects \a startp to point to the string to be parsed without a prefix. If the + * string starts with a quotation mark it looks for the second one and removes both in-place, if not then it + * looks for the first character contained in \a delimiters and ends the wanted string there by replacing the + * character with '\0'. If \a delimiters is NULL an empty set is assumed, hence the whole start string equals + * the wanted string. + * + * After returning \a startp will point to a string that is either the first quoted part of the + * original string with the quotation marks removed, or the first word of that string before any delimiter. + * If \a endp is not NULL it will be set to point to the first character after the parsed string, or to the + * '\0' at the end of the string pointed to by \a startp if there are no more subsequent characters. + * + * @param start Points to the input string. + * @param end Is set to the first char following the input string. + * @return -1 if a quotation mark is not matched, + * 0 on success, + * 1 if the parsed string is empty. + */ +int unquote_string(char **startp, char **endp, const char *delimiters) +{ + size_t len; + + /* Strip leading delimiters. */ + *startp += strspn(*startp, delimiters); + + /* Check for empty string. */ + if (strlen(*startp) == 0) { + *endp = *startp; + return 1; + } + + /* Handle unqoted string. */ + if (**startp != '"') { + len = strcspn(*startp, delimiters); + /* Check for quotes in the middle. */ + if (strcspn(*startp, "\"") < len) + return -1; + /* Check if there is anything after this string. */ + if (strlen(*startp + len) > 0) + *endp = *startp + len + 1; + else + *endp = *startp + len; + (*startp)[len] = '\0'; + return 0; + } + + /* Handle quoted string. */ + (*startp)++; + len = strcspn(*startp, "\""); + /* Catch unclosed quotes and closing quotes not followed immediately by delimiter or end-of-string. */ + if ((*startp)[len] == '\0' || strcspn(*startp + len + 1, delimiters) > 0) + return -1; + /* Overwrite closing quote. */ + (*startp)[len] = '\0'; + *endp = *startp + len + 1; + /* Check for empty string. */ + if (strlen(*startp) == 0) + return 1; + return 0; +} -- http://www.hailfinger.org/

2 2

[PATCH] Refactor Intel Chipset Enables.
by Stefan Tauner 21 Sep '13

21 Sep '13

- Combine enable_flash_ich_4e() and enable_flash_ich_dc() to enable_flash_ich_fwh(). - Remove unjustified (chipset) name parameters from various enable_flash_ich* functions. - Make Poulsbo and Tunnel Creek use generic enables by refining existing functions to work with them, including everything in ichspi.c. - Refactor enable_flash_ich_fwh_decode() to be called unconditionally for all chipsets. - Add support for Intel Atom Centerton (S12x0). - Recombine ICH2/3/4/5 to CHIPSET_ICH2345 because we treat them equally anyway. - Move spibar handling out of ich_init_spi() into enable_flash_ich_spi() - Various small cleanups. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Think of the previous patch as a small teaser ;) I had this for long on my todo list because the atom support was rather hacky and the whole organization lacked sanity. Kyösti started the cleanup actually with his IDSEL patches, but there was a myriad of other things to enhance. Call graphs old: http://postimg.org/image/5s0egfdx7/full/ new: http://postimg.org/image/xtefu4j7f/full/ chipset_enable.c | 412 ++++++++++++++++++++++++++----------------------------- ichspi.c | 61 ++------ programmer.h | 12 +- 3 files changed, 214 insertions(+), 271 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index c85db73..3fd06fb 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -260,20 +260,44 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name) return 0; } -/* - * See ie. page 375 of "Intel I/O Controller Hub 7 (ICH7) Family Datasheet" - * http://download.intel.com/design/chipsets/datashts/30701303.pdf - */ -static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_cntl) +/* Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Poulsbo, Tunnel Creek and other Atom + * chipsets/SoCs it is even 32b, but just treating it as 8 bit wide seems to work fine in practice. */ +static int enable_flash_ich_bios_cntl(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) { uint8_t old, new, wanted; - /* - * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Tunnel Creek it is even 32b, but - * just treating it as 8 bit wide seems to work fine in practice. - */ - wanted = old = pci_read_byte(dev, bios_cntl); + switch (ich_generation) { + case CHIPSET_ICH_UNKNOWN: + return ERROR_FATAL; + /* Non-SPI-capable */ + case CHIPSET_ICH: + case CHIPSET_ICH2345: + break; + /* Atom chipsets are special: The second byte of BIOS_CNTL (D9h) contains a prefetch bit similar to what + * other SPI-capable chipsets have at DCh. + * The Tunnel Creek datasheet contains a lot of details about the SPI controller, among other things it + * mentions that the prefetching and caching does only happen for direct memory reads. + * Therefore - at least for Tunnel Creek - it should not matter to flashrom because we use the + * programmed access only and not memory mapping. */ + case CHIPSET_TUNNEL_CREEK: + case CHIPSET_POULSBO: + case CHIPSET_CENTERTON: + old = pci_read_byte(dev, bios_cntl + 1); + msg_pdbg("BIOS Prefetch Enable: %sabled, ", (old & 1) ? "en" : "dis"); + break; + case CHIPSET_ICH7: + default: /* Future version might behave the same */ + old = (pci_read_byte(dev, bios_cntl) >> 2) & 0x3; + msg_pdbg("SPI Read Configuration: "); + if (old == 3) + msg_pdbg("invalid prefetching/caching settings, "); + else + msg_pdbg("prefetching %sabled, caching %sabled, ", + (old & 0x2) ? "en" : "dis", + (old & 0x1) ? "dis" : "en"); + } + wanted = old = pci_read_byte(dev, bios_cntl); /* * Quote from the 6 Series datasheet (Document Number: 324645-004): * "Bit 5: SMM BIOS Write Protect Disable (SMM_BWP) @@ -283,11 +307,23 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ * * Try to unset it in any case. * It won't hurt and makes sense in some cases according to Stefan Reinauer. + * + * At least in Centerton aforementioned bit is located at bit 7. It is unspecified in all other Atom + * and Desktop chipsets before Ibex Peak/5 Series, but we reset bit 5 anyway. */ - wanted &= ~(1 << 5); + int smm_bwp_bit; + if (ich_generation == CHIPSET_CENTERTON) + smm_bwp_bit = 7; + else + smm_bwp_bit = 5; + wanted &= ~(1 << smm_bwp_bit); + + /* Tunnel Creek has a cache disable at bit 2 of the lowest BIOS_CNTL byte. */ + if (ich_generation == CHIPSET_TUNNEL_CREEK) + wanted |= (1 << 2); - /* Set BIOS Write Enable */ - wanted |= (1 << 0); + wanted |= (1 << 0); /* Set BIOS Write Enable */ + wanted &= ~(1 << 1); /* Disable lock (futile) */ /* Only write the register if it's necessary */ if (wanted != old) { @@ -299,76 +335,77 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ msg_pdbg("\nBIOS_CNTL = 0x%02x: ", new); msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); - if (new & (1 << 5)) + if (new & (1 << smm_bwp_bit)) msg_pwarn("Warning: BIOS region SMM protection is enabled!\n"); - if (new != wanted) - msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" - "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); + msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.\n" + "New value is 0x%02x.\n", bios_cntl, old, wanted, new); - /* Return an error if we could not set the write enable */ + /* Return an error if we could not set the write enable only. */ if (!(new & (1 << 0))) return -1; return 0; } -static int enable_flash_ich0(struct pci_dev *dev, const char *name) -{ - internal_buses_supported = BUS_FWH; - /* FIXME: Make this use enable_flash_ich_4e() too and add IDSEL support. Unlike later chipsets, - * ICH and ICH-0 do only support mapping of the top-most 4MB and therefore do only feature - * FWH_DEC_EN (E3h, different default too) and FWH_SEL (E8h). */ - return enable_flash_ich(dev, name, 0x4e); -} - -static int enable_flash_ich_fwh_decode(struct pci_dev *dev, const char *name, enum ich_chipset ich_generation) +static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich_generation) { - uint32_t fwh_conf; - uint8_t fwh_sel1, fwh_sel2, fwh_dec_en_lo, fwh_dec_en_hi; - int i, tmp; - char *idsel = NULL; - int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; - int contiguous = 1; - - if (ich_generation >= CHIPSET_ICH6) { - fwh_sel1 = 0xd0; - fwh_sel2 = 0xd4; - fwh_dec_en_lo = 0xd8; - fwh_dec_en_hi = 0xd9; - } else if (ich_generation >= CHIPSET_ICH2) { + uint8_t fwh_sel1 = 0, fwh_sel2 = 0, fwh_dec_en_lo = 0, fwh_dec_en_hi = 0; /* silence compilers */ + bool implemented = 0; + switch (ich_generation) { + case CHIPSET_ICH: + /* FIXME: Unlike later chipsets, ICH and ICH-0 do only support mapping of the top-most 4MB + * and therefore do only feature FWH_DEC_EN (E3h, different default too) and FWH_SEL (E8h). */ + break; + case CHIPSET_ICH2345: fwh_sel1 = 0xe8; fwh_sel2 = 0xee; fwh_dec_en_lo = 0xf0; fwh_dec_en_hi = 0xe3; - } else { - msg_perr("Error: FWH decode setting not implemented.\n"); - return ERROR_FATAL; + implemented = 1; + break; + case CHIPSET_POULSBO: + case CHIPSET_TUNNEL_CREEK: + /* FIXME: Similar to ICH and ICH-0, Tunnel Creek and Poulsbo do only feature one register each, + * FWH_DEC_EN (D7h) and FWH_SEL (D0h). */ + break; + case CHIPSET_CENTERTON: + /* FIXME: Similar to above FWH_DEC_EN (D4h) and FWH_SEL (D0h). */ + break; + case CHIPSET_ICH6: + case CHIPSET_ICH7: + default: /* Future version might behave the same */ + fwh_sel1 = 0xd0; + fwh_sel2 = 0xd4; + fwh_dec_en_lo = 0xd8; + fwh_dec_en_hi = 0xd9; + implemented = 1; + break; } - idsel = extract_programmer_param("fwh_idsel"); + char *idsel = extract_programmer_param("fwh_idsel"); if (idsel && strlen(idsel)) { - uint64_t fwh_idsel_old, fwh_idsel; + if (!implemented) { + msg_perr("Error: fwh_idsel= specified, but (yet) unsupported on this chipset.\n"); + goto idsel_garbage_out; + } errno = 0; /* Base 16, nothing else makes sense. */ - fwh_idsel = (uint64_t)strtoull(idsel, NULL, 16); + uint64_t fwh_idsel = (uint64_t)strtoull(idsel, NULL, 16); if (errno) { - msg_perr("Error: fwh_idsel= specified, but value could " - "not be converted.\n"); + msg_perr("Error: fwh_idsel= specified, but value could not be converted.\n"); goto idsel_garbage_out; } if (fwh_idsel & 0xffff000000000000ULL) { - msg_perr("Error: fwh_idsel= specified, but value had " - "unused bits set.\n"); + msg_perr("Error: fwh_idsel= specified, but value had unused bits set.\n"); goto idsel_garbage_out; } - fwh_idsel_old = pci_read_long(dev, fwh_sel1); + uint64_t fwh_idsel_old = pci_read_long(dev, fwh_sel1); fwh_idsel_old <<= 16; fwh_idsel_old |= pci_read_word(dev, fwh_sel2); - msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to " - "0x%012" PRIx64 " for top 16 MB.", fwh_idsel_old, - fwh_idsel); + msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.", + fwh_idsel_old, fwh_idsel); rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff); rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff); /* FIXME: Decode settings are not changed. */ @@ -380,15 +417,23 @@ idsel_garbage_out: } free(idsel); + if (!implemented) { + msg_pdbg2("FWH IDSEL handling is not implemented on this chipset."); + return 0; + } + /* Ignore all legacy ranges below 1 MB. * We currently only support flashing the chip which responds to * IDSEL=0. To support IDSEL!=0, flashbase and decode size calculations * have to be adjusted. */ + int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; + bool contiguous = 1; + uint32_t fwh_conf = pci_read_long(dev, fwh_sel1); + int i; /* FWH_SEL1 */ - fwh_conf = pci_read_long(dev, fwh_sel1); for (i = 7; i >= 0; i--) { - tmp = (fwh_conf >> (i * 4)) & 0xf; + int tmp = (fwh_conf >> (i * 4)) & 0xf; msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, @@ -402,7 +447,7 @@ idsel_garbage_out: /* FWH_SEL2 */ fwh_conf = pci_read_word(dev, fwh_sel2); for (i = 3; i >= 0; i--) { - tmp = (fwh_conf >> (i * 4)) & 0xf; + int tmp = (fwh_conf >> (i * 4)) & 0xf; msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, @@ -419,7 +464,7 @@ idsel_garbage_out: fwh_conf <<= 8; fwh_conf |= pci_read_byte(dev, fwh_dec_en_lo); for (i = 7; i >= 0; i--) { - tmp = (fwh_conf >> (i + 0x8)) & 0x1; + int tmp = (fwh_conf >> (i + 0x8)) & 0x1; msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, @@ -431,7 +476,7 @@ idsel_garbage_out: } } for (i = 3; i >= 0; i--) { - tmp = (fwh_conf >> i) & 0x1; + int tmp = (fwh_conf >> i) & 0x1; msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, @@ -448,146 +493,56 @@ idsel_garbage_out: return 0; } -static int enable_flash_ich_4e(struct pci_dev *dev, const char *name, enum ich_chipset ich_generation) +static int enable_flash_ich_fwh(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) { int err; /* Configure FWH IDSEL decoder maps. */ - if ((err = enable_flash_ich_fwh_decode(dev, name, ich_generation)) != 0) + if ((err = enable_flash_ich_fwh_decode(dev, ich_generation)) != 0) return err; internal_buses_supported = BUS_FWH; - return enable_flash_ich(dev, name, 0x4e); + return enable_flash_ich_bios_cntl(dev, ich_generation, bios_cntl); } -static int enable_flash_ich2(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich_4e(dev, name, CHIPSET_ICH2); -} - -static int enable_flash_ich3(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich_4e(dev, name, CHIPSET_ICH3); -} - -static int enable_flash_ich4(struct pci_dev *dev, const char *name) +static int enable_flash_ich0(struct pci_dev *dev, const char *name) { - return enable_flash_ich_4e(dev, name, CHIPSET_ICH4); + return enable_flash_ich_fwh(dev, CHIPSET_ICH, 0x4e); } -static int enable_flash_ich5(struct pci_dev *dev, const char *name) +static int enable_flash_ich2345(struct pci_dev *dev, const char *name) { - return enable_flash_ich_4e(dev, name, CHIPSET_ICH5); -} - -static int enable_flash_ich_dc(struct pci_dev *dev, const char *name, enum ich_chipset ich_generation) -{ - int err; - - /* Configure FWH IDSEL decoder maps. */ - if ((err = enable_flash_ich_fwh_decode(dev, name, ich_generation)) != 0) - return err; - - /* If we're called by enable_flash_ich_dc_spi, it will override - * internal_buses_supported anyway. - */ - internal_buses_supported = BUS_FWH; - return enable_flash_ich(dev, name, 0xdc); + return enable_flash_ich_fwh(dev, CHIPSET_ICH2345, 0x4e); } static int enable_flash_ich6(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc(dev, name, CHIPSET_ICH6); + return enable_flash_ich_fwh(dev, CHIPSET_ICH6, 0xdc); } static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) { - uint16_t old, new; - int err; - - if ((err = enable_flash_ich(dev, name, 0xd8)) != 0) - return err; - - old = pci_read_byte(dev, 0xd9); - msg_pdbg("BIOS Prefetch Enable: %sabled, ", - (old & 1) ? "en" : "dis"); - new = old & ~1; - - if (new != old) - rpci_write_byte(dev, 0xd9, new); - - internal_buses_supported = BUS_FWH; - return 0; + return enable_flash_ich_fwh(dev, CHIPSET_POULSBO, 0xd8); } -static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) +static int enable_flash_ich_spi(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) { - uint16_t old, new; - uint32_t tmp, bnt; - void *rcrb; - int ret; - - /* Enable Flash Writes */ - ret = enable_flash_ich(dev, name, 0xd8); - if (ret == ERROR_FATAL) - return ret; - - /* Make sure BIOS prefetch mechanism is disabled */ - old = pci_read_byte(dev, 0xd9); - msg_pdbg("BIOS Prefetch Enable: %sabled, ", (old & 1) ? "en" : "dis"); - new = old & ~1; - if (new != old) - rpci_write_byte(dev, 0xd9, new); - - /* Get physical address of Root Complex Register Block */ - tmp = pci_read_long(dev, 0xf0) & 0xffffc000; - msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp); - - /* Map RCBA to virtual memory */ - rcrb = rphysmap("ICH RCRB", tmp, 0x4000); - if (rcrb == ERROR_PTR) - return ERROR_FATAL; - - /* Test Boot BIOS Strap Status */ - bnt = mmio_readl(rcrb + 0x3410); - if (bnt & 0x02) { - /* If strapped to LPC, no SPI initialization is required */ - internal_buses_supported = BUS_FWH; - return 0; - } - - /* This adds BUS_SPI */ - if (ich_init_spi(dev, tmp, rcrb, 7) != 0) { - if (!ret) - ret = ERROR_NONFATAL; - } - - return ret; -} - -static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, - enum ich_chipset ich_generation) -{ - int ret, ret_spi; - uint8_t bbs, buc; - uint32_t tmp, gcs; - void *rcrb; - const char *const *straps_names; - static const char *const straps_names_EP80579[] = { "SPI", "reserved", "reserved", "LPC" }; static const char *const straps_names_ich7_nm10[] = { "reserved", "SPI", "PCI", "LPC" }; + static const char *const straps_names_tunnel_creek[] = { "SPI", "LPC" }; static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" }; static const char *const straps_names_pch567[] = { "LPC", "reserved", "PCI", "SPI" }; static const char *const straps_names_pch8[] = { "LPC", "reserved", "reserved", "SPI" }; - static const char *const straps_names_pch8_lp[] = { "SPI", "LPC", "unknown", "unknown" }; + static const char *const straps_names_pch8_lp[] = { "SPI", "LPC" }; static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" }; + const char *const *straps_names; switch (ich_generation) { case CHIPSET_ICH7: /* EP80579 may need further changes, but this is the least * intrusive way to get correct BOOT Strap printing without * changing the rest of its code path). */ - if (strcmp(name, "EP80579") == 0) + if (dev->device_id == 0x5031) straps_names = straps_names_EP80579; else straps_names = straps_names_ich7_nm10; @@ -597,6 +552,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, case CHIPSET_ICH10: straps_names = straps_names_ich8910; break; + case CHIPSET_TUNNEL_CREEK: + straps_names = straps_names_tunnel_creek; + break; case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_6_SERIES_COUGAR_POINT: case CHIPSET_7_SERIES_PANTHER_POINT: @@ -609,35 +567,33 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, straps_names = straps_names_pch8_lp; break; case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet + case CHIPSET_CENTERTON: // FIXME: Datasheet does not mention GCS at all straps_names = straps_names_unknown; break; default: - msg_gerr("%s: unknown ICH generation. Please report!\n", - __func__); + msg_gerr("%s: unknown ICH generation. Please report!\n", __func__); straps_names = straps_names_unknown; break; } - /* Enable Flash Writes */ - ret = enable_flash_ich_dc(dev, name, ich_generation); - if (ret == ERROR_FATAL) - return ret; - /* Get physical address of Root Complex Register Block */ - tmp = pci_read_long(dev, 0xf0) & 0xffffc000; - msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp); + uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000; + msg_pdbg("Root Complex Register Block address = 0x%x\n", rcra); /* Map RCBA to virtual memory */ - rcrb = rphysmap("ICH RCRB", tmp, 0x4000); + void *rcrb = rphysmap("ICH RCRB", rcra, 0x4000); if (rcrb == ERROR_PTR) return ERROR_FATAL; - gcs = mmio_readl(rcrb + 0x3410); + uint32_t gcs = mmio_readl(rcrb + 0x3410); msg_pdbg("GCS = 0x%x: ", gcs); - msg_pdbg("BIOS Interface Lock-Down: %sabled, ", - (gcs & 0x1) ? "en" : "dis"); + msg_pdbg("BIOS Interface Lock-Down: %sabled, ", (gcs & 0x1) ? "en" : "dis"); + uint8_t bbs; switch (ich_generation) { + case CHIPSET_TUNNEL_CREEK: + bbs = (gcs >> 1) & 0x1; + break; case CHIPSET_8_SERIES_LYNX_POINT_LP: case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet /* Lynx Point LP uses a single bit for GCS */ @@ -650,91 +606,110 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, } msg_pdbg("Boot BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); - buc = mmio_readb(rcrb + 0x3414); - msg_pdbg("Top Swap : %s\n", - (buc & 1) ? "enabled (A16 inverted)" : "not enabled"); + if (ich_generation != CHIPSET_TUNNEL_CREEK && ich_generation != CHIPSET_CENTERTON) { + uint8_t buc = mmio_readb(rcrb + 0x3414); + msg_pdbg("Top Swap : %s\n", (buc & 1) ? "enabled (A16(+) inverted)" : "not enabled"); + } + + /* Handle FWH-related parameters and initialization */ + int ret_fwh = enable_flash_ich_fwh(dev, ich_generation, bios_cntl); + if (ret_fwh == ERROR_FATAL) + return ret_fwh; - /* It seems the ICH7 does not support SPI and LPC chips at the same - * time. At least not with our current code. So we prevent searching - * on ICH7 when the southbridge is strapped to LPC - */ - internal_buses_supported = BUS_FWH; - if (ich_generation == CHIPSET_ICH7) { - if (bbs == 0x03) { - /* If strapped to LPC, no further SPI initialization is - * required. */ - return ret; - } else { - /* Disable LPC/FWH if strapped to PCI or SPI */ - internal_buses_supported = BUS_NONE; - } + /* SPIBAR is at RCRB+0x3020 for ICH[78], Tunnel Creek and Centerton, and RCRB+0x3800 for ICH9. */ + uint16_t spibar_offset; + switch (ich_generation) { + case CHIPSET_ICH_UNKNOWN: + return ERROR_FATAL; + case CHIPSET_ICH7: + case CHIPSET_ICH8: + case CHIPSET_TUNNEL_CREEK: + case CHIPSET_CENTERTON: + spibar_offset = 0x3020; + break; + case CHIPSET_ICH9: + default: /* Future version might behave the same */ + spibar_offset = 0x3800; + break; } + msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " + 0x%04x\n", PRIxPTR_WIDTH, (uintptr_t)rcrb, spibar_offset); + void *spibar = rcrb + spibar_offset; /* This adds BUS_SPI */ - ret_spi = ich_init_spi(dev, tmp, rcrb, ich_generation); + int ret_spi = ich_init_spi(dev, spibar, ich_generation); if (ret_spi == ERROR_FATAL) return ret_spi; - if (ret || ret_spi) - ret = ERROR_NONFATAL; + if (ret_fwh || ret_spi) + return ERROR_NONFATAL; - return ret; + return 0; +} + +static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_spi(dev, CHIPSET_TUNNEL_CREEK, 0xd8); +} + +static int enable_flash_s12x0(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_spi(dev, CHIPSET_CENTERTON, 0xd8); } static int enable_flash_ich7(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH7); + return enable_flash_ich_spi(dev, CHIPSET_ICH7, 0xdc); } static int enable_flash_ich8(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH8); + return enable_flash_ich_spi(dev, CHIPSET_ICH8, 0xdc); } static int enable_flash_ich9(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH9); + return enable_flash_ich_spi(dev, CHIPSET_ICH9, 0xdc); } static int enable_flash_ich10(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH10); + return enable_flash_ich_spi(dev, CHIPSET_ICH10, 0xdc); } /* Ibex Peak aka. 5 series & 3400 series */ static int enable_flash_pch5(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_5_SERIES_IBEX_PEAK); + return enable_flash_ich_spi(dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc); } /* Cougar Point aka. 6 series & c200 series */ static int enable_flash_pch6(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_6_SERIES_COUGAR_POINT); + return enable_flash_ich_spi(dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc); } /* Panther Point aka. 7 series */ static int enable_flash_pch7(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_7_SERIES_PANTHER_POINT); + return enable_flash_ich_spi(dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc); } /* Lynx Point aka. 8 series */ static int enable_flash_pch8(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_LYNX_POINT); + return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc); } -/* Lynx Point aka. 8 series low-power */ +/* Lynx Point LP aka. 8 series low-power */ static int enable_flash_pch8_lp(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_LYNX_POINT_LP); + return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc); } /* Wellsburg (for Haswell-EP Xeons) */ static int enable_flash_pch8_wb(struct pci_dev *dev, const char *name) { - return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_WELLSBURG); + return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc); } static int via_no_byte_merge(struct pci_dev *dev, const char *name) @@ -1503,6 +1478,7 @@ const struct penable chipset_enables[] = { {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, + {0x8086, 0x0c60, NT, "Intel", "S12x0", enable_flash_s12x0}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, {0x8086, 0x1c44, OK, "Intel", "Z68", enable_flash_pch6}, @@ -1541,15 +1517,15 @@ const struct penable chipset_enables[] = { {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich0}, - {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich2}, - {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich2}, - {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich2}, - {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich3}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich3}, - {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich4}, - {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich4}, - {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich5}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich5}, + {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich2345}, + {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich2345}, + {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich2345}, + {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich2345}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich2345}, + {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich2345}, + {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich2345}, + {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich2345}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich2345}, {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich6}, {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich6}, {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich6}, diff --git a/ichspi.c b/ichspi.c index 1dcff5b..6c394db 100644 --- a/ichspi.c +++ b/ichspi.c @@ -466,6 +466,8 @@ static int generate_opcodes(OPCODES * op) switch (ich_generation) { case CHIPSET_ICH7: + case CHIPSET_TUNNEL_CREEK: + case CHIPSET_CENTERTON: preop = REGREAD16(ICH7_REG_PREOP); optype = REGREAD16(ICH7_REG_OPTYPE); opmenu[0] = REGREAD32(ICH7_REG_OPMENU); @@ -529,7 +531,7 @@ static int program_opcodes(OPCODES *op, int enable_undo) opmenu[0] |= ((uint32_t) op->opcode[a].opcode) << (a * 8); } - /*Program Allowable Opcodes 4 - 7 */ + /* Program Allowable Opcodes 4 - 7 */ opmenu[1] = 0; for (a = 4; a < 8; a++) { opmenu[1] |= ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); @@ -538,6 +540,8 @@ static int program_opcodes(OPCODES *op, int enable_undo) msg_pdbg2("\n%s: preop=%04x optype=%04x opmenu=%08x%08x\n", __func__, preop, optype, opmenu[0], opmenu[1]); switch (ich_generation) { case CHIPSET_ICH7: + case CHIPSET_TUNNEL_CREEK: + case CHIPSET_CENTERTON: /* Register undo only for enable_undo=1, i.e. first call. */ if (enable_undo) { rmmio_valw(ich_spibar + ICH7_REG_PREOP); @@ -603,6 +607,8 @@ static void ich_set_bbar(uint32_t min_addr) int bbar_off; switch (ich_generation) { case CHIPSET_ICH7: + case CHIPSET_TUNNEL_CREEK: + case CHIPSET_CENTERTON: bbar_off = 0x50; break; case CHIPSET_ICH8: @@ -975,6 +981,8 @@ static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset, switch (ich_generation) { case CHIPSET_ICH7: + case CHIPSET_TUNNEL_CREEK: + case CHIPSET_CENTERTON: return ich7_run_opcode(op, offset, datalength, data, maxlength); case CHIPSET_ICH8: default: /* Future version might behave the same */ @@ -1545,12 +1553,10 @@ static const struct opaque_programmer opaque_programmer_ich_hwseq = { .erase = ich_hwseq_block_erase, }; -int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, - enum ich_chipset ich_gen) +int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen) { int i; - uint8_t old, new; - uint16_t spibar_offset, tmp2; + uint16_t tmp2; uint32_t tmp; char *arg; int ich_spi_force = 0; @@ -1564,42 +1570,18 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, } ich_spi_mode = ich_auto; ich_generation = ich_gen; - - switch (ich_generation) { - case CHIPSET_ICH_UNKNOWN: - return ERROR_FATAL; - case CHIPSET_ICH7: - case CHIPSET_ICH8: - spibar_offset = 0x3020; - break; - case CHIPSET_ICH9: - default: /* Future version might behave the same */ - spibar_offset = 0x3800; - break; - } - - /* SPIBAR is at RCRB+0x3020 for ICH[78] and RCRB+0x3800 for ICH9. */ - msg_pdbg("SPIBAR = 0x%x + 0x%04x\n", base, spibar_offset); - - /* Assign Virtual Address */ - ich_spibar = rcrb + spibar_offset; + ich_spibar = spibar; switch (ich_generation) { case CHIPSET_ICH7: + case CHIPSET_TUNNEL_CREEK: + case CHIPSET_CENTERTON: msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2)); msg_pdbg("0x04: 0x%08x (SPIA)\n", mmio_readl(ich_spibar + 4)); - for (i = 0; i < 8; i++) { - int offs; - offs = 8 + (i * 8); - msg_pdbg("0x%02x: 0x%08x (SPID%d)\n", offs, - mmio_readl(ich_spibar + offs), i); - msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4, - mmio_readl(ich_spibar + offs + 4), i); - } ichspi_bbar = mmio_readl(ich_spibar + 0x50); msg_pdbg("0x50: 0x%08x (BBAR)\n", ichspi_bbar); @@ -1811,21 +1793,6 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, break; } - old = pci_read_byte(dev, 0xdc); - msg_pdbg("SPI Read Configuration: "); - new = (old >> 2) & 0x3; - switch (new) { - case 0: - case 1: - case 2: - msg_pdbg("prefetching %sabled, caching %sabled, ", - (new & 0x2) ? "en" : "dis", - (new & 0x1) ? "dis" : "en"); - break; - default: - msg_pdbg("invalid prefetching/caching settings, "); - break; - } return 0; } diff --git a/programmer.h b/programmer.h index ef96c9e..0c51f58 100644 --- a/programmer.h +++ b/programmer.h @@ -557,11 +557,12 @@ int register_spi_programmer(const struct spi_programmer *programmer); /* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */ enum ich_chipset { CHIPSET_ICH_UNKNOWN, - CHIPSET_ICH2 = 2, - CHIPSET_ICH3, - CHIPSET_ICH4, - CHIPSET_ICH5, + CHIPSET_ICH, + CHIPSET_ICH2345, CHIPSET_ICH6, + CHIPSET_POULSBO, /* SCH U* */ + CHIPSET_TUNNEL_CREEK, /* Atom E6xx */ + CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */ CHIPSET_ICH7, CHIPSET_ICH8, CHIPSET_ICH9, @@ -577,8 +578,7 @@ enum ich_chipset { /* ichspi.c */ #if CONFIG_INTERNAL == 1 extern uint32_t ichspi_bbar; -int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, - enum ich_chipset ich_generation); +int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_generation); int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); /* amd_imc.c */ -- Kind regards, Stefan Tauner

1 0

[PATCH 2/2] layout: Better file parsing.
by Stefan Tauner 19 Sep '13

19 Sep '13

A complete rewrite of the layout file parser: - safe (unlike before) - support for comments - supports including/sourcing of other layout files (relative to the including file as well as via absolute paths) up to predefined nesting level - checks for duplicate region names - can handle region names and layout file names with spaces etc correctly - way better diagnostics - no more character arrays in struct romentry_t but pointers only To help with migrating legacy layout files add a script for converting them to format 2. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- layout.c | 305 +++++++++++++++++++++++++++++++++------- util/convert_layout_v1_to_v2.sh | 79 +++++++++++ 2 files changed, 331 insertions(+), 53 deletions(-) create mode 100755 util/convert_layout_v1_to_v2.sh diff --git a/layout.c b/layout.c index 4d4f35c..eb4ec07 100644 --- a/layout.c +++ b/layout.c @@ -22,17 +22,23 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> +#include <ctype.h> +#include <errno.h> #include <limits.h> #include "flash.h" #include "programmer.h" #define MAX_ROMLAYOUT 32 +#define MAX_ENTRY_LEN 1024 +#define WHITESPACE_CHARS " \t" +#define INCLUDE_INSTR "source" +#define MAX_NESTING_LVL 5 typedef struct { unsigned int start; unsigned int end; unsigned int included; - char name[256]; + char *name; char *file; } romentry_t; @@ -45,58 +51,264 @@ static int num_rom_entries = 0; /* the number of valid rom_entries */ static char *include_args[MAX_ROMLAYOUT]; static int num_include_args = 0; /* the number of valid include_args. */ -#ifndef __LIBPAYLOAD__ -int read_romlayout(char *name) +/* returns the index of the entry (or a negative value if it is not found) */ +static int find_romentry(char *name) { - FILE *romlayout; - char tempstr[256]; int i; + msg_gspew("Looking for region \"%s\"... ", name); + for (i = 0; i < num_rom_entries; i++) { + if (strcmp(rom_entries[i].name, name) == 0) { + msg_gspew("found.\n"); + return i; + } + } + msg_gspew("not found.\n"); + return -1; +} - romlayout = fopen(name, "r"); +/* FIXME: While libpayload has no file I/O itself, code using libflashrom could still provide layout information + * obtained by other means like user input or by fetching it from somewhere else. Therefore the parsing code + * should be separated from the file reading code eventually. */ +#ifndef __LIBPAYLOAD__ +/** Parse one line in a layout file. + * @param file_name The name of the file this line originates from. + * @param entry If not NULL fill it with the parsed data, else just detect errors and print diagnostics. + * @return -1 on error, + * 0 if the line could be parsed into a layout entry succesfully, + * 1 if a file was successfully sourced. + */ +static int parse_entry(char *file_name, char *buf, romentry_t *entry) +{ + msg_gdbg2("String to parse: \"%s\".\n", buf); + + /* Skip all white space in the beginning. */ + char *tmp_str = buf + strspn(buf, WHITESPACE_CHARS); + char *endptr; + + /* Check for include command. */ + if (strncmp(tmp_str, INCLUDE_INSTR, strlen(INCLUDE_INSTR)) == 0) { + tmp_str += strlen(INCLUDE_INSTR); + tmp_str += strspn(tmp_str, WHITESPACE_CHARS); + if (unquote_string(&tmp_str, NULL, WHITESPACE_CHARS) != 0) { + msg_gerr("Error parsing version 2 layout entry: Could not find file name in \"%s\".\n", + buf); + return -1; + } + msg_gspew("Source command found with filename \"%s\".\n", tmp_str); + + static unsigned int nesting_lvl = 0; + if (nesting_lvl >= MAX_NESTING_LVL) { + msg_gerr("Error: Nesting level exeeded limit of %u.\n", MAX_NESTING_LVL); + msg_gerr("Unable to import \"%s\" in layout file \"%s\".\n", tmp_str, file_name); + return -1; + } - if (!romlayout) { - msg_gerr("ERROR: Could not open layout file (%s).\n", - name); + nesting_lvl++; + int ret; + /* If a relative path is given, append it to the dirname of the current file. */ + if (*tmp_str != '/') { + /* We need space for: dirname of file_name, '/' , the file name in tmp_strand and '\0'. + * Since the dirname of file_name is shorter than file_name this is more than enough: */ + char *path = malloc(strlen(file_name) + strlen(tmp_str) + 2); + if (path == NULL) { + msg_gerr("Out of memory!\n"); + return -1; + } + strcpy(path, file_name); + + /* A less insane but incomplete dirname implementation... */ + endptr = strrchr(path, '/'); + if (endptr != NULL) { + endptr[0] = '/'; + endptr[1] = '\0'; + } else { + /* This is safe because the original file name was at least one char. */ + path[0] = '.'; + path[1] = '/'; + path[2] = '\0'; + } + strcat(path, tmp_str); + ret = read_romlayout(path); + free(path); + } else + ret = read_romlayout(tmp_str); + nesting_lvl--; + return ret >= 0 ? 1 : -1; /* Only return values < 0 are errors. */ + } + + errno = 0; + long tmp_long = strtol(tmp_str, &endptr, 0); + if (errno != 0 || endptr == tmp_str || tmp_long < 0 || tmp_long > UINT32_MAX) { + msg_gerr("Error parsing version 2 layout entry: Could not convert start address in \"%s\".\n", + buf); return -1; } + uint32_t start = tmp_long; - while (!feof(romlayout)) { - char *tstr1, *tstr2; + tmp_str = endptr + strspn(endptr, WHITESPACE_CHARS); + if (*tmp_str != ':') { + msg_gerr("Error parsing version 2 layout entry: Address separator does not follow start " + "address in \"%s\".\n", buf); + return -1; + } + tmp_str++; - if (num_rom_entries >= MAX_ROMLAYOUT) { - msg_gerr("Maximum number of entries (%i) in layout file reached.\n", MAX_ROMLAYOUT); - return 1; + errno = 0; + tmp_long = strtol(tmp_str, &endptr, 0); + if (errno != 0 || endptr == tmp_str || tmp_long < 0 || tmp_long > UINT32_MAX) { + msg_gerr("Error parsing version 2 layout entry: Could not convert end address in \"%s\"\n", + buf); + return -1; + } + uint32_t end = tmp_long; + + size_t skip = strspn(endptr, WHITESPACE_CHARS); + if (skip == 0) { + msg_gerr("Error parsing version 2 layout entry: End address is not followed by white space in " + "\"%s\"\n", buf); + return -1; + } + + tmp_str = endptr + skip; + /* The region name is either enclosed by quotes or ends with the first whitespace. */ + if (unquote_string(&tmp_str, &endptr, WHITESPACE_CHARS) != 0) { + msg_gerr("Error parsing version 2 layout entry: Could not find region name in \"%s\".\n", buf); + return -1; + } + + msg_gdbg("Parsed entry: 0x%08x - 0x%08x named \"%s\"\n", start, end, tmp_str); + + if (start >= end) { + msg_gerr("Error parsing version 2 layout entry: Length of region \"%s\" is not positive.\n", + tmp_str); + return -1; + } + + if (find_romentry(tmp_str) >= 0) { + msg_gerr("Error parsing version 2 layout entry: Region name \"%s\" used multiple times.\n", + tmp_str); + return -1; + } + + endptr += strspn(endptr, WHITESPACE_CHARS); + if (strlen(endptr) != 0) + msg_gerr("Warning: Region name \"%s\" is not followed by white space only.\n", tmp_str); + + if (entry != NULL) { + entry->name = strdup(tmp_str); + if (entry->name == NULL) { + msg_gerr("Out of memory!\n"); + return -1; } - if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[num_rom_entries].name)) - continue; -#if 0 - // fscanf does not like arbitrary comments like that :( later - if (tempstr[0] == '#') { - continue; + + entry->start = start; + entry->end = end; + entry->included = 0; + entry->file = NULL; + } + return 0; +} + +/* Scan the first line for the determinant version comment and parse it, or assume it is version 1. */ +static int detect_layout_version(FILE *romlayout) +{ + int c; + do { /* Skip white space */ + c = fgetc(romlayout); + if (c == EOF) + return -1; + } while (isblank(c)); + ungetc(c, romlayout); + + const char* vcomment = "# flashrom layout v"; + char buf[strlen(vcomment) + 1]; /* comment + \0 */ + if (fgets(buf, sizeof(buf), romlayout) == NULL) + return -1; + if (strcmp(vcomment, buf) != 0) + return 1; + int version; + if (fscanf(romlayout, "%d", &version) != 1) + return -1; + if (version < 2) { + msg_gwarn("Warning: Layout file declares itself to be version %d, but self delcaration has\n" + "only been possible since version 2. Continuing anyway.\n", version); + } + return version; +} + +int read_romlayout(char *name) +{ + FILE *romlayout = fopen(name, "r"); + if (romlayout == NULL) { + msg_gerr("ERROR: Could not open layout file \"%s\".\n", name); + return -1; + } + + const int version = detect_layout_version(romlayout); + if (version < 0) { + msg_gerr("Could not determine version of layout file \"%s\".\n", name); + fclose(romlayout); + return 1; + } + if (version != 2) { + msg_gerr("Layout file version %d is not supported in this version of flashrom.\n", version); + fclose(romlayout); + return 1; + } + rewind(romlayout); + + msg_gdbg("Parsing layout file \"%s\" according to version %d.\n", name, version); + int linecnt = 0; + while (!feof(romlayout)) { + char buf[MAX_ENTRY_LEN]; + char *curchar = buf; + linecnt++; + msg_gspew("Parsing line %d of \"%s\".\n", linecnt, name); + + while (true) { + /* Make sure that we ignore various newline sequences by checking for \r too. + * NB: This might introduce empty lines. */ + char c = fgetc(romlayout); + if (c == '#') { + do { /* Skip characters in comments */ + c = fgetc(romlayout); + } while (c != EOF && c != '\n' && c != '\r'); + continue; + } + if (c == EOF || c == '\n' || c == '\r') { + *curchar = '\0'; + break; + } + if (curchar == &buf[MAX_ENTRY_LEN - 1]) { + msg_gerr("Line %d of layout file \"%s\" is longer than the allowed %d chars.\n", + linecnt, name, MAX_ENTRY_LEN); + fclose(romlayout); + return 1; + } + *curchar = c; + curchar++; } -#endif - tstr1 = strtok(tempstr, ":"); - tstr2 = strtok(NULL, ":"); - if (!tstr1 || !tstr2) { - msg_gerr("Error parsing layout file. Offending string: \"%s\"\n", tempstr); + + /* Skip all whitespace or empty lines */ + if (strspn(buf, WHITESPACE_CHARS) == strlen(buf)) + continue; + + romentry_t *entry = (num_rom_entries >= MAX_ROMLAYOUT) ? NULL : &rom_entries[num_rom_entries]; + int ret = parse_entry(name, buf, entry); + if (ret > 0) { fclose(romlayout); return 1; } - rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); - rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); - rom_entries[num_rom_entries].included = 0; - rom_entries[num_rom_entries].file = NULL; - num_rom_entries++; + /* Only 0 indicates the successfully parsing of an entry, others are errors or imports. */ + if (ret == 0) + num_rom_entries++; } - - for (i = 0; i < num_rom_entries; i++) { - msg_gdbg("romlayout %08x - %08x named %s\n", - rom_entries[i].start, - rom_entries[i].end, rom_entries[i].name); - } - fclose(romlayout); - + if (num_rom_entries >= MAX_ROMLAYOUT) { + msg_gerr("Found %d entries in layout file which is more than the %i allowed.\n", + num_rom_entries + 1, MAX_ROMLAYOUT); + return 1; + } return 0; } #endif @@ -135,21 +347,6 @@ int register_include_arg(char *name) return 0; } -/* returns the index of the entry (or a negative value if it is not found) */ -static int find_romentry(char *name) -{ - int i; - msg_gspew("Looking for region \"%s\"... ", name); - for (i = 0; i < num_rom_entries; i++) { - if (strcmp(rom_entries[i].name, name) == 0) { - msg_gspew("found.\n"); - return i; - } - } - msg_gspew("not found.\n"); - return -1; -} - /* process -i arguments * returns 0 to indicate success, >0 to indicate failure */ @@ -224,6 +421,8 @@ void layout_cleanup(void) num_include_args = 0; for (i = 0; i < num_rom_entries; i++) { + free(rom_entries[i].name); + rom_entries[i].name = NULL; free(rom_entries[i].file); rom_entries[i].file = NULL; rom_entries[i].included = 0; diff --git a/util/convert_layout_v1_to_v2.sh b/util/convert_layout_v1_to_v2.sh new file mode 100755 index 0000000..712de87 --- /dev/null +++ b/util/convert_layout_v1_to_v2.sh @@ -0,0 +1,79 @@ +#!/bin/sh +# +# Copyright 2013 Stefan Tauner +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301, USA. +# +# +# +# This script converts legacy layout files as understood by flashrom up to version 0.9.7 to format version 2. +# It converts all files given as parameters in place and creates backups (with the suffix ".old") of the old +# contents unless --nobackup is given. +# +# It does... +# - check if the file exists and if its format is already in v2 format +# - prefix addresses with 0x if they have not been already +# - remove superfluous white space (i.e. more than one consecutive space) +# - remove white space from otherwise empty lines + +usage () +{ + echo "Usage: $0 [--nobackup] FILE..." + exit 1 +} + +if [ $# -eq 0 ]; then + usage +fi + +if [ $1 = "--nobackup" ]; then + sed_opt="-i" + shift + if [ $# -eq 0 ]; then + usage + fi +else + sed_opt="-i.old" +fi + +# Test if all files are really there before starting conversion +ret=0 +for f in "$@" ; do + if [ ! -e "$f" ]; then + echo "File not found: $f">&2 + ret=1 + fi +done +if [ "$ret" -ne 0 ]; then + echo "Aborting" + return 1 +fi + +for f in "$@" ; do + if grep -q 'flashrom layout v2\b' "$f" ; then + echo "File already in new format: $f" + continue + fi + + sed $sed_opt -e " + 1i # flashrom layout v2 + s/ *$0x\|$$[0-9a-fA-F][0-9a-fA-F]*$ *: *$0x\|$$[0-9a-fA-F][0-9a-fA-F]*$ */0x\2:0x\4 / + s/ */ / + s/^ *$// + " "$f" + echo "$f done" +done +echo "Done!" -- Kind regards, Stefan Tauner

1 0

[PATCH 1/2] layout: Add -i <region>[:<file>] support.
by Stefan Tauner 19 Sep '13

19 Sep '13

Add an optional sub-parameter to the -i parameter to allow building the image to be written from multiple files. This will also allow regions to be read from flash and written to separate image files in a later patch. Existing function read_buf_from_file() is refined and reused to read the file. Document the whole layout handling including the new features a bit better and refine wording regarding files, images, layouts and regions as discussed. Also, finally introduce helpers.c: a module containing utility functions to be shared which do not fit elsewhere. The first function to be added is unquote_string() which is used throughout this patch. Abort for non-write operations if a layout file is given. based on chromiumos' d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Makefile | 2 +- cli_classic.c | 15 +++++-- dummyflasher.c | 2 +- flash.h | 6 ++- flashrom.8.tmpl | 130 ++++++++++++++++++++++++++++++++++---------------------- flashrom.c | 20 +++++---- helpers.c | 74 ++++++++++++++++++++++++++++++++ layout.c | 70 ++++++++++++++++++++++-------- 8 files changed, 236 insertions(+), 83 deletions(-) create mode 100644 helpers.c diff --git a/Makefile b/Makefile index 346d46a..69e0b9c 100644 --- a/Makefile +++ b/Makefile @@ -338,7 +338,7 @@ CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ ############################################################################### # Library code. -LIB_OBJS = layout.o flashrom.o udelay.o programmer.o +LIB_OBJS = layout.o flashrom.o udelay.o programmer.o helpers.o ############################################################################### # Frontend related stuff. diff --git a/cli_classic.c b/cli_classic.c index 70bccb5..ed6d6aa 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -40,8 +40,8 @@ static void cli_classic_usage(const char *name) #if CONFIG_PRINT_WIKI == 1 "-z|" #endif - "-p <programmername>[:<parameters>] [-c <chipname>]\n" - "[-E|(-r|-w|-v) <file>] [-l <layoutfile> [-i <imagename>]...] [-n] [-f]]\n" + "-p <programmername>[:<parameter>[,<parameter>]...] [-c <chipname>]\n" + "[-E|(-r|-w|-v) <imagefile>] [-l <layoutfile> [-i <region>[:<regionfile>]...] [-n] [-f]]\n" "[-V[V[V]]] [-o <logfile>]\n\n", name); printf(" -h | --help print this help text\n" @@ -54,8 +54,9 @@ static void cli_classic_usage(const char *name) " -c | --chip <chipname> probe only for specified flash chip\n" " -f | --force force specific operations (see man page)\n" " -n | --noverify don't auto-verify\n" - " -l | --layout <layoutfile> read ROM layout from <layoutfile>\n" - " -i | --image <name> only flash image <name> from flash layout\n" + " -l | --layout <layoutfile> read layout from <layoutfile>\n" + " -i | --include <region>[<:file>] only flash image <region> from layout \n" + " (optionally with data from <file>)\n" " -o | --output <logfile> log output to <logfile>\n" " -L | --list-supported print supported devices\n" #if CONFIG_PRINT_WIKI == 1 @@ -370,6 +371,12 @@ int main(int argc, char *argv[]) ret = 1; goto out; } + if (layoutfile != NULL && !write_it) { + msg_gerr("Layout files are currently supported for write operations only.\n"); + ret = 1; + goto out; + } + if (process_include_args()) { ret = 1; goto out; diff --git a/dummyflasher.c b/dummyflasher.c index 9c0d868..90d2261 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -389,7 +389,7 @@ int dummy_init(void) msg_pdbg("matches.\n"); msg_pdbg("Reading %s\n", emu_persistent_image); read_buf_from_file(flashchip_contents, emu_chip_size, - emu_persistent_image); + emu_persistent_image, NULL); } else { msg_pdbg("doesn't match.\n"); } diff --git a/flash.h b/flash.h index 7b88477..b4946a0 100644 --- a/flash.h +++ b/flash.h @@ -253,9 +253,12 @@ void print_banner(void); void list_programmers_linebreak(int startcol, int cols, int paren); int selfcheck(void); int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it); -int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename); +int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename, const char *size_msg); int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename); +/* helpers.c */ +int unquote_string(char **startp, char **endp, const char *delimiters); + enum test_state { OK = 0, NT = 1, /* Not tested */ @@ -321,6 +324,7 @@ int process_include_args(void); int read_romlayout(char *name); int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); void layout_cleanup(void); +int build_new_image(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents); /* spi.c */ struct spi_command { diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index b507a97..0ccdcf1 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -3,10 +3,10 @@ flashrom \- detect, read, write, verify and erase flash chips .SH SYNOPSIS .B flashrom \fR[\fB\-h\fR|\fB\-R\fR|\fB\-L\fR|\fB\-z\fR|\ -\fB\-p\fR <programmername>[:<parameters>] - [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>] \ +\fB\-p\fR <programmername>[:<parameter>[,<parameter>]...]] + [\fB\-E\fR|\fB\-r\fR <imagefile>|\fB\-w\fR <imagefile>|\fB\-v\fR <imagefile>] \ [\fB\-c\fR <chipname>] - [\fB\-l\fR <file> [\fB\-i\fR <image>]] [\fB\-n\fR] [\fB\-f\fR]] + [\fB\-l\fR <layoutfile> [\fB\-i\fR <regionname>[:<regionfile>]]...] [\fB\-n\fR] [\fB\-f\fR]] [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>] .SH DESCRIPTION .B flashrom @@ -38,14 +38,14 @@ before you try to write a new image. All operations involving any chip access (p .B -p/--programmer option to be used (please see below). .TP -.B "\-r, \-\-read <file>" +.B "\-r, \-\-read <imagefile>" Read flash ROM contents and save them into the given -.BR <file> . +.BR <imagefile> . If the file already exists, it will be overwritten. .TP -.B "\-w, \-\-write <file>" +.B "\-w, \-\-write <imagefile>" Write -.B <file> +.B <imagefile> into flash ROM. This will first automatically .B erase the chip, then write to it. @@ -65,14 +65,14 @@ recommended, you should only use it if you know what you are doing and if you feel that the time for verification takes too long. .sp Typical usage is: -.B "flashrom \-p prog \-n \-w <file>" +.B "flashrom \-p prog \-n \-w <imagefile>" .sp This option is only useful in combination with .BR \-\-write . .TP -.B "\-v, \-\-verify <file>" +.B "\-v, \-\-verify <imagefile>" Verify the flash ROM contents against the given -.BR <file> . +.BR <imagefile> . .TP .B "\-E, \-\-erase" Erase the flash ROM chip. @@ -102,46 +102,6 @@ size for the flash bus. .sp * Force write even if write is known bad. .TP -.B "\-l, \-\-layout <file>" -Read ROM layout from -.BR <file> . -.sp -flashrom supports ROM layouts. This allows you to flash certain parts of -the flash chip only. A ROM layout file contains multiple lines with the -following syntax: -.sp -.B " startaddr:endaddr imagename" -.sp -.BR "startaddr " "and " "endaddr " -are hexadecimal addresses within the ROM file and do not refer to any -physical address. Please note that using a 0x prefix for those hexadecimal -numbers is not necessary, but you can't specify decimal/octal numbers. -.BR "imagename " "is an arbitrary name for the region/image from" -.BR " startaddr " "to " "endaddr " "(both addresses included)." -.sp -Example: -.sp - 00000000:00008fff gfxrom - 00009000:0003ffff normal - 00040000:0007ffff fallback -.sp -If you only want to update the image named -.BR "normal " "in a ROM based on the layout above, run" -.sp -.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom" -.sp -To update only the images named -.BR "normal " "and " "fallback" ", run:" -.sp -.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom" -.sp -Overlapping sections are not supported. -.TP -.B "\-i, \-\-image <imagename>" -Only flash region/image -.B <imagename> -from flash layout. -.TP .B "\-L, \-\-list\-supported" List the flash chips, chipsets, mainboards, and external programmers (including PCI, USB, parallel port, and serial port based devices) @@ -226,6 +186,76 @@ Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER SPECIFIC INFO section. Support for some programmers can be disabled at compile time. +.TP +flashrom supports reading/writing/erasing/verifying flash chips in whole (default) or in part. To access only \ +parts of a chip one has to use layout files and respective arguments described below. +.TP +.B "\-l, \-\-layout <layoutfile>" +Read layout entries from +.BR <layoutfile> . +.sp +A layout file can contain comments which are +started by a pound sign (#) and causes all following characters on the same line to be ignored with one +exception: Every layout file +.B must +start with a comment in the following form to define the version of the file. Example for the current version 2: +.sp +.B " # flashrom layout v2" +.sp +Every other line may contain either a command to include another layout file, a layout entry or white space +(and an optional comment at the end). +.sp +To include another file you can use the +.sp +.B " source <path>" +.sp +syntax where +.B path +specifies the absolute or relative path to the file to be included. Relative paths are interpreted to be +relative to the file containing the include command. If the path contains spaces it has to be written in double +quotes, or else only the part before the first space will be used. +.sp +Each layout entry describes an address region of the flash chip and gives it a name (hereinafter referred to as +a region). One entry per line is allowed with the following syntax: +.sp +.B " startaddr:endaddr regionname" +.sp +.BR "startaddr " "and " "endaddr " +are addresses within the ROM image representing the flash ROM contents. They are interpreted in the 'usual' form +i.e.\ a leading 0 means octal, leading 0x or 0X means hexadecimal, everything else is just decimal. +.BR "regionname " "is the name for the region from " "startaddr " "to " "endaddr " "(both addresses included)." +If the name contains spaces it has to be written in double quotes, or else only the part before the first space +will be used. +.sp +Example content of file rom.layout: +.sp + # flashrom layout v2 + source /home/flashrom/include.layout + 0x00000000:0x00008fff "gfx rom" + 0x00009000:0x0003ffff normal + 0x00040000:0x0007ffff fallback +.sp +.TP +.B "\-i, \-\-include <name>[:<regionfile>]" +Work on the flash region +.B name +instead of the full address space if a layout file is given and parsed correctly. +Multiple such include parameters can be used to work on the union of different regions. +.sp +The optional +.B regionfile +parameter specifies the name of a file that is used to map the contents of that very region only. +The optional file parameter causes the contents of this region to be replaced by the contents of the file +specified here. +.sp +If you only want to update the regions named +.BR "normal " "and " "gfx rom " "in a ROM based on the layout mentioned above, run" +.sp +.B " flashrom \-p prog \-l rom.layout \-i normal -i ""gfx rom"" \-w some.rom" +.sp +Overlapping regions are resolved in an implementation-dependent manner (or may even yield an error) - do +.BR "not " "rely on it." +.sp .B "flashrom \-h" lists all supported programmers. .TP diff --git a/flashrom.c b/flashrom.c index 9169620..b98507c 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1165,8 +1165,7 @@ notfound: return chip - flashchips; } -int read_buf_from_file(unsigned char *buf, unsigned long size, - const char *filename) +int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename, const char *size_msg) { #ifdef __LIBPAYLOAD__ msg_gerr("Error: No file I/O support in libpayload\n"); @@ -1186,8 +1185,10 @@ int read_buf_from_file(unsigned char *buf, unsigned long size, return 1; } if (image_stat.st_size != size) { - msg_gerr("Error: Image size (%jd B) doesn't match the flash chip's size (%lu B)!\n", - (intmax_t)image_stat.st_size, size); + if (size_msg == NULL) + size_msg = "the expected size"; + msg_gerr("Error: Image size (%jd B) doesn't match %s (%lu B)!\n", + (intmax_t)image_stat.st_size, size_msg, size); fclose(image); return 1; } @@ -1962,7 +1963,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, } if (write_it || verify_it) { - if (read_buf_from_file(newcontents, size, filename)) { + if (read_buf_from_file(newcontents, size, filename, "the flash chip's size")) { ret = 1; goto out; } @@ -1995,9 +1996,12 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, } msg_cinfo("done.\n"); - // This should be moved into each flash part's code to do it - // cleanly. This does the job. - handle_romentries(flash, oldcontents, newcontents); + if (handle_romentries(flash, oldcontents, newcontents)) { + msg_gerr("Could not prepare the data to be written due to problems with the layout,\n" + "aborting.\n"); + ret = 1; + goto out; + } // //////////////////////////////////////////////////////////// diff --git a/helpers.c b/helpers.c new file mode 100644 index 0000000..ebb6f29 --- /dev/null +++ b/helpers.c @@ -0,0 +1,74 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include "flash.h" + +/** Parse a \em possibly quoted string. + * + * The function expects \a startp to point to the string to be parsed without a prefix. If the + * string starts with a quotation mark it looks for the second one and removes both in-place, if not then it + * looks for the first character contained in \a delimiters and ends the wanted string there by replacing the + * character with '\0'. If \a delimiters is NULL an empty set is assumed, hence the whole start string equals + * the wanted string. + * + * After returning \a startp will point to a string that is either the first quoted part of the + * original string with the quotation marks removed, or the first word of that string before any delimiter. + * If \a endp is not NULL it will be set to point to the first character after the parsed string, or to the + * '\0' at the end of the string pointed to by \a startp if there are no more subsequent characters. + * + * @param start Points to the input string. + * @param end Is set to the first char following the input string. + * @return -1 if a quotation mark is not matched, + * 0 on success, + * 1 if the parsed string is empty. + */ +int unquote_string(char **startp, char **endp, const char *delimiters) +{ + msg_gspew("unquoting \'%s\'\n", *startp); + char *end; + size_t len; + if (**startp == '"') { + (*startp)++; + len = strcspn(*startp, "\""); + if (*(*startp + len) != '"') + return -1; + + } else { + if (delimiters == NULL) + len = strlen(*startp); + else + len = strcspn(*startp, delimiters); + } + if (len == 0) { + *startp = '\0'; + return 1; + } + + end = *startp + len; + if (*end != '\0') { + *end = '\0'; + end++; + } + if (endp != NULL) + *endp = end; + msg_gspew("%s: start=\'%s\', end=\'%s\'\n", __func__, *startp, end); + return 0; +} diff --git a/layout.c b/layout.c index 86351b8..4d4f35c 100644 --- a/layout.c +++ b/layout.c @@ -33,6 +33,7 @@ typedef struct { unsigned int end; unsigned int included; char name[256]; + char *file; } romentry_t; /* rom_entries store the entries specified in a layout file and associated run-time data */ @@ -54,7 +55,7 @@ int read_romlayout(char *name) romlayout = fopen(name, "r"); if (!romlayout) { - msg_gerr("ERROR: Could not open ROM layout (%s).\n", + msg_gerr("ERROR: Could not open layout file (%s).\n", name); return -1; } @@ -63,8 +64,7 @@ int read_romlayout(char *name) char *tstr1, *tstr2; if (num_rom_entries >= MAX_ROMLAYOUT) { - msg_gerr("Maximum number of ROM images (%i) in layout " - "file reached.\n", MAX_ROMLAYOUT); + msg_gerr("Maximum number of entries (%i) in layout file reached.\n", MAX_ROMLAYOUT); return 1; } if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[num_rom_entries].name)) @@ -85,6 +85,7 @@ int read_romlayout(char *name) rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); rom_entries[num_rom_entries].included = 0; + rom_entries[num_rom_entries].file = NULL; num_rom_entries++; } @@ -138,14 +139,9 @@ int register_include_arg(char *name) static int find_romentry(char *name) { int i; - - if (num_rom_entries == 0) - return -1; - msg_gspew("Looking for region \"%s\"... ", name); for (i = 0; i < num_rom_entries; i++) { - if (!strcmp(rom_entries[i].name, name)) { - rom_entries[i].included = 1; + if (strcmp(rom_entries[i].name, name) == 0) { msg_gspew("found.\n"); return i; } @@ -167,25 +163,53 @@ int process_include_args(void) /* User has specified an area, but no layout file is loaded. */ if (num_rom_entries == 0) { - msg_gerr("Region requested (with -i \"%s\"), " - "but no layout data is available.\n", + msg_gerr("Region requested (with -i/--include \"%s\"),\n" + "but no layout data is available. To include one use the -l/--layout syntax).\n", include_args[0]); return 1; } for (i = 0; i < num_include_args; i++) { - if (find_romentry(include_args[i]) < 0) { - msg_gerr("Invalid region specified: \"%s\".\n", - include_args[i]); + char *file; + char *name = include_args[i]; + int ret = unquote_string(&name, &file, ":"); /* -i <region>[:<file>] */ + if (ret != 0) { + msg_gerr("Invalid include argument specified: \"%s\".\n", name); return 1; } + int idx = find_romentry(name); + if (idx < 0) { + msg_gerr("Invalid region name specified: \"%s\".\n", name); + return 1; + } + rom_entries[idx].included = 1; found++; + + if (file[0] == ':') { + file++; + /* The remaining characters are interpreted as possible quoted filename. */ + ret = unquote_string(&file, NULL, NULL); + if (ret != 0) { + msg_gerr("Invalid region file name specified: \"%s\".\n", file); + return 1; + } +#ifdef __LIBPAYLOAD__ + msg_gerr("Error: No file I/O support in libpayload\n"); + return 1; +#else + file = strdup(file); + if (file == NULL) { + msg_gerr("Out of memory!\n"); + return 1; + } + rom_entries[idx].file = file; +#endif + } } - msg_ginfo("Using region%s: \"%s\"", num_include_args > 1 ? "s" : "", - include_args[0]); - for (i = 1; i < num_include_args; i++) - msg_ginfo(", \"%s\"", include_args[i]); + msg_ginfo("Using region%s: \"%s\"", num_rom_entries > 1 ? "s" : "", rom_entries[0].name); + for (i = 1; i < num_rom_entries; i++) + msg_ginfo(", \"%s\"", rom_entries[i].name); msg_ginfo(".\n"); return 0; } @@ -200,6 +224,8 @@ void layout_cleanup(void) num_include_args = 0; for (i = 0; i < num_rom_entries; i++) { + free(rom_entries[i].file); + rom_entries[i].file = NULL; rom_entries[i].included = 0; } num_rom_entries = 0; @@ -259,6 +285,14 @@ int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_ if (entry->start > start) memcpy(newcontents + start, oldcontents + start, entry->start - start); + /* If a file name is specified for this region, read the file contents and + * overwrite @newcontents in the range specified by @entry. */ + if (entry->file != NULL) { + if (read_buf_from_file(newcontents + entry->start, entry->end - entry->start + 1, + entry->file, "the region's size") != 0) + return 1; + } + /* Skip to location after current romentry. */ start = entry->end + 1; /* Catch overflow. */ -- Kind regards, Stefan Tauner

1 0

[PATCH 0/2] layout patches 3.1 (first half)
by Stefan Tauner 19 Sep '13

19 Sep '13

Apart from the unquoting disput and possible wording problems, I hope this is closer to what we want. The removal of layout 1 parsing support did not really remove much code... I made a serious mistake when refining the whole patch set (and merged a few patches in there sometime ago without noticing before reworking a lot of stuff), so I hope I have cleaned that up correctly. If you see code in there that seems to have nothing to do with the actual patch then it is that - not insanity (neither on your nor my side). The unquoting function is moved to helpers.c and gets used in the -i patch already, because it makes sense there for really odd file names. It might also make sense for ROM file or log file names, I havent checked yet. Let's decide first if we want the function in general and which features it should have before anything else please. Finally, I refuse any responsibility for the new file exist check in convert_layout_v1_to_v2.sh, that's carldani's fault alone I just obeyed :P Stefan Tauner (2): layout: Add -i <region>[:<file>] support. layout: Better file parsing. Makefile | 2 +- cli_classic.c | 15 +- dummyflasher.c | 2 +- flash.h | 6 +- flashrom.8.tmpl | 130 ++++++++------ flashrom.c | 20 ++- helpers.c | 74 ++++++++ layout.c | 367 ++++++++++++++++++++++++++++++++-------- util/convert_layout_v1_to_v2.sh | 79 +++++++++ 9 files changed, 563 insertions(+), 132 deletions(-) create mode 100644 helpers.c create mode 100755 util/convert_layout_v1_to_v2.sh -- Kind regards, Stefan Tauner

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Re: [flashrom] [PATCH 2/4] layout: Add -i <image>[:<file>] support.
by Carl-Daniel Hailfinger 18 Sep '13

18 Sep '13

Am 12.09.2013 22:40 schrieb Stefan Tauner: > Add an optional sub-parameter to the -i parameter to allow building the > image to be written from multiple files. This will also allow regions to > be read from flash and written to separate image files in a later patch. > Document the whole layout handling including the new features a bit better. > > based on chromiumos' > d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8 > Signed-off-by: David Hendricks <dhendrix(a)chromium.org> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Double signoff. > --- > flashrom.8.tmpl | 47 +++++++++++++-------------- > flashrom.c | 8 +++-- > layout.c | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++------- > 3 files changed, 116 insertions(+), 37 deletions(-) See my other mail for the man page review. > diff --git a/flashrom.c b/flashrom.c > index a00347e..cd15de7 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -1993,9 +1993,11 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > } > msg_cinfo("done.\n"); > > - // This should be moved into each flash part's code to do it > - // cleanly. This does the job. > - handle_romentries(flash, oldcontents, newcontents); > + if (handle_romentries(flash, oldcontents, newcontents)) { Missing ret=1 > + msg_gerr("Could not prepare the data to be written due to problems with the layout,\n" > + "aborting.\n"); > + goto out; > + } > > // //////////////////////////////////////////////////////////// > > diff --git a/layout.c b/layout.c > index 86351b8..20fe303 100644 > --- a/layout.c > +++ b/layout.c > @@ -33,6 +38,7 @@ typedef struct { > unsigned int end; > unsigned int included; > char name[256]; > + char *file; > } romentry_t; > > /* rom_entries store the entries specified in a layout file and associated run-time data */ > @@ -85,6 +91,7 @@ int read_romlayout(char *name) > rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); > rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); That code wasn't changed, but should we use strtoul here instead? > rom_entries[num_rom_entries].included = 0; > + rom_entries[num_rom_entries].file = NULL; > num_rom_entries++; > } > > @@ -167,19 +169,36 @@ int process_include_args(void) > > /* User has specified an area, but no layout file is loaded. */ > if (num_rom_entries == 0) { > - msg_gerr("Region requested (with -i \"%s\"), " > - "but no layout data is available.\n", > + msg_gerr("Region requested (with -i/--image \"%s\"),\n" > + "but no layout data is available. To include one use the -l/--layout syntax).\n", > include_args[0]); > return 1; > } > > for (i = 0; i < num_include_args; i++) { > - if (find_romentry(include_args[i]) < 0) { > - msg_gerr("Invalid region specified: \"%s\".\n", > - include_args[i]); > + char *name = strtok(include_args[i], ":"); /* -i <image>[:<file>] */ Side note: We should state in the man page that ":" is not a valid character for region names. > + int idx = find_romentry(name); > + if (idx < 0) { > + msg_gerr("Invalid region specified: \"%s\".\n", include_args[i]); > return 1; > } > + rom_entries[idx].included = 1; > found++; > + > + char *file = strtok(NULL, ""); /* remaining non-zero length token or NULL */ > + if (file != NULL) { > +#ifdef __LIBPAYLOAD__ > + msg_gerr("Error: No file I/O support in libpayload\n"); > + return 1; > +#else > + file = strdup(file); > + if (file == NULL) { > + msg_gerr("Out of memory!\n"); > + return 1; > + } > + rom_entries[idx].file = file; > +#endif > + } > } > > msg_ginfo("Using region%s: \"%s\"", num_include_args > 1 ? "s" : "", > @@ -232,6 +253,57 @@ romentry_t *get_next_included_romentry(unsigned int start) > return best_entry; > } > > +/* If a file name is specified for this region, read the file contents and > + * overwrite @newcontents in the range specified by @entry. */ > +static int read_content_from_file(romentry_t *entry, uint8_t *newcontents) This whole function is a broken copypaste from read_buf_from_file() in flashrom.c. Please use the original function, and add additional parameters to it if needed. > +{ > + char *file = entry->file; > + if (file == NULL) > + return 0; > + > +#ifdef __LIBPAYLOAD__ > + msg_gerr("Error: No file I/O support in libpayload\n"); > + return 1; > +#else > + int len = entry->end - entry->start + 1; > + FILE *fp; > + if ((fp = fopen(file, "rb")) == NULL) { > + msg_gerr("Error: Opening layout image file \"%s\" failed: %s\n", file, strerror(errno)); "layout image"? Sorry, that name won't fly. > + return 1; > + } > + > + struct stat file_stat; > + if (fstat(fileno(fp), &file_stat) != 0) { > + msg_gerr("Error: Getting metadata of layout image file \"%s\" failed: %s\n", file, strerror(errno)); > + fclose(fp); > + return 1; > + } > + if (file_stat.st_size != len) { > + msg_gerr("Error: Image size (%jd B) doesn't match the flash chip's size (%d B)!\n", Somebody forgot to change the text here. > + (intmax_t)file_stat.st_size, len); > + fclose(fp); > + return 1; > + } > + > + int numbytes = fread(newcontents + entry->start, 1, len, fp); > + if (ferror(fp)) { > + msg_gerr("Error: Reading layout image file \"%s\" failed: %s\n", file, strerror(errno)); > + fclose(fp); > + return 1; > + } > + if (fclose(fp)) { > + msg_gerr("Error: Closing layout image file \"%s\" failed: %s\n", file, strerror(errno)); > + return 1; > + } > + if (numbytes != len) { > + msg_gerr("Error: Failed to read layout image file \"%s\" completely.\n" > + "Got %d bytes, wanted %d!\n", file, numbytes, len); > + return 1; > + } > + return 0; > +#endif > +} > + > int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) > { > unsigned int start = 0; > @@ -259,6 +331,10 @@ int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_ > if (entry->start > start) > memcpy(newcontents + start, oldcontents + start, > entry->start - start); > + /* For included region, copy from file if specified. */ > + if (read_content_from_file(entry, newcontents) != 0) > + return 1; I don't know if this behaviour is completely intended. AFAICS the following command line flashrom -r read.rom -l layout.txt -i region1:region1.bin will read the full flash chip, then replace the contents of region1 in the flash image with the contents of region1.bin, then write the combined image to disk. I don't have a problem with that, but I think it warrants thinking about it. > + > /* Skip to location after current romentry. */ > start = entry->end + 1; > /* Catch overflow. */ Looks good otherwise. Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 2/4] layout: Add -i <image>[:<file>] support.
by Stefan Tauner 17 Sep '13

17 Sep '13

On Tue, 17 Sep 2013 12:55:38 -0700 David Hendricks <dhendrix(a)google.com> wrote: > > As I tried to explain, I have no problem with the "region image" apart > > from the image/file ambiguity. "region image file" is totally fine with > > me. > > > > Be careful not to conflate the concept of an image with individual regions > (or maybe I already have). A region is simply an address range inside of an > image. A region is an address range inside a chip-size/full/ROM image. The thing that gets a name by the use of a layout file and which is selected by that name with an -i parameter. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 2/4] layout: Add -i <image>[:<file>] support.
by Carl-Daniel Hailfinger 17 Sep '13

17 Sep '13

Am 12.09.2013 22:40 schrieb Stefan Tauner: > Add an optional sub-parameter to the -i parameter to allow building the > image to be written from multiple files. This will also allow regions to > be read from flash and written to separate image files in a later patch. > Document the whole layout handling including the new features a bit better. > > based on chromiumos' > d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8 > Signed-off-by: David Hendricks <dhendrix(a)chromium.org> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> First review round, man page only. I want to get our terms right before the existing confusion gets worse. Code review follows in a separate mail. > --- > flashrom.8.tmpl | 47 +++++++++++++-------------- > flashrom.c | 8 +++-- > layout.c | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++------- > 3 files changed, 116 insertions(+), 37 deletions(-) > > diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl > index 5ede423..b1371e4 100644 > --- a/flashrom.8.tmpl > +++ b/flashrom.8.tmpl > @@ -6,7 +6,7 @@ flashrom \- detect, read, write, verify and erase flash chips > \fB\-p\fR <programmername>[:<parameters>] > [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>] \ > [\fB\-c\fR <chipname>] > - [\fB\-l\fR <file> [\fB\-i\fR <image>]] [\fB\-n\fR] [\fB\-f\fR]] > + [\fB\-l\fR <file> [\fB\-i\fR <image>[:<file>]]...] [\fB\-n\fR] [\fB\-f\fR]] The naming conflict between "image" (region) and "image file" (the file we write to or read from the flash chip) is very unfortunate. Unfortunately, we also lack good free single letters for a better name. While --region (instead of --image) would be a really good choice for the long option name, -r (read) and -R (revision/version) are already used and -i is an admittedly difficult association for --region. The new syntax also has one catch: You can't specify a separate file for a region without having that region actively written/read. While this won't be a problem for ordinary users, it might pose a problem for vendors like Google who want to use flashrom inside their firmware update process. Such update processes (at least when I look at the processes of other vendors) often do specify all files to source an image from, but they desire to select the to-be-written parts of the flash separately. Not sure if there is any practical relevance to this observation, though. David? > [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>] > .SH DESCRIPTION > .B flashrom > @@ -103,44 +103,45 @@ size for the flash bus. > * Force write even if write is known bad. > .TP > .B "\-l, \-\-layout <file>" > -Read ROM layout from > +Read layout entries from Do we want to call them "ROM layout", "flash layout" or simply "layout"? My preferences are 1. "ROM layout" 2. "flash layout". > .BR <file> . > .sp > -flashrom supports ROM layouts. This allows you to flash certain parts of > -the flash chip only. A ROM layout file contains multiple lines with the > -following syntax: > +A layout entry describes an address region of the flash chip and gives it a name. This allows to access certain > +parts of the flash chip only. A layout file can contain multiple entries one per line with the following syntax: I am not a native speaker, but the sentences above look odd. Suggested rewording : flashrom supports reading/writing/erasing flash chips in whole (default) or in part (when a ROM layout is given). Layouts are stored in layout files. A layout entry describes an address region/range in the virtual file representing the flash chip contents and assigns a name to that region. A layout file consists of one or more lines with the following syntax: > .sp > -.B " startaddr:endaddr imagename" > +.B " startaddr:endaddr regionname" > .sp > .BR "startaddr " "and " "endaddr " > -are hexadecimal addresses within the ROM file and do not refer to any > -physical address. Please note that using a 0x prefix for those hexadecimal > +are hexadecimal addresses within the ROM file representing the flash ROM contents. are hexadecimal addresses within the virtual file representing the flash chip contents > +Please note that using a 0x prefix for those hexadecimal > numbers is not necessary, but you can't specify decimal/octal numbers. > -.BR "imagename " "is an arbitrary name for the region/image from" > -.BR " startaddr " "to " "endaddr " "(both addresses included)." > +.BR "regionname " "is an arbitrary name for the region from " > +.BR "startaddr " "to " "endaddr " "(both addresses included)." > .sp > -Example: > +Example content of file rom.layout: > .sp > 00000000:00008fff gfxrom > 00009000:0003ffff normal > 00040000:0007ffff fallback We should use 0x prefixes in the example. That helps readability. > .sp > -If you only want to update the image named > -.BR "normal " "in a ROM based on the layout above, run" > -.sp > -.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom" > +.TP > +.B "\-i, \-\-image <name>[:<file>]" > +Work on the flash region > +.B name > +instead of the full address space if a layout file is given and parsed correctly. > +Multiple such image parameters can be used to include the union of different regions. s/include/work on/ > +The optional > +.B file > +parameter specifies the name of an image file that is used to map the contents of that very region only. "image file" naming again. > +This is useful for example if you want to write only a part of the flash chip and leave everything else alone > +without preparing an image of the complete chip manually: Uhh... sounds denglish. Suggested rewording: This allows replacing part of a ROM file with contents from another file before writing the resulting contents to the flash chip, eliminating the separate step of manually assembling a combined ROM image. > .sp > -To update only the images named > -.BR "normal " "and " "fallback" ", run:" > +If you only want to update the image named Plural from "images" was removed by accident. > +.BR "normal " "and " "fallback " "in a ROM based on the layout mentioned above, run" > .sp > .B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom" > .sp > -Overlapping sections are not supported. > -.TP > -.B "\-i, \-\-image <imagename>" > -Only flash region/image > -.B <imagename> > -from flash layout. > +.RB "Overlapping sections are resolved in an implementation-dependent manner - do " "not " "rely on it." I reserve the right to have flashrom error out on overlapping regions unless you can convince me such an error would be a bad idea. Suggested rewording: .RB "Overlapping region definitions are resolved in an implementation-dependent manner or may yield an error - do " "not " "rely on any observed flashrom behaviour." > .TP > .B "\-L, \-\-list\-supported" > List the flash chips, chipsets, mainboards, and external programmers Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 4/4] layout: Better file parsing.
by Carl-Daniel Hailfinger 17 Sep '13

17 Sep '13

[Incomplete review, more follows later. Please already respond to this so I can decide how to proceed with the review.] Am 12.09.2013 22:40 schrieb Stefan Tauner: > A complete rewrite of the layout file parser: > - safe (unlike before) > - support for comments > - supports including/sourcing of other layout files (relative to the including > file as well as via absolute paths) > - checks for duplicate region names (breaks inclusion loops too) > - can handle region names and layout file names with spaces correctly > - way better diagnostics > - no more character arrays in struct romentry_t but pointers only > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> General comments about the format: Can we change the first line slightly to # flashrom layout v2 and also mandate that region names may neither contain whitespace nor ":" now "#", please? I'd also like to drop support for v1 layouts as part of the switchover. There is a conversion script and thus no reason to support the old interface any more. The command line invocation changed anyway, so nobody will be able to reuse old commands, and then there's no point to reuse old layout files. This should reduce the amount of code needed. > flashrom.8.tmpl | 50 +++++--- > layout.c | 348 +++++++++++++++++++++++++++++++++++++++++++++++--------- > 2 files changed, 331 insertions(+), 67 deletions(-) > > diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl > index b1371e4..8793e91 100644 > --- a/flashrom.8.tmpl > +++ b/flashrom.8.tmpl > @@ -106,23 +106,46 @@ size for the flash bus. > Read layout entries from > .BR <file> . > .sp > -A layout entry describes an address region of the flash chip and gives it a name. This allows to access certain > -parts of the flash chip only. A layout file can contain multiple entries one per line with the following syntax: > +A layout file is useful for interacting with parts of a flash chip only. It can contain comments which are > +started by a pound sign (#) and causes all following characters on the same line to be ignored with one > +exception: Every layout file > +.B must > +start with a comment in the following form to define the version of the file. Example for the current version 2: > +.sp > +.B " # flashrom layout 2" > +.sp > +Every other line may contain either a command to include another layout file, a layout entry or white space > +(and an optional comment). > +.sp > +To include another file you can use the > +.sp > +.B " source <path>" > +.sp > +syntax where > +.B path > +specifies the absolute or relative path to the file to be included. Relative paths are interpreted to be > +relative to the file containing the include command. If the path contains spaces it has to be written in double > +quotes, or else only the part before the first space will be used. Ouch! Can we please either enforce double-quotes everywhere or nowhere? > +.sp > +Each layout entry describes an address region of the flash chip and gives it a name. One entry per line is > +allowed with the following syntax: > .sp > .B " startaddr:endaddr regionname" > .sp > .BR "startaddr " "and " "endaddr " > -are hexadecimal addresses within the ROM file representing the flash ROM contents. > -Please note that using a 0x prefix for those hexadecimal > -numbers is not necessary, but you can't specify decimal/octal numbers. > -.BR "regionname " "is an arbitrary name for the region from " > -.BR "startaddr " "to " "endaddr " "(both addresses included)." > +are addresses within the ROM file representing the flash ROM contents. They are interpreted in the 'usual' form > +i.e.\ a leading 0 means octal, leading 0x or 0X means hexadecimal, everything else is just decimal. Octal support is a really bad idea IMHO. Especially when people try to align numbers by adding leading zeros. > +.BR "regionname " "is the name for the region from " "startaddr " "to " "endaddr " "(both addresses included)." > +If the name contains spaces it has to be written in double quotes, or else only the part before the first space > +will be used. > .sp > Example content of file rom.layout: > .sp > - 00000000:00008fff gfxrom > - 00009000:0003ffff normal > - 00040000:0007ffff fallback > + # flashrom layout 2 > + source /home/flashrom/include.layout > + 0x00000000:0x00008fff "gfx rom" > + 0x00009000:0x0003ffff normal > + 0x00040000:0x0007ffff fallback > .sp > .TP > .B "\-i, \-\-image <name>[:<file>]" > @@ -136,10 +159,11 @@ parameter specifies the name of an image file that is used to map the contents o > This is useful for example if you want to write only a part of the flash chip and leave everything else alone > without preparing an image of the complete chip manually: > .sp > -If you only want to update the image named > -.BR "normal " "and " "fallback " "in a ROM based on the layout mentioned above, run" > +If you only want to update the regions named > +.BR "normal " "and " "gfx rom " "in a ROM based on the layout mentioned above, run" > .sp > -.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom" > + > +.B " flashrom \-p prog \-l rom.layout \-i normal -i ""gfx rom"" \-w some.rom" > .sp > .RB "Overlapping sections are resolved in an implementation-dependent manner - do " "not " "rely on it." > .TP BIG FAT NOTE: The review below is of a patch which had the deleted lines stripped out to improve readability (the patch was almost unreadable due to code moves). > diff --git a/layout.c b/layout.c > index 20fe303..5b4bee4 100644 > --- a/layout.c > +++ b/layout.c > @@ -22,9 +22,11 @@ > #include <stdio.h> > #include <stdlib.h> > #include <string.h> > +#include <ctype.h> > #include <limits.h> > #include <errno.h> > #ifndef __LIBPAYLOAD__ > +#include <libgen.h> Not available on Windows AFAICS. > #include <fcntl.h> > #include <sys/stat.h> > #endif > @@ -32,12 +34,15 @@ > #include "programmer.h" > > #define MAX_ROMLAYOUT 32 > +#define MAX_ENTRY_LEN 1024 > +#define WHITESPACE_CHARS " \t" > +#define INCLUDE_INSTR "source" > > typedef struct { > unsigned int start; > unsigned int end; > unsigned int included; > - char name[256]; > + char *name; > char *file; > } romentry_t; > > @@ -50,59 +55,307 @@ static int num_rom_entries = 0; /* the number of valid rom_entries */ > static char *include_args[MAX_ROMLAYOUT]; > static int num_include_args = 0; /* the number of valid include_args. */ > > +/* returns the index of the entry (or a negative value if it is not found) */ > +static int find_romentry(char *name) > { > int i; > + msg_gspew("Looking for region \"%s\"... ", name); > + for (i = 0; i < num_rom_entries; i++) { > + if (strcmp(rom_entries[i].name, name) == 0) { > + msg_gspew("found.\n"); > + return i; > + } > + } > + msg_gspew("not found.\n"); > + return -1; > +} > > +/* FIXME: While libpayload has no file I/O itself, code using libflashrom could still provide layout information > + * obtained by other means like user input or by fetching it from somewhere else. Therefore the parsing code > + * should be separated from the file reading code eventually. */ > +#ifndef __LIBPAYLOAD__ > +/** Parse a \em possibly quoted string. > + * > + * The function expects \a startp to point to the string to be parsed without leading white space. If the > + * string starts with a quotation mark it looks for the second one and removes both in-place, if not then it > + * looks for the first white space character and uses that as delimiter of the wanted string. > + * After returning \a startp will point to a string that is either the original string with the quotation marks > + * removed, or the first word of that string before a white space. > + * If \a endp is not NULL it will be set to point to the first character after the parsed string, which might > + * well be the '\0' at the end of the string pointed to by \a startp if there are no more characters. > + * > + * @param start Points to the input string. > + * @param end Is set to the first char following the input string. > + * @return 0 on success, 1 if the parsed string is empty or a quotation mark is not matched. > + */ > +static int unquote_string(char **startp, char **endp) If we disallow spaces in region names and if we make include file names either always-quoted or never-quoted, this complete function can die. > +{ > + char *end; > + size_t len; > + if (**startp == '"') { > + (*startp)++; > + len = strcspn(*startp, "\""); > + } else { > + len = strcspn(*startp, WHITESPACE_CHARS); > + } > + if (len == 0) > + return 1; > > + end = *startp + len; > + if (*end != '\0') { > + *end = '\0'; > + end++; > } > + if (endp != NULL) > + *endp = end; > + msg_gspew("%s: start=\"%s\", end=\"%s\"\n", __func__, *startp, end); > + return 0; > +} > > +/** Parse one line in a layout file. > + * @param file_name The name of the file this line originates from. > + * @param file_version The version of the layout specification to be used. Only v2, please. > + * @param entry If not NULL fill it with the parsed data, else just detect errors and print diagnostics. > + * @return 1 on error, > + * 0 if the line could be parsed into a layout entry succesfully, > + * -1 if a file was successfully sourced. Very odd choice of return codes. Negative values are usually associated with errors. -- http://www.hailfinger.org/

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Here's my flashrom-V to help support my motherboard/chipset/flash chip s-io...
by Joshua Gnitecki 16 Sep '13

16 Sep '13

[root@manjaro joshuag]# flashrom --programmer internal --chip W25Q80.V -V flashrom v0.9.7-r1711 on Linux 3.4.61-1-MANJARO (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, GCC 4.8.1 20130725 (prerelease), little endian Command line (5 args): flashrom --programmer internal --chip W25Q80.V -V Calibrating delay loop... OS timer resolution is 1 usecs, 1405M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 9998 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "s5500z" DMI string system-version: " " DMI string baseboard-manufacturer: "PEGATRON CORPORATION" DMI string baseboard-product-name: "2A99" DMI string baseboard-version: "6.01" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 Mapping NVIDIA MCP6x SPI at 0x00000000fec80000, unaligned size 0x544. SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. The following protocols are supported: SPI. Probing for Winbond W25Q80.V, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) at physical address 0xfff00000. Chip status register is 0x00. This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). No operations were specified. -- I'm jmon...live in Austin, TX.

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2A99 Motherboard flashrom -V puked-out!
by Joshua Gnitecki 15 Sep '13

15 Sep '13

Here's my flashrom-V to help support my motherboard/chipset/flash chip s-io... [root@manjaro joshuag]# flashrom --programmer internal --chip W25Q80.V -V flashrom v0.9.7-r1711 on Linux 3.4.61-1-MANJARO (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, GCC 4.8.1 20130725 (prerelease), little endian Command line (5 args): flashrom --programmer internal --chip W25Q80.V -V Calibrating delay loop... OS timer resolution is 1 usecs, 1405M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 9998 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "s5500z" DMI string system-version: " " DMI string baseboard-manufacturer: "PEGATRON CORPORATION" DMI string baseboard-product-name: "2A99" DMI string baseboard-version: "6.01" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 Mapping NVIDIA MCP6x SPI at 0x00000000fec80000, unaligned size 0x544. SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. The following protocols are supported: SPI. Probing for Winbond W25Q80.V, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) at physical address 0xfff00000. Chip status register is 0x00. This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). No operations were specified. -- I'm jmon...live in Austin, TX.

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Re: [flashrom] [PATCH 3/4] util: add script for converting legacy layout files to format 2.
by Carl-Daniel Hailfinger 15 Sep '13

15 Sep '13

Am 12.09.2013 22:40 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Is this patch (3/4) targeting the layout files used by flashrom after 4/4 in this series is in? If yes, we should switch order between 3/4 and 4/4. Review follows later. Regards, Carl-Daniel -- http://www.hailfinger.org/

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