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[commit] r1814 - trunk
by repository service 02 Jun '14

02 Jun '14

Author: stefanct Date: Mon Jun 2 02:12:23 2014 New Revision: 1814 URL: http://flashrom.org/trac/flashrom/changeset/1814 Log: Add default arguments for the default programmer (only). This code exists thanks to food for thought from Urja Rannikko. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile trunk/cli_classic.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Mon Jun 2 01:49:03 2014 (r1813) +++ trunk/Makefile Mon Jun 2 02:12:23 2014 (r1814) @@ -52,6 +52,11 @@ # evaluated below, namely those that enable/disable the various programmers). # Compilation will fail for unspecified values. CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INVALID +# The following adds a default parameter for the default programmer set above (only). +CONFIG_DEFAULT_PROGRAMMER_ARGS ?= '' +# Example: compiling with +# make CONFIG_DEFAULT_PROGRAMMER=PROGRAMMER_SERPROG CONFIG_DEFAULT_PROGRAMMER_ARGS="dev=/dev/ttyUSB0:1500000" +# would make executing './flashrom' (almost) equivialent to './flashrom -p serprog:dev=/dev/ttyUSB0:1500000'. # If your compiler spits out excessive warnings, run make WARNERROR=no # You shouldn't have to change this flag. @@ -487,6 +492,7 @@ # Depending on the CONFIG_* variables set and verified above we set compiler flags and parameters below. FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER=$(CONFIG_DEFAULT_PROGRAMMER)' +FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER_ARGS="$(CONFIG_DEFAULT_PROGRAMMER_ARGS)"' ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Mon Jun 2 01:49:03 2014 (r1813) +++ trunk/cli_classic.c Mon Jun 2 02:12:23 2014 (r1814) @@ -396,8 +396,10 @@ if (prog == PROGRAMMER_INVALID) { if (CONFIG_DEFAULT_PROGRAMMER != PROGRAMMER_INVALID) { prog = CONFIG_DEFAULT_PROGRAMMER; - msg_pinfo("Using default programmer \"%s\".\n", - programmer_table[CONFIG_DEFAULT_PROGRAMMER].name); + /* We need to strdup here because we free(pparam) unconditionally later. */ + pparam = strdup(CONFIG_DEFAULT_PROGRAMMER_ARGS); + msg_pinfo("Using default programmer \"%s\" with arguments \"%s\".\n", + programmer_table[CONFIG_DEFAULT_PROGRAMMER].name, pparam); } else { msg_perr("Please select a programmer with the --programmer parameter.\n" "Previously this was not necessary because there was a default set.\n"

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Re: [flashrom] [PATCH 2/2] Move global io_base_addr into compilation units.
by Carl-Daniel Hailfinger 02 Jun '14

02 Jun '14

Am 02.06.2014 00:43 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Thanks for your patch. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 1/2] Add IT8212F as programmer.
by Carl-Daniel Hailfinger 02 Jun '14

02 Jun '14

Am 02.06.2014 00:43 schrieb Stefan Tauner: > This PCI PATA controller can use 3V parallel flash up to 128 kB. > > My card was identified as: > PCI 1283:8212, subsystem 1283:0001. > > and labelled as: > Innovision Multimedia LTD. > EIO ATA133 RAID > (DM-8401 Ver A) > > This particular card did not require setting of any GPIO signals to > enable flash writing. My card has Pm39LV512 in PLCC32 package without > socket. > > Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Looks good, thanks for your patch! Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1813 - trunk
by repository service 02 Jun '14

02 Jun '14

Author: stefanct Date: Mon Jun 2 01:49:03 2014 New Revision: 1813 URL: http://flashrom.org/trac/flashrom/changeset/1813 Log: Move global io_base_addr into compilation units. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/atahpt.c trunk/gfxnvidia.c trunk/it8212.c trunk/nic3com.c trunk/nicintel_spi.c trunk/nicnatsemi.c trunk/nicrealtek.c trunk/ogp_spi.c trunk/pcidev.c trunk/programmer.h Modified: trunk/atahpt.c ============================================================================== --- trunk/atahpt.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/atahpt.c Mon Jun 2 01:49:03 2014 (r1813) @@ -33,6 +33,8 @@ #define PCI_VENDOR_ID_HPT 0x1103 +static uint32_t io_base_addr = 0; + const struct dev_entry ata_hpt[] = { {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"}, {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"}, Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/gfxnvidia.c Mon Jun 2 01:49:03 2014 (r1813) @@ -89,7 +89,7 @@ if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; Modified: trunk/it8212.c ============================================================================== --- trunk/it8212.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/it8212.c Mon Jun 2 01:49:03 2014 (r1813) @@ -59,7 +59,7 @@ return 1; /* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */ - io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; + uint32_t io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; if (!io_base_addr) return 1; Modified: trunk/nic3com.c ============================================================================== --- trunk/nic3com.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/nic3com.c Mon Jun 2 01:49:03 2014 (r1813) @@ -33,6 +33,7 @@ #define PCI_VENDOR_ID_3COM 0x10b7 +static uint32_t io_base_addr = 0; static uint32_t internal_conf; static uint16_t id; Modified: trunk/nicintel_spi.c ============================================================================== --- trunk/nicintel_spi.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/nicintel_spi.c Mon Jun 2 01:49:03 2014 (r1813) @@ -179,7 +179,7 @@ if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; Modified: trunk/nicnatsemi.c ============================================================================== --- trunk/nicnatsemi.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/nicnatsemi.c Mon Jun 2 01:49:03 2014 (r1813) @@ -30,6 +30,7 @@ #define BOOT_ROM_ADDR 0x50 #define BOOT_ROM_DATA 0x54 +static uint32_t io_base_addr = 0; const struct dev_entry nics_natsemi[] = { {0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"}, {0x100b, 0x0022, NT, "National Semiconductor", "DP83820"}, Modified: trunk/nicrealtek.c ============================================================================== --- trunk/nicrealtek.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/nicrealtek.c Mon Jun 2 01:49:03 2014 (r1813) @@ -28,6 +28,7 @@ #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_VENDOR_ID_SMC1211 0x1113 +static uint32_t io_base_addr = 0; static int bios_rom_addr, bios_rom_data; const struct dev_entry nics_realtek[] = { Modified: trunk/ogp_spi.c ============================================================================== --- trunk/ogp_spi.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/ogp_spi.c Mon Jun 2 01:49:03 2014 (r1813) @@ -132,7 +132,7 @@ if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/pcidev.c Mon Jun 2 01:49:03 2014 (r1813) @@ -25,7 +25,6 @@ #include "programmer.h" #include "hwaccess.h" -uint32_t io_base_addr; struct pci_access *pacc; enum pci_bartype { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Mon Jun 2 01:48:31 2014 (r1812) +++ trunk/programmer.h Mon Jun 2 01:49:03 2014 (r1813) @@ -173,8 +173,7 @@ struct pci_dev; /* pcidev.c */ -// FIXME: These need to be local, not global -extern uint32_t io_base_addr; +// FIXME: This needs to be local, not global(?) extern struct pci_access *pacc; int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);

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[commit] r1812 - trunk
by repository service 02 Jun '14

02 Jun '14

Author: stefanct Date: Mon Jun 2 01:48:31 2014 New Revision: 1812 URL: http://flashrom.org/trac/flashrom/changeset/1812 Log: Add IT8212F as programmer. This PCI PATA controller can use 3V parallel flash up to 128 kB. My card was identified as: PCI 1283:8212, subsystem 1283:0001. and labelled as: Innovision Multimedia LTD. EIO ATA133 RAID (DM-8401 Ver A) This particular card did not require setting of any GPIO signals to enable flash writing. My card has Pm39LV512 in PLCC32 package without socket. Rebased by Stefan (automatic cleanup, some PCI changes, changed enable bit handling). Committed with test state NT because the rebased version was not tested on real hardware (yet). Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: trunk/it8212.c (contents, props changed) Modified: trunk/Makefile trunk/flashrom.8.tmpl trunk/flashrom.c trunk/programmer.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Mon Jun 2 00:36:30 2014 (r1811) +++ trunk/Makefile Mon Jun 2 01:48:31 2014 (r1812) @@ -197,6 +197,11 @@ else override CONFIG_ATAVIA = no endif +ifeq ($(CONFIG_IT8212), yes) +UNSUPPORTED_FEATURES += CONFIG_IT8212=yes +else +override CONFIG_IT8212 = no +endif ifeq ($(CONFIG_DRKAISER), yes) UNSUPPORTED_FEATURES += CONFIG_DRKAISER=yes else @@ -431,6 +436,9 @@ # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +# Always enable ITE IT8212F PATA controllers for now. +CONFIG_IT8212 ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -549,6 +557,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_IT8212), yes) +FEATURE_CFLAGS += -D'CONFIG_IT8212=1' +PROGRAMMER_OBJS += it8212.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_FT2232_SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'CONFIG_FT2232_SPI=1'") Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Mon Jun 2 00:36:30 2014 (r1811) +++ trunk/flashrom.8.tmpl Mon Jun 2 01:48:31 2014 (r1812) @@ -194,6 +194,8 @@ .sp .BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)" .sp +.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)" +.sp .BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family \ based USB SPI programmer), including the DLP Design DLP-USB1232H, \ FTDI FT2232H Mini-Module, FTDI FT4232H Mini-Module, openbiosprog-spi, Amontec \ @@ -591,7 +593,7 @@ .SS .BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel"\ , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\ -, " satamv" , " atahpt" ", and " atavia " programmers +, " satamv" , " atahpt" ", " atavia " and " it8212 " programmers These programmers have an option to specify the PCI address of the card your want to use, which must be specified if more than one card supported by the selected programmer is installed in your system. The syntax is @@ -914,7 +916,7 @@ .B atahpt needs PCI configuration space access and raw I/O port access. .sp -.BR gfxnvidia " and " drkaiser +.BR gfxnvidia ", " drkaiser " and " it8212 need PCI configuration space access and raw memory access. .sp .B rayer_spi Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Mon Jun 2 00:36:30 2014 (r1811) +++ trunk/flashrom.c Mon Jun 2 01:48:31 2014 (r1812) @@ -184,6 +184,18 @@ }, #endif +#if CONFIG_IT8212 == 1 + { + .name = "it8212", + .type = PCI, + .devs.dev = devs_it8212, + .init = it8212_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_FT2232_SPI == 1 { .name = "ft2232_spi", Added: trunk/it8212.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/it8212.c Mon Jun 2 01:48:31 2014 (r1812) @@ -0,0 +1,86 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +static uint8_t *it8212_bar = NULL; + +#define PCI_VENDOR_ID_ITE 0x1283 + +const struct dev_entry devs_it8212[] = { + {PCI_VENDOR_ID_ITE, 0x8212, OK, "ITE", "8212F PATA RAID"}, + + {}, +}; + +#define IT8212_MEMMAP_SIZE (128 * 1024) +#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1) + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr); +static const struct par_programmer par_programmer_it8212 = { + .chip_readb = it8212_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = it8212_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +int it8212_init(void) +{ + if (rget_io_perms()) + return 1; + + struct pci_dev *dev = pcidev_init(devs_it8212, PCI_ROM_ADDRESS); + if (!dev) + return 1; + + /* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */ + io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; + if (!io_base_addr) + return 1; + + it8212_bar = rphysmap("IT8212F flash", io_base_addr, IT8212_MEMMAP_SIZE); + if (it8212_bar == ERROR_PTR) + return 1; + + /* Restore ROM BAR decode state automatically at shutdown. */ + rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01); + + max_rom_decode.parallel = IT8212_MEMMAP_SIZE; + register_par_programmer(&par_programmer_it8212, BUS_PARALLEL); + return 0; +} + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) +{ + pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} + +static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr) +{ + return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Mon Jun 2 00:36:30 2014 (r1811) +++ trunk/programmer.h Mon Jun 2 01:48:31 2014 (r1812) @@ -57,6 +57,9 @@ #if CONFIG_ATAVIA == 1 PROGRAMMER_ATAVIA, #endif +#if CONFIG_IT8212 == 1 + PROGRAMMER_IT8212, +#endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif @@ -444,6 +447,12 @@ extern const struct dev_entry ata_via[]; #endif +/* it8212.c */ +#if CONFIG_IT8212 == 1 +int it8212_init(void); +extern const struct dev_entry devs_it8212[]; +#endif + /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 int ft2232_spi_init(void);

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[PATCH 2/2] Move global io_base_addr into compilation units.
by Stefan Tauner 02 Jun '14

02 Jun '14

Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- atahpt.c | 2 ++ gfxnvidia.c | 2 +- it8212.c | 2 +- nic3com.c | 1 + nicintel_spi.c | 2 +- nicnatsemi.c | 1 + nicrealtek.c | 1 + ogp_spi.c | 2 +- pcidev.c | 1 - programmer.h | 3 +-- 10 files changed, 10 insertions(+), 7 deletions(-) diff --git a/atahpt.c b/atahpt.c index 242e14a..edffa3b 100644 --- a/atahpt.c +++ b/atahpt.c @@ -33,6 +33,8 @@ #define PCI_VENDOR_ID_HPT 0x1103 +static uint32_t io_base_addr = 0; + const struct dev_entry ata_hpt[] = { {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"}, {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"}, diff --git a/gfxnvidia.c b/gfxnvidia.c index d3ee14e..2a5c7ae 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -89,7 +89,7 @@ int gfxnvidia_init(void) if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; diff --git a/it8212.c b/it8212.c index f68121a..4d1c403 100644 --- a/it8212.c +++ b/it8212.c @@ -59,7 +59,7 @@ int it8212_init(void) return 1; /* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */ - io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; + uint32_t io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; if (!io_base_addr) return 1; diff --git a/nic3com.c b/nic3com.c index 27e28c7..145554d 100644 --- a/nic3com.c +++ b/nic3com.c @@ -33,6 +33,7 @@ #define PCI_VENDOR_ID_3COM 0x10b7 +static uint32_t io_base_addr = 0; static uint32_t internal_conf; static uint16_t id; diff --git a/nicintel_spi.c b/nicintel_spi.c index 1522c9b..25bfa8f 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -179,7 +179,7 @@ int nicintel_spi_init(void) if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; diff --git a/nicnatsemi.c b/nicnatsemi.c index cb8da6d..acefddb 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -30,6 +30,7 @@ #define BOOT_ROM_ADDR 0x50 #define BOOT_ROM_DATA 0x54 +static uint32_t io_base_addr = 0; const struct dev_entry nics_natsemi[] = { {0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"}, {0x100b, 0x0022, NT, "National Semiconductor", "DP83820"}, diff --git a/nicrealtek.c b/nicrealtek.c index 02fbd39..4a440ea 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -28,6 +28,7 @@ #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_VENDOR_ID_SMC1211 0x1113 +static uint32_t io_base_addr = 0; static int bios_rom_addr, bios_rom_data; const struct dev_entry nics_realtek[] = { diff --git a/ogp_spi.c b/ogp_spi.c index 23431d1..a624dfd 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -132,7 +132,7 @@ int ogp_spi_init(void) if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; diff --git a/pcidev.c b/pcidev.c index 3a3f77c..2c78063 100644 --- a/pcidev.c +++ b/pcidev.c @@ -25,7 +25,6 @@ #include "programmer.h" #include "hwaccess.h" -uint32_t io_base_addr; struct pci_access *pacc; enum pci_bartype { diff --git a/programmer.h b/programmer.h index 3ea014c..d299656 100644 --- a/programmer.h +++ b/programmer.h @@ -173,8 +173,7 @@ struct bitbang_spi_master { struct pci_dev; /* pcidev.c */ -// FIXME: These need to be local, not global -extern uint32_t io_base_addr; +// FIXME: This needs to be local, not global(?) extern struct pci_access *pacc; int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); -- Kind regards, Stefan Tauner

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[PATCH] Add IT8212F as programmer
by Kyösti Mälkki 02 Jun '14

02 Jun '14

This PCI PATA controller can use 3V parallel flash upto 128kB. My card was identified as: PCI 1283:8212, subsystem 1283:0001. and labelled as: Innovision Multimedia LTD. EIO ATA133 RAID (DM-8401 Ver A) This particular card did not require setting of any GPIO signals to enable flash writing. My card has Pm39LV512 in PLCC32 package without socket. Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Index: flashrom-it8212f/Makefile =================================================================== --- flashrom-it8212f/Makefile (revision 1539) +++ flashrom-it8212f/Makefile (working copy) @@ -177,7 +177,12 @@ else override CONFIG_SATAMV = no endif +ifeq ($(CONFIG_IT8212), yes) +UNSUPPORTED_FEATURES += CONFIG_IT8212=yes +else +override CONFIG_IT8212 = no endif +endif ifeq ($(TARGET_OS), libpayload) CPPFLAGS += -DSTANDALONE @@ -344,6 +349,9 @@ # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +# Always enable ITE IT8212F PATA controllers for now. +CONFIG_IT8212 ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -503,6 +511,12 @@ PROGRAMMER_OBJS += linux_spi.o endif +ifeq ($(CONFIG_IT8212), yes) +FEATURE_CFLAGS += -D'CONFIG_IT8212=1' +PROGRAMMER_OBJS += it8212.o +NEED_PCI := yes +endif + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Index: flashrom-it8212f/print_wiki.c =================================================================== --- flashrom-it8212f/print_wiki.c (revision 1539) +++ flashrom-it8212f/print_wiki.c (working copy) @@ -338,6 +338,9 @@ #if CONFIG_SATAMV == 1 print_supported_pcidevs_wiki(satas_mv); #endif +#if CONFIG_IT8212 == 1 + print_supported_pcidevs_wiki(ata_it82); +#endif printf("\n|}\n"); } Index: flashrom-it8212f/it8212.c =================================================================== --- flashrom-it8212f/it8212.c (revision 0) +++ flashrom-it8212f/it8212.c (revision 0) @@ -0,0 +1,110 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include "flash.h" +#include "programmer.h" + +static uint8_t *it8212_bar; +static uint8_t it8212_rom_enable = 0; + +#define PCI_VENDOR_ID_ITE 0x1283 + +const struct pcidev_status ata_it82[] = { + {PCI_VENDOR_ID_ITE, 0x8212, OK, "ITE", "8212F PATA RAID"}, + {}, +}; + +#define IT8212_MEMMAP_SIZE (128 * 1024) +#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1) + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr); +static const struct par_programmer par_programmer_it8212 = { + .chip_readb = it8212_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = it8212_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static int it8212_shutdown(void *data) +{ + if (! it8212_rom_enable) { + uintptr_t addr = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr & ~0x01); + } + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +int it8212_init(void) +{ + uintptr_t addr; + + /* Needed only for PCI accesses on some platforms. + * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + */ + get_io_perms(); + + /* No need to check for errors, pcidev_init() will not return in case + * of errors. + */ + addr = pcidev_init(PCI_ROM_ADDRESS, ata_it82); + + it8212_bar = physmap("IT8212F flash", addr, IT8212_MEMMAP_SIZE); + if (it8212_bar == ERROR_PTR) + goto error_out_unmap; + if (register_shutdown(it8212_shutdown, NULL)) + return 1; + + /* To restore ROM BAR enable once we are done. */ + it8212_rom_enable = addr & 0x01; + if (! it8212_rom_enable) + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr | 0x01); + + max_rom_decode.parallel = IT8212_MEMMAP_SIZE; + register_par_programmer(&par_programmer_it8212, BUS_PARALLEL); + return 0; + +error_out_unmap: + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 1; +} + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) +{ + pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} + +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr) +{ + return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} Index: flashrom-it8212f/flashrom.c =================================================================== --- flashrom-it8212f/flashrom.c (revision 1539) +++ flashrom-it8212f/flashrom.c (working copy) @@ -261,6 +261,16 @@ }, #endif +#if CONFIG_IT8212 == 1 + { + .name = "it8212", + .init = it8212_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Index: flashrom-it8212f/programmer.h =================================================================== --- flashrom-it8212f/programmer.h (revision 1539) +++ flashrom-it8212f/programmer.h (working copy) @@ -87,6 +87,9 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +#if CONFIG_IT8212 == 1 + PROGRAMMER_IT8212, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -456,6 +459,12 @@ int linux_spi_init(void); #endif +/* it8212.c */ +#if CONFIG_IT8212 == 1 +int it8212_init(void); +extern const struct pcidev_status ata_it82[]; +#endif + /* dediprog.c */ #if CONFIG_DEDIPROG == 1 int dediprog_init(void); Index: flashrom-it8212f/print.c =================================================================== --- flashrom-it8212f/print.c (revision 1539) +++ flashrom-it8212f/print.c (working copy) @@ -538,6 +538,11 @@ programmer_table[PROGRAMMER_LINUX_SPI].name); msg_ginfo("Device files /dev/spidev*.*\n"); #endif +#if CONFIG_IT8212 == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_IT8212].name); + print_supported_pcidevs(ata_it82); +#endif } #if CONFIG_INTERNAL == 1

2 3

[commit] r1811 - trunk
by repository service 02 Jun '14

02 Jun '14

Author: stefanct Date: Mon Jun 2 00:36:30 2014 New Revision: 1811 URL: http://flashrom.org/trac/flashrom/changeset/1811 Log: atavia: Fix a few problems overlooked/introduced while rebasing. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/Makefile trunk/atavia.c trunk/flashrom.8.tmpl Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Jun 1 15:22:35 2014 (r1810) +++ trunk/Makefile Mon Jun 2 00:36:30 2014 (r1811) @@ -325,11 +325,6 @@ else override CONFIG_ATAHPT = no endif -ifeq ($(CONFIG_ATAVIA), yes) -UNSUPPORTED_FEATURES += CONFIG_ATAVIA=yes -else -override CONFIG_ATAVIA = no -endif ifeq ($(CONFIG_SATAMV), yes) UNSUPPORTED_FEATURES += CONFIG_SATAMV=yes else Modified: trunk/atavia.c ============================================================================== --- trunk/atavia.c Sun Jun 1 15:22:35 2014 (r1810) +++ trunk/atavia.c Mon Jun 2 00:36:30 2014 (r1811) @@ -72,7 +72,7 @@ }; static void *atavia_offset = NULL; -struct pci_dev *dev = NULL; +static struct pci_dev *dev = NULL; static void atavia_prettyprint_access(uint8_t access) { @@ -118,7 +118,7 @@ return ready; } -void *atavia_map(const char *descr, unsigned long phys_addr, size_t len) +void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len) { return (atavia_offset != 0) ? atavia_offset : (void *)phys_addr; } @@ -146,7 +146,6 @@ if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ dev = pcidev_init(ata_via, PCI_ROM_ADDRESS); /* Acutally no BAR setup needed at all. */ if (!dev) return 1; @@ -172,7 +171,7 @@ static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, const chipaddr addr) { - msg_pspew("%s: 0x%02x to 0x%08lx.\n", __func__, val, addr); + msg_pspew("%s: 0x%02x to 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr); pci_write_long(dev, BROM_ADDR, (addr & ~3)); pci_write_long(dev, BROM_DATA, val << BYTE_OFFSET(addr)); pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); @@ -192,6 +191,6 @@ } uint8_t val = (pci_read_long(dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; - msg_pspew("%s: 0x%02x from 0x%08lx.\n", __func__, val, addr); + msg_pspew("%s: 0x%02x from 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr); return val; } Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Sun Jun 1 15:22:35 2014 (r1810) +++ trunk/flashrom.8.tmpl Mon Jun 2 00:36:30 2014 (r1811) @@ -192,7 +192,7 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp -.BR "* atavia" " (for flash ROMs on VIA VT6421A ATA controllers)" +.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)" .sp .BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family \ based USB SPI programmer), including the DLP Design DLP-USB1232H, \

1 0

PMC25LV010E
by The Raven 01 Jun '14

01 Jun '14

Hello, i have here an "PMC25LV010E" which is not recognized by flashrom. I am no sure whats the difference between "PMC25LV010" and "E". The log is attached, maybe it's only another ID? And i have an "Pm25LV010" here which is recognized as "Pm25LV010A". Maybe is the Description vice verse? If you need more logs or something else, let me know.

2 7

Re: [flashrom] [Patch] Add support for Atmel AT25DL161
by Stefan Tauner 01 Jun '14

01 Jun '14

On Mon, 17 Mar 2014 14:39:14 +0800 Allen Yan <lexkde(a)gmail.com> wrote: > This patch adds support for Atmel AT25DL161, 2Mbytes SPI flash which look > like the low voltage version of Atmel AT25DQ161. It has no pre test for now. Hello Allen, thanks for your patch! Please note that before we can include your patch you need to sign the Developer's Certificate of Origin by stating so in the patch/email. We can not include your patch as is! Please read http://flashrom.org/Development_Guidelines#Sign-off_Procedure for details, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 1

[commit] r1810 - trunk
by repository service 01 Jun '14

01 Jun '14

Author: stefanct Date: Sun Jun 1 15:22:35 2014 New Revision: 1810 URL: http://flashrom.org/trac/flashrom/changeset/1810 Log: Add support for Atmel (now Adesto) AT25DL081 and AT25DL161. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Jun 1 12:26:23 2014 (r1809) +++ trunk/flashchips.c Sun Jun 1 15:22:35 2014 (r1810) @@ -1709,6 +1709,84 @@ { .vendor = "Atmel", + .name = "AT25DL081", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25DF081, + .total_size = 1024, + .page_size = 256, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at2x_global_unprotect_sec, + .write = spi_chip_write_256, /* Dual I/O (0xA2) supported */ + .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ + .voltage = {1650, 1950}, + }, + + { + .vendor = "Atmel", + .name = "AT25DL161", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25DL161, + .total_size = 2048, + .page_size = 256, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at2x_global_unprotect_sec, + .write = spi_chip_write_256, /* Dual I/O (0xA2) supported */ + .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ + .voltage = {1650, 1950}, + }, + + { + .vendor = "Atmel", .name = "AT25DQ161", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Jun 1 12:26:23 2014 (r1809) +++ trunk/flashchips.h Sun Jun 1 15:22:35 2014 (r1810) @@ -129,7 +129,7 @@ #define AMIC_A29L040 0x92 #define AMIC_A49LF040A 0x9d -#define ATMEL_ID 0x1F /* Atmel */ +#define ATMEL_ID 0x1F /* Atmel (now used by Adesto) */ #define ATMEL_AT25DF021 0x4300 #define ATMEL_AT25DF041A 0x4401 #define ATMEL_AT25DF081 0x4502 /* EDI 0x00. AT25DL081 has same ID + EDI 0x0100 */

1 0

Re: [flashrom] [PATCH] Add VIA VT6421A LPC programmer driver.
by Stefan Tauner 01 Jun '14

01 Jun '14

I have finally committed the latest version of this patch in r1809, marking the device support as configuration-dependent. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1809 - trunk
by repository service 01 Jun '14

01 Jun '14

Author: stefanct Date: Sun Jun 1 12:26:23 2014 New Revision: 1809 URL: http://flashrom.org/trac/flashrom/changeset/1809 Log: Add VIA VT6421A LPC programmer driver. Due to the mysterious address handling of this chip the user can specify a base address with the offset parameter, e.g.: flashrom -p atavia:offset=0xFFF00000 Thanks to Idwer Vollering for his iterative testing of this code, as well as to Martijn Bastiaan who did the last tests before merging. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Added: trunk/atavia.c (contents, props changed) Modified: trunk/Makefile trunk/flashrom.8.tmpl trunk/flashrom.c trunk/programmer.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/Makefile Sun Jun 1 12:26:23 2014 (r1809) @@ -192,6 +192,11 @@ else override CONFIG_ATAHPT = no endif +ifeq ($(CONFIG_ATAVIA), yes) +UNSUPPORTED_FEATURES += CONFIG_ATAVIA=yes +else +override CONFIG_ATAVIA = no +endif ifeq ($(CONFIG_DRKAISER), yes) UNSUPPORTED_FEATURES += CONFIG_DRKAISER=yes else @@ -320,6 +325,11 @@ else override CONFIG_ATAHPT = no endif +ifeq ($(CONFIG_ATAVIA), yes) +UNSUPPORTED_FEATURES += CONFIG_ATAVIA=yes +else +override CONFIG_ATAVIA = no +endif ifeq ($(CONFIG_SATAMV), yes) UNSUPPORTED_FEATURES += CONFIG_SATAMV=yes else @@ -384,6 +394,9 @@ # IMPORTANT: This code is not yet working! CONFIG_ATAHPT ?= no +# VIA VT6421A LPC memory support +CONFIG_ATAVIA ?= yes + # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes @@ -535,6 +548,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_ATAVIA), yes) +FEATURE_CFLAGS += -D'CONFIG_ATAVIA=1' +PROGRAMMER_OBJS += atavia.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_FT2232_SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'CONFIG_FT2232_SPI=1'") Added: trunk/atavia.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/atavia.c Sun Jun 1 12:26:23 2014 (r1809) @@ -0,0 +1,197 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2011 Jonathan Kollasch <jakllsch(a)kollasch.net> + * Copyright (C) 2012-2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_VIA 0x1106 + +#define VIA_MAX_RETRIES 300 + +#define BROM_ADDR 0x60 + +#define BROM_DATA 0x64 + +#define BROM_ACCESS 0x68 +#define BROM_TRIGGER 0x80 +#define BROM_WRITE 0x40 +#define BROM_SIZE_MASK 0x30 +#define BROM_SIZE_64K 0x00 +#define BROM_SIZE_32K 0x10 +#define BROM_SIZE_16K 0x20 +#define BROM_SIZE_0K 0x30 +#define BROM_BYTE_ENABLE_MASK 0x0f + +#define BROM_STATUS 0x69 +#define BROM_ERROR_STATUS 0x80 + +/* Select the byte we want to access. This is done by clearing the bit corresponding to the byte we want to + * access, leaving the others set (yes, really). */ +#define ENABLE_BYTE(address) ((~(1 << ((address) & 3))) & BROM_BYTE_ENABLE_MASK) +#define BYTE_OFFSET(address) (((addr) & 3) * 8) + +const struct dev_entry ata_via[] = { + {PCI_VENDOR_ID_VIA, 0x3249, DEP, "VIA", "VT6421A"}, + + {}, +}; + +static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr); +static const struct par_programmer lpc_programmer_atavia = { + .chip_readb = atavia_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = atavia_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static void *atavia_offset = NULL; +struct pci_dev *dev = NULL; + +static void atavia_prettyprint_access(uint8_t access) +{ + uint8_t bmask = access & BROM_BYTE_ENABLE_MASK; + uint8_t size = access & BROM_SIZE_MASK; + + msg_pspew("Accessing byte(s):%s%s%s%s\n", + ((bmask & (1<<3)) == 0) ? " 3" : "", + ((bmask & (1<<2)) == 0) ? " 2" : "", + ((bmask & (1<<1)) == 0) ? " 1" : "", + ((bmask & (1<<0)) == 0) ? " 0" : ""); + if (size == BROM_SIZE_0K) { + msg_pspew("No ROM device found.\n"); + } else + msg_pspew("ROM device with %s kB attached.\n", + (size == BROM_SIZE_64K) ? ">=64" : + (size == BROM_SIZE_32K) ? "32" : "16"); + msg_pspew("Access is a %s.\n", (access & BROM_WRITE) ? "write" : "read"); + msg_pspew("Device is %s.\n", (access & BROM_TRIGGER) ? "busy" : "ready"); +} + +static bool atavia_ready(struct pci_dev *pcidev_dev) +{ + int try; + uint8_t access, status; + bool ready = false; + + for (try = 0; try < VIA_MAX_RETRIES; try++) { + access = pci_read_byte(pcidev_dev, BROM_ACCESS); + status = pci_read_byte(pcidev_dev, BROM_STATUS); + if (((access & BROM_TRIGGER) == 0) && (status & BROM_ERROR_STATUS) == 0) { + ready = true; + break; + } else { + programmer_delay(1); + continue; + } + } + + msg_pdbg2("\n%s: %s after %d tries (access=0x%02x, status=0x%02x)\n", + __func__, ready ? "suceeded" : "failed", try, access, status); + atavia_prettyprint_access(access); + return ready; +} + +void *atavia_map(const char *descr, unsigned long phys_addr, size_t len) +{ + return (atavia_offset != 0) ? atavia_offset : (void *)phys_addr; +} + +int atavia_init(void) +{ + char *arg = extract_programmer_param("offset"); + if (arg) { + if (strlen(arg) == 0) { + msg_perr("Missing argument for offset.\n"); + free(arg); + return ERROR_FATAL; + } + char *endptr; + atavia_offset = (void *)strtoul(arg, &endptr, 0); + if (*endptr) { + msg_perr("Error: Invalid offset specified: \"%s\".\n", arg); + free(arg); + return ERROR_FATAL; + } + msg_pinfo("Mapping addresses to base %p.\n", atavia_offset); + } + free(arg); + + if (rget_io_perms()) + return 1; + + /* No need to check for errors, pcidev_init() will not return in case of errors. */ + dev = pcidev_init(ata_via, PCI_ROM_ADDRESS); /* Acutally no BAR setup needed at all. */ + if (!dev) + return 1; + + /* Test if a flash chip is attached. */ + pci_write_long(dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK); + programmer_delay(90); + uint32_t base = pci_read_long(dev, PCI_ROM_ADDRESS); + msg_pdbg2("BROM base=0x%08x\n", base); + if ((base & PCI_ROM_ADDRESS_MASK) == 0) { + msg_pwarn("Controller thinks there is no ROM attached.\n"); + } + + if (!atavia_ready(dev)) { + msg_perr("Controller not ready.\n"); + return 1; + } + + register_par_programmer(&lpc_programmer_atavia, BUS_LPC); + + return 0; +} + +static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, const chipaddr addr) +{ + msg_pspew("%s: 0x%02x to 0x%08lx.\n", __func__, val, addr); + pci_write_long(dev, BROM_ADDR, (addr & ~3)); + pci_write_long(dev, BROM_DATA, val << BYTE_OFFSET(addr)); + pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); + + if (!atavia_ready(dev)) { + msg_perr("not ready after write\n"); + } +} + +static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr) +{ + pci_write_long(dev, BROM_ADDR, (addr & ~3)); + pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr)); + + if (!atavia_ready(dev)) { + msg_perr("not ready after read\n"); + } + + uint8_t val = (pci_read_long(dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; + msg_pspew("%s: 0x%02x from 0x%08lx.\n", __func__, val, addr); + return val; +} Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/flashrom.8.tmpl Sun Jun 1 12:26:23 2014 (r1809) @@ -192,6 +192,8 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp +.BR "* atavia" " (for flash ROMs on VIA VT6421A ATA controllers)" +.sp .BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family \ based USB SPI programmer), including the DLP Design DLP-USB1232H, \ FTDI FT2232H Mini-Module, FTDI FT4232H Mini-Module, openbiosprog-spi, Amontec \ @@ -587,9 +589,9 @@ .B content is an 8-bit hexadecimal value. .SS -.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel\ -" , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\ -" , " satamv" ", and " atahpt " programmers +.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel"\ +, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\ +, " satamv" , " atahpt" ", and " atavia " programmers These programmers have an option to specify the PCI address of the card your want to use, which must be specified if more than one card supported by the selected programmer is installed in your system. The syntax is @@ -609,6 +611,18 @@ Example: .B "flashrom \-p nic3com:pci=05:04.0" .SS +.BR "atavia " programmer +Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the +.sp +.B " flashrom \-p atavia:offset=addr" +.sp +syntax where +.B addr +will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal). +For more information please see +.nh +.B http://flashrom.org/VT6421A +.SS .BR "ft2232_spi " programmer An optional parameter specifies the controller type and channel/interface/port it should support. For that you have to use the @@ -891,6 +905,9 @@ needs raw memory access, PCI configuration space access, raw I/O port access (x86) and MSR access (x86). .sp +.B atavia +needs PCI configuration space access. +.sp .BR nic3com ", " nicrealtek " and " nicnatsemi " need PCI configuration space read access and raw I/O port access. .sp @@ -923,7 +940,7 @@ needs no access permissions at all. .sp .BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", " -.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv " and " atahpt +.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt" and " atavia have to be run as superuser/root, and need additional raw access permission. .sp .BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi " and " ft2232_spi Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/flashrom.c Sun Jun 1 12:26:23 2014 (r1809) @@ -172,6 +172,18 @@ }, #endif +#if CONFIG_ATAVIA == 1 + { + .name = "atavia", + .type = PCI, + .devs.dev = ata_via, + .init = atavia_init, + .map_flash_region = atavia_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_FT2232_SPI == 1 { .name = "ft2232_spi", Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/programmer.h Sun Jun 1 12:26:23 2014 (r1809) @@ -54,6 +54,9 @@ #if CONFIG_ATAHPT == 1 PROGRAMMER_ATAHPT, #endif +#if CONFIG_ATAVIA == 1 + PROGRAMMER_ATAVIA, +#endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif @@ -434,6 +437,13 @@ extern const struct dev_entry ata_hpt[]; #endif +/* atavia.c */ +#if CONFIG_ATAVIA == 1 +int atavia_init(void); +void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len); +extern const struct dev_entry ata_via[]; +#endif + /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 int ft2232_spi_init(void);

1 0

ft2232_spi:type=jtagkey
by Alfin Cahya 01 Jun '14

01 Jun '14

Found Eon flash chip "EN25QH128" (16384 kB, SPI). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:S, 0x001000-0x001fff:S, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:EFAILED at 0x00008000! Expected=0xff, Found=0x66, failed byte count from 0x00008000-0x00008fff: 0xf6d ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 1... 0x000000-0x00ffff:EFAILED at 0x00000000! Expected=0xff, Found=0xb5, failed byte count from 0x00000000-0x0000ffff: 0xfbbd ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 2... 0x000000-0xffffff:EFAILED at 0x00000000! Expected=0xff, Found=0xb5, failed byte count from 0x00000000-0x00ffffff: 0x21d231 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 3... 0x000000-0xffffff:EFAILED at 0x00000000! Expected=0xff, Found=0xb5, failed byte count from 0x00000000-0x00ffffff: 0x2232bf ERASE FAILED! Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... done. Apparently at least some data has changed. Your flash chip is in an unknown state.

1 0

Re: [flashrom] [PATCH] Combine block_erase*_en29lv640b and block_erase*_m29f400bt respectively.
by Carl-Daniel Hailfinger 01 Jun '14

01 Jun '14

Am 29.05.2014 23:44 schrieb Stefan Tauner: > This patch combines two identical block and chip erase functions respectively: > - Merge block_erase_m29f400bt and block_erase_en29lv640b into > erase_block_shifted_jedec. > - Merge block_erase_chip_m29f400bt and block_erase_chip_en29lv640b into > erase_chip_block_shifted_jedec. > > Leave their implementations in en29lv640b.c for now. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Excellent, a cleanup of old parallel 16bit-native chips. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1808 - trunk
by repository service 01 Jun '14

01 Jun '14

Author: stefanct Date: Sun Jun 1 04:21:02 2014 New Revision: 1808 URL: http://flashrom.org/trac/flashrom/changeset/1808 Log: Combine block_erase*_en29lv640b and block_erase*_m29f400bt respectively. This patch combines two identical block and chip erase functions respectively: - Merge block_erase_m29f400bt and block_erase_en29lv640b into erase_block_shifted_jedec. - Merge block_erase_chip_m29f400bt and block_erase_chip_en29lv640b into erase_chip_block_shifted_jedec. Leave their implementations in en29lv640b.c for now. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/en29lv640b.c trunk/flashchips.c trunk/m29f400bt.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sun Jun 1 04:13:23 2014 (r1807) +++ trunk/chipdrivers.h Sun Jun 1 04:21:02 2014 (r1808) @@ -147,8 +147,6 @@ /* m29f400bt.c */ int probe_m29f400bt(struct flashctx *flash); -int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len); -int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len); int write_m29f400bt(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); void protect_m29f400bt(struct flashctx *flash, chipaddr bios); @@ -199,8 +197,8 @@ /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); -int block_erase_en29lv640b(struct flashctx *flash, unsigned int start, unsigned int len); -int block_erase_chip_en29lv640b(struct flashctx *flash, unsigned int start, unsigned int len); +int erase_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len); +int erase_chip_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len); int write_en29lv640b(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); #endif /* !__CHIPDRIVERS_H__ */ Modified: trunk/en29lv640b.c ============================================================================== --- trunk/en29lv640b.c Sun Jun 1 04:13:23 2014 (r1807) +++ trunk/en29lv640b.c Sun Jun 1 04:21:02 2014 (r1808) @@ -86,7 +86,7 @@ return 0; } -int erase_en29lv640b(struct flashctx *flash) +static int erase_chip_shifted_jedec(struct flashctx *flash) { chipaddr bios = flash->virtual_memory; @@ -105,8 +105,7 @@ return 0; } -int block_erase_en29lv640b(struct flashctx *flash, unsigned int start, - unsigned int len) +int erase_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len) { chipaddr bios = flash->virtual_memory; chipaddr dst = bios + start; @@ -126,12 +125,11 @@ return 0; } -int block_erase_chip_en29lv640b(struct flashctx *flash, unsigned int address, - unsigned int blocklen) +int erase_chip_block_shifted_jedec(struct flashctx *flash, unsigned int address, unsigned int blocklen) { if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; } - return erase_en29lv640b(flash); + return erase_chip_shifted_jedec(flash); } Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Jun 1 04:13:23 2014 (r1807) +++ trunk/flashchips.c Sun Jun 1 04:21:02 2014 (r1808) @@ -4730,10 +4730,10 @@ {8 * 1024, 8}, {64 * 1024, 127}, }, - .block_erase = block_erase_en29lv640b, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, - .block_erase = block_erase_chip_en29lv640b, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_en29lv640b, @@ -4827,10 +4827,10 @@ {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, @@ -4859,10 +4859,10 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, @@ -4891,10 +4891,10 @@ {32 * 1024, 1}, {64 * 1024, 31}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, /* Supports a fast mode too */ @@ -4923,10 +4923,10 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, /* Supports a fast mode too */ @@ -11292,10 +11292,10 @@ {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, } }, .write = write_m29f400bt, @@ -11324,10 +11324,10 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, } }, .write = write_m29f400bt, Modified: trunk/m29f400bt.c ============================================================================== --- trunk/m29f400bt.c Sun Jun 1 04:13:23 2014 (r1807) +++ trunk/m29f400bt.c Sun Jun 1 04:21:02 2014 (r1808) @@ -85,54 +85,3 @@ return 0; } - -int erase_m29f400bt(struct flashctx *flash) -{ - chipaddr bios = flash->virtual_memory; - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x80, bios + 0xAAA); - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x10, bios + 0xAAA); - - programmer_delay(10); - toggle_ready_jedec(flash, bios); - - /* FIXME: Check the status register for errors. */ - return 0; -} - -int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, - unsigned int len) -{ - chipaddr bios = flash->virtual_memory; - chipaddr dst = bios + start; - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x80, bios + 0xAAA); - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x30, dst); - - programmer_delay(10); - toggle_ready_jedec(flash, bios); - - /* FIXME: Check the status register for errors. */ - return 0; -} - -int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, - unsigned int blocklen) -{ - if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { - msg_cerr("%s called with incorrect arguments\n", - __func__); - return -1; - } - return erase_m29f400bt(flash); -}

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Re: [flashrom] [PATCH 1/2] print.c: improve device printing.
by Carl-Daniel Hailfinger 01 Jun '14

01 Jun '14

Am 30.05.2014 05:15 schrieb Stefan Tauner: > Add headers and columns (i.e. print device entries in a table-like manner). > Also, add and use test_state_to_text() to support the new test states. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Thanks! Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1807 - trunk
by repository service 01 Jun '14

01 Jun '14

Author: stefanct Date: Sun Jun 1 04:13:23 2014 New Revision: 1807 URL: http://flashrom.org/trac/flashrom/changeset/1807 Log: print.c: improve device printing. Add headers and columns (i.e. print device entries in a table-like manner). Also, add and use test_state_to_text() to support the new test states. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/print.c Modified: trunk/print.c ============================================================================== --- trunk/print.c Fri May 30 21:34:00 2014 (r1806) +++ trunk/print.c Sun Jun 1 04:13:23 2014 (r1807) @@ -47,6 +47,18 @@ } #endif +static const char *test_state_to_text(enum test_state test_state) +{ + switch (test_state) { + case OK: return "OK"; + case BAD: return "Not working"; + case NA: return "N/A"; + case DEP: return "Config-dependent"; + case NT: + default: return "Untested"; + } +} + /* * Return a string corresponding to the bustype parameter. * Memory is obtained with malloc() and must be freed with free() by the caller. @@ -469,13 +481,40 @@ void print_supported_devs(const struct programmer_entry prog, const char *const type) { - int i; - const struct dev_entry *const devs = prog.devs.dev; msg_ginfo("\nSupported %s devices for the %s programmer:\n", type, prog.name); + unsigned int maxvendorlen = strlen("Vendor") + 1; + unsigned int maxdevlen = strlen("Device") + 1; + + unsigned int i; + for (i = 0; devs[i].vendor_name != NULL; i++) { + maxvendorlen = max(maxvendorlen, strlen(devs[i].vendor_name)); + maxdevlen = max(maxdevlen, strlen(devs[i].device_name)); + } + maxvendorlen++; + maxdevlen++; + + msg_ginfo("Vendor"); + for (i = strlen("Vendor"); i < maxvendorlen; i++) + msg_ginfo(" "); + + msg_ginfo("Device"); + for (i = strlen("Device"); i < maxdevlen; i++) + msg_ginfo(" "); + + msg_ginfo(" %s IDs Status\n", type); + for (i = 0; devs[i].vendor_name != NULL; i++) { - msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name, devs[i].device_name, devs[i].vendor_id, - devs[i].device_id, (devs[i].status == NT) ? " (untested)" : ""); + msg_ginfo("%s", devs[i].vendor_name); + unsigned int j; + for (j = strlen(devs[i].vendor_name); j < maxvendorlen; j++) + msg_ginfo(" "); + msg_ginfo("%s", devs[i].device_name); + for (j = strlen(devs[i].device_name); j < maxdevlen; j++) + msg_ginfo(" "); + + msg_pinfo(" %04x:%04x %s\n", devs[i].vendor_id, devs[i].device_id, + test_state_to_text(devs[i].status)); } }

1 0

[PATCH] board_enable selfcheck
by Carl-Daniel Hailfinger 01 Jun '14

01 Jun '14

Found this bitrotting away on my disk. Rebased from r1645, last time all snippets compiled was r1539. If you kill the cli_classic.c hunk, it should compile. That hunk was in the patch to make sure the msg_gspew() calls in selfcheck() aren't no-ops by default. Hm. This seems to be a bug still in HEAD. Not for direct merge, there are other random changes in there as well. Stefan, you already wrote a patch doing a board enable array selfcheck, and AFAICS yours checks some more bits. AFAICS the most interesting point in this patch are the verbose messages/comments. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-boardenable_selfcheck/cli_classic.c =================================================================== --- flashrom-boardenable_selfcheck/cli_classic.c (Revision 1806) +++ flashrom-boardenable_selfcheck/cli_classic.c (Arbeitskopie) @@ -139,8 +139,10 @@ print_version(); print_banner(); + verbose = 2; if (selfcheck()) exit(1); + verbose = 0; setbuf(stdout, NULL); /* FIXME: Delay all operation_specified checks until after command Index: flashrom-boardenable_selfcheck/flashrom.c =================================================================== --- flashrom-boardenable_selfcheck/flashrom.c (Revision 1806) +++ flashrom-boardenable_selfcheck/flashrom.c (Arbeitskopie) @@ -1303,6 +1303,10 @@ eraser.eraseblocks[i].size; } /* Empty eraseblock definition with erase function. */ + /* FIXME: This message will never trigger because spew and debug + * messages are not printed at this stage before debug variable + * initialization. + */ if (!done && eraser.block_erase) msg_gspew("Strange: Empty eraseblock definition with " "non-empty erase function. Not an error.\n"); @@ -1768,7 +1772,11 @@ ret = 1; } } + ret = 1; } + if (selfcheck_boardenables()) { + msg_gerr("Board enable self check failed!\n"); + } /* TODO: implement similar sanity checks for other arrays where deemed necessary. */ return ret; Index: flashrom-boardenable_selfcheck/programmer.h =================================================================== --- flashrom-boardenable_selfcheck/programmer.h (Revision 1806) +++ flashrom-boardenable_selfcheck/programmer.h (Arbeitskopie) @@ -263,6 +263,7 @@ uint8_t sio_read(uint16_t port, uint8_t reg); void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); +int selfcheck_boardenables(void); void board_handle_before_superio(void); void board_handle_before_laptop(void); int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); Index: flashrom-boardenable_selfcheck/board_enable.c =================================================================== --- flashrom-boardenable_selfcheck/board_enable.c (Revision 1806) +++ flashrom-boardenable_selfcheck/board_enable.c (Arbeitskopie) @@ -2532,9 +2532,72 @@ return NULL; } +int selfcheck_boardenables(void) +{ + struct board_pciid_enable *board = board_pciid_enables; + int ret = 0; + int i = 0; + + for (; board->vendor_name; board++) { + if (!board->first_vendor) { + /* This would only be valid for boards which don't have + * any onboard PCI devices at all. + */ + msg_gerr("Zero first vendor in position %i " + "of the board enable table\n", i); + ret = 1; + } + if (!board->first_device) { + /* This would only be valid for boards which don't have + * any onboard PCI devices at all. + */ + msg_gerr("Zero first device in position %i " + "of the board enable table\n", i); + ret = 1; + } + if (!board->board_name) { + /* A nameless board in the list is a maintenance + * nightmare. + */ + msg_gerr("Missing board name in position %i " + "of the board enable table\n", i); + ret = 1; + } + if (!board->first_card_vendor && !board->dmi_pattern) { + msg_gerr("Zero first subsystem vendor and no DMI " + "pattern in position %i of the board enable " + "table\n", i); + ret = 1; + } + if (!board->first_card_device && !board->dmi_pattern) { + msg_gerr("Zero first subsystem device and no DMI " + "pattern in position %i of the board enable " + "table\n", i); + ret = 1; + } + if (!board->first_card_vendor && board->dmi_pattern) { + /* Such boards are usually really old. No error. */ + msg_gspew("Zero first subsystem vendor but with DMI pattern in position %i " + "of the board enable table\n", i); + } + if (!board->first_card_device && board->dmi_pattern) { + /* Such boards are usually really old. No error. */ + msg_gspew("Zero first subsystem device but with DMI pattern in position %i " + "of the board enable table\n", i); + } + + i++; + } + + return ret; +} + /* * Match boards on PCI IDs and subsystem IDs. * Second set of IDs can be either main+subsystem IDs, main IDs or no IDs. + * + * Logic of this function: First PCI dev has to match ven/dev/subven/subdev. + * The second PCI dev is completely optional (bad idea). */ const static struct board_match *board_match_pci_ids(enum board_match_phase phase) { -- http://www.hailfinger.org/

2 2

[PATCH] Improve messages on failed erases with default verbosity.
by Stefan Tauner 01 Jun '14

01 Jun '14

From: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Without this... Erasing and writing flash chip... ERASE FAILED at 0x00001000! Expected=0xff, Read=0xb4, failed byte count from 0x00000000-0x0000ffff: 0xef09 ERASE FAILED! Reading current flash chip contents... done. <loooooong break while the next eraser and writing is tried> Erase/write done. Verifying flash... VERIFIED. Even if there is not a long temporal pause, it is very confusing for the user to first see a failed erase, followed by a read, a done message and eventually the verification message. This patch inserts "Looking for another erase function." where there is just a silent break above. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- flashrom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/flashrom.c b/flashrom.c index 98101b7..4438dc6 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1470,9 +1470,9 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents, uint8_t for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { if (k != 0) - msg_cdbg("Looking for another erase function.\n"); + msg_cinfo("Looking for another erase function.\n"); if (!usable_erasefunctions) { - msg_cdbg("No usable erase functions left.\n"); + msg_cinfo("No usable erase functions left.\n"); break; } msg_cdbg("Trying erase function %i... ", k); -- Kind regards, Stefan Tauner

1 0

[PATCH] Add support for S25FL128P and S25FL128P......0 chips.
by Stefan Tauner 31 May '14

31 May '14

S25FL128P is the predecessor family of S25FL128S. All these chips can not be distinguished without EDI. Additionally to the new S25FL128P chips, this patch also fixes the name of the previously supported S25FL128S model with uniform 256 kB sectors (S25FL128P......1 not 0) and adds the hybrid sector version as well. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- Since flashrom can not distinguish the chips itself, the user has to select the right chip with the -c parameter. Liviu, please apply this patch on top of r1806 and run flashrom once without any operation and without -c .... E.g. flashrom -p usbblaster_spi -o probe.log And a second time with the correct chip selected to write *different* data to the chip. E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c "S25FL128P......0" Please report back with the two log files. flashchips.c | 102 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- flashchips.h | 2 +- 2 files changed, 100 insertions(+), 4 deletions(-) diff --git a/flashchips.c b/flashchips.c index c830436..c731e38 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9675,7 +9675,69 @@ const struct flashchip flashchips[] = { { .vendor = "Spansion", - .name = "S25FL128S......0", /* uniform 256kB sectors */ + .name = "S25FL128P......0", /* uniform 64 kB sectors */ + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL128, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {256 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {256 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 16384 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp3_srwd, + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL128P......1", /* uniform 256kB sectors */ + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL128, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_srwd, + .unlock = spi_disable_blockprotect_bp2_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL128S......0", /* hybrid 4 (top or bottom) + 64 kB sectors */ .bustype = BUS_SPI, .manufacture_id = SPANSION_ID, .model_id = SPANSION_S25FL128, @@ -9689,9 +9751,43 @@ const struct flashchip flashchips[] = { .probe_timing = TIMING_ZERO, .block_erasers = { { - .eraseblocks = { {4 * 1024, 4096} }, - .block_erase = spi_block_erase_20, +/* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors and D8h for remaining 64 kB sectors + .eraseblocks = { + {4 * 1024, 32}, + {64 * 1024, 254}, + }, + .block_erase = NULL, + }, { */ + .eraseblocks = { { 16384 * 1024, 1} }, + .block_erase = spi_block_erase_60, }, { + .eraseblocks = { { 16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL128S......1", /* uniform 256 kB sectors */ + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL128, + .total_size = 16384, + .page_size = 512, + /* supports 4B addressing */ + /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { .eraseblocks = { {256 * 1024, 64} }, .block_erase = spi_block_erase_d8, }, { diff --git a/flashchips.h b/flashchips.h index 5fce532..2a5e84c 100644 --- a/flashchips.h +++ b/flashchips.h @@ -564,7 +564,7 @@ #define SPANSION_S25FL016A 0x0214 #define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */ #define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */ -#define SPANSION_S25FL128 0x2018 +#define SPANSION_S25FL128 0x2018 /* Same ID for various S25FL128P, S25FL128S and S25FL129P (including dual-die S70FL256P) variants (EDI supported) */ #define SPANSION_S25FL256 0x0219 #define SPANSION_S25FL512 0x0220 #define SPANSION_S25FL204 0x4013 -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] "S25FL128S......0" on usbblaster_spi
by Stefan Tauner 31 May '14

31 May '14

On Sat, 31 May 2014 13:14:08 -0400 Liviu Toma <liviu.toma(a)gmail.com> wrote: > Hi, > > Thanks very much for the reply. Just to clarify, I am not concerned, I was > able to flash the chip. I was merely sending the info as instructed by the > tool. Oh, but I am ;) It should work at first try and this is a bug. > The inscription on the chip read Spansion FL128PIF (the next line reads > 92599012 but I assume that's some date / serial number). Thank you very much. So it is actually the predecessor of S25FL128S, namely the S25FL128P. I'll take a look at the differences/possible problems and how/if the chips could be told apart by software. Would you be able and willing to test a patch for that? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

Re: [flashrom] "S25FL128S......0" on usbblaster_spi
by Stefan Tauner 31 May '14

31 May '14

On Fri, 30 May 2014 22:00:59 -0400 Liviu Toma <liviu.toma(a)gmail.com> wrote: > Hello, > > I had some success programming the Spansion "S25FL128S......0" with > usbblaster_spi (Altera USB blaster cheap clone). > The read function works OK. The write function fails the first time but if > I run it again it works the second time (this is consistent, I've done it > on 3 different chips). It appears the first time it does Erase then Write, > but only the erasing works. The second time it's already erased from the > first run and the write works OK. > Log attached. Hi Liviu, each erased block is verified to contain 0xFF before it is tried to be written. So the erase is successful when the W is printed. Now there are two possibilities: either the writes did not work, or after a write another delete undoes the write later. Can you please tell me the exact S25FL128S model you have? There are many versions of the chip (as the dots in the name suggests) and I presume that the problem is that the current implementation is not compatible with all models. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

Re: [flashrom] [PATCH] Add selfcheck_board_enables().
by Stefan Tauner 31 May '14

31 May '14

On Sat, 31 May 2014 05:04:56 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > diff --git a/flashrom.c b/flashrom.c > index 98101b7..fdb5cf7 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -1770,6 +1770,8 @@ int selfcheck(void) > } > } > + #if CONFIG_INTERNAL == 1 > + ret |= selfcheck_board_enables(); + #endif > + > /* TODO: implement similar sanity checks for other arrays where deemed necessary. */ > return ret; > } because the whole board_enable.c file is not compiled in without it -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[PATCH] CID1130005: Array compared against 0
by Stefan Reinauer 31 May '14

31 May '14

CID1130005: Array compared against 0 The address of an array is never NULL, so the comparison will always evaluate the same way. In selfcheck: Array compared against NULL pointer Since the array is defined unconditionally in C code the check does not really make sense. It might make more sense to check whether there are entries in the array, but that is not required on all platforms so far. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: print.c =================================================================== --- print.c (revision 1763) +++ print.c (working copy) @@ -1073,7 +1073,7 @@ B("ZOTAC", "ZBOX HD-ID11", OK, NULL, NULL), #endif - {0}, + {NULL}, }; /* Please keep this list alphabetically ordered by vendor/board. */ @@ -1101,6 +1101,6 @@ B("Lenovo", "3000 V100 TF05Cxx", OK, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3…", NULL), #endif - {0}, + {NULL}, }; #endif Index: flashrom.c =================================================================== --- flashrom.c (revision 1763) +++ flashrom.c (working copy) @@ -1759,24 +1759,6 @@ if (selfcheck_eraseblocks(chip)) ret = 1; -#if CONFIG_INTERNAL == 1 - if (chipset_enables == NULL) { - msg_gerr("Chipset enables table does not exist!\n"); - ret = 1; - } - if (board_matches == NULL) { - msg_gerr("Board enables table does not exist!\n"); - ret = 1; - } - if (boards_known == NULL) { - msg_gerr("Known boards table does not exist!\n"); - ret = 1; - } - if (laptops_known == NULL) { - msg_gerr("Known laptops table does not exist!\n"); - ret = 1; - } -#endif return ret; }

3 13

"S25FL128S......0" on usbblaster_spi
by Liviu Toma 31 May '14

31 May '14

Hello, I had some success programming the Spansion "S25FL128S......0" with usbblaster_spi (Altera USB blaster cheap clone). The read function works OK. The write function fails the first time but if I run it again it works the second time (this is consistent, I've done it on 3 different chips). It appears the first time it does Erase then Write, but only the erasing works. The second time it's already erased from the first run and the write works OK. Log attached. Best regards, Liviu Toma

1 0

[PATCH 2/2] print_wiki.c: there is only one way to represent time.
by Stefan Tauner 31 May '14

31 May '14

ISO 8601. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- print_wiki.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/print_wiki.c b/print_wiki.c index 6af277a..ad179e3 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -31,7 +31,7 @@ static const char wiki_header[] = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ background-color:#eeeeee; text-align:left; border:1px solid #aabbcc;\">\ <small>\n\ -'''Last update:''' %s(generated by flashrom %s)<br />\n\ +'''Last update:''' %s (generated by flashrom %s)<br />\n\ The tables below are generated from flashrom's source by copying the output of '''flashrom -z'''.<br /><br />\n\ A short explanation of the cells representing the support state follows:<br />\n\ {| border=\"0\" valign=\"top\"\n\ @@ -443,8 +443,10 @@ static void print_supported_devs_wiki() void print_supported_wiki(void) { time_t t = time(NULL); + char buf[sizeof("1986-02-28T12:37:42Z")]; + strftime(buf, sizeof(buf), "%Y-%m-%dT%H:%M:%SZ", gmtime(&t)); - printf(wiki_header, ctime(&t), flashrom_version); + printf(wiki_header, buf, flashrom_version); print_supported_chips_wiki(2); #if CONFIG_INTERNAL == 1 print_supported_chipsets_wiki(3); -- Kind regards, Stefan Tauner

1 0

[PATCH 1/2] print_wiki.c: refine header and include a legend explaining the test state representation.
by Stefan Tauner 31 May '14

31 May '14

Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- print_wiki.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/print_wiki.c b/print_wiki.c index b01ab75..6af277a 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -29,11 +29,33 @@ static const char wiki_header[] = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ -background-color:#eeeeee; text-align:right; border:1px solid #aabbcc;\">\ +background-color:#eeeeee; text-align:left; border:1px solid #aabbcc;\">\ <small>\n\ -Please do '''not''' edit these tables in the wiki directly, they are \ -generated by pasting '''flashrom -z''' output.<br />\ -'''Last update:''' %s(generated by flashrom %s)\n</small></div>\n"; +'''Last update:''' %s(generated by flashrom %s)<br />\n\ +The tables below are generated from flashrom's source by copying the output of '''flashrom -z'''.<br /><br />\n\ +A short explanation of the cells representing the support state follows:<br />\n\ +{| border=\"0\" valign=\"top\"\n\ +! style=\"text-align:left;\" |\n\ +! style=\"text-align:left;\" |\n\ +|-\n\ +|{{OK}}\n\ +| The feature was '''tested and should work''' in general unless there is a bug in flashrom or another component in \ +the system prohibits some functionality.\n\ +|-\n\ +|{{Dep}}\n\ +| '''Configuration-dependent'''. The feature was tested and should work in general but there are common \ +configurations that drastically limit's flashrom capabilities or make it completely stop working.\n\ +|-\n\ +|{{?3}}\n\ +| The feature is '''untested''' but believed to be working.\n\ +|-\n\ +|{{NA}}\n\ +| The feature is '''not applicable''' in this configuration (e.g. Write operations on ROM chips).\n\ +|-\n\ +|{{No}}\n\ +| The feature is '''known to not work'''. Don't bother testing (nor reporting).\n\ +|}\n\ +</small></div>\n"; static const char th_start[] = "| valign=\"top\"|\n\n\ {| border=\"0\" style=\"font-size: smaller\" valign=\"top\"\n\ -- Kind regards, Stefan Tauner

1 0

[commit] r1806 - trunk
by repository service 30 May '14

30 May '14

Author: stefanct Date: Fri May 30 21:34:00 2014 New Revision: 1806 URL: http://flashrom.org/trac/flashrom/changeset/1806 Log: Fix PMC Pm25LV512 and Pm25LV010 probing. Apparently PMC did not understand the purpose of the JEDEC continuation code. These chips reply to RES (the only supported ID command) with the prefix-less vendor ID, a device ID, eventually followed by the continuation byte for the vendor ID. This fix uses only the first two bytes instead of appending the continuation code to the device ID. The problem was reported by The Raven who also tested the fix on a Pm25LV010 (with an imprint of "Pm25LV010E"). Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu May 29 13:51:24 2014 (r1805) +++ trunk/flashchips.c Fri May 30 21:34:00 2014 (r1806) @@ -8595,13 +8595,13 @@ .vendor = "PMC", .name = "Pm25LV512(A)", .bustype = BUS_SPI, - .manufacture_id = PMC_ID, + .manufacture_id = PMC_ID_NOPREFIX, .model_id = PMC_PM25LV512, .total_size = 64, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, - .probe = probe_spi_res3, + .probe = probe_spi_res2, /* The continuation code is transferred as the 3rd byte m( */ .probe_timing = TIMING_ZERO, .block_erasers = { @@ -8627,13 +8627,13 @@ .vendor = "PMC", .name = "Pm25LV010", .bustype = BUS_SPI, - .manufacture_id = PMC_ID, + .manufacture_id = PMC_ID_NOPREFIX, .model_id = PMC_PM25LV010, .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, - .probe = probe_spi_res3, + .tested = TEST_OK_PREW, + .probe = probe_spi_res2, /* The continuation code is transferred as the 3rd byte m( */ .probe_timing = TIMING_ZERO, .block_erasers = { Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Thu May 29 13:51:24 2014 (r1805) +++ trunk/flashchips.h Fri May 30 21:34:00 2014 (r1806) @@ -503,7 +503,8 @@ /* * Programmable Micro Corp is listed in JEP106W in bank 2, so it should * have a 0x7F continuation code prefix. - * Apparently this name is owned by "Chingis Technology Corporation" http://www.chingistek.com. + * Apparently this name is owned by "Chingis Technology Corporation" http://www.chingistek.com which is now a + * subsidiary of ISSI. They continue to use the PMC manufacturer ID nevertheless. */ #define PMC_ID 0x7F9D /* PMC */ #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */

1 0

Re: [flashrom] Winbond W25X80: flashrom -V (SUCCESS!)
by Stefan Tauner 30 May '14

30 May '14

On Thu, 29 May 2014 10:38:01 -0500 Bernardo Kuri <contact(a)bkuri.com> wrote: > Hello, > > Looks like everything went smoothly. I have attached the output in a text > file. > BTW, the board is a Zotac IONITX-F-E Intel Atom 330. Hello Bernardo, thanks for your report! I have added your board to our list of supported hardware and will commit that later together with other small changes. The flash chip was already marked as fully tested. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[PATCH 2/2] Utilize new tested states for chipsets as well.
by Stefan Tauner 30 May '14

30 May '14

Mark all ME-enabled Intel chipsets as DEP, alter print.c accordingly (print_wiki.c was already prepared). Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipset_enable.c | 76 ++++++++++++++++++++++++++++---------------------------- print.c | 6 ++--- 2 files changed, 41 insertions(+), 41 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 8be6dea..c62f877 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1479,38 +1479,38 @@ const struct penable chipset_enables[] = { {0x8086, 0x0c60, NT, "Intel", "S12x0", enable_flash_s12x0}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x1c44, OK, "Intel", "Z68", enable_flash_pch6}, - {0x8086, 0x1c46, OK, "Intel", "P67", enable_flash_pch6}, + {0x8086, 0x1c44, DEP, "Intel", "Z68", enable_flash_pch6}, + {0x8086, 0x1c46, DEP, "Intel", "P67", enable_flash_pch6}, {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_pch6}, {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_pch6}, - {0x8086, 0x1c4a, OK, "Intel", "H67", enable_flash_pch6}, + {0x8086, 0x1c4a, DEP, "Intel", "H67", enable_flash_pch6}, {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_pch6}, {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6}, {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_pch6}, {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_pch6}, - {0x8086, 0x1c4f, OK, "Intel", "QM67", enable_flash_pch6}, + {0x8086, 0x1c4f, DEP, "Intel", "QM67", enable_flash_pch6}, {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_pch6}, {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6}, - {0x8086, 0x1c54, OK, "Intel", "C204", enable_flash_pch6}, + {0x8086, 0x1c54, DEP, "Intel", "C204", enable_flash_pch6}, {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, - {0x8086, 0x1c5c, OK, "Intel", "H61", enable_flash_pch6}, - {0x8086, 0x1d40, OK, "Intel", "C60x/X79", enable_flash_pch6}, - {0x8086, 0x1d41, OK, "Intel", "C60x/X79", enable_flash_pch6}, - {0x8086, 0x1e44, OK, "Intel", "Z77", enable_flash_pch7}, + {0x8086, 0x1c5c, DEP, "Intel", "H61", enable_flash_pch6}, + {0x8086, 0x1d40, DEP, "Intel", "C60x/X79", enable_flash_pch6}, + {0x8086, 0x1d41, DEP, "Intel", "C60x/X79", enable_flash_pch6}, + {0x8086, 0x1e44, DEP, "Intel", "Z77", enable_flash_pch7}, {0x8086, 0x1e46, NT, "Intel", "Z75", enable_flash_pch7}, {0x8086, 0x1e47, NT, "Intel", "Q77", enable_flash_pch7}, {0x8086, 0x1e48, NT, "Intel", "Q75", enable_flash_pch7}, - {0x8086, 0x1e49, OK, "Intel", "B75", enable_flash_pch7}, - {0x8086, 0x1e4a, OK, "Intel", "H77", enable_flash_pch7}, + {0x8086, 0x1e49, DEP, "Intel", "B75", enable_flash_pch7}, + {0x8086, 0x1e4a, DEP, "Intel", "H77", enable_flash_pch7}, {0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7}, - {0x8086, 0x1e55, OK, "Intel", "QM77", enable_flash_pch7}, + {0x8086, 0x1e55, DEP, "Intel", "QM77", enable_flash_pch7}, {0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7}, - {0x8086, 0x1e57, OK, "Intel", "HM77", enable_flash_pch7}, + {0x8086, 0x1e57, DEP, "Intel", "HM77", enable_flash_pch7}, {0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7}, {0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7}, {0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7}, {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, - {0x8086, 0x1e5f, OK, "Intel", "NM70", enable_flash_pch7}, + {0x8086, 0x1e5f, DEP, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, @@ -1533,39 +1533,39 @@ const struct penable chipset_enables[] = { {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, - {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, - {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, - {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, - {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, - {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, - {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, - {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, - {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, - {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, - {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x2810, DEP, "Intel", "ICH8/ICH8R", enable_flash_ich8}, + {0x8086, 0x2811, DEP, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2812, DEP, "Intel", "ICH8DH", enable_flash_ich8}, + {0x8086, 0x2814, DEP, "Intel", "ICH8DO", enable_flash_ich8}, + {0x8086, 0x2815, DEP, "Intel", "ICH8M", enable_flash_ich8}, + {0x8086, 0x2910, DEP, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, + {0x8086, 0x2912, DEP, "Intel", "ICH9DH", enable_flash_ich9}, + {0x8086, 0x2914, DEP, "Intel", "ICH9DO", enable_flash_ich9}, + {0x8086, 0x2916, DEP, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2917, DEP, "Intel", "ICH9M-E", enable_flash_ich9}, + {0x8086, 0x2918, DEP, "Intel", "ICH9", enable_flash_ich9}, + {0x8086, 0x2919, DEP, "Intel", "ICH9M", enable_flash_ich9}, {0x8086, 0x3a10, NT, "Intel", "ICH10R Engineering Sample", enable_flash_ich10}, - {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, - {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3a14, DEP, "Intel", "ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, DEP, "Intel", "ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, DEP, "Intel", "ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, DEP, "Intel", "ICH10D", enable_flash_ich10}, {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_pch5}, {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_pch5}, {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_pch5}, {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_pch5}, - {0x8086, 0x3b06, OK, "Intel", "H55", enable_flash_pch5}, - {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_pch5}, + {0x8086, 0x3b06, DEP, "Intel", "H55", enable_flash_pch5}, + {0x8086, 0x3b07, DEP, "Intel", "QM57", enable_flash_pch5}, {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_pch5}, {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_pch5}, {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_pch5}, {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_pch5}, {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_pch5}, - {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_pch5}, + {0x8086, 0x3b0f, DEP, "Intel", "QS57", enable_flash_pch5}, {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_pch5}, - {0x8086, 0x3b14, OK, "Intel", "3420", enable_flash_pch5}, + {0x8086, 0x3b14, DEP, "Intel", "3420", enable_flash_pch5}, {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_pch5}, {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_pch5}, {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, @@ -1578,19 +1578,19 @@ const struct penable chipset_enables[] = { {0x8086, 0x8c41, NT, "Intel", "Lynx Point Mobile Engineering Sample", enable_flash_pch8}, {0x8086, 0x8c42, NT, "Intel", "Lynx Point Desktop Engineering Sample", enable_flash_pch8}, {0x8086, 0x8c43, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c44, OK, "Intel", "Z87", enable_flash_pch8}, + {0x8086, 0x8c44, DEP, "Intel", "Z87", enable_flash_pch8}, {0x8086, 0x8c45, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c46, NT, "Intel", "Z85", enable_flash_pch8}, {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8}, - {0x8086, 0x8c4a, OK, "Intel", "H87", enable_flash_pch8}, - {0x8086, 0x8c4b, OK, "Intel", "HM87", enable_flash_pch8}, + {0x8086, 0x8c4a, DEP, "Intel", "H87", enable_flash_pch8}, + {0x8086, 0x8c4b, DEP, "Intel", "HM87", enable_flash_pch8}, {0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8}, {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c4e, NT, "Intel", "Q87", enable_flash_pch8}, {0x8086, 0x8c4f, NT, "Intel", "QM87", enable_flash_pch8}, - {0x8086, 0x8c50, OK, "Intel", "B85", enable_flash_pch8}, + {0x8086, 0x8c50, DEP, "Intel", "B85", enable_flash_pch8}, {0x8086, 0x8c51, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c52, NT, "Intel", "C222", enable_flash_pch8}, {0x8086, 0x8c53, NT, "Intel", "Lynx Point", enable_flash_pch8}, diff --git a/print.c b/print.c index 7bb788e..b63e8f7 100644 --- a/print.c +++ b/print.c @@ -395,7 +395,7 @@ static void print_supported_chipsets(void) for (i = strlen("Chipset"); i < maxchipsetlen; i++) msg_ginfo(" "); - msg_ginfo("PCI IDs State\n\n"); + msg_ginfo("PCI IDs Status\n\n"); for (c = chipset_enables; c->vendor_name != NULL; c++) { msg_ginfo("%s", c->vendor_name); @@ -404,8 +404,8 @@ static void print_supported_chipsets(void) msg_ginfo("%s", c->device_name); for (i = 0; i < maxchipsetlen - strlen(c->device_name); i++) msg_ginfo(" "); - msg_ginfo("%04x:%04x%s\n", c->vendor_id, c->device_id, - (c->status == NT) ? " (untested)" : ""); + msg_ginfo("%04x:%04x %s\n", c->vendor_id, c->device_id, + test_state_to_text(c->status)); } } -- Kind regards, Stefan Tauner

1 0

[PATCH 1/2] print.c: improve device printing.
by Stefan Tauner 30 May '14

30 May '14

Add headers and columns (i.e. print device entries in a table-like manner). Also, add and use test_state_to_text() to support the new test states. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- print.c | 45 ++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 42 insertions(+), 3 deletions(-) diff --git a/print.c b/print.c index 8ca99d5..7bb788e 100644 --- a/print.c +++ b/print.c @@ -47,6 +47,18 @@ static char* strtok_r(char *str, const char *delim, char **nextp) } #endif +static const char *test_state_to_text(enum test_state test_state) +{ + switch (test_state) { + case OK: return "OK"; + case BAD: return "Not working"; + case NA: return "N/A"; + case DEP: return "Config-dependent"; + case NT: + default: return "Untested"; + } +} + /* * Return a string corresponding to the bustype parameter. * Memory is obtained with malloc() and must be freed with free() by the caller. @@ -469,13 +481,40 @@ static void print_supported_boards_helper(const struct board_info *boards, void print_supported_devs(const struct programmer_entry prog, const char *const type) { - int i; + unsigned int i, j; const struct dev_entry *const devs = prog.devs.dev; msg_ginfo("\nSupported %s devices for the %s programmer:\n", type, prog.name); + unsigned int maxvendorlen = strlen("Vendor") + 1; + unsigned int maxdevlen = strlen("Device") + 1; + for (i = 0; devs[i].vendor_name != NULL; i++) { - msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name, devs[i].device_name, devs[i].vendor_id, - devs[i].device_id, (devs[i].status == NT) ? " (untested)" : ""); + maxvendorlen = max(maxvendorlen, strlen(devs[i].vendor_name)); + maxdevlen = max(maxdevlen, strlen(devs[i].device_name)); + } + maxvendorlen++; + maxdevlen++; + + msg_ginfo("Vendor"); + for (i = strlen("Vendor"); i < maxvendorlen; i++) + msg_ginfo(" "); + + msg_ginfo("Device"); + for (i = strlen("Device"); i < maxdevlen; i++) + msg_ginfo(" "); + + msg_ginfo(" %s IDs Status\n", type); + + for (i = 0; devs[i].vendor_name != NULL; i++) { + msg_ginfo("%s", devs[i].vendor_name); + for (j = strlen(devs[i].vendor_name); j < maxvendorlen; j++) + msg_ginfo(" "); + msg_ginfo("%s", devs[i].device_name); + for (j = strlen(devs[i].device_name); j < maxdevlen; j++) + msg_ginfo(" "); + + msg_pinfo(" %04x:%04x %s\n", devs[i].vendor_id, devs[i].device_id, + test_state_to_text(devs[i].status)); } } -- Kind regards, Stefan Tauner

1 0

[PATCH] Get rid of .probe_timing.
by Stefan Tauner 30 May '14

30 May '14

Use dedicated jede_probe_* functions where needed. The count of functions could be reduced in the future by using the slowest one instead(?). To mimic previous delay behavior in the jedec_erase_* functions a new feature flag was introduced: FEATURE_SLOW_ERASE_CMDS Also, the feature_bits field was changed from int to uint16_t. Default make size counterintuitively increases slightly with gcc but shrinks with clang (about 4 kB or 0.75%). Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipdrivers.h | 6 +- flash.h | 26 +-- flashchips.c | 658 +++++++++++----------------------------------------------- jedec.c | 51 ++--- 4 files changed, 162 insertions(+), 579 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 7fe3202..65f9772 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -138,7 +138,11 @@ int unlock_lh28f008bjt(struct flashctx *flash); uint8_t oddparity(uint8_t val); void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst); void data_polling_jedec(const struct flashctx *flash, chipaddr dst, uint8_t data); -int probe_jedec(struct flashctx *flash); +int probe_jedec_default(struct flashctx *flash); +int probe_jedec_0(struct flashctx *flash); +int probe_jedec_1(struct flashctx *flash); +int probe_jedec_10(struct flashctx *flash); +int probe_jedec_10000(struct flashctx *flash); int write_jedec(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int write_jedec_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int pagesize); diff --git a/flash.h b/flash.h index cf496b6..7f40704 100644 --- a/flash.h +++ b/flash.h @@ -113,12 +113,13 @@ enum write_granularity { #define FEATURE_ADDR_2AA (1 << 2) #define FEATURE_ADDR_AAA (2 << 2) #define FEATURE_ADDR_SHIFTED (1 << 5) +#define FEATURE_SLOW_ERASE_CMDS (1 << 6) /* Feature bits used for SPI only */ -#define FEATURE_WRSR_EWSR (1 << 6) -#define FEATURE_WRSR_WREN (1 << 7) +#define FEATURE_WRSR_EWSR (1 << 8) +#define FEATURE_WRSR_WREN (1 << 9) #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) -#define FEATURE_OTP (1 << 8) -#define FEATURE_QPI (1 << 9) +#define FEATURE_OTP (1 << 10) +#define FEATURE_QPI (1 << 11) enum test_state { OK = 0, @@ -161,7 +162,7 @@ struct flashchip { unsigned int total_size; /* Chip page size in bytes */ unsigned int page_size; - int feature_bits; + uint16_t feature_bits; /* Indicate how well flashrom supports different operations of this flash chip. */ struct tested { @@ -173,11 +174,6 @@ struct flashchip { int (*probe) (struct flashctx *flash); - /* Delay after "enter/exit ID mode" commands in microseconds. - * NB: negative values have special meanings, see TIMING_* below. - */ - signed int probe_timing; - /* * Erase blocks and associated erase function. Any chip erase function * is stored as chip-sized virtual block together with said function. @@ -214,16 +210,6 @@ struct flashctx { struct registered_programmer *pgm; }; -/* Timing used in probe routines. ZERO is -2 to differentiate between an unset - * field and zero delay. - * - * SPI devices will always have zero delay and ignore this field. - */ -#define TIMING_FIXME -1 -/* this is intentionally same value as fixme */ -#define TIMING_IGNORED -1 -#define TIMING_ZERO -2 - extern const struct flashchip flashchips[]; extern const unsigned int flashchips_size; diff --git a/flashchips.c b/flashchips.c index 78c18ca..4580f96 100644 --- a/flashchips.c +++ b/flashchips.c @@ -67,8 +67,7 @@ const struct flashchip flashchips[] = { .page_size = 16 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -94,8 +93,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_SHORT_RESET | FEATURE_ADDR_2AA, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -126,8 +124,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_EITHER_RESET | FEATURE_ADDR_2AA, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -158,8 +155,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -185,8 +181,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -212,8 +207,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -239,8 +233,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -270,8 +263,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -301,8 +293,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -333,8 +324,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -365,8 +355,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -397,8 +386,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -429,8 +417,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -461,8 +448,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, /* unused */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -493,8 +479,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -520,8 +505,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, /* datasheet specifies address as don't care */ .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -548,7 +532,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -582,7 +565,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -616,7 +598,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -651,7 +632,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -686,7 +666,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -721,7 +700,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -761,7 +739,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -796,7 +773,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -831,7 +807,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -866,7 +841,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -904,7 +878,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -942,7 +915,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -974,7 +946,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1006,7 +977,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1038,7 +1008,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1070,7 +1039,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1102,7 +1070,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1135,7 +1102,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1175,7 +1141,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { { 4 * 1024, 512 } }, @@ -1214,7 +1179,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1255,7 +1219,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1292,8 +1255,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -1324,8 +1286,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -1356,8 +1317,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -1383,8 +1343,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ + .probe = probe_jedec_0, .block_erasers = { { @@ -1413,7 +1372,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1451,7 +1409,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1489,7 +1446,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1527,7 +1483,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1565,7 +1520,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1603,7 +1557,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1642,7 +1595,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1680,7 +1632,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1719,7 +1670,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1757,7 +1707,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_at25f, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1786,7 +1735,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_at25f, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1817,7 +1765,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1860,7 +1807,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_at25f, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1889,7 +1835,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_at25f, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1918,7 +1863,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_at25f, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1948,7 +1892,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -1989,7 +1932,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2027,7 +1969,6 @@ const struct flashchip flashchips[] = { /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2059,7 +2000,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2097,7 +2037,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2135,7 +2074,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2174,7 +2112,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .printlock = spi_prettyprint_status_register_at26df081a, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, @@ -2192,7 +2129,6 @@ const struct flashchip flashchips[] = { .tested = {.probe = NT, .read = NT, .erase = NT, .write = BAD }, .feature_bits = FEATURE_WRSR_WREN, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2228,8 +2164,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10000, /* 10mS, Enter=Exec */ + .probe = probe_jedec_10000, /* 10 ms, Enter=Exec */ .block_erasers = { { @@ -2252,8 +2187,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = 10000, /* 10mS, Enter=Exec */ + .probe = probe_jedec_10000, /* 10 ms, Enter=Exec */ .block_erasers = { { @@ -2276,8 +2210,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10000, /* 10ms */ + .probe = probe_jedec_10000, /* 10ms */ .block_erasers = { { @@ -2300,8 +2233,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 10000, /* 10 ms */ + .probe = probe_jedec_10000, /* 10 ms */ .block_erasers = { { @@ -2327,7 +2259,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2359,7 +2290,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2401,7 +2331,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2443,7 +2372,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2485,7 +2413,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2527,7 +2454,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2569,7 +2495,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2612,7 +2537,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2654,7 +2578,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2696,7 +2619,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_at45db, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -2735,8 +2657,7 @@ const struct flashchip flashchips[] = { .page_size = 64, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2759,8 +2680,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2791,8 +2711,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PR, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2823,8 +2742,7 @@ const struct flashchip flashchips[] = { .page_size = 0, /* unused */ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2848,8 +2766,7 @@ const struct flashchip flashchips[] = { .page_size = 0, /* unused */ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2879,8 +2796,7 @@ const struct flashchip flashchips[] = { .page_size = 0, /* unused */ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2910,8 +2826,7 @@ const struct flashchip flashchips[] = { .page_size = 0, /* unused */ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2942,8 +2857,7 @@ const struct flashchip flashchips[] = { .page_size = 0, /* unused */ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -2974,7 +2888,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, /* TODO: LPC OK too? */ .tested = TEST_UNTESTED, .probe = probe_82802ab, /* TODO: 0xff cmd not documented? */ - .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -3009,8 +2922,7 @@ const struct flashchip flashchips[] = { .page_size = 0, /* unused */ .feature_bits = 0, .tested = TEST_OK_PR, - .probe = probe_jedec, /* FIXME! */ - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, /* FIXME! */ .block_erasers = { { @@ -3033,8 +2945,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PR, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -3060,8 +2971,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -3093,7 +3003,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3128,7 +3037,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3163,7 +3071,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3197,7 +3104,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3231,7 +3137,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3265,7 +3170,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3299,7 +3203,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3334,7 +3237,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3369,7 +3271,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3404,7 +3305,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3439,7 +3339,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3474,7 +3373,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3509,7 +3407,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3544,7 +3441,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3579,7 +3475,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3614,7 +3509,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3649,7 +3543,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3684,7 +3577,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3719,7 +3611,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3757,7 +3648,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3795,7 +3685,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3833,7 +3722,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3868,7 +3756,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3903,7 +3790,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3938,7 +3824,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3973,7 +3858,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4009,7 +3893,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4045,7 +3928,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4083,7 +3965,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4123,7 +4004,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4159,7 +4039,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4195,7 +4074,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4232,7 +4110,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_OK_PR, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4270,7 +4147,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4308,7 +4184,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_OK_PR, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 2048} }, @@ -4345,7 +4220,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 4096} }, @@ -4380,7 +4254,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 32} }, @@ -4415,7 +4288,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 64} }, @@ -4450,7 +4322,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, @@ -4485,7 +4356,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 256} }, @@ -4520,7 +4390,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 512} }, @@ -4558,7 +4427,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 1024} }, @@ -4596,7 +4464,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 2048} }, @@ -4629,8 +4496,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -4657,8 +4523,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_OK_PR, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -4689,8 +4554,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -4722,7 +4586,6 @@ const struct flashchip flashchips[] = { .feature_bits = 0, .tested = TEST_OK_PREW, .probe = probe_en29lv640b, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -4751,8 +4614,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -4783,8 +4645,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -4817,7 +4678,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -4849,7 +4709,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -4881,7 +4740,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, .block_erasers = { { @@ -4913,7 +4771,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, .block_erasers = { { @@ -4946,7 +4803,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -4984,7 +4840,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 16} }, @@ -5018,7 +4873,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 32} }, @@ -5055,7 +4909,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5093,7 +4946,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5132,7 +4984,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5171,7 +5022,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5210,7 +5060,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5249,7 +5098,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5288,7 +5136,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5327,7 +5174,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 256} }, @@ -5363,8 +5209,7 @@ const struct flashchip flashchips[] = { .page_size = 256 * 1024, .feature_bits = FEATURE_EITHER_RESET, /* Some revisions may need FEATURE_ADDR_2AA */ .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -5395,8 +5240,7 @@ const struct flashchip flashchips[] = { .page_size = 256 * 1024, .feature_bits = FEATURE_EITHER_RESET, /* Some revisions may need FEATURE_ADDR_2AA */ .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -5427,8 +5271,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -5456,7 +5299,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5495,7 +5337,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5534,7 +5375,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5573,7 +5413,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5612,7 +5451,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5651,7 +5489,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -5687,8 +5524,7 @@ const struct flashchip flashchips[] = { .total_size = 128, .page_size = 128 * 1024, /* 8k + 2x4k + 112k */ .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -5714,8 +5550,7 @@ const struct flashchip flashchips[] = { .total_size = 128, .page_size = 128 * 1024, /* 112k + 2x4k + 8k */ .tested = TEST_OK_PR, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -5742,7 +5577,6 @@ const struct flashchip flashchips[] = { .page_size = 256 * 1024, .tested = TEST_OK_PRE, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -5769,7 +5603,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -5792,7 +5625,6 @@ const struct flashchip flashchips[] = { .page_size = 128 * 1024, /* maximal block size */ .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -5819,7 +5651,6 @@ const struct flashchip flashchips[] = { .page_size = 128 * 1024, /* maximal block size */ .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -5847,7 +5678,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -5875,7 +5705,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -5903,7 +5732,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = { { @@ -5928,7 +5756,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = { { @@ -5952,7 +5779,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = {.probe = OK, .read = OK, .erase = NA, .write = NA}, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, /* MX23L3254 is a mask ROM, so it is read-only */ .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {3000, 3600}, @@ -5970,7 +5796,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6009,7 +5834,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6044,7 +5868,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6082,7 +5905,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6120,7 +5942,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6158,7 +5979,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6194,7 +6014,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6232,7 +6051,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6268,7 +6086,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6304,7 +6121,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6339,7 +6155,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6375,7 +6190,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6411,7 +6225,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6450,7 +6263,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6489,7 +6301,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6525,7 +6336,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6561,7 +6371,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6598,7 +6407,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6637,7 +6445,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6674,7 +6481,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6716,7 +6522,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6758,7 +6563,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6796,8 +6600,7 @@ const struct flashchip flashchips[] = { .page_size = 32 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -6829,8 +6632,7 @@ const struct flashchip flashchips[] = { .page_size = 32 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -6862,8 +6664,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -6894,8 +6695,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -6926,8 +6726,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -6953,8 +6752,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -6981,7 +6779,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7015,7 +6812,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res1, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7044,7 +6840,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7074,7 +6869,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res1, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7103,7 +6897,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7132,7 +6925,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_res1, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7161,7 +6953,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7190,7 +6981,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res1, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7218,7 +7008,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7247,7 +7036,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7276,7 +7064,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7305,7 +7092,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7334,7 +7120,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7363,7 +7148,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7395,7 +7179,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7427,7 +7210,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7459,7 +7241,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7491,7 +7272,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7524,7 +7304,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { { 4 * 1024, 256 } }, @@ -7556,7 +7335,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7589,7 +7367,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7622,7 +7399,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7653,7 +7429,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {256, 512} }, @@ -7680,7 +7455,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {256, 1024} }, @@ -7707,7 +7481,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {256, 2048} }, @@ -7734,7 +7507,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {256, 4096} }, @@ -7761,7 +7533,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {256, 8192} }, @@ -7791,7 +7562,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7828,7 +7598,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7862,7 +7631,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7896,7 +7664,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7930,7 +7697,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -7964,7 +7730,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 4096 } }, @@ -7997,7 +7762,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 4096 } }, @@ -8027,8 +7791,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -8054,8 +7817,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -8081,8 +7843,7 @@ const struct flashchip flashchips[] = { .page_size = 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -8108,8 +7869,7 @@ const struct flashchip flashchips[] = { .page_size = 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -8135,8 +7895,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -8162,8 +7921,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -8189,8 +7947,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -8217,7 +7974,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8258,7 +8014,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8299,7 +8054,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8340,7 +8094,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8378,7 +8131,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8413,7 +8165,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8450,7 +8201,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8488,7 +8238,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8526,7 +8275,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8564,7 +8312,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8602,7 +8349,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res3, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8634,7 +8380,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res3, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8666,7 +8411,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8698,7 +8442,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8730,7 +8473,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8762,7 +8504,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8800,7 +8541,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -8837,8 +8577,7 @@ const struct flashchip flashchips[] = { .page_size = 8 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe = probe_jedec_default, .block_erasers = { { @@ -8869,8 +8608,7 @@ const struct flashchip flashchips[] = { .page_size = 8 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe = probe_jedec_default, .block_erasers = { { @@ -8901,8 +8639,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -8931,8 +8668,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -8961,8 +8697,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PR, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -8991,8 +8726,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -9021,8 +8755,7 @@ const struct flashchip flashchips[] = { .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ + .probe = probe_jedec_0, .block_erasers = { { @@ -9052,8 +8785,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ + .probe = probe_jedec_0, .block_erasers = { { @@ -9084,7 +8816,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, @@ -9115,7 +8846,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, @@ -9145,7 +8875,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9176,7 +8905,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {256, 2 * 1024} }, @@ -9207,7 +8935,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, @@ -9238,7 +8965,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 256} }, @@ -9272,7 +8998,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {8 * 1024, 128} }, @@ -9302,7 +9027,6 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9333,7 +9057,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9366,7 +9089,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9395,7 +9117,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9424,7 +9145,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9453,7 +9173,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9482,7 +9201,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9511,7 +9229,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, @@ -9545,7 +9262,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 256} }, @@ -9580,7 +9296,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 512} }, @@ -9615,7 +9330,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 1024} }, @@ -9650,7 +9364,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 2048} }, @@ -9686,7 +9399,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 4096} }, @@ -9720,7 +9432,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rems, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9752,7 +9463,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9784,7 +9494,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_UNTESTED, .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9816,7 +9525,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rems, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9854,7 +9562,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rems, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9892,7 +9599,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_UNTESTED, .probe = probe_spi_rems, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9924,7 +9630,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9962,7 +9667,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PR, .probe = probe_spi_rems, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -9994,7 +9698,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10032,7 +9735,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rems, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10070,7 +9772,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10108,7 +9809,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10146,7 +9846,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10184,7 +9883,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10222,7 +9920,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10257,7 +9954,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10292,7 +9988,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10330,7 +10025,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10368,7 +10062,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -10406,7 +10099,6 @@ const struct flashchip flashchips[] = { .feature_bits = 0, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst28sf040.c) */ .block_erasers = { { @@ -10433,8 +10125,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PR, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -10457,8 +10148,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -10481,8 +10171,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -10505,8 +10194,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -10529,8 +10217,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10556,8 +10243,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10583,8 +10269,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10610,8 +10295,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10637,8 +10321,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10664,8 +10347,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10691,8 +10373,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10718,8 +10399,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10745,8 +10425,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10775,8 +10454,7 @@ const struct flashchip flashchips[] = { .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10807,8 +10485,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10842,8 +10519,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10875,7 +10551,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -10907,8 +10582,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -10940,7 +10614,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -10973,7 +10646,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -11005,8 +10677,7 @@ const struct flashchip flashchips[] = { .page_size = 16 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -11035,8 +10706,7 @@ const struct flashchip flashchips[] = { .page_size = 4 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PRE, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -11065,8 +10735,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150 ns */ + .probe = probe_jedec_1, /* 150 ns */ .block_erasers = { { @@ -11095,8 +10764,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 1, /* 150ns */ + .probe = probe_jedec_1, /* 150ns */ .block_erasers = { { @@ -11126,8 +10794,7 @@ const struct flashchip flashchips[] = { .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe = probe_jedec_default, .block_erasers = { { @@ -11157,7 +10824,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRE, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -11189,8 +10855,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11221,8 +10886,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11253,8 +10917,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* datasheet specifies no timing */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11282,7 +10945,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -11314,7 +10976,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -11345,8 +11006,7 @@ const struct flashchip flashchips[] = { .page_size = 16 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11372,8 +11032,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11399,8 +11058,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -11424,7 +11082,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -11457,7 +11114,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -11490,7 +11146,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRE, .probe = probe_82802ab, - .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -11523,7 +11178,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -11556,7 +11210,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -11586,7 +11239,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -11611,7 +11263,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -11636,7 +11287,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -11661,7 +11311,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -11686,7 +11335,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { @@ -11716,8 +11364,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11743,8 +11390,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11770,8 +11416,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11796,8 +11441,7 @@ const struct flashchip flashchips[] = { .page_size = 512, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11822,8 +11466,7 @@ const struct flashchip flashchips[] = { .page_size = 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -11849,8 +11492,7 @@ const struct flashchip flashchips[] = { .page_size = 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, + .probe = probe_jedec_0, .block_erasers = { { @@ -11876,8 +11518,7 @@ const struct flashchip flashchips[] = { .page_size = 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11903,8 +11544,7 @@ const struct flashchip flashchips[] = { .page_size = 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11930,8 +11570,7 @@ const struct flashchip flashchips[] = { .page_size = 16384, /* Non-uniform sectors */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11962,8 +11601,7 @@ const struct flashchip flashchips[] = { .page_size = 16384, /* Non-uniform sectors */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .probe = probe_jedec_0, .block_erasers = { { @@ -11997,7 +11635,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12037,7 +11674,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12077,7 +11713,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12117,7 +11752,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12157,7 +11791,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12196,7 +11829,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12235,7 +11867,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12274,7 +11905,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12314,7 +11944,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12354,7 +11983,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12394,7 +12022,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12432,7 +12059,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12464,7 +12090,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12496,7 +12121,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12528,7 +12152,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12560,7 +12183,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12598,7 +12220,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12636,7 +12257,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -12674,7 +12294,6 @@ const struct flashchip flashchips[] = { .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PREW, .probe = probe_w29ee011, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (w29ee011.c) */ .block_erasers = { { @@ -12696,8 +12315,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, /* used datasheet for the W29C011A */ + .probe = probe_jedec_10, /* used datasheet for the W29C011A */ .block_erasers = { { @@ -12719,8 +12337,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12743,8 +12360,7 @@ const struct flashchip flashchips[] = { .page_size = 256, .feature_bits = FEATURE_LONG_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12767,8 +12383,7 @@ const struct flashchip flashchips[] = { .page_size = 4 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12795,8 +12410,7 @@ const struct flashchip flashchips[] = { .page_size = 4 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12823,8 +12437,7 @@ const struct flashchip flashchips[] = { .page_size = 4 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12854,8 +12467,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PR, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12885,8 +12497,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12913,8 +12524,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12941,8 +12551,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -12969,8 +12578,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13001,8 +12609,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13030,8 +12637,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13058,8 +12664,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13086,8 +12691,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13118,8 +12722,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PROBE, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13142,8 +12745,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13174,8 +12776,7 @@ const struct flashchip flashchips[] = { .page_size = 128, .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13206,8 +12807,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13235,8 +12835,7 @@ const struct flashchip flashchips[] = { .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_jedec, - .probe_timing = 10, + .probe = probe_jedec_10, .block_erasers = { { @@ -13308,7 +12907,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid4, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13323,7 +12921,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13338,7 +12935,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13353,7 +12949,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13368,7 +12963,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13383,7 +12977,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13398,7 +12991,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13413,7 +13005,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, @@ -13428,7 +13019,6 @@ const struct flashchip flashchips[] = { .page_size = 256, .tested = TEST_BAD_PREW, .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, }, diff --git a/jedec.c b/jedec.c index 08cc88b..a9ace95 100644 --- a/jedec.c +++ b/jedec.c @@ -120,29 +120,14 @@ static void start_program_jedec_common(const struct flashctx *flash, unsigned in chip_writeb(flash, 0xA0, bios + (0x5555 & mask)); } -static int probe_jedec_common(struct flashctx *flash, unsigned int mask) +static int probe_jedec_common(struct flashctx *flash, unsigned int probe_timing_enter, unsigned int probe_timing_exit) { chipaddr bios = flash->virtual_memory; const struct flashchip *chip = flash->chip; + const unsigned int mask = getaddrmask(flash->chip); uint8_t id1, id2; uint32_t largeid1, largeid2; uint32_t flashcontent1, flashcontent2; - unsigned int probe_timing_enter, probe_timing_exit; - - if (chip->probe_timing > 0) - probe_timing_enter = probe_timing_exit = chip->probe_timing; - else if (chip->probe_timing == TIMING_ZERO) { /* No delay. */ - probe_timing_enter = probe_timing_exit = 0; - } else if (chip->probe_timing == TIMING_FIXME) { /* == _IGNORED */ - msg_cdbg("Chip lacks correct probe timing information, " - "using default 10mS/40uS. "); - probe_timing_enter = 10000; - probe_timing_exit = 40; - } else { - msg_cerr("Chip has negative value in probe_timing, failing " - "without chip access\n"); - return 0; - } /* Earlier probes might have been too fast for the chip to enter ID * mode completely. Allow the chip to finish this before seeing a @@ -245,7 +230,7 @@ static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page, { chipaddr bios = flash->virtual_memory; unsigned int delay_us = 0; - if(flash->chip->probe_timing != TIMING_ZERO) + if (flash->chip->feature_bits & FEATURE_SLOW_ERASE_CMDS) delay_us = 10; /* Issue the Sector Erase command */ @@ -275,7 +260,7 @@ static int erase_block_jedec_common(struct flashctx *flash, unsigned int block, { chipaddr bios = flash->virtual_memory; unsigned int delay_us = 0; - if(flash->chip->probe_timing != TIMING_ZERO) + if (flash->chip->feature_bits & FEATURE_SLOW_ERASE_CMDS) delay_us = 10; /* Issue the Sector Erase command */ @@ -304,7 +289,7 @@ static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; unsigned int delay_us = 0; - if(flash->chip->probe_timing != TIMING_ZERO) + if (flash->chip->feature_bits & FEATURE_SLOW_ERASE_CMDS) delay_us = 10; /* Issue the JEDEC Chip Erase command */ @@ -477,12 +462,30 @@ int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr, return erase_chip_jedec_common(flash, mask); } -int probe_jedec(struct flashctx *flash) +int probe_jedec_default(struct flashctx *flash) { - unsigned int mask; + msg_cdbg("Chip lacks exact probe timing information, using default 10 ms/40 us. "); + return probe_jedec_common(flash, 10000, 40); +} - mask = getaddrmask(flash->chip); - return probe_jedec_common(flash, mask); +int probe_jedec_0(struct flashctx *flash) +{ + return probe_jedec_common(flash, 0, 0); +} + +int probe_jedec_1(struct flashctx *flash) +{ + return probe_jedec_common(flash, 1, 1); +} + +int probe_jedec_10(struct flashctx *flash) +{ + return probe_jedec_common(flash, 10, 10); +} + +int probe_jedec_10000(struct flashctx *flash) +{ + return probe_jedec_common(flash, 10000, 10000); } int erase_sector_jedec(struct flashctx *flash, unsigned int page, -- Kind regards, Stefan Tauner

1 0

W836xx: 3354A31: flashrom -V
by id slacker 30 May '14

30 May '14

# flashrom -p internal -V flashrom v0.9.7-r1804 on Linux 3.14.4-100.fc19.x86_64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.1, GCC 4.8.2 20131212 (Red Hat 4.8.2-7), little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 1 usecs, 1087M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 993 us, 10000 myus = 9930 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. Using Internal DMI decoder. DMI string chassis-type: "Notebook" Laptop detected via DMI. DMI string system-manufacturer: "LENOVO" DMI string system-product-name: "3354A31" DMI string system-version: "ThinkPad Edge E330" DMI string baseboard-manufacturer: "LENOVO" DMI string baseboard-product-name: "3354A31" DMI string baseboard-version: "Not Available" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: fc.

1 0

[PATCH] Add default arguments for the default programmer (only).
by Stefan Tauner 30 May '14

30 May '14

This code exists thanks to food for thought from Urja Rannikko. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- Makefile | 6 ++++++ cli_classic.c | 6 ++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 346d46a..998979d 100644 --- a/Makefile +++ b/Makefile @@ -52,6 +52,11 @@ DOSLIBS_BASE ?= .. # evaluated below, namely those that enable/disable the various programmers). # Compilation will fail for unspecified values. CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INVALID +# The following adds a default parameter for the default programmer set above (only). +CONFIG_DEFAULT_PROGRAMMER_ARGS ?= '' +# Example: compiling with +# make CONFIG_DEFAULT_PROGRAMMER=PROGRAMMER_SERPROG CONFIG_DEFAULT_PROGRAMMER_ARGS="dev=/dev/ttyUSB0:1500000" +# would make executing './flashrom' (almost) equivialent to './flashrom -p serprog:dev=/dev/ttyUSB0:1500000'. # If your compiler spits out excessive warnings, run make WARNERROR=no # You shouldn't have to change this flag. @@ -471,6 +476,7 @@ CONFIG_INTERNAL_DMI ?= yes # Depending on the CONFIG_* variables set and verified above we set compiler flags and parameters below. FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER=$(CONFIG_DEFAULT_PROGRAMMER)' +FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER_ARGS="$(CONFIG_DEFAULT_PROGRAMMER_ARGS)"' ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' diff --git a/cli_classic.c b/cli_classic.c index a32d55b..fc1b9ba 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -396,8 +396,10 @@ int main(int argc, char *argv[]) if (prog == PROGRAMMER_INVALID) { if (CONFIG_DEFAULT_PROGRAMMER != PROGRAMMER_INVALID) { prog = CONFIG_DEFAULT_PROGRAMMER; - msg_pinfo("Using default programmer \"%s\".\n", - programmer_table[CONFIG_DEFAULT_PROGRAMMER].name); + /* We need to strdup here because we free(pparam) unconditionally later. */ + pparam = strdup(CONFIG_DEFAULT_PROGRAMMER_ARGS); + msg_pinfo("Using default programmer \"%s\" with arguments \"%s\".\n", + programmer_table[CONFIG_DEFAULT_PROGRAMMER].name, pparam); } else { msg_perr("Please select a programmer with the --programmer parameter.\n" "Previously this was not necessary because there was a default set.\n" -- Kind regards, Stefan Tauner

1 0

[PATCH] Combine block_erase*_en29lv640b and block_erase*_m29f400bt respectively.
by Stefan Tauner 29 May '14

29 May '14

This patch combines two identical block and chip erase functions respectively: - Merge block_erase_m29f400bt and block_erase_en29lv640b into erase_block_shifted_jedec. - Merge block_erase_chip_m29f400bt and block_erase_chip_en29lv640b into erase_chip_block_shifted_jedec. Leave their implementations in en29lv640b.c for now. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipdrivers.h | 6 ++---- en29lv640b.c | 10 ++++------ flashchips.c | 28 ++++++++++++++-------------- m29f400bt.c | 51 --------------------------------------------------- 4 files changed, 20 insertions(+), 75 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 7fe3202..ee86f83 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -147,8 +147,6 @@ int erase_chip_block_jedec(struct flashctx *flash, unsigned int page, unsigned i /* m29f400bt.c */ int probe_m29f400bt(struct flashctx *flash); -int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len); -int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len); int write_m29f400bt(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); void protect_m29f400bt(struct flashctx *flash, chipaddr bios); @@ -199,8 +197,8 @@ int unlock_stm50_nonuniform(struct flashctx *flash); /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); -int block_erase_en29lv640b(struct flashctx *flash, unsigned int start, unsigned int len); -int block_erase_chip_en29lv640b(struct flashctx *flash, unsigned int start, unsigned int len); +int erase_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len); +int erase_chip_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len); int write_en29lv640b(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); #endif /* !__CHIPDRIVERS_H__ */ diff --git a/en29lv640b.c b/en29lv640b.c index 110aa18..a274f62 100644 --- a/en29lv640b.c +++ b/en29lv640b.c @@ -86,7 +86,7 @@ int probe_en29lv640b(struct flashctx *flash) return 0; } -int erase_en29lv640b(struct flashctx *flash) +static int erase_chip_shifted_jedec(struct flashctx *flash) { chipaddr bios = flash->virtual_memory; @@ -105,8 +105,7 @@ int erase_en29lv640b(struct flashctx *flash) return 0; } -int block_erase_en29lv640b(struct flashctx *flash, unsigned int start, - unsigned int len) +int erase_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len) { chipaddr bios = flash->virtual_memory; chipaddr dst = bios + start; @@ -126,12 +125,11 @@ int block_erase_en29lv640b(struct flashctx *flash, unsigned int start, return 0; } -int block_erase_chip_en29lv640b(struct flashctx *flash, unsigned int address, - unsigned int blocklen) +int erase_chip_block_shifted_jedec(struct flashctx *flash, unsigned int address, unsigned int blocklen) { if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; } - return erase_en29lv640b(flash); + return erase_chip_shifted_jedec(flash); } diff --git a/flashchips.c b/flashchips.c index 78c18ca..4a1e9f6 100644 --- a/flashchips.c +++ b/flashchips.c @@ -4730,10 +4730,10 @@ const struct flashchip flashchips[] = { {8 * 1024, 8}, {64 * 1024, 127}, }, - .block_erase = block_erase_en29lv640b, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, - .block_erase = block_erase_chip_en29lv640b, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_en29lv640b, @@ -4827,10 +4827,10 @@ const struct flashchip flashchips[] = { {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, @@ -4859,10 +4859,10 @@ const struct flashchip flashchips[] = { {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, @@ -4891,10 +4891,10 @@ const struct flashchip flashchips[] = { {32 * 1024, 1}, {64 * 1024, 31}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, /* Supports a fast mode too */ @@ -4923,10 +4923,10 @@ const struct flashchip flashchips[] = { {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, }, }, .write = write_m29f400bt, /* Supports a fast mode too */ @@ -11292,10 +11292,10 @@ const struct flashchip flashchips[] = { {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, } }, .write = write_m29f400bt, @@ -11324,10 +11324,10 @@ const struct flashchip flashchips[] = { {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = block_erase_m29f400bt, + .block_erase = erase_block_shifted_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = block_erase_chip_m29f400bt, + .block_erase = erase_chip_block_shifted_jedec, } }, .write = write_m29f400bt, diff --git a/m29f400bt.c b/m29f400bt.c index c2236e5..399a7e0 100644 --- a/m29f400bt.c +++ b/m29f400bt.c @@ -85,54 +85,3 @@ int probe_m29f400bt(struct flashctx *flash) return 0; } - -int erase_m29f400bt(struct flashctx *flash) -{ - chipaddr bios = flash->virtual_memory; - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x80, bios + 0xAAA); - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x10, bios + 0xAAA); - - programmer_delay(10); - toggle_ready_jedec(flash, bios); - - /* FIXME: Check the status register for errors. */ - return 0; -} - -int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, - unsigned int len) -{ - chipaddr bios = flash->virtual_memory; - chipaddr dst = bios + start; - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x80, bios + 0xAAA); - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x30, dst); - - programmer_delay(10); - toggle_ready_jedec(flash, bios); - - /* FIXME: Check the status register for errors. */ - return 0; -} - -int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, - unsigned int blocklen) -{ - if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { - msg_cerr("%s called with incorrect arguments\n", - __func__); - return -1; - } - return erase_m29f400bt(flash); -} -- Kind regards, Stefan Tauner

1 0

[PATCH] Unlock ST M50FW002 correctly
by Carl-Daniel Hailfinger 29 May '14

29 May '14

Unlock ST M50FW002 correctly Refactor ST M50 family unlocking TODO: Unify write_lockbits_49fl00x() and unlock_block_stm50() and unlock_w39_fwh_block() and unlock_82802ab() and write_lockbits_block_49lfxxxc(). They all use exactly the same mechanism, but they don't share any code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-stm50fw002_unlock/flashchips.c =================================================================== --- flashrom-stm50fw002_unlock/flashchips.c (Revision 1437) +++ flashrom-stm50fw002_unlock/flashchips.c (Arbeitskopie) @@ -7523,9 +7523,9 @@ .total_size = 256, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -7536,9 +7536,12 @@ {16 * 1024, 1}, }, .block_erase = erase_block_82802ab, + }, { + .eraseblocks = { {256 * 1024, 1}, }, + .block_erase = NULL, /* Only in A/A mux mode */ } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50fw002, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ Index: flashrom-stm50fw002_unlock/stm50flw0x0x.c =================================================================== --- flashrom-stm50fw002_unlock/stm50flw0x0x.c (Revision 1437) +++ flashrom-stm50fw002_unlock/stm50flw0x0x.c (Arbeitskopie) @@ -3,6 +3,7 @@ * * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> + * Copyright (C) 2011 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -31,6 +32,21 @@ #include "flashchips.h" #include "chipdrivers.h" +#define STM50_UNLOCKED 0x00 + +static int unlock_block_stm50(struct flashchip *flash, int offset) +{ + chipaddr lock = flash->virtual_registers + offset + 2; + + msg_cdbg("Unlocking at 0x%x\n", offset); + chip_writeb(STM50_UNLOCKED, lock); + if (chip_readb(lock) != STM50_UNLOCKED) { + msg_cerr("Cannot unlock at 0x%x\n", offset); + return -1; + } + return 0; +} + /* * claus.gindhart(a)kontron.com * The ST M50FLW080B and STM50FLW080B chips have to be unlocked, @@ -38,8 +54,6 @@ */ static int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset) { - chipaddr wrprotect = flash->virtual_registers + 2; - static const uint8_t unlock_sector = 0x00; int j; /* @@ -58,22 +72,12 @@ || (offset == 0xF0000)) { // unlock each 4k-sector - for (j = 0; j < 0x10000; j += 0x1000) { - msg_cdbg("unlocking at 0x%x\n", offset + j); - chip_writeb(unlock_sector, wrprotect + offset + j); - if (chip_readb(wrprotect + offset + j) != unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", - offset + j); + for (j = 0; j < 0x10000; j += 0x1000) + if (unlock_block_stm50(flash, offset + j)) return -1; - } - } } else { - msg_cdbg("unlocking at 0x%x\n", offset); - chip_writeb(unlock_sector, wrprotect + offset); - if (chip_readb(wrprotect + offset) != unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", offset); + if (unlock_block_stm50(flash, offset)) return -1; - } } return 0; @@ -93,6 +97,27 @@ return 0; } +/* FIXME: Should this be moved to a generic walk_unlockregions()? */ +int unlock_stm50fw002(struct flashchip *flash) +{ + static const struct eraseblock unlockregions[4] = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}}; + int i, j; + int addr = 0; + + for (i = 0; i < 4; i++) { + for (j = 0; j < unlockregions[i].count; j++) { + if (unlock_block_stm50(flash, addr)) + return 1; + addr += unlockregions[i].size; + } + } + return 0; +} + /* This function is unused. */ int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize) { Index: flashrom-stm50fw002_unlock/chipdrivers.h =================================================================== --- flashrom-stm50fw002_unlock/chipdrivers.h (Revision 1437) +++ flashrom-stm50fw002_unlock/chipdrivers.h (Arbeitskopie) @@ -146,5 +146,6 @@ /* stm50flw0x0x.c */ int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); int unlock_stm50flw0x0x(struct flashchip *flash); +int unlock_stm50fw002(struct flashchip *flash); #endif /* !__CHIPDRIVERS_H__ */ -- http://www.hailfinger.org/

3 3

Winbond W25X80: flashrom -V (SUCCESS!)
by Bernardo Kuri 29 May '14

29 May '14

Hello, Looks like everything went smoothly. I have attached the output in a text file. BTW, the board is a Zotac IONITX-F-E Intel Atom 330. Thank you! *Bernardo Kurihttp://bkuri.com <http://bkuri.com>*

1 0

[commit] r1805 - trunk
by repository service 29 May '14

29 May '14

Author: stefanct Date: Thu May 29 13:51:24 2014 New Revision: 1805 URL: http://flashrom.org/trac/flashrom/changeset/1805 Log: jedec.c: constify a bit more. Also, include chipdrivers.h to find conflicting types between exported declarations and actual implementations. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/jedec.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Wed May 28 15:02:13 2014 (r1804) +++ trunk/chipdrivers.h Thu May 29 13:51:24 2014 (r1805) @@ -136,10 +136,8 @@ /* jedec.c */ uint8_t oddparity(uint8_t val); -void toggle_ready_jedec(struct flashctx *flash, chipaddr dst); -void data_polling_jedec(struct flashctx *flash, chipaddr dst, uint8_t data); -int write_byte_program_jedec(struct flashctx *flash, chipaddr bios, uint8_t *src, - chipaddr dst); +void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst); +void data_polling_jedec(const struct flashctx *flash, chipaddr dst, uint8_t data); int probe_jedec(struct flashctx *flash); int write_jedec(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int write_jedec_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Wed May 28 15:02:13 2014 (r1804) +++ trunk/jedec.c Thu May 29 13:51:24 2014 (r1805) @@ -23,6 +23,7 @@ */ #include "flash.h" +#include "chipdrivers.h" #define MAX_REFLASH_TRIES 0x10 #define MASK_FULL 0xffff @@ -111,8 +112,7 @@ } } -static void start_program_jedec_common(struct flashctx *flash, - unsigned int mask) +static void start_program_jedec_common(const struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); @@ -328,7 +328,7 @@ return 0; } -static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src, +static int write_byte_program_jedec_common(const struct flashctx *flash, const uint8_t *src, chipaddr dst, unsigned int mask) { int tried = 0, failed = 0; @@ -358,7 +358,7 @@ } /* chunksize is 1 */ -int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, +int write_jedec_1(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int len) { int i, failed = 0; @@ -380,11 +380,11 @@ return failed; } -static int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, +static int write_page_write_jedec_common(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int page_size) { int i, tried = 0, failed; - uint8_t *s = src; + const uint8_t *s = src; chipaddr bios = flash->virtual_memory; chipaddr dst = bios + start; chipaddr d = dst; @@ -428,7 +428,7 @@ * This function is a slightly modified copy of spi_write_chunked. * Each page is written separately in chunks with a maximum size of chunksize. */ -int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, +int write_jedec(struct flashctx *flash, const uint8_t *buf, unsigned int start, int unsigned len) { unsigned int i, starthere, lenhere;

1 0

dlink-dir615 F25L32PA
by chris 28 May '14

28 May '14

Hi i have a bricked router i was using as a test for my new ftdi cable and came across the message that flashrom posted out. thought i would send you the chip details if it helps you expand the flashrom device support. The router fron Dlink uses a Linux kernel firmware and was bricked through the web interface UI update. Anyway it is a ESMT F25L32PA c000x 1014. these are all the numbers on the flash chip.

3 6

enum test_state value for "depends"
by Stefan Tauner 28 May '14

28 May '14

We currently have an enum test_state { OK = 0, NT = 1, /* Not tested */ BAD }; This is used in various arrays, namely those for boards, board enables, chipsets, programmers, and rayer_spi (LPT) devices. I'd like to add another state that indicates that support is configuration-dependent. Most infamous use cases would be boards with ME chipsets and ME chipsets. Another example is the atavia VT6421A LPC programmer which works in general, just not all boards due to a not fully understood offset configuration that is board-specific. Names... CONFIG is quite long but obvious to understand, CD for configuration-dependent would suite me too, but I am open to suggestions. What about DEP? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 10

[commit] r1804 - trunk
by repository service 28 May '14

28 May '14

Author: stefanct Date: Wed May 28 15:02:13 2014 New Revision: 1804 URL: http://flashrom.org/trac/flashrom/changeset/1804 Log: print_wiki: simplify template handling. Add test_state_to_template() and use it everywhere to select the correct template. This also enables the use of the new states in all tables. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/print_wiki.c Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Wed May 28 00:10:15 2014 (r1803) +++ trunk/print_wiki.c Wed May 28 15:02:13 2014 (r1804) @@ -95,6 +95,21 @@ ! align=\"center\" | IDs\n\ ! align=\"center\" | Status\n\n"; +/* The output of this module relies on MediaWiki templates to select special formatting styles for table cells + * reflecting the test status of the respective hardware. This functions returns the correct template name for + * the supplied enum test_state. */ +static const char *test_state_to_template(enum test_state test_state) +{ + switch (test_state) { + case OK: return "OK"; + case BAD: return "No"; + case NA: return "NA"; + case DEP: return "Dep"; + case NT: + default: return "?3"; + } +} + #if CONFIG_INTERNAL == 1 static const char laptop_intro[] = "\n== Supported laptops/notebooks ==\n\n\ In general, flashing laptops is more difficult because laptops\n\n\ @@ -133,10 +148,10 @@ color = !color; printf("|- bgcolor=\"#%s\"\n| %s || %s " - "|| %04x:%04x || %s\n", (color) ? "eeeeee" : "dddddd", + "|| %04x:%04x || {{%s}}\n", (color) ? "eeeeee" : "dddddd", e[i].vendor_name, e[i].device_name, e[i].vendor_id, e[i].device_id, - (e[i].status == OK) ? "{{OK}}" : "{{?3}}"); + test_state_to_template(e[i].status)); if (((i % lines_per_col) + 1) == lines_per_col) printf("\n|}\n\n"); @@ -202,8 +217,7 @@ b[k].lb_vendor ? b[k].lb_vendor : "", b[k].lb_vendor ? ":" : "", b[k].lb_vendor ? b[k].lb_part : "", - (boards[i].working == OK) ? "OK" : - (boards[i].working == NT) ? "?3" : "No"); + test_state_to_template(boards[i].working)); if (boards[i].note) { num_notes++; @@ -286,46 +300,18 @@ c = !c; old = f; - const char *probe, *read, *write, *erase; - switch (f->tested.probe) { - case OK: probe = "OK"; break; - case BAD: probe = "No"; break; - case NA: probe = "NA"; break; - case DEP: probe = "Dep"; break; - default: probe = "?3"; break; - } - switch (f->tested.read) { - case OK: read = "OK"; break; - case BAD: read = "No"; break; - case NA: read = "NA"; break; - case DEP: read = "Dep"; break; - default: read = "?3"; break; - } - switch (f->tested.erase) { - case OK: erase = "OK"; break; - case BAD: erase = "No"; break; - case NA: erase = "NA"; break; - case DEP: erase = "Dep"; break; - default: erase = "?3"; break; - } - switch (f->tested.write) { - case OK: write = "OK"; break; - case BAD: write = "No"; break; - case NA: write = "NA"; break; - case DEP: write = "Dep"; break; - default: write = "?3"; break; - } s = flashbuses_to_text(f->bustype); sprintf(vmin, "%0.03f", f->voltage.min / (double)1000); sprintf(vmax, "%0.03f", f->voltage.max / (double)1000); - /* '{{%s}}' is used in combination with 'OK', 'No' and '?3' to - * select special formatting templates for the bg color. */ printf("|- bgcolor=\"#%s\"\n| %s || %s || align=\"right\" | %d " "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}" "|| %s || %s \n", (c == 1) ? "eeeeee" : "dddddd", f->vendor, f->name, f->total_size, s, - probe, read, erase, write, + test_state_to_template(f->tested.probe), + test_state_to_template(f->tested.read), + test_state_to_template(f->tested.erase), + test_state_to_template(f->tested.write), f->voltage.min ? vmin : "?", f->voltage.max ? vmax : "?"); free(s); @@ -366,7 +352,7 @@ if (i == 0) printf("| rowspan=\"%u\" | %s |", count, prog.name); printf("| %s || %s || %04x:%04x || {{%s}}\n", devs[i].vendor_name, devs[i].device_name, - devs[i].vendor_id, devs[i].device_id, (devs[i].status == NT) ? "?3" : "OK"); + devs[i].vendor_id, devs[i].device_id, test_state_to_template(devs[i].status)); } }

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Re: [flashrom] Please help me with my new mainboard
by 磊赵 28 May '14

28 May '14

Would you help me again? Flashrom works fine. I just get the binary flash file the flashrom saved. How can I find and modify the logo. Is there a suggested tool? 2014-05-28 17:58 GMT+08:00, 磊赵 <zhaolei.cpp(a)gmail.com>: > Thanks It works. > "apt-get install flashrom" gave me an old version. > I download the code and compiled and it works fine. > > Thanks! > > 2014-05-28 17:51 GMT+08:00, Stefan Tauner > <stefan.tauner(a)alumni.tuwien.ac.at>: >> On Wed, 28 May 2014 17:35:04 +0800 >> 磊赵 <zhaolei.cpp(a)gmail.com> wrote: >> >>> I bought the new mainboard just yestoday and want to modify the BIOS >>> logo. >>> The flashrom(latest) did not work. >>> AFUWIN.exe (4.88) did not work neither. >>> >>> Help me! >> >> Hi, >> >> your flash chip is supported by flashrom since r1598. The latest stable >> version (0.9.7) should work if there are no other problems. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> >

1 0

Re: [flashrom] Please help me with my new mainboard
by Stefan Tauner 28 May '14

28 May '14

On Wed, 28 May 2014 17:35:04 +0800 磊赵 <zhaolei.cpp(a)gmail.com> wrote: > I bought the new mainboard just yestoday and want to modify the BIOS logo. > The flashrom(latest) did not work. > AFUWIN.exe (4.88) did not work neither. > > Help me! Hi, your flash chip is supported by flashrom since r1598. The latest stable version (0.9.7) should work if there are no other problems. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

Please help me with my new mainboard
by 磊赵 28 May '14

28 May '14

I bought the new mainboard just yestoday and want to modify the BIOS logo. The flashrom(latest) did not work. AFUWIN.exe (4.88) did not work neither. Help me!

1 0

[PATCH] CID1129998/1129999: Unchecked return value from library
by Stefan Reinauer 28 May '14

28 May '14

CID1129998/1129999: Unchecked return value from library The function returns a value that indicates an error condition. If this is not checked, the error condition may not be handled correctly. In serialport_write_nonblock: Value returned from a library function is not checked for errors before being used. This value may indicate an error condition. In serialport_config: Value returned from a library function is not checked for errors before being used. This value may indicate an error condition. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: serial.c =================================================================== --- serial.c (revision 1763) +++ serial.c (working copy) @@ -181,7 +181,10 @@ msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); #else struct termios wanted, observed; - fcntl(fd, F_SETFL, 0); + if (fcntl(fd, F_SETFL, 0) != 0) { + msg_perr_strerror("Could not set serial port mode: "); + return 1; + } if (tcgetattr(fd, &observed) != 0) { msg_perr_strerror("Could not fetch original serial port configuration: "); return 1; @@ -419,14 +422,21 @@ return -1; } if(!SetCommTimeouts(sp_fd, &newTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + return -1; + } #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { -#endif - msg_perr_strerror("Could not set serial port timeout settings %s"); + msg_perr_strerror("Could not set serial port mode to non-blocking: "); return -1; } +#endif int i; int rd_bytes = 0; @@ -458,12 +468,15 @@ /* restore original blocking behavior */ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + ret = -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif - msg_perr_strerror("Could not restore serial port timeout settings: %s\n"); + msg_perr_strerror("Could not set serial port mode to non-blocking: "); ret = -1; } +#endif return ret; } @@ -495,7 +508,14 @@ #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); - fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } + if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { + msg_perr_strerror("Could not set serial port mode to non-blocking: "); + return -1; + } #endif int i; @@ -531,10 +551,13 @@ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { msg_perr_strerror("Could not restore serial port timeout settings: "); + return -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif + msg_perr_strerror("Could not reset serial port mode: "); return -1; } +#endif return ret; }

2 2

[commit] r1803 - trunk
by repository service 28 May '14

28 May '14

Author: stefanct Date: Wed May 28 00:10:15 2014 New Revision: 1803 URL: http://flashrom.org/trac/flashrom/changeset/1803 Log: CID1129998/1129999: Unchecked return value from library. Check return values of various fcntl() invocations in serialport_config(), serialport_read_nonblock() and serialport_write_nonblock(). Also, remove some superfluous print conversion specifiers and refine messages. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/serial.c Modified: trunk/serial.c ============================================================================== --- trunk/serial.c Tue May 27 23:27:27 2014 (r1802) +++ trunk/serial.c Wed May 28 00:10:15 2014 (r1803) @@ -181,7 +181,10 @@ msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); #else struct termios wanted, observed; - fcntl(fd, F_SETFL, 0); + if (fcntl(fd, F_SETFL, 0) != 0) { + msg_perr_strerror("Could not clear serial port mode: "); + return 1; + } if (tcgetattr(fd, &observed) != 0) { msg_perr_strerror("Could not fetch original serial port configuration: "); return 1; @@ -419,14 +422,21 @@ return -1; } if(!SetCommTimeouts(sp_fd, &newTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + return -1; + } #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { -#endif - msg_perr_strerror("Could not set serial port timeout settings %s"); + msg_perr_strerror("Could not set serial port mode to non-blocking: "); return -1; } +#endif int i; int rd_bytes = 0; @@ -458,12 +468,15 @@ /* restore original blocking behavior */ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { + msg_perr_strerror("Could not restore serial port timeout settings: "); + ret = -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif - msg_perr_strerror("Could not restore serial port timeout settings: %s\n"); + msg_perr_strerror("Could not restore serial port mode to blocking: "); ret = -1; } +#endif return ret; } @@ -495,7 +508,14 @@ #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); - fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } + if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { + msg_perr_strerror("Could not set serial port mode to non-blocking: "); + return -1; + } #endif int i; @@ -531,10 +551,13 @@ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { msg_perr_strerror("Could not restore serial port timeout settings: "); + return -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif + msg_perr_strerror("Could not restore serial port blocking behavior: "); return -1; } +#endif return ret; }

1 0

[commit] r1802 - trunk
by repository service 27 May '14

27 May '14

Author: stefanct Date: Tue May 27 23:27:27 2014 New Revision: 1802 URL: http://flashrom.org/trac/flashrom/changeset/1802 Log: Rename some spi_prettyprint_status_register_* functions. spi_prettyprint_status_register_default_bpX -> spi_prettyprint_status_register_bpX_srwd Why was the default in there anyway? :) Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue May 27 23:27:14 2014 (r1801) +++ trunk/chipdrivers.h Tue May 27 23:27:27 2014 (r1802) @@ -67,10 +67,10 @@ void spi_prettyprint_status_register_bit(uint8_t status, int bit); int spi_prettyprint_status_register_plain(struct flashctx *flash); int spi_prettyprint_status_register_default_welwip(struct flashctx *flash); -int spi_prettyprint_status_register_default_bp1(struct flashctx *flash); -int spi_prettyprint_status_register_default_bp2(struct flashctx *flash); -int spi_prettyprint_status_register_default_bp3(struct flashctx *flash); -int spi_prettyprint_status_register_default_bp4(struct flashctx *flash); +int spi_prettyprint_status_register_bp1_srwd(struct flashctx *flash); +int spi_prettyprint_status_register_bp2_srwd(struct flashctx *flash); +int spi_prettyprint_status_register_bp3_srwd(struct flashctx *flash); +int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash); int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue May 27 23:27:14 2014 (r1801) +++ trunk/flashchips.c Tue May 27 23:27:27 2014 (r1802) @@ -564,7 +564,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -598,7 +598,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -633,7 +633,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -668,7 +668,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -703,7 +703,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -738,7 +738,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -778,7 +778,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -813,7 +813,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -848,7 +848,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -886,7 +886,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -924,7 +924,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -956,7 +956,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -988,7 +988,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1020,7 +1020,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1052,7 +1052,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1084,7 +1084,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1116,7 +1116,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1275,7 +1275,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enhance (sic!) */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enhance (sic!) */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4249,7 +4249,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4287,7 +4287,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4324,7 +4324,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4361,7 +4361,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4396,7 +4396,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4431,7 +4431,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4466,7 +4466,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4501,7 +4501,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4966,7 +4966,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -5000,7 +5000,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5037,7 +5037,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5075,7 +5075,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5113,7 +5113,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5152,7 +5152,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5191,7 +5191,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5230,7 +5230,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5269,7 +5269,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5308,7 +5308,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp4, + .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5990,7 +5990,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported, MX25L512E supports dual I/O */ @@ -6026,7 +6026,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported, MX25L1006E supports dual I/O */ @@ -6064,7 +6064,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -6102,7 +6102,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -6140,7 +6140,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -6175,7 +6175,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp2, /* bit6: error flag */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* bit6: error flag */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -6214,7 +6214,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* MX25L1605A bp2 only */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* MX25L1605A bp2 only */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -6249,7 +6249,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6: Continously Program (CP) mode */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6: Continously Program (CP) mode */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ @@ -6285,7 +6285,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -6321,7 +6321,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -6356,7 +6356,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp2, /* bit6: error flag */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* bit6: error flag */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -6392,7 +6392,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6: CP mode */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6: CP mode */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */ @@ -6431,7 +6431,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */ @@ -6470,7 +6470,7 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */ @@ -6506,7 +6506,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6542,7 +6542,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 has different meanings */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 has different meanings */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6578,7 +6578,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 for 36E is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 for 36E is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6618,7 +6618,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -6654,7 +6654,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* MX25L12805D: Fast read (0x0B) supported */ @@ -6695,7 +6695,7 @@ } }, /* TODO: security register */ - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -6737,7 +6737,7 @@ } }, /* TODO: security register */ - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -6779,7 +6779,7 @@ } }, /* TODO: security register */ - .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -6992,7 +6992,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7026,7 +7026,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, @@ -7055,7 +7055,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7085,7 +7085,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, @@ -7114,7 +7114,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -7143,7 +7143,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -7172,7 +7172,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7201,7 +7201,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7229,7 +7229,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7258,7 +7258,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7287,7 +7287,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7316,7 +7316,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7345,7 +7345,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7537,7 +7537,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* bit5: T/B */ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -7570,7 +7570,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* bit5: T/B */ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -7603,7 +7603,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* bit5: T/B */ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -7636,7 +7636,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* bit5: T/B */ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -8240,7 +8240,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O read (0x3B) supported */ @@ -8281,7 +8281,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O read (0x3B) supported */ @@ -8322,7 +8322,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O read (0x3B) supported */ @@ -8360,7 +8360,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O read (0x3B) supported */ @@ -8395,7 +8395,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O read (0x3B) supported */ @@ -8433,7 +8433,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ @@ -8470,7 +8470,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ @@ -8508,7 +8508,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ @@ -8546,7 +8546,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ @@ -8584,7 +8584,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ @@ -8616,7 +8616,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -8648,7 +8648,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -8680,7 +8680,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp1, + .printlock = spi_prettyprint_status_register_bp1_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -8712,7 +8712,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8744,7 +8744,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -8782,7 +8782,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -8820,7 +8820,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ @@ -9128,7 +9128,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -9220,7 +9220,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, /* some quad-read supported ("HD_READ mode") */ @@ -9254,7 +9254,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -9285,7 +9285,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, + .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, /* some quad-read supported ("HD_READ mode") */ @@ -9527,7 +9527,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ @@ -9561,7 +9561,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ @@ -9596,7 +9596,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, + .printlock = spi_prettyprint_status_register_bp3_srwd, .unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ @@ -9631,7 +9631,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* TODO: improve */ .unlock = spi_disable_blockprotect_bp2_srwd, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -9666,7 +9666,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp2, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_bp2_srwd, /* TODO: improve */ .unlock = spi_disable_blockprotect_bp2_srwd, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Tue May 27 23:27:14 2014 (r1801) +++ trunk/spi25_statusreg.c Tue May 27 23:27:27 2014 (r1802) @@ -296,7 +296,7 @@ * AMIC A25L series * and MX MX25L512 */ -int spi_prettyprint_status_register_default_bp1(struct flashctx *flash) +int spi_prettyprint_status_register_bp1_srwd(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); spi_prettyprint_status_register_hex(status); @@ -314,7 +314,7 @@ * AMIC A25L series * PMC Pm25LD series */ -int spi_prettyprint_status_register_default_bp2(struct flashctx *flash) +int spi_prettyprint_status_register_bp2_srwd(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); spi_prettyprint_status_register_hex(status); @@ -331,7 +331,7 @@ * ST M25P series * MX MX25L series */ -int spi_prettyprint_status_register_default_bp3(struct flashctx *flash) +int spi_prettyprint_status_register_bp3_srwd(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); spi_prettyprint_status_register_hex(status); @@ -343,7 +343,7 @@ return 0; } -int spi_prettyprint_status_register_default_bp4(struct flashctx *flash) +int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); spi_prettyprint_status_register_hex(status); @@ -369,8 +369,8 @@ /* === Amic === * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using - * spi_prettyprint_status_register_default_bp1 or - * spi_prettyprint_status_register_default_bp2. + * spi_prettyprint_status_register_bp1_srwd or + * spi_prettyprint_status_register_bp2_srwd. * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using * spi_prettyprint_status_register_amic_a25l032 if those have locks controlled * by the second status register.

1 0

[commit] r1801 - trunk
by repository service 27 May '14

27 May '14

Author: stefanct Date: Tue May 27 23:27:14 2014 New Revision: 1801 URL: http://flashrom.org/trac/flashrom/changeset/1801 Log: Add support for ESMT F25L32PA. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue May 27 02:06:14 2014 (r1800) +++ trunk/chipdrivers.h Tue May 27 23:27:14 2014 (r1801) @@ -71,6 +71,7 @@ int spi_prettyprint_status_register_default_bp2(struct flashctx *flash); int spi_prettyprint_status_register_default_bp3(struct flashctx *flash); int spi_prettyprint_status_register_default_bp4(struct flashctx *flash); +int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue May 27 02:06:14 2014 (r1800) +++ trunk/flashchips.c Tue May 27 23:27:14 2014 (r1801) @@ -3118,6 +3118,41 @@ }, { + .vendor = "ESMT", + .name = "F25L32PA", + .bustype = BUS_SPI, + .manufacture_id = ESMT_ID, + .model_id = ESMT_F25L32PA, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_EITHER | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_bpl, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { .vendor = "Eon", .name = "EN25B05", .bustype = BUS_SPI, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Tue May 27 02:06:14 2014 (r1800) +++ trunk/flashchips.h Tue May 27 23:27:14 2014 (r1801) @@ -208,6 +208,7 @@ #define ESMT_ID 0x8C /* Elite Semiconductor Memory Technology (ESMT) / EFST Elite Flash Storage */ #define ESMT_F25L008A 0x2014 +#define ESMT_F25L32PA 0x2016 #define ESMT_F25D08QA 0x2534 #define ESMT_F25L16QA2S 0x4015 #define ESMT_F25L32QA 0x4016 Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Tue May 27 02:06:14 2014 (r1800) +++ trunk/spi25_statusreg.c Tue May 27 23:27:14 2014 (r1801) @@ -354,6 +354,19 @@ return 0; } +int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_bpl(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + return 0; +} + /* === Amic === * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using * spi_prettyprint_status_register_default_bp1 or

1 0

[commit] r1800 - trunk
by repository service 27 May '14

27 May '14

Author: stefanct Date: Tue May 27 02:06:14 2014 New Revision: 1800 URL: http://flashrom.org/trac/flashrom/changeset/1800 Log: Fix various tiny problems in verify_range(). First of all, fix CID1130010: Resource leak as reported by Stefan Reinauer. Alternatively to Stefan's approach, just move the malloc() out of the scope. Additionally, get rid of an unnecessary exit(1) and correctly return -1 in all error cases as documented. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashrom.c Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Tue May 27 00:05:31 2014 (r1799) +++ trunk/flashrom.c Tue May 27 02:06:14 2014 (r1800) @@ -672,20 +672,20 @@ */ int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int start, unsigned int len) { - uint8_t *readbuf = malloc(len); - int ret = 0; - if (!len) - goto out_free; + return -1; if (!flash->chip->read) { msg_cerr("ERROR: flashrom has no read function for this flash chip.\n"); - return 1; + return -1; } + + uint8_t *readbuf = malloc(len); if (!readbuf) { msg_gerr("Could not allocate memory!\n"); - exit(1); + return -1; } + int ret = 0; if (start + len > flash->chip->total_size * 1024) { msg_gerr("Error: %s called with start 0x%x + len 0x%x >" @@ -699,7 +699,8 @@ if (ret) { msg_gerr("Verification impossible because read failed " "at 0x%x (len 0x%x)\n", start, len); - return ret; + ret = -1; + goto out_free; } ret = compare_range(cmpbuf, readbuf, start, len);

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