- flashrom - mail.coreboot.org

[PATCH 0/4] Probing rewrite first try
by Stefan Tauner 16 Jun '14

16 Jun '14

This is based on '[PATCH 0/5] Bunch of stuff on the way to new probing' and requires at least some of them to apply cleanly. Maybe the posted ones are not up to date and do not allow to apply these cleanly. Please ping me in that case then I'll regroup and resend the whole set again. This patch set is not completely ready yet nor tested very throughly, but it is probably ready to be tested... please do so. Also, '[PATCH] Allow shifted JEDEC access' is not integrated yet and I think it should go into a follow up anyway. The opaque changes might be unwanted... Stefan Tauner (4): Get rid of .probe_timing. Get rid of FEATURE_ADDR_SHIFTED. Refine physical address mapping of flash chips. Complete probing rewrite. 82802ab.c | 50 +- Makefile | 2 +- at45db.c | 48 +- chipdrivers.h | 35 +- cli_classic.c | 132 +- en29lv640b.c | 27 +- flash.h | 82 +- flashchips.c | 4040 +++++++++++++++++++++++++++++---------------------------- flashchips.h | 888 +++++++------ flashrom.c | 442 +++++-- ichspi.c | 52 +- jedec.c | 185 +-- m29f400bt.c | 23 +- opaque.c | 22 +- print.c | 13 +- print_wiki.c | 11 - programmer.c | 2 +- programmer.h | 5 +- sfdp.c | 109 +- spi25.c | 281 +--- stm50.c | 2 +- w29ee011.c | 37 +- 22 files changed, 3353 insertions(+), 3135 deletions(-) -- Kind regards, Stefan Tauner

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Re: [flashrom] [PATCH] Add support for S25FL128P and S25FL128P......0 chips.
by Stefan Tauner 14 Jun '14

14 Jun '14

On Sat, 14 Jun 2014 13:50:49 -0400 Liviu Toma <liviu.toma(a)gmail.com> wrote: > This seems quite random, so I am not sure what's going on. I think that is exactly what is going on: broken communication that results in random outages and this "funny" behavior. > Before the first operation, I did a full erase, would the detect not work > if the chip is erased ? No, that has nothing to do with each other. >>> In that case I would ask you how the >>> chip is connected exactly, especially how WP# and HOLD# are driven. It is very important that all input pins of the flash chip are connected to a defined level but many people dont know that. Is it well connected in your case? Noise on an unconnected hold pin is about the number one of reasons for such erratic behavior. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Add support for S25FL128P and S25FL128P......0 chips.
by Liviu Toma 14 Jun '14

14 Jun '14

I re-seated my test clips and I tried again. The results were quite strange: *With the patched flashrom, using S25FL128P......1# /usr/src/flashrompatch/flashrom -p usbblaster_spi -o write1.log -c "S25FL128P......1" -w rog.bin* flashrom v0.9.7-r1806 on Linux 3.2.0-4-686-pae (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. *With the patched flashrom using S25FL128P......0# /usr/src/flashrompatch/flashrom -p usbblaster_spi -o write1.log -c "S25FL128P......0" -w rog.bin* flashrom v0.9.7-r1806 on Linux 3.2.0-4-686-pae (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found Spansion flash chip "S25FL128P......0" (16384 kB, SPI) on usbblaster_spi. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... FAILED at 0x00000000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0003ffff: 0x3 ERASE FAILED! Reading current flash chip contents... done. Erase/write done. Verifying flash... FAILED at 0x00000000! Expected=0xea, Found=0x00, failed byte count from 0x00000000-0x00ffffff: 0xeff72f Your flash chip is in an unknown state. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks! *With the patched flashrom using S25FL128P......1 again* *# /usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c "S25FL128P......1" -w rog.bin*flashrom v0.9.7-r1806 on Linux 3.2.0-4-686-pae (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found Spansion flash chip "S25FL128P......1" (16384 kB, SPI) on usbblaster_spi. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. *Verifying flash... VERIFIED.* This seems quite random, so I am not sure what's going on. Before the first operation, I did a full erase, would the detect not work if the chip is erased ? Liviu On Fri, Jun 13, 2014 at 8:06 AM, Liviu Toma <liviu.toma(a)gmail.com> wrote: > Hi Stefan, > > Thanks, I will test again tonight when I get home. The content of the > rog.bin was the same for both attempts. > > Liviu > > > On Fri, Jun 13, 2014 at 4:41 AM, Stefan Tauner < > stefan.tauner(a)alumni.tuwien.ac.at> wrote: > >> Thanks for the test, there are two issues here. One is that I swapped >> the erase block sizes of the P models. This is clearly shown in your >> logs. >> The ...0 model should have 64 kB erase blocks, but does not: >> > Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! >> Expected=0xff, Found=0xe5 >> 0x03ffff is 262143 in decimal... I have fixed that locally, but this is >> not the main problem here. >> >> The chip erase and the subsequent write should have worked, and your >> second try with the definition of the ...1 model too (because it >> contains the right block size). But both failed and I don't understand >> why yet. The first failed byte is equal in both cases but not all of >> them are (a different number of bytes fail in the two cases). This >> indicates that the behavior might be indeterministic. The contents of >> the "rog.bin" file were equal for both tries, right? >> What happens if you retry the second test again? >> /usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c >> S25FL128P......1 -w rog.bin >> If you can not reproduce exactly the same output, i.e. >> Verifying flash... FAILED at 0x0000005b! Expected=0xd3, Found=0xfb, >> failed byte count from 0x00000000-0x00ffffff: 0xaf66ea >> Then we are on the right track. In that case I would ask you how the >> chip is connected exactly, especially how WP# and HOLD# are driven. >> >> PS: You dont need to install flashrom after recompiling. You can >> execute the built binary in the source directory (make; ./flashrom ...). >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> > >

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FAILED: PC Engines apu1c4
by Sven Dreyer 14 Jun '14

14 Jun '14

Hi guys, I just bought an PC Engines APU1C4 board, which the manufacturer says can be updated using flashrom. But in my case, it didn't seem to work. This is what happended: <SNIP> root@irmabox:~# flashrom -w apu140405.rom flashrom v0.9.5.2-r1546 on Linux 3.2.0-4-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. coreboot table found at 0xdffdf000. Found chipset "AMD SB7x0/SB8x0/SB9x0". Enabling flash write... OK. Found Macronix flash chip "MX25L1605" (2048 kB, SPI) at physical address 0xffe00000. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFY FAILED at 0x00000000! Expected=0x4c, Read=0xcc, failed byte count from 0x00000000-0x001fffff: 0xe62f Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! root@irmabox:~# </SNIP> Of course, I did NOT power off or reboot the board. The bios file I tried to flash is an original bios from the manufacturer's site. Thanks for any hint. Best regards, Sven

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Re: [flashrom] [PATCH] Add support for S25FL128P and S25FL128P......0 chips.
by Liviu Toma 13 Jun '14

13 Jun '14

This is the write log with -c "S25FL128P......1" On Thu, Jun 12, 2014 at 10:47 PM, Liviu Toma <liviu.toma(a)gmail.com> wrote: > Here are the two files requested. The process failed, so I will try -c > "S25FL128P......1" and send you another log (it takes quite long, so > probably in an hour or so) > > Liviu > > > On Thu, Jun 12, 2014 at 9:21 PM, Liviu Toma <liviu.toma(a)gmail.com> wrote: > >> Hi Stefan, >> >> I apologize I didn't have a chance to try it. I am just trying it now, I >> will report a bit later >> >> Liviu >> >> >> On Thu, Jun 12, 2014 at 7:00 PM, Stefan Tauner < >> stefan.tauner(a)alumni.tuwien.ac.at> wrote: >> >>> On Sat, 31 May 2014 23:07:35 +0200 >>> Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: >>> >>> > S25FL128P is the predecessor family of S25FL128S. All these chips can >>> > not be distinguished without EDI. >>> > >>> > Additionally to the new S25FL128P chips, this patch also fixes the >>> name of >>> > the previously supported S25FL128S model with uniform 256 kB sectors >>> > (S25FL128P......1 not 0) and adds the hybrid sector version as well. >>> > >>> > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> >>> > --- >>> > >>> > Since flashrom can not distinguish the chips itself, the user has to >>> > select the right chip with the -c parameter. >>> > >>> > Liviu, please apply this patch on top of r1806 and run flashrom once >>> > without any operation and without -c .... >>> > E.g. flashrom -p usbblaster_spi -o probe.log >>> > >>> > And a second time with the correct chip selected to write *different* >>> data >>> > to the chip. >>> > E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c >>> "S25FL128P......0" >>> > >>> > Please report back with the two log files. >>> >>> Hi Liviu, >>> >>> are you gonna test this patch? If not I would like to commit it >>> untested so that it does not become outdated. >>> >>> -- >>> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >>> >> >> >

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Re: [flashrom] [PATCH] Add support for S25FL128P and S25FL128P......0 chips.
by Liviu Toma 13 Jun '14

13 Jun '14

Here are the two files requested. The process failed, so I will try -c "S25FL128P......1" and send you another log (it takes quite long, so probably in an hour or so) Liviu On Thu, Jun 12, 2014 at 9:21 PM, Liviu Toma <liviu.toma(a)gmail.com> wrote: > Hi Stefan, > > I apologize I didn't have a chance to try it. I am just trying it now, I > will report a bit later > > Liviu > > > On Thu, Jun 12, 2014 at 7:00 PM, Stefan Tauner < > stefan.tauner(a)alumni.tuwien.ac.at> wrote: > >> On Sat, 31 May 2014 23:07:35 +0200 >> Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: >> >> > S25FL128P is the predecessor family of S25FL128S. All these chips can >> > not be distinguished without EDI. >> > >> > Additionally to the new S25FL128P chips, this patch also fixes the name >> of >> > the previously supported S25FL128S model with uniform 256 kB sectors >> > (S25FL128P......1 not 0) and adds the hybrid sector version as well. >> > >> > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> >> > --- >> > >> > Since flashrom can not distinguish the chips itself, the user has to >> > select the right chip with the -c parameter. >> > >> > Liviu, please apply this patch on top of r1806 and run flashrom once >> > without any operation and without -c .... >> > E.g. flashrom -p usbblaster_spi -o probe.log >> > >> > And a second time with the correct chip selected to write *different* >> data >> > to the chip. >> > E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c >> "S25FL128P......0" >> > >> > Please report back with the two log files. >> >> Hi Liviu, >> >> are you gonna test this patch? If not I would like to commit it >> untested so that it does not become outdated. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> > >

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Re: [flashrom] [PATCH] Add support for S25FL128P and S25FL128P......0 chips.
by Stefan Tauner 13 Jun '14

13 Jun '14

On Sat, 31 May 2014 23:07:35 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > S25FL128P is the predecessor family of S25FL128S. All these chips can > not be distinguished without EDI. > > Additionally to the new S25FL128P chips, this patch also fixes the name of > the previously supported S25FL128S model with uniform 256 kB sectors > (S25FL128P......1 not 0) and adds the hybrid sector version as well. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> > --- > > Since flashrom can not distinguish the chips itself, the user has to > select the right chip with the -c parameter. > > Liviu, please apply this patch on top of r1806 and run flashrom once > without any operation and without -c .... > E.g. flashrom -p usbblaster_spi -o probe.log > > And a second time with the correct chip selected to write *different* data > to the chip. > E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c "S25FL128P......0" > > Please report back with the two log files. Hi Liviu, are you gonna test this patch? If not I would like to commit it untested so that it does not become outdated. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Add selfcheck_board_enables().
by Carl-Daniel Hailfinger 13 Jun '14

13 Jun '14

Am 31.05.2014 05:04 schrieb Stefan Tauner: > Check for NULL termination of the array, that each board has the two > main PCI ID sets defined, that coreboot vendor and model fields are either > both set or unset, and that either an enable function or a max decode size is > available. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Excellent, thank you! Please make sure to commit the additional #ifdef fix you posted in a followup as well. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1821 - trunk
by repository service 13 Jun '14

13 Jun '14

Author: stefanct Date: Fri Jun 13 00:57:36 2014 New Revision: 1821 URL: http://flashrom.org/trac/flashrom/changeset/1821 Log: Add selfcheck_board_enables(). Check for NULL termination of the array, that each board has the two main PCI ID sets defined, that coreboot vendor and model fields are either both set or unset, and that at least either an enable function or a max decode size is available. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/flashrom.c trunk/programmer.h Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Thu Jun 12 23:07:03 2014 (r1820) +++ trunk/board_enable.c Fri Jun 13 00:57:36 2014 (r1821) @@ -2463,6 +2463,36 @@ { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ }; +int selfcheck_board_enables(void) +{ + if (board_matches[ARRAY_SIZE(board_matches) - 1].vendor_name != NULL) { + msg_gerr("Board enables table miscompilation!\n"); + return 1; + } + + int ret = 0; + unsigned int i; + for (i = 0; i < ARRAY_SIZE(board_matches) - 1; i++) { + const struct board_match *b = &board_matches[i]; + if (b->vendor_name == NULL || b->board_name == NULL) { + msg_gerr("ERROR: Board enable #%d does not define a vendor and board name.\n" + "Please report a bug at flashrom(a)flashrom.org\n", i); + ret = 1; + continue; + } + if ((b->first_vendor == 0 || b->first_device == 0 || + b->second_vendor == 0 || b->second_device == 0) || + ((b->lb_vendor == NULL) ^ (b->lb_part == NULL)) || + (b->max_rom_decode_parallel == 0 && b->enable == NULL)) { + msg_gerr("ERROR: Board enable for %s %s is misdefined.\n" + "Please report a bug at flashrom(a)flashrom.org\n", + b->vendor_name, b->board_name); + ret = 1; + } + } + return ret; +} + /* Parse the <vendor>:<board> string specified by the user as part of -p internal:mainboard=<vendor>:<board>. * Parameters vendor and model will be overwritten. Returns 0 on success. * Note: strtok modifies the original string, so we work on a copy and allocate memory for the results. Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Thu Jun 12 23:07:03 2014 (r1820) +++ trunk/flashrom.c Fri Jun 13 00:57:36 2014 (r1821) @@ -1758,6 +1758,10 @@ } } +#if CONFIG_INTERNAL == 1 + ret |= selfcheck_board_enables(); +#endif + /* TODO: implement similar sanity checks for other arrays where deemed necessary. */ return ret; } Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Thu Jun 12 23:07:03 2014 (r1820) +++ trunk/programmer.h Fri Jun 13 00:57:36 2014 (r1821) @@ -260,6 +260,7 @@ #if CONFIG_INTERNAL == 1 /* board_enable.c */ +int selfcheck_board_enables(void); int board_parse_parameter(const char *boardstring, const char **vendor, const char **model); void w836xx_ext_enter(uint16_t port); void w836xx_ext_leave(uint16_t port);

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Re: [flashrom] [PATCH 2/2] Remove MCP6/7/8 SPI log requests.
by Carl-Daniel Hailfinger 12 Jun '14

12 Jun '14

Am 03.06.2014 22:57 schrieb Stefan Tauner: > We got enough (and no one is looking at them for the time being anyway). > Also, return an error code in the case no bus type could be detected. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1820 - trunk
by repository service 12 Jun '14

12 Jun '14

Author: stefanct Date: Thu Jun 12 23:07:03 2014 New Revision: 1820 URL: http://flashrom.org/trac/flashrom/changeset/1820 Log: Remove MCP6/7/8 SPI log requests. We got enough (and no one is looking at them for the time being anyway). Also, return an error code in the case no bus type could be detected. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Thu Jun 12 02:04:32 2014 (r1819) +++ trunk/chipset_enable.c Thu Jun 12 23:07:03 2014 (r1820) @@ -1244,8 +1244,6 @@ int ret = 0, want_spi = 0; uint8_t val; - msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); - /* dev is the ISA bridge. No idea what the stuff below does. */ val = pci_read_byte(dev, 0x8a); msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " @@ -1264,17 +1262,15 @@ */ internal_buses_supported = BUS_NONE; msg_pdbg("Flash bus type is SPI\n"); - msg_pinfo("SPI on this chipset is WIP. Please report any " - "success or failure by mailing us the verbose " - "output to flashrom(a)flashrom.org, thanks!\n"); break; default: /* Should not happen. */ internal_buses_supported = BUS_NONE; - msg_pdbg("Flash bus type is unknown (none)\n"); - msg_pinfo("Something went wrong with bus type detection.\n"); - goto out_msg; - break; + msg_pwarn("Flash bus type is unknown (none)\n"); + msg_pinfo("Please send the log files created by \"flashrom -p internal -o logfile\" to \n" + "flashrom(a)flashrom.org with \"your board name: flashrom -V\" as the subject to\n" + "help us finish support for your chipset. Thanks.\n"); + return ERROR_NONFATAL; } /* Force enable SPI and disable LPC? Not a good idea. */ @@ -1287,11 +1283,6 @@ if (mcp6x_spi_init(want_spi)) ret = 1; -out_msg: - msg_pinfo("Please send the output of \"flashrom -V -p internal\" to flashrom(a)flashrom.org\n" - "with \"your board name: flashrom -V\" as the subject to help us finish support\n" - "for your chipset. Thanks.\n"); - return ret; }

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Re: [flashrom] [PATCH 2/5] Move check_chip_supported() to cli_classic.c.
by Carl-Daniel Hailfinger 12 Jun '14

12 Jun '14

Am 09.06.2014 14:41 schrieb Stefan Tauner: > This function clearly belongs to the command line interface and should > therefore reside in cli_classic.c and not in flashrom.c. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Except for the last msg_ in that function, how does this belong to the command line? You'd want the same functionality and messages (save for the last one) if you're using a GUI. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH 2/2] fixup! Add support for Atmel AT49LH004.
by Stefan Tauner 12 Jun '14

12 Jun '14

Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- Not for merge. This is to make the life easier for the user when applying today's patches. flashchips.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/flashchips.c b/flashchips.c index 01bc3df..821e339 100644 --- a/flashchips.c +++ b/flashchips.c @@ -3070,8 +3070,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, }, }, - .printlock = NULL, /* TODO */ - .unlock = NULL, /* TODO: something like unlock_82802ab() but working on the sector eraser blocks. */ + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -3106,8 +3106,8 @@ const struct flashchip flashchips[] = { .block_erase = NULL, /* TODO: Implement. */ }, }, - .printlock = NULL, /* TODO */ - .unlock = NULL, /* TODO: something like unlock_82802ab() but working on the sector eraser blocks. */ + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, -- Kind regards, Stefan Tauner

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[PATCH 1/2] Refactor unlocking of many chips with locking at register space address +2.
by Stefan Tauner 12 Jun '14

12 Jun '14

This includes PMC Pm49*, SST 49LF00*, ST M50* and Winbond W39* family. The erase and write test status bits of all affected chips have been reset. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- 82802ab.c | 11 ---- Makefile | 2 +- chipdrivers.h | 19 +++--- flashchips.c | 87 ++++++++++++++++------------ jedec.c | 183 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ pm49fl00x.c | 53 ----------------- sst49lfxxxc.c | 39 ------------- stm50.c | 57 +----------------- w39.c | 112 ++--------------------------------- 9 files changed, 248 insertions(+), 315 deletions(-) delete mode 100644 pm49fl00x.c diff --git a/82802ab.c b/82802ab.c index 9e39852..e450b5d 100644 --- a/82802ab.c +++ b/82802ab.c @@ -108,17 +108,6 @@ uint8_t wait_82802ab(struct flashctx *flash) return status; } -int unlock_82802ab(struct flashctx *flash) -{ - int i; - //chipaddr wrprotect = flash->virtual_registers + page + 2; - - for (i = 0; i < flash->chip->total_size * 1024; i+= flash->chip->page_size) - chip_writeb(flash, 0, flash->virtual_registers + i + 2); - - return 0; -} - int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize) { diff --git a/Makefile b/Makefile index 7a48889..f6d3147 100644 --- a/Makefile +++ b/Makefile @@ -346,7 +346,7 @@ endif # Flash chip drivers and bus support infrastructure. CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ - sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ + sst28sf040.o m29f400bt.o 82802ab.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ opaque.o sfdp.o en29lv640b.o at45db.o diff --git a/chipdrivers.h b/chipdrivers.h index 03d922d..57b1340 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -131,7 +131,6 @@ int probe_82802ab(struct flashctx *flash); int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize); int write_82802ab(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); void print_status_82802ab(uint8_t status); -int unlock_82802ab(struct flashctx *flash); int unlock_28f004s5(struct flashctx *flash); int unlock_lh28f008bjt(struct flashctx *flash); @@ -146,15 +145,20 @@ int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int p int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize); int erase_chip_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize); +int unlock_regspace2_uniform_32k(struct flashctx *flash); +int unlock_regspace2_uniform_64k(struct flashctx *flash); +int unlock_regspace2_block_eraser_0(struct flashctx *flash); +int unlock_regspace2_block_eraser_1(struct flashctx *flash); +int unlock_regspace2_block(const struct flashctx *flash, chipaddr off); +int printlock_regspace2_uniform_64k(struct flashctx *flash); +int printlock_regspace2_block_eraser_0(struct flashctx *flash); +int printlock_regspace2_block_eraser_1(struct flashctx *flash); + /* m29f400bt.c */ int probe_m29f400bt(struct flashctx *flash); int write_m29f400bt(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); void protect_m29f400bt(struct flashctx *flash, chipaddr bios); -/* pm49fl00x.c */ -int unlock_49fl00x(struct flashctx *flash); -int lock_49fl00x(struct flashctx *flash); - /* sst28sf040.c */ int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size); @@ -164,7 +168,6 @@ int protect_28sf040(struct flashctx *flash); /* sst49lfxxxc.c */ int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size); -int unlock_49lfxxxc(struct flashctx *flash); /* sst_fwhub.c */ int printlock_sst_fwhub(struct flashctx *flash); @@ -184,8 +187,6 @@ int printlock_w39v040fc(struct flashctx *flash); int printlock_w39v080a(struct flashctx *flash); int printlock_w39v080fa(struct flashctx *flash); int printlock_w39v080fa_dual(struct flashctx *flash); -int unlock_w39v040fb(struct flashctx *flash); -int unlock_w39v080fa(struct flashctx *flash); int printlock_at49f(struct flashctx *flash); /* w29ee011.c */ @@ -193,8 +194,6 @@ int probe_w29ee011(struct flashctx *flash); /* stm50.c */ int erase_sector_stm50(struct flashctx *flash, unsigned int block, unsigned int blocksize); -int unlock_stm50_uniform(struct flashctx *flash); -int unlock_stm50_nonuniform(struct flashctx *flash); /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index c658288..01bc3df 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1382,7 +1382,7 @@ const struct flashchip flashchips[] = { .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .block_erasers = @@ -1395,7 +1395,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_chip_block_jedec, } }, - .unlock = unlock_49fl00x, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -6015,7 +6015,7 @@ const struct flashchip flashchips[] = { .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = @@ -6025,7 +6025,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, }, }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -6050,7 +6050,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, }, }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -9134,7 +9134,7 @@ const struct flashchip flashchips[] = { .total_size = 256, .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .block_erasers = @@ -9150,7 +9150,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_chip_block_jedec, } }, - .unlock = unlock_49fl00x, + .unlock = unlock_regspace2_uniform_32k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -9165,7 +9165,7 @@ const struct flashchip flashchips[] = { .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .block_erasers = @@ -9181,7 +9181,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_chip_block_jedec, } }, - .unlock = unlock_49fl00x, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -9494,7 +9494,7 @@ const struct flashchip flashchips[] = { .block_erase = NULL, /* 30 D0, only in A/A mux mode */ }, }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11036,7 +11036,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11101,7 +11102,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11116,7 +11118,7 @@ const struct flashchip flashchips[] = { .total_size = 2048, .page_size = 4 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = @@ -11134,7 +11136,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11239,7 +11242,7 @@ const struct flashchip flashchips[] = { .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 1, /* 150ns */ .block_erasers = @@ -11255,7 +11258,7 @@ const struct flashchip flashchips[] = { .block_erase = NULL, } }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11300,7 +11303,7 @@ const struct flashchip flashchips[] = { .total_size = 2048, .page_size = 4 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = @@ -11318,7 +11321,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11586,7 +11590,7 @@ const struct flashchip flashchips[] = { } }, .write = write_82802ab, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, @@ -11619,7 +11623,7 @@ const struct flashchip flashchips[] = { } }, .write = write_82802ab, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, @@ -11633,7 +11637,7 @@ const struct flashchip flashchips[] = { .total_size = 1024, .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_FIXME, .block_erasers = @@ -11651,7 +11655,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11684,7 +11689,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11699,9 +11705,9 @@ const struct flashchip flashchips[] = { .total_size = 256, .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -11712,9 +11718,13 @@ const struct flashchip flashchips[] = { {16 * 1024, 1}, }, .block_erase = erase_block_82802ab, + }, { + .eraseblocks = { {256 * 1024, 1}, }, + .block_erase = NULL, /* Only in A/A mux mode */ } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11739,7 +11749,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11764,7 +11774,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11779,7 +11789,7 @@ const struct flashchip flashchips[] = { .total_size = 1024, .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = @@ -11789,7 +11799,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11814,7 +11824,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11845,7 +11855,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -13113,7 +13124,7 @@ const struct flashchip flashchips[] = { .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -13130,7 +13141,7 @@ const struct flashchip flashchips[] = { } }, .printlock = printlock_w39v040fa, - .unlock = unlock_sst_fwhub, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -13145,7 +13156,7 @@ const struct flashchip flashchips[] = { .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -13159,7 +13170,7 @@ const struct flashchip flashchips[] = { } }, .printlock = printlock_w39v040fb, - .unlock = unlock_w39v040fb, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program */ @@ -13350,7 +13361,7 @@ const struct flashchip flashchips[] = { .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -13364,7 +13375,7 @@ const struct flashchip flashchips[] = { } }, .printlock = printlock_w39v080fa, - .unlock = unlock_w39v080fa, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program */ diff --git a/jedec.c b/jedec.c index 08cc88b..618cc72 100644 --- a/jedec.c +++ b/jedec.c @@ -6,6 +6,7 @@ * Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de> * Copyright (C) 2007 Carl-Daniel Hailfinger * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> + * Copyright (C) 2014 Stefan Tauner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -510,3 +511,185 @@ int erase_chip_jedec(struct flashctx *flash) mask = getaddrmask(flash->chip); return erase_chip_jedec_common(flash, mask); } + +struct unlockblock { + unsigned int size; + unsigned int count; +}; + +typedef int (*unlockblock_func)(const struct flashctx *flash, chipaddr offset); +static int regspace2_walk_unlockblocks(const struct flashctx *flash, const struct unlockblock *block, unlockblock_func func) +{ + chipaddr off = flash->virtual_registers + 2; + while (block->count != 0) { + unsigned int j; + for (j = 0; j < block->count; j++) { + if (func(flash, off)) + return -1; + off += block->size; + } + block++; + } + return 0; +} + +#define REG2_RWLOCK ((1 << 2) | (1 << 0)) +#define REG2_LOCKDOWN (1 << 1) +#define REG2_MASK (REG2_RWLOCK | REG2_LOCKDOWN) + +static int printlock_regspace2_block(const struct flashctx *flash, chipaddr offset) +{ + chipaddr wrprotect = flash->virtual_registers + offset + 2; + uint8_t state = chip_readb(flash, wrprotect); + msg_cdbg("Lock status of block at 0x%0*" PRIxPTR " is ", PRIxPTR_WIDTH, offset); + switch (state & REG2_MASK) { + case 0: + msg_cdbg("Full Access.\n"); + break; + case 1: + msg_cdbg("Write Lock (Default State).\n"); + break; + case 2: + msg_cdbg("Locked Open (Full Access, Locked Down).\n"); + break; + case 3: + msg_cdbg("Write Lock, Locked Down.\n"); + break; + case 4: + msg_cdbg("Read Lock.\n"); + break; + case 5: + msg_cdbg("Read/Write Lock.\n"); + break; + case 6: + msg_cdbg("Read Lock, Locked Down.\n"); + break; + case 7: + msg_cdbg("Read/Write Lock, Locked Down.\n"); + break; + } + return 0; +} + +int printlock_regspace2_blocks(const struct flashctx *flash, const struct unlockblock *blocks) +{ + return regspace2_walk_unlockblocks(flash, blocks, &printlock_regspace2_block); +} + +static int printlock_regspace2_uniform(struct flashctx *flash, unsigned long block_size) +{ + const unsigned int elems = flash->chip->total_size * 1024 / block_size; + struct unlockblock blocks[2] = {{.size = block_size, .count = elems}}; + return regspace2_walk_unlockblocks(flash, blocks, &printlock_regspace2_block); +} + +int printlock_regspace2_uniform_64k(struct flashctx *flash) +{ + return printlock_regspace2_uniform(flash, 64 * 1024); +} + +int printlock_regspace2_block_eraser_0(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[0].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &printlock_regspace2_block); +} + +int printlock_regspace2_block_eraser_1(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[1].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &printlock_regspace2_block); +} + +static int changelock_regspace2_block(const struct flashctx *flash, chipaddr offset, uint8_t new_bits) +{ + chipaddr wrprotect = flash->virtual_registers + offset + 2; + uint8_t old; + + if (new_bits & ~REG2_MASK) { + msg_cerr("Invalid locking change 0x%02x requested at 0x%0*" PRIxPTR "! " + "Please report a bug at flashrom(a)flashrom.org\n", + new_bits, PRIxPTR_WIDTH, offset); + return -1; + } + old = chip_readb(flash, wrprotect); + /* Early exist if no change (of read/write/lockdown) was requested. */ + if (((old ^ new_bits) & REG2_MASK) == 0) { + msg_cdbg2("Locking status at 0x%0*" PRIxPTR " not changed\n", PRIxPTR_WIDTH, offset); + return 0; + } + /* Normally lockdowns can not be cleared. Try nevertheless if requested. */ + if ((old & REG2_LOCKDOWN) && !(new_bits & REG2_LOCKDOWN)) { + chip_writeb(flash, old & ~REG2_LOCKDOWN, wrprotect); + if (chip_readb(flash, wrprotect) != (old & ~REG2_LOCKDOWN)) { + msg_cerr("Lockdown can't be removed at 0x%0*" PRIxPTR "!\n", PRIxPTR_WIDTH, offset); + return -1; + } + } + /* Change read or write lock? */ + if ((old ^ new_bits) & REG2_RWLOCK) { + /* Do not lockdown yet. */ + msg_cdbg("Changing locking status at 0x%0*" PRIxPTR " to 0x%02x\n", PRIxPTR_WIDTH, offset, new_bits & REG2_RWLOCK); + chip_writeb(flash, new_bits & REG2_RWLOCK, wrprotect); + if (chip_readb(flash, wrprotect) != (new_bits & REG2_RWLOCK)) { + msg_cerr("Locking status change FAILED at 0x%0*" PRIxPTR "!\n", PRIxPTR_WIDTH, offset); + return -1; + } + } + /* Enable lockdown if requested. */ + if (!(old & REG2_LOCKDOWN) && (new_bits & REG2_LOCKDOWN)) { + msg_cdbg("Enabling lockdown at 0x%0*" PRIxPTR "\n", PRIxPTR_WIDTH, offset); + chip_writeb(flash, new_bits, wrprotect); + if (chip_readb(flash, wrprotect) != new_bits) { + msg_cerr("Enabling lockdown FAILED at 0x%0*" PRIxPTR "!\n", PRIxPTR_WIDTH, offset); + return -1; + } + } + + return 0; +} + +int unlock_regspace2_block(const struct flashctx *flash, chipaddr off) +{ + chipaddr wrprotect = flash->virtual_registers + off + 2; + uint8_t old = chip_readb(flash, wrprotect); + /* We don't care for the lockdown bit as long as the RW locks are 0 after we're done */ + return changelock_regspace2_block(flash, off, old & ~REG2_RWLOCK); +} + +static int unlock_regspace2_uniform(struct flashctx *flash, unsigned long block_size) +{ + const unsigned int elems = flash->chip->total_size * 1024 / block_size; + struct unlockblock blocks[2] = {{.size = block_size, .count = elems}}; + return regspace2_walk_unlockblocks(flash, blocks, &unlock_regspace2_block); +} + +int unlock_regspace2_uniform_64k(struct flashctx *flash) +{ + return unlock_regspace2_uniform(flash, 64 * 1024); +} + +int unlock_regspace2_uniform_32k(struct flashctx *flash) +{ + return unlock_regspace2_uniform(flash, 32 * 1024); +} + +int unlock_regspace2_block_eraser_0(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[0].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &unlock_regspace2_block); +} + +int unlock_regspace2_block_eraser_1(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[1].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &unlock_regspace2_block); +} + diff --git a/pm49fl00x.c b/pm49fl00x.c deleted file mode 100644 index fe28d2b..0000000 --- a/pm49fl00x.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2004 Tyan Corporation - * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov(a)gmail.com> - * Copyright (C) 2007 Reinder E.N. de Haan <lb_reha(a)mveas.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "flash.h" - -static void write_lockbits_49fl00x(const struct flashctx *flash, - unsigned int size, unsigned char bits, - unsigned int block_size) -{ - unsigned int i, left = size; - chipaddr bios = flash->virtual_registers; - - for (i = 0; left >= block_size; i++, left -= block_size) { - /* pm49fl002 */ - if (block_size == 16384 && i % 2) - continue; - - chip_writeb(flash, bits, bios + (i * block_size) + 2); - } -} - -int unlock_49fl00x(struct flashctx *flash) -{ - write_lockbits_49fl00x(flash, flash->chip->total_size * 1024, 0, - flash->chip->page_size); - return 0; -} - -int lock_49fl00x(struct flashctx *flash) -{ - write_lockbits_49fl00x(flash, flash->chip->total_size * 1024, 1, - flash->chip->page_size); - return 0; -} diff --git a/sst49lfxxxc.c b/sst49lfxxxc.c index 3d17b5b..d6c85c8 100644 --- a/sst49lfxxxc.c +++ b/sst49lfxxxc.c @@ -23,45 +23,6 @@ #include "flash.h" #include "chipdrivers.h" -static int write_lockbits_block_49lfxxxc(struct flashctx *flash, - unsigned long address, - unsigned char bits) -{ - unsigned long lock = flash->virtual_registers + address + 2; - msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, - chip_readb(flash, lock)); - chip_writeb(flash, bits, lock); - - return 0; -} - -static int write_lockbits_49lfxxxc(struct flashctx *flash, unsigned char bits) -{ - chipaddr registers = flash->virtual_registers; - unsigned int i, left = flash->chip->total_size * 1024; - unsigned long address; - - msg_cdbg("\nbios=0x%08" PRIxPTR "\n", registers); - for (i = 0; left > 65536; i++, left -= 65536) { - write_lockbits_block_49lfxxxc(flash, i * 65536, bits); - } - address = i * 65536; - write_lockbits_block_49lfxxxc(flash, address, bits); - address += 32768; - write_lockbits_block_49lfxxxc(flash, address, bits); - address += 8192; - write_lockbits_block_49lfxxxc(flash, address, bits); - address += 8192; - write_lockbits_block_49lfxxxc(flash, address, bits); - - return 0; -} - -int unlock_49lfxxxc(struct flashctx *flash) -{ - return write_lockbits_49lfxxxc(flash, 0); -} - int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size) { diff --git a/stm50.c b/stm50.c index edcfdd2..4aa1566 100644 --- a/stm50.c +++ b/stm50.c @@ -3,7 +3,7 @@ * * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> - * Copyright (C) 2013 Stefan Tauner + * Copyright (C) 2011 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -27,63 +27,8 @@ */ #include "flash.h" -#include "flashchips.h" #include "chipdrivers.h" -static int stm50_unlock_address(struct flashctx *flash, int offset) -{ - chipaddr wrprotect = flash->virtual_registers + 2; - static const uint8_t unlock_sector = 0x00; - msg_cdbg("unlocking at 0x%x\n", offset); - chip_writeb(flash, unlock_sector, wrprotect + offset); - if (chip_readb(flash, wrprotect + offset) != unlock_sector) { - msg_cerr("Cannot unlock address 0x%x\n", offset); - return -1; - } - return 0; -} - -/* Chips known to use a non-uniform block and sector layout for locking (as well as for erasing): - * Name Size Address range of lock registers - * M50FLW080A 1MB FFB00002 - FFBFF002 - * M50FLW080B 1MB FFB00002 - FFBFF002 - * M50FW002 256k FFBC0002 - FFBFC002 - * M50LPW116 2MB FFA00002 - FFBFC002 - */ -int unlock_stm50_nonuniform(struct flashctx *flash) -{ - int i; - struct eraseblock *eraseblocks = flash->chip->block_erasers[0].eraseblocks; - unsigned int done = 0; - for (i = 0; i < NUM_ERASEREGIONS && eraseblocks[i].count != 0; i++) { - unsigned int block_size = eraseblocks[i].size; - unsigned int block_count = eraseblocks[i].count; - - int j; - for (j = 0; j < block_count; j++) { - if (stm50_unlock_address(flash, done)) { - msg_cerr("UNLOCK FAILED!\n"); - return -1; - } - done += block_count * block_size; - } - } - return 0; -} - -/* Unlocking for uniform 64 kB blocks starting at offset 2 of the feature registers. */ -int unlock_stm50_uniform(struct flashctx *flash) -{ - int i; - for (i = 0; i < flash->chip->total_size * 1024; i+= 64 * 1024) { - if (stm50_unlock_address(flash, i)) { - msg_cerr("UNLOCK FAILED!\n"); - return -1; - } - } - return 0; -} - static int stm50_erase_sector(struct flashctx *flash, unsigned int addr) { chipaddr bios = flash->virtual_memory + addr; diff --git a/w39.c b/w39.c index 9dcb06a..4dd366c 100644 --- a/w39.c +++ b/w39.c @@ -20,65 +20,7 @@ */ #include "flash.h" - -static int printlock_w39_fwh_block(struct flashctx *flash, unsigned int offset) -{ - chipaddr wrprotect = flash->virtual_registers + offset + 2; - uint8_t locking; - - locking = chip_readb(flash, wrprotect); - msg_cdbg("Lock status of block at 0x%08x is ", offset); - switch (locking & 0x7) { - case 0: - msg_cdbg("Full Access.\n"); - break; - case 1: - msg_cdbg("Write Lock (Default State).\n"); - break; - case 2: - msg_cdbg("Locked Open (Full Access, Lock Down).\n"); - break; - case 3: - msg_cerr("Error: Write Lock, Locked Down.\n"); - break; - case 4: - msg_cdbg("Read Lock.\n"); - break; - case 5: - msg_cdbg("Read/Write Lock.\n"); - break; - case 6: - msg_cerr("Error: Read Lock, Locked Down.\n"); - break; - case 7: - msg_cerr("Error: Read/Write Lock, Locked Down.\n"); - break; - } - - /* Read or write lock present? */ - return (locking & ((1 << 2) | (1 << 0))) ? -1 : 0; -} - -static int unlock_w39_fwh_block(struct flashctx *flash, unsigned int offset) -{ - chipaddr wrprotect = flash->virtual_registers + offset + 2; - uint8_t locking; - - locking = chip_readb(flash, wrprotect); - /* Read or write lock present? */ - if (locking & ((1 << 2) | (1 << 0))) { - /* Lockdown active? */ - if (locking & (1 << 1)) { - msg_cerr("Can't unlock block at 0x%08x!\n", offset); - return -1; - } else { - msg_cdbg("Unlocking block at 0x%08x\n", offset); - chip_writeb(flash, 0, wrprotect); - } - } - - return 0; -} +#include "chipdrivers.h" static uint8_t w39_idmode_readb(struct flashctx *flash, unsigned int offset) { @@ -145,30 +87,6 @@ static int printlock_w39_common(struct flashctx *flash, unsigned int offset) return printlock_w39_tblwp(lock); } -static int printlock_w39_fwh(struct flashctx *flash) -{ - unsigned int i, total_size = flash->chip->total_size * 1024; - int ret = 0; - - /* Print lock status of the complete chip */ - for (i = 0; i < total_size; i += flash->chip->page_size) - ret |= printlock_w39_fwh_block(flash, i); - - return ret; -} - -static int unlock_w39_fwh(struct flashctx *flash) -{ - unsigned int i, total_size = flash->chip->total_size * 1024; - - /* Unlock the complete chip */ - for (i = 0; i < total_size; i += flash->chip->page_size) - if (unlock_w39_fwh_block(flash, i)) - return -1; - - return 0; -} - int printlock_w39f010(struct flashctx *flash) { uint8_t lock; @@ -267,7 +185,7 @@ int printlock_w39v040fa(struct flashctx *flash) int ret = 0; ret = printlock_w39v040a(flash); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -277,7 +195,7 @@ int printlock_w39v040fb(struct flashctx *flash) int ret = 0; ret = printlock_w39v040b(flash); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -288,7 +206,7 @@ int printlock_w39v040fc(struct flashctx *flash) /* W39V040C and W39V040FC use different WP/TBL offsets. */ ret = printlock_w39_common(flash, 0x7fff2); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -303,7 +221,7 @@ int printlock_w39v080fa(struct flashctx *flash) int ret = 0; ret = printlock_w39v080a(flash); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -316,26 +234,6 @@ int printlock_w39v080fa_dual(struct flashctx *flash) return -1; } -int unlock_w39v040fb(struct flashctx *flash) -{ - if (unlock_w39_fwh(flash)) - return -1; - if (printlock_w39_common(flash, 0x7fff2)) - return -1; - - return 0; -} - -int unlock_w39v080fa(struct flashctx *flash) -{ - if (unlock_w39_fwh(flash)) - return -1; - if (printlock_w39_common(flash, 0xffff2)) - return -1; - - return 0; -} - int printlock_at49f(struct flashctx *flash) { uint8_t lock = w39_idmode_readb(flash, 0x00002); -- Kind regards, Stefan Tauner

1 0

[PATCH] Add support for Atmel AT49LH004.
by Stefan Tauner 12 Jun '14

12 Jun '14

Also, slightly refine the definition of AT49LH002. TODO: unlocking is mandatory because the chips are write-protected by default. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- flashchips.c | 42 +++++++++++++++++++++++++++++++++++++++--- flashchips.h | 2 ++ 2 files changed, 41 insertions(+), 3 deletions(-) diff --git a/flashchips.c b/flashchips.c index 0c3bb68..c658288 100644 --- a/flashchips.c +++ b/flashchips.c @@ -3049,7 +3049,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT49LH002, .total_size = 256, .page_size = 0, /* unused */ - .feature_bits = FEATURE_REGISTERMAP, /* TODO: LPC OK too? */ + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, /* TODO: 0xff cmd not documented? */ .probe_timing = TIMING_FIXME, @@ -3062,16 +3062,52 @@ const struct flashchip flashchips[] = { {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_82802ab, + .block_erase = NULL, /* TODO: Implement. */ }, { .eraseblocks = { {64 * 1024, 4}, }, + .block_erase = erase_block_82802ab, + }, + }, + .printlock = NULL, /* TODO */ + .unlock = NULL, /* TODO: something like unlock_82802ab() but working on the sector eraser blocks. */ + .write = write_82802ab, + .read = read_memmapped, + .voltage = {3000, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT49LH004", + .bustype = BUS_LPC | BUS_FWH, /* A/A Mux */ + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT49LH004, + .total_size = 512, + .page_size = 0, /* unused */ + .feature_bits = FEATURE_REGISTERMAP, + .tested = TEST_UNTESTED, + .probe = probe_82802ab, /* TODO: 0xff cmd not documented? */ + .probe_timing = TIMING_FIXME, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_82802ab, + }, { + .eraseblocks = { + {64 * 1024, 8}, + }, .block_erase = NULL, /* TODO: Implement. */ }, }, .printlock = NULL, /* TODO */ - .unlock = NULL, /* unlock_82802ab() not correct(?) */ + .unlock = NULL, /* TODO: something like unlock_82802ab() but working on the sector eraser blocks. */ .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, diff --git a/flashchips.h b/flashchips.h index fb17981..798323f 100644 --- a/flashchips.h +++ b/flashchips.h @@ -190,6 +190,8 @@ #define ATMEL_AT49BV512 0x03 #define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */ #define ATMEL_AT49LH002 0xE9 +#define ATMEL_AT49LH00B4 0xED +#define ATMEL_AT49LH004 0xEE #define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */ #define ATMEL_AT49F010 0x17 /* Same as AT49HF010 */ #define ATMEL_AT49F020 0x0B -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] [PATCH 3/5] Introduce helpers.c.
by Carl-Daniel Hailfinger 12 Jun '14

12 Jun '14

Am 09.06.2014 14:41 schrieb Stefan Tauner: > Move some suitable functions there, add it to the Makefile, but leave the > declarations in flash.h for now. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1819 - trunk
by repository service 12 Jun '14

12 Jun '14

Author: stefanct Date: Thu Jun 12 02:04:32 2014 New Revision: 1819 URL: http://flashrom.org/trac/flashrom/changeset/1819 Log: Introduce helpers.c. Move some suitable functions there, add it to the Makefile, but leave the declarations in flash.h for now. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: trunk/helpers.c (contents, props changed) Modified: trunk/Makefile trunk/at45db.c trunk/flash.h trunk/flashrom.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Jun 4 18:17:03 2014 (r1818) +++ trunk/Makefile Thu Jun 12 02:04:32 2014 (r1819) @@ -353,7 +353,7 @@ ############################################################################### # Library code. -LIB_OBJS = layout.o flashrom.o udelay.o programmer.o +LIB_OBJS = layout.o flashrom.o udelay.o programmer.o helpers.o ############################################################################### # Frontend related stuff. Modified: trunk/at45db.c ============================================================================== --- trunk/at45db.c Wed Jun 4 18:17:03 2014 (r1818) +++ trunk/at45db.c Thu Jun 12 02:04:32 2014 (r1819) @@ -215,17 +215,6 @@ return 1; } -/* Returns the minimum number of bits needed to represent the given address. - * FIXME: use mind-blowing implementation. - * FIXME: move to utility module. */ -static uint32_t address_to_bits(uint32_t addr) -{ - unsigned int lzb = 0; - while (((1 << (31 - lzb)) & ~addr) != 0) - lzb++; - return 32 - lzb; -} - /* In case of non-power-of-two page sizes we need to convert the address flashrom uses to the address the * DataFlash chips use. The latter uses a segmented address space where the page address is encoded in the * more significant bits and the offset within the page is encoded in the less significant bits. The exact Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Wed Jun 4 18:17:03 2014 (r1818) +++ trunk/flash.h Thu Jun 12 02:04:32 2014 (r1819) @@ -241,6 +241,14 @@ int print_supported(void); void print_supported_wiki(void); +/* helpers.c */ +uint32_t address_to_bits(uint32_t addr); +int bitcount(unsigned long a); +int max(int a, int b); +int min(int a, int b); +char *strcat_realloc(char *dest, const char *src); +void tolower_string(char *str); + /* flashrom.c */ extern int verbose_screen; extern int verbose_logfile; @@ -251,13 +259,9 @@ int erase_flash(struct flashctx *flash); int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force); int read_flash_to_file(struct flashctx *flash, const char *filename); -int min(int a, int b); -int max(int a, int b); -void tolower_string(char *str); char *extract_param(const char *const *haystack, const char *needle, const char *delim); int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int start, unsigned int len); int need_erase(const uint8_t *have, const uint8_t *want, unsigned int len, enum write_granularity gran); -char *strcat_realloc(char *dest, const char *src); void print_version(void); void print_buildinfo(void); void print_banner(void); Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Wed Jun 4 18:17:03 2014 (r1818) +++ trunk/flashrom.c Thu Jun 12 02:04:32 2014 (r1819) @@ -535,42 +535,6 @@ return 0; } -int min(int a, int b) -{ - return (a < b) ? a : b; -} - -int max(int a, int b) -{ - return (a > b) ? a : b; -} - -int bitcount(unsigned long a) -{ - int i = 0; - for (; a != 0; a >>= 1) - if (a & 1) - i++; - return i; -} - -void tolower_string(char *str) -{ - for (; *str != '\0'; str++) - *str = (char)tolower((unsigned char)*str); -} - -char *strcat_realloc(char *dest, const char *src) -{ - dest = realloc(dest, strlen(dest) + strlen(src) + 1); - if (!dest) { - msg_gerr("Out of memory!\n"); - return NULL; - } - strcat(dest, src); - return dest; -} - /* This is a somewhat hacked function similar in some ways to strtok(). * It will look for needle with a subsequent '=' in haystack, return a copy of * needle and remove everything from the first occurrence of needle to the next Added: trunk/helpers.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/helpers.c Thu Jun 12 02:04:32 2014 (r1819) @@ -0,0 +1,72 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009-2010 Carl-Daniel Hailfinger + * Copyright (C) 2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <ctype.h> +#include <stdlib.h> +#include <string.h> +#include "flash.h" + +/* Returns the minimum number of bits needed to represent the given address. + * FIXME: use mind-blowing implementation. */ +uint32_t address_to_bits(uint32_t addr) +{ + unsigned int lzb = 0; + while (((1 << (31 - lzb)) & ~addr) != 0) + lzb++; + return 32 - lzb; +} + +int bitcount(unsigned long a) +{ + int i = 0; + for (; a != 0; a >>= 1) + if (a & 1) + i++; + return i; +} + +int max(int a, int b) +{ + return (a > b) ? a : b; +} + +int min(int a, int b) +{ + return (a < b) ? a : b; +} + +char *strcat_realloc(char *dest, const char *src) +{ + dest = realloc(dest, strlen(dest) + strlen(src) + 1); + if (!dest) { + msg_gerr("Out of memory!\n"); + return NULL; + } + strcat(dest, src); + return dest; +} + +void tolower_string(char *str) +{ + for (; *str != '\0'; str++) + *str = (char)tolower((unsigned char)*str); +} +

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Re: [flashrom] [PATCH 5/5] Reorder and cleanup feature flags.
by Carl-Daniel Hailfinger 11 Jun '14

11 Jun '14

Am 09.06.2014 14:41 schrieb Stefan Tauner: > Remove FEATURE_ADDR_SHIFTED as well as FEATURE_*_RESET from chips > that don't use them. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> AFAICS the FEATURE_ADDR_SHIFTED chips can be easily handled by probe_jedec if I'd prefer to actually make use of those flags. See [PATCH] Allow shifted JEDEC access Regards, Carl-Daniel -- http://www.hailfinger.org/

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W836xx: HP DL585 G7: flashrom -V
by Arnold, Scott C. (JSC-DD42)[LOCKHEED MARTIN CORP] 11 Jun '14

11 Jun '14

Found chipset "AMD SB7x0/SB8x0/SB9x0" with PCI ID 1002:439d. Enabling flash write... SPI base address is at 0x0 ROM strap override is not active OK. The following protocols are supported: LPC, FWH. Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x0c, id2 0x02, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x22, id2 0x56, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0x22, id2 0x56, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x22, id2 0x56, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0x22, id2 0x56, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xc4, id2 0x0c, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x24, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically.

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Re: [flashrom] [PATCH] nicintel_eeprom: New programmer for Intel Nics eeproms
by Stefan Tauner 10 Jun '14

10 Jun '14

On Mon, 26 May 2014 13:41:16 +0200 Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> wrote: > Hello Stefan > > Need help on this? No, and please be assured that it won't take months again to merge it finally. I just need to chat with Carl-Daniel about it in more detail and there are a lot of other more pressing things to handle first. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

Elitegroup GeForce6100SM-M: flashrom -V
by Josiah DeWitt 10 Jun '14

10 Jun '14

[root@mx ~]# flashrom -V flashrom v0.9.6.1-r1705 on Linux 3.6.10-4.fc18.x86_64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.10, GCC 4.7.2 20121109 (Red Hat 4.7.2-8), little endian Command line (1 args): flashrom -V Using default programmer "internal". Calibrating delay loop... OS timer resolution is 2 usecs, 597M loops per second, 10 myus = 12 us, 100 myus = 101 us, 1000 myus = 1011 us, 10000 myus = 10254 us, 8 myus = 10 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: " " DMI string baseboard-product-name: "NF-MCP61" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8726 on port 0x2e Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Flash bus type is LPC Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0x00000000 MCP SPI is not used. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. Super I/O ID 0x8726 is not on the list of flash capable controllers. Enabling full flash access for board "Elitegroup GeForce6100SM-M"... OK. The following protocols are supported: LPC. Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x85, id2 0x98, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH) at physical address 0xfff80000. Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x9d, id2 0x6e Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH). No operations were specified. Restoring PCI config space for 00:01:0 reg 0x6d Restoring PCI config space for 00:01:0 reg 0x90 Restoring PCI config space for 00:01:0 reg 0x8c Restoring PCI config space for 00:01:0 reg 0x88

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[PATCH 5/5] Reorder and cleanup feature flags.
by Stefan Tauner 09 Jun '14

09 Jun '14

Remove FEATURE_ADDR_SHIFTED as well as FEATURE_*_RESET from chips that don't use them. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- flash.h | 8 ++++---- flashchips.c | 9 +-------- 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/flash.h b/flash.h index 7949628..d3ffced 100644 --- a/flash.h +++ b/flash.h @@ -104,14 +104,14 @@ enum write_granularity { /* Feature bits used for non-SPI only */ #define FEATURE_REGISTERMAP (1 << 0) #define FEATURE_BYTEWRITES (1 << 1) +#define FEATURE_ADDR_FULL (0 << 2) +#define FEATURE_ADDR_2AA (1 << 2) +#define FEATURE_ADDR_AAA (2 << 2) +#define FEATURE_ADDR_MASK (3 << 2) #define FEATURE_LONG_RESET (0 << 4) #define FEATURE_SHORT_RESET (1 << 4) #define FEATURE_EITHER_RESET FEATURE_LONG_RESET #define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET) -#define FEATURE_ADDR_FULL (0 << 2) -#define FEATURE_ADDR_MASK (3 << 2) -#define FEATURE_ADDR_2AA (1 << 2) -#define FEATURE_ADDR_AAA (2 << 2) #define FEATURE_ADDR_SHIFTED (1 << 5) /* Feature bits used for SPI only */ #define FEATURE_WRSR_EWSR (1 << 6) diff --git a/flashchips.c b/flashchips.c index 0c3bb68..2efcd26 100644 --- a/flashchips.c +++ b/flashchips.c @@ -4892,7 +4892,6 @@ const struct flashchip flashchips[] = { .model_id = FUJITSU_MBM29F400BC, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ @@ -4924,7 +4923,6 @@ const struct flashchip flashchips[] = { .model_id = FUJITSU_MBM29F400TC, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ @@ -4956,7 +4954,6 @@ const struct flashchip flashchips[] = { .model_id = FUJITSU_MBM29LV160BE, .total_size = 2 * 1024, .page_size = 0, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, @@ -4988,7 +4985,6 @@ const struct flashchip flashchips[] = { .model_id = FUJITSU_MBM29LV160TE, .total_size = 2 * 1024, .page_size = 0, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, @@ -9439,7 +9435,7 @@ const struct flashchip flashchips[] = { .model_id = SHARP_LHF00L04, .total_size = 1024, .page_size = 64 * 1024, - .feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_ZERO, @@ -11388,7 +11384,6 @@ const struct flashchip flashchips[] = { .model_id = ST_M29F400BB, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ @@ -11420,7 +11415,6 @@ const struct flashchip flashchips[] = { .model_id = ST_M29F400BT, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ @@ -12780,7 +12774,6 @@ const struct flashchip flashchips[] = { .model_id = WINBOND_W29C010, .total_size = 128, .page_size = 128, - .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PREW, .probe = probe_w29ee011, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (w29ee011.c) */ -- Kind regards, Stefan Tauner

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[PATCH 4/5] Refine handling chips that exceed maximum programmer sizes.
by Stefan Tauner 09 Jun '14

09 Jun '14

- Change check_max_decode() to return the number of (common) busses where the flash chip exceeds the supported size of the programmer. - Refine its signature to use a flashctx only. - Move CLI-related bits to cli_classic.c. - Rename check_max_decode() to count_max_decode_exceedings() to better reflect what it (now) really does. - Refine the messages printed by the caller to better integrate with the new setup, and simplify them. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- cli_classic.c | 16 ++++++++++++---- flashrom.c | 24 ++++++++---------------- programmer.h | 2 +- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/cli_classic.c b/cli_classic.c index 54b0d07..db76fbc 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -158,7 +158,6 @@ static void check_chip_supported(const struct flashchip *chip) int main(int argc, char *argv[]) { - unsigned long size; /* Probe for up to three flash chips. */ const struct flashchip *chip = NULL; struct flashctx flashes[3] = {{0}}; @@ -568,9 +567,18 @@ int main(int argc, char *argv[]) check_chip_supported(fill_flash->chip); - size = fill_flash->chip->total_size * 1024; - if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->chip->bustype, size) && (!force)) { - msg_cerr("Chip is too big for this programmer (-V gives details). Use --force to override.\n"); + unsigned int limitexceeded = count_max_decode_exceedings(fill_flash); + if (limitexceeded > 0 && !force) { + enum chipbustype commonbuses = fill_flash->pgm->buses_supported & fill_flash->chip->bustype; + + /* Sometimes chip and programmer have more than one bus in common, + * and the limit is not exceeded on all buses. Tell the user. */ + if ((bitcount(commonbuses) > limitexceeded)) { + msg_pdbg("There is at least one interface available which could support the size of\n" + "the selected flash chip.\n"); + } + msg_cerr("This flash chip is too big for this programmer (--verbose/-V gives details).\n" + "Use --force/-f to override at your own risk.\n"); ret = 1; goto out_shutdown; } diff --git a/flashrom.c b/flashrom.c index 5a07e79..31d352a 100644 --- a/flashrom.c +++ b/flashrom.c @@ -995,9 +995,13 @@ int generate_testpattern(uint8_t *buf, uint32_t size, int variant) return 0; } -int check_max_decode(enum chipbustype buses, uint32_t size) +/* Returns the number of busses commonly supported by the current programmer and flash chip where the latter + * can not be completely accessed due to size/address limits of the programmer. */ +unsigned int count_max_decode_exceedings(struct flashctx *flash) { - int limitexceeded = 0; + unsigned int limitexceeded = 0; + uint32_t size = flash->chip->total_size * 1024; + enum chipbustype buses = flash->pgm->buses_supported & flash->chip->bustype; if ((buses & BUS_PARALLEL) && (max_rom_decode.parallel < size)) { limitexceeded++; @@ -1031,17 +1035,7 @@ int check_max_decode(enum chipbustype buses, uint32_t size) "probe/read/erase/write may fail. ", size / 1024, max_rom_decode.spi / 1024, "SPI"); } - if (!limitexceeded) - return 0; - /* Sometimes chip and programmer have more than one bus in common, - * and the limit is not exceeded on all buses. Tell the user. - */ - if (bitcount(buses) > limitexceeded) - /* FIXME: This message is designed towards CLI users. */ - msg_pdbg("There is at least one common chip/programmer " - "interface which can support a chip of this size. " - "You can try --force at your own risk.\n"); - return 1; + return limitexceeded; } int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *flash, int force) @@ -1065,9 +1059,6 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct continue; } - size = chip->total_size * 1024; - check_max_decode(buses_common, size); - /* Start filling in the dynamic data. */ flash->chip = calloc(1, sizeof(struct flashchip)); if (!flash->chip) { @@ -1077,6 +1068,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct memcpy(flash->chip, chip, sizeof(struct flashchip)); flash->pgm = pgm; + size = chip->total_size * 1024; base = flashbase ? flashbase : (0xffffffff - size + 1); flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size); diff --git a/programmer.h b/programmer.h index 867eee9..2a5322f 100644 --- a/programmer.h +++ b/programmer.h @@ -503,7 +503,7 @@ struct decode_sizes { extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -int check_max_decode(enum chipbustype buses, uint32_t size); +unsigned int count_max_decode_exceedings(struct flashctx *flash); char *extract_programmer_param(const char *param_name); /* spi.c */ -- Kind regards, Stefan Tauner

1 0

[PATCH 3/5] Introduce helpers.c.
by Stefan Tauner 09 Jun '14

09 Jun '14

Move some suitable functions there, add it to the Makefile, but leave the declarations in flash.h for now. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- Makefile | 2 +- flash.h | 11 +++++++---- flashrom.c | 36 ------------------------------------ helpers.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 68 insertions(+), 41 deletions(-) create mode 100644 helpers.c diff --git a/Makefile b/Makefile index d3c1ba5..7a48889 100644 --- a/Makefile +++ b/Makefile @@ -353,7 +353,7 @@ CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ ############################################################################### # Library code. -LIB_OBJS = layout.o flashrom.o udelay.o programmer.o +LIB_OBJS = layout.o flashrom.o udelay.o programmer.o helpers.o ############################################################################### # Frontend related stuff. diff --git a/flash.h b/flash.h index cf496b6..7949628 100644 --- a/flash.h +++ b/flash.h @@ -241,6 +241,13 @@ char *flashbuses_to_text(enum chipbustype bustype); int print_supported(void); void print_supported_wiki(void); +/* helpers.c */ +void tolower_string(char *str); +char *strcat_realloc(char *dest, const char *src); +int min(int a, int b); +int max(int a, int b); +int bitcount(unsigned long a); + /* flashrom.c */ extern int verbose_screen; extern int verbose_logfile; @@ -251,13 +258,9 @@ int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, uns int erase_flash(struct flashctx *flash); int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force); int read_flash_to_file(struct flashctx *flash, const char *filename); -int min(int a, int b); -int max(int a, int b); -void tolower_string(char *str); char *extract_param(const char *const *haystack, const char *needle, const char *delim); int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int start, unsigned int len); int need_erase(const uint8_t *have, const uint8_t *want, unsigned int len, enum write_granularity gran); -char *strcat_realloc(char *dest, const char *src); void print_version(void); void print_buildinfo(void); void print_banner(void); diff --git a/flashrom.c b/flashrom.c index f8978f1..5a07e79 100644 --- a/flashrom.c +++ b/flashrom.c @@ -535,42 +535,6 @@ int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, return 0; } -int min(int a, int b) -{ - return (a < b) ? a : b; -} - -int max(int a, int b) -{ - return (a > b) ? a : b; -} - -int bitcount(unsigned long a) -{ - int i = 0; - for (; a != 0; a >>= 1) - if (a & 1) - i++; - return i; -} - -void tolower_string(char *str) -{ - for (; *str != '\0'; str++) - *str = (char)tolower((unsigned char)*str); -} - -char *strcat_realloc(char *dest, const char *src) -{ - dest = realloc(dest, strlen(dest) + strlen(src) + 1); - if (!dest) { - msg_gerr("Out of memory!\n"); - return NULL; - } - strcat(dest, src); - return dest; -} - /* This is a somewhat hacked function similar in some ways to strtok(). * It will look for needle with a subsequent '=' in haystack, return a copy of * needle and remove everything from the first occurrence of needle to the next diff --git a/helpers.c b/helpers.c new file mode 100644 index 0000000..02cad43 --- /dev/null +++ b/helpers.c @@ -0,0 +1,60 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009-2010 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <ctype.h> +#include <stdlib.h> +#include <string.h> +#include "flash.h" + +int min(int a, int b) +{ + return (a < b) ? a : b; +} + +int max(int a, int b) +{ + return (a > b) ? a : b; +} + +int bitcount(unsigned long a) +{ + int i = 0; + for (; a != 0; a >>= 1) + if (a & 1) + i++; + return i; +} + +void tolower_string(char *str) +{ + for (; *str != '\0'; str++) + *str = (char)tolower((unsigned char)*str); +} + +char *strcat_realloc(char *dest, const char *src) +{ + dest = realloc(dest, strlen(dest) + strlen(src) + 1); + if (!dest) { + msg_gerr("Out of memory!\n"); + return NULL; + } + strcat(dest, src); + return dest; +} -- Kind regards, Stefan Tauner

1 0

[PATCH 2/5] Move check_chip_supported() to cli_classic.c.
by Stefan Tauner 09 Jun '14

09 Jun '14

This function clearly belongs to the command line interface and should therefore reside in cli_classic.c and not in flashrom.c. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- cli_classic.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashrom.c | 67 ----------------------------------------------------------- programmer.h | 1 - 3 files changed, 67 insertions(+), 68 deletions(-) diff --git a/cli_classic.c b/cli_classic.c index fc1b9ba..54b0d07 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -89,6 +89,73 @@ static int check_filename(char *filename, char *type) return 0; } +static void check_chip_supported(const struct flashchip *chip) +{ + if (chip->feature_bits & FEATURE_OTP) { + msg_cdbg("This chip may contain one-time programmable memory. " + "flashrom cannot read\nand may never be able to write " + "it, hence it may not be able to completely\n" + "clone the contents of this chip (see man page for " + "details).\n"); + } + + if ((chip->tested.erase == NA) && (chip->tested.write == NA)) { + msg_cdbg("This chip's main memory can not be erased/written by design.\n"); + } + + if ((chip->tested.probe == BAD) || (chip->tested.probe == NT) || + (chip->tested.read == BAD) || (chip->tested.read == NT) || + (chip->tested.erase == BAD) || (chip->tested.erase == NT) || + (chip->tested.write == BAD) || (chip->tested.write == NT)){ + msg_cinfo("===\n"); + if ((chip->tested.probe == BAD) || + (chip->tested.read == BAD) || + (chip->tested.erase == BAD) || + (chip->tested.write == BAD)) { + msg_cinfo("This flash part has status NOT WORKING for operations:"); + if (chip->tested.probe == BAD) + msg_cinfo(" PROBE"); + if (chip->tested.read == BAD) + msg_cinfo(" READ"); + if (chip->tested.erase == BAD) + msg_cinfo(" ERASE"); + if (chip->tested.write == BAD) + msg_cinfo(" WRITE"); + msg_cinfo("\n"); + } + if ((chip->tested.probe == NT) || + (chip->tested.read == NT) || + (chip->tested.erase == NT) || + (chip->tested.write == NT)) { + msg_cinfo("This flash part has status UNTESTED for operations:"); + if (chip->tested.probe == NT) + msg_cinfo(" PROBE"); + if (chip->tested.read == NT) + msg_cinfo(" READ"); + if (chip->tested.erase == NT) + msg_cinfo(" ERASE"); + if (chip->tested.write == NT) + msg_cinfo(" WRITE"); + msg_cinfo("\n"); + } + /* FIXME: This message is designed towards CLI users. */ + msg_cinfo("The test status of this chip may have been updated " + "in the latest development\n" + "version of flashrom. If you are running the latest " + "development version,\n" + "please email a report to flashrom(a)flashrom.org if " + "any of the above operations\n" + "work correctly for you with this flash part. Please " + "include the flashrom\n" + "output with the additional -V option for all " + "operations you tested (-V, -Vr,\n" + "-VE, -Vw), and mention which mainboard or " + "programmer you tested.\n" + "Please mention your board in the subject line. " + "Thanks for your help!\n"); + } +} + int main(int argc, char *argv[]) { unsigned long size; diff --git a/flashrom.c b/flashrom.c index a8a8533..f8978f1 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1798,73 +1798,6 @@ int selfcheck(void) return ret; } -void check_chip_supported(const struct flashchip *chip) -{ - if (chip->feature_bits & FEATURE_OTP) { - msg_cdbg("This chip may contain one-time programmable memory. " - "flashrom cannot read\nand may never be able to write " - "it, hence it may not be able to completely\n" - "clone the contents of this chip (see man page for " - "details).\n"); - } - - if ((chip->tested.erase == NA) && (chip->tested.write == NA)) { - msg_cdbg("This chip's main memory can not be erased/written by design.\n"); - } - - if ((chip->tested.probe == BAD) || (chip->tested.probe == NT) || - (chip->tested.read == BAD) || (chip->tested.read == NT) || - (chip->tested.erase == BAD) || (chip->tested.erase == NT) || - (chip->tested.write == BAD) || (chip->tested.write == NT)){ - msg_cinfo("===\n"); - if ((chip->tested.probe == BAD) || - (chip->tested.read == BAD) || - (chip->tested.erase == BAD) || - (chip->tested.write == BAD)) { - msg_cinfo("This flash part has status NOT WORKING for operations:"); - if (chip->tested.probe == BAD) - msg_cinfo(" PROBE"); - if (chip->tested.read == BAD) - msg_cinfo(" READ"); - if (chip->tested.erase == BAD) - msg_cinfo(" ERASE"); - if (chip->tested.write == BAD) - msg_cinfo(" WRITE"); - msg_cinfo("\n"); - } - if ((chip->tested.probe == NT) || - (chip->tested.read == NT) || - (chip->tested.erase == NT) || - (chip->tested.write == NT)) { - msg_cinfo("This flash part has status UNTESTED for operations:"); - if (chip->tested.probe == NT) - msg_cinfo(" PROBE"); - if (chip->tested.read == NT) - msg_cinfo(" READ"); - if (chip->tested.erase == NT) - msg_cinfo(" ERASE"); - if (chip->tested.write == NT) - msg_cinfo(" WRITE"); - msg_cinfo("\n"); - } - /* FIXME: This message is designed towards CLI users. */ - msg_cinfo("The test status of this chip may have been updated " - "in the latest development\n" - "version of flashrom. If you are running the latest " - "development version,\n" - "please email a report to flashrom(a)flashrom.org if " - "any of the above operations\n" - "work correctly for you with this flash part. Please " - "include the flashrom\n" - "output with the additional -V option for all " - "operations you tested (-V, -Vr,\n" - "-VE, -Vw), and mention which mainboard or " - "programmer you tested.\n" - "Please mention your board in the subject line. " - "Thanks for your help!\n"); - } -} - /* FIXME: This function signature needs to be improved once doit() has a better * function signature. */ diff --git a/programmer.h b/programmer.h index d299656..867eee9 100644 --- a/programmer.h +++ b/programmer.h @@ -503,7 +503,6 @@ struct decode_sizes { extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -void check_chip_supported(const struct flashchip *chip); int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(const char *param_name); -- Kind regards, Stefan Tauner

1 0

[PATCH 1/5] Fix FWH IDSEL message printing.
by Stefan Tauner 09 Jun '14

09 Jun '14

Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipset_enable.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 40761d2..46cc79c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -404,7 +404,7 @@ static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich uint64_t fwh_idsel_old = pci_read_long(dev, fwh_sel1); fwh_idsel_old <<= 16; fwh_idsel_old |= pci_read_word(dev, fwh_sel2); - msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.", + msg_pdbg("Setting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.\n", fwh_idsel_old, fwh_idsel); rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff); rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff); @@ -418,7 +418,7 @@ idsel_garbage_out: free(idsel); if (!implemented) { - msg_pdbg2("FWH IDSEL handling is not implemented on this chipset."); + msg_pdbg2("FWH IDSEL handling is not implemented on this chipset.\n"); return 0; } @@ -434,7 +434,7 @@ idsel_garbage_out: /* FWH_SEL1 */ for (i = 7; i >= 0; i--) { int tmp = (fwh_conf >> (i * 4)) & 0xf; - msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + msg_pdbg("0x%08x/0x%08x FWH IDSEL: 0x%x\n", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp); @@ -448,7 +448,7 @@ idsel_garbage_out: fwh_conf = pci_read_word(dev, fwh_sel2); for (i = 3; i >= 0; i--) { int tmp = (fwh_conf >> (i * 4)) & 0xf; - msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + msg_pdbg("0x%08x/0x%08x FWH IDSEL: 0x%x\n", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp); @@ -465,7 +465,7 @@ idsel_garbage_out: fwh_conf |= pci_read_byte(dev, fwh_dec_en_lo); for (i = 7; i >= 0; i--) { int tmp = (fwh_conf >> (i + 0x8)) & 0x1; - msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + msg_pdbg("0x%08x/0x%08x FWH decode %sabled\n", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp ? "en" : "dis"); @@ -477,7 +477,7 @@ idsel_garbage_out: } for (i = 3; i >= 0; i--) { int tmp = (fwh_conf >> i) & 0x1; - msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + msg_pdbg("0x%08x/0x%08x FWH decode %sabled\n", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp ? "en" : "dis"); @@ -488,7 +488,7 @@ idsel_garbage_out: } } max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode); - msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", max_rom_decode.fwh); + msg_pdbg("Maximum FWH chip size: 0x%x bytes\n", max_rom_decode.fwh); return 0; } -- Kind regards, Stefan Tauner

1 0

[PATCH 0/5] Bunch of stuff on the way to new probing
by Stefan Tauner 09 Jun '14

09 Jun '14

While I was hacking around to prepare for the probing rewrite I have found a few things that could be improved. This is the first batch of such changes that are not directly related to the probing, could easily be factored out and make sense even without the new proving IMHO. The existence and naming of helpers.c was discussed previously in the context of layout patches (in case you seem to have a deja vu ;). Stefan Tauner (5): Fix FWH IDSEL message printing. Move check_chip_supported() to cli_classic.c. Introduce helpers.c. Refine handling chips that exceed maximum programmer sizes. Reorder and cleanup feature flags. Makefile | 2 +- chipset_enable.c | 14 +++--- cli_classic.c | 83 ++++++++++++++++++++++++++++++++++-- flash.h | 19 +++++---- flashchips.c | 9 +--- flashrom.c | 127 ++++--------------------------------------------------- helpers.c | 60 ++++++++++++++++++++++++++ programmer.h | 3 +- 8 files changed, 168 insertions(+), 149 deletions(-) create mode 100644 helpers.c -- Kind regards, Stefan Tauner

1 0

report about AT25F4096
by 공준혁 07 Jun '14

07 Jun '14

2 1

Unable to flash MX25L3206E
by HyDzFR 05 Jun '14

05 Jun '14

Hi, I try to flash a mx25L3206E from macronix with flashrom 0.9.7-r1817 with a raspberry pi via spi. The chip is on the motherboard. I've disconnect Vcc from motherboard. Flashrom failed to erase the chip and say "flash chip is in an unknow state ». I launch the following command: sudo flashrom -w XXX.bin -V -p linux_spi:dev=/dev/spidev0.0 -c MX25L3206E Here is the output http://paste.flashrom.org/view.php?id=2621 Regards Hydz

2 1

Re: [flashrom] Flashrom Update Failure
by Will Choe 05 Jun '14

05 Jun '14

Resolved it by copy & modifying: else if (force && chip_to_probe) { struct registered_programmer *pgm; int compatible_programmers = 0; msg_cinfo("Force read (-f -r -c) requested, pretending the chip is there:\n"); /* This loop just counts compatible controllers. */ for (j = 0; j < registered_programmer_count; j++) { pgm = &registered_programmers[j]; /* chip is still set from the chip_to_probe earlier in this function. */ if (pgm->buses_supported & chip->bustype) compatible_programmers++; } if (!compatible_programmers) { msg_cinfo("No compatible controller found for the requested flash chip.\n"); ret = 1; goto out_shutdown; } if (compatible_programmers > 1) msg_cinfo("More than one compatible controller found for the requested flash " "chip, using the first one.\n"); for (j = 0; j < registered_programmer_count; j++) { pgm = &registered_programmers[j]; startchip = probe_flash(pgm, 0, &flashes[0], 1); if (startchip != -1) break; } msg_cinfo("Please note that forced writes most likely contain garbage.\n"); } if (startchip == -1) { ret = 1; goto out_shutdown; } to the cli_classic.c I think it's better to have 'force & force' option to do the writing. Will 2014. 6. 5., pm 5:05, Will Choe <jazzbearz(a)gmail.com> wrote: > Hi, > > Flashrom update failed due to sudden network interruption. After then, when I try the flashrom, following message appears: > > flashrom v0.9.7-r1711 on Linux 2.6.32-431.5.1.el6.x86_64 (x86_64) > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OK. > sh: dmidecode: command not found > dmidecode execution unsuccessful - continuing without DMI info > Found chipset "Intel ICH10R". Enabling flash write... OK. > No EEPROM/flash device found. > Note: flashrom can never write if the flash chip isn't found automatically. > > How do I make the flashrom to force rewrite the rom? > > Thanks in advance. > > Will > > > >

1 0

Flashrom Update Failure
by Will Choe 05 Jun '14

05 Jun '14

Hi, Flashrom update failed due to sudden network interruption. After then, when I try the flashrom, following message appears: flashrom v0.9.7-r1711 on Linux 2.6.32-431.5.1.el6.x86_64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. sh: dmidecode: command not found dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel ICH10R". Enabling flash write... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. How do I make the flashrom to force rewrite the rom? Thanks in advance. Will

1 0

Re: [flashrom] ft2232_spi:type=jtagkey
by Stefan Tauner 05 Jun '14

05 Jun '14

On Tue, 3 Jun 2014 19:48:12 +0700 Alfin Cahya <alfincp(a)gmail.com> wrote: > Hello Stefan, > > Thanks for your response. I have connected all the pins (CLK,DI,DO,CS) > and 3.3v to VCC, HOLD, WP. > IC type is EN25QH128A-HIP ( 4 pins ). > Try using Arduino Duemilanove (serprog:dev=/dev/ttyUSB0:2000000) > result remains the same. Then it may be one of the problems listed here: http://flashrom.org/ISP Could you please post a complete verbose log? Is the chip always detected? If you read the chip multiple times, is the content read always the same? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

Try to add support for LE25FW106/1Mbit spi flash
by The Raven 04 Jun '14

04 Jun '14

Hello, i am trying to add this chip (ID 0x62 0x15). It works so far, but erase function 1 is not working. The datasheet tells that it supports 2K small sector, 32K sector and chip erase. 2K Small Sector and chip erase works. But 32K not. And i don't know why. Please have a look: .vendor = "Sanyo", .name = "LE25FW106", .bustype = BUS_SPI, .manufacture_id = SANYO_ID, .model_id = SANYO_LE25FW106, .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, .block_erasers = { { // .eraseblocks = { {2 * 1024, 64} }, //ok // .block_erase = spi_block_erase_d7, // }, { .eraseblocks = { {32 * 1024, 4} }, //not ok .block_erase = spi_block_erase_d8, // }, { // .eraseblocks = { {128 * 1024, 1} }, //ok // .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_plain, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, I am also not sure if "FEATURE_WRSR_WREN" is correct. The code is taken from "LE25FW406A" chip and changed to fit the "LE25FW106". This is the error: Found Sanyo flash chip "LE25FW106" (128 kB, SPI). Erasing and writing flash chip... Trying erase function 0... 0x000000-0x007fff:E, 0x008000-0x00ffff:EError: invalid response 0xAF from device spi_block_erase_d8 failed during command execution at address 0x8000 Looking for another erase function. No usable erase functions left. FAILED! Attention: It tells function 0, but this is because i have removed the other functions for testing. ;-) BTW: Chips was found an a 2.5" hitachi harddisk. Chip is a "T" model (MSOP8).

2 5

[commit] r1818 - trunk
by repository service 04 Jun '14

04 Jun '14

Author: stefanct Date: Wed Jun 4 18:17:03 2014 New Revision: 1818 URL: http://flashrom.org/trac/flashrom/changeset/1818 Log: Add support for Sanyo LE25FW106. Also, add spi_disable_blockprotect_bp1_srwd(). Originally written and tested by The Raven <originalraven(a)hotmail.com>. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/chipdrivers.h Wed Jun 4 18:17:03 2014 (r1818) @@ -73,6 +73,7 @@ int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash); int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); +int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/flashchips.c Wed Jun 4 18:17:03 2014 (r1818) @@ -9153,6 +9153,37 @@ { .vendor = "Sanyo", + .name = "LE25FW106", + .bustype = BUS_SPI, + .manufacture_id = SANYO_ID, + .model_id = SANYO_LE25FW106, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {2 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp1_srwd, /* FIXME: Add ERSER error flag. */ + .unlock = spi_disable_blockprotect_bp1_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Sanyo", .name = "LE25FW406A", .bustype = BUS_SPI, .manufacture_id = SANYO_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/flashchips.h Wed Jun 4 18:17:03 2014 (r1818) @@ -537,6 +537,7 @@ #define SANYO_ID 0x62 /* Sanyo */ #define SANYO_LE25FW203A 0x1600 #define SANYO_LE25FW403A 0x1100 +#define SANYO_LE25FW106 0x15 #define SANYO_LE25FW406 0x07 /* RES2 */ #define SANYO_LE25FW418A 0x10 /* RES2 and some weird 1 byte RDID variant */ #define SANYO_LE25FW406A 0x1A /* RES2, no datasheet */ Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/spi25_statusreg.c Wed Jun 4 18:17:03 2014 (r1818) @@ -196,6 +196,13 @@ return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF); } +/* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and + * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */ +int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF); +} + /* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly * non-0). */

1 0

[PATCH 2/2] Remove MCP6/7/8 SPI log requests.
by Stefan Tauner 03 Jun '14

03 Jun '14

We got enough (and no one is looking at them for the time being anyway). Also, return an error code in the case no bus type could be detected. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipset_enable.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 40761d2..ec3c12c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1244,8 +1244,6 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) int ret = 0, want_spi = 0; uint8_t val; - msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); - /* dev is the ISA bridge. No idea what the stuff below does. */ val = pci_read_byte(dev, 0x8a); msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " @@ -1264,17 +1262,15 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) */ internal_buses_supported = BUS_NONE; msg_pdbg("Flash bus type is SPI\n"); - msg_pinfo("SPI on this chipset is WIP. Please report any " - "success or failure by mailing us the verbose " - "output to flashrom(a)flashrom.org, thanks!\n"); break; default: /* Should not happen. */ internal_buses_supported = BUS_NONE; - msg_pdbg("Flash bus type is unknown (none)\n"); - msg_pinfo("Something went wrong with bus type detection.\n"); - goto out_msg; - break; + msg_pwarn("Flash bus type is unknown (none)\n"); + msg_pinfo("Please send the log files created by \"flashrom -p internal -o logfile\" to \n" + "flashrom(a)flashrom.org with \"your board name: flashrom -V\" as the subject to\n" + "help us finish support for your chipset. Thanks.\n"); + return ERROR_NONFATAL; } /* Force enable SPI and disable LPC? Not a good idea. */ @@ -1287,11 +1283,6 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) if (mcp6x_spi_init(want_spi)) ret = 1; -out_msg: - msg_pinfo("Please send the output of \"flashrom -V -p internal\" to flashrom(a)flashrom.org\n" - "with \"your board name: flashrom -V\" as the subject to help us finish support\n" - "for your chipset. Thanks.\n"); - return ret; } -- Kind regards, Stefan Tauner

1 0

[PATCH 1/2] Remove W836xx log requests.
by Stefan Tauner 03 Jun '14

03 Jun '14

We got enough (and no one is looking at them for the time being anyway). Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- board_enable.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/board_enable.c b/board_enable.c index 2cf6776..782db35 100644 --- a/board_enable.c +++ b/board_enable.c @@ -333,12 +333,9 @@ void probe_superio_winbond(void) continue; } } - msg_pinfo("Active config mode, unknown reg 0x20 ID: %02x.\n", model); - msg_pinfo("Please send the output of \"flashrom -V -p internal\" to \n" - "flashrom(a)flashrom.org with W836xx: your board name: flashrom -V\n" - "as the subject to help us finish support for your Super I/O. Thanks.\n"); + msg_pdbg("Active config mode, unknown reg 0x20 ID: %02x.\n", model); continue; - } + } /* The Super I/O reacts to W836xx enter and exit config mode, it's probably Winbond. */ w836xx_ext_enter(s.port); s.model = sio_read(s.port, 0x20); -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] ft2232_spi:type=jtagkey
by Stefan Tauner 03 Jun '14

03 Jun '14

Hello Alfin, thanks for your report. Have you connected all input pins of the flash chip to the programmer? The behavior shown in the log extract could be coming from a floating write protection pin. That's pin #9 (diagonally opposite to the pin #1 marker on the 16-pin sop/soic package). I'd check if that pin is pulled-high towards VCC (pin #2). Likewise all other *input* pins should be driven - either statically to GND or VCC (ideally by resistors), or dynamically by the programmer's clock and data out pins. HTH -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

W836xx: J1800N-D2H: flashrom -V
by Maarten Wouters 03 Jun '14

03 Jun '14

1 0

Re: [flashrom] Add PICkit2 as an SPI programmer
by Stefan Tauner 03 Jun '14

03 Jun '14

On Mon, 2 Jun 2014 21:43:09 -0400 Justin Chevrier <jchevrier(a)gmail.com> wrote: > +.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)" > +.sp > +.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)" > +.sp Hi, thanks for your updated patch! You seem to have mixed up a few bits while rebasing. I could clear that up too, but if you beat me at it, I'd feel lucky ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] Add PICkit2 as an SPI programmer
by Justin Chevrier 03 Jun '14

03 Jun '14

On Mon, Jun 2, 2014 at 9:43 PM, Justin Chevrier <jchevrier(a)gmail.com> wrote: > Hi Stefan, > > Attached is a second revision of my patch. Hopefully it addresses > everything you pointed out previously! Keep me posted if more work > needs to be done. > > I have attached a log of a write as well. > > Thanks again, > > Justin > > On Fri, May 30, 2014 at 8:27 PM, Stefan Tauner > <stefan.tauner(a)alumni.tuwien.ac.at> wrote: >> On Thu, 1 May 2014 13:39:44 -0400 >> Justin Chevrier <jchevrier(a)gmail.com> wrote: >> >>> Very sorry for not replying to your email (thanks for the review by the way). >>> >>> I do have a newer patch that fixes most if not all of the points you >>> made, but I've been slacking in going over it one last time and >>> getting it sent in. I had someone contact me directly around December >>> and they successfully used this updated patch on their hardware. >>> >>> I'll see if I can get the patch brushed up and sent in shortly. >>> >>> Thanks for the reminder (ugh, can't believe it's been over one year). >> >> Hi Justin, >> >> this is just a friendly ping. I am planning to do a stable release in >> the not too distant future (next few weeks) and would like to include >> your module if it gets ready by then. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner Ugh, sorry for the top post and the flashrom.8 junk in the patch. New version attached. Justin

1 0

Re: [flashrom] Add PICkit2 as an SPI programmer
by Stefan Tauner 03 Jun '14

03 Jun '14

On Thu, 1 May 2014 13:39:44 -0400 Justin Chevrier <jchevrier(a)gmail.com> wrote: > Very sorry for not replying to your email (thanks for the review by the way). > > I do have a newer patch that fixes most if not all of the points you > made, but I've been slacking in going over it one last time and > getting it sent in. I had someone contact me directly around December > and they successfully used this updated patch on their hardware. > > I'll see if I can get the patch brushed up and sent in shortly. > > Thanks for the reminder (ugh, can't believe it's been over one year). Hi Justin, this is just a friendly ping. I am planning to do a stable release in the not too distant future (next few weeks) and would like to include your module if it gets ready by then. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

W836xx: HP ProLiant DL585 G7: flashrom -V
by Arnold, Scott C. (JSC-DD42)[LOCKHEED MARTIN CORP] 02 Jun '14

02 Jun '14

./flashrom -V -p internal -r /tmp/flash.out flashrom v0.9.7-r1711 on Linux 3.7.9.lite (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.10, GCC 4.4.7 20120313 (Red Hat 4.4.7-4), little endian Command line (5 args): ./flashrom -V -p internal -r /tmp/flash.out Calibrating delay loop... OS timer resolution is 1 usecs, 1047M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 10001 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "HP" DMI string system-product-name: "ProLiant DL585 G7" DMI string system-version: "Not Specified" DMI string baseboard-manufacturer: "" DMI string baseboard-product-name: "" DMI string baseboard-version: "" DMI string chassis-type: "Rack Mount Chassis" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 03. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "AMD SB7x0/SB8x0/SB9x0" with PCI ID 1002:439d. Enabling flash write... SPI base address is at 0x0 ROM strap override is not active OK. Note: Coreboot superiotool says the superio is a SMSC FDC37C93xFR Thanks Scott

1 0

[PATCH][RFC] uisp_spi programmer support
by Andrew 02 Jun '14

02 Jun '14

Hello, all. I've been playing around with buspirate and my uISP ( https://github.com/uISP/ ) dongle. Even with newer firmware buspirate is really slow, and on average, takes 3m 49s to read out a 2MiB SPI flash. So I decided to play around and see if I can make a faster programmer with my uISP dongle. Basically it's an atmega8 with 12M crystal running vusb stack (no hardware usb). Any other similar hardware would do. This hardware is really cheap (BOM is less than 5$ including the pcb). My first attempt was creating a serprog-compatible firmware for uISP. It can be found here: https://github.com/uISP/uisp-app-serprog The results weren't very exciting. It took 4m 30s to read out a 2MiB SPI flash (EN25QH16) on 12M crystal. Same for 20M crystal. It seems like it was a limitation of bulk out transfers via vusb. The second attempt required patching flashrom itself, but resulted in a MUCH simpler firmware that fits roughly 115 lines of code (not counting vusb). It just uses control transfers for both reads and writes. With vusb long transfers enabled, 20Mhz crystal, 10Mhz SPI speed and max_data_read/max_data_write set to 4096 bytes reading a 2MiB SPI flash took only 2m 13s which I consider a WIN. 4096 is not a vusb limit. USB spec limits maximum transfers to control endpoint to 4096 bytes anyway. Using 254 byte max_data_read/max_data_write and long transfers disabled would be slower, but it is possible to fit everything into 2K flash and use some attiny2313, which will make it even cheaper. The protocol's simple as hell, so anyone with a better hardware around (STM32, atmega8u2, pic32, whatever) can implement it with very little effort and get lighting-fast speeds. My WIP patch to flashrom's attached, although I have a few silly questions left: * Do I need to implement SPI frequency changing via a dedicated command or is it okay to hardcode it to 10Mhz in firmware? * Right now I'm using the same spi_read as serprog does. Is okay, or should I add an option to disable it? * firmware version checking, etc. (Is it a good idea to implement?) * Is there a better way to benchmark read/write speed in flashrom, since delay loop calibration interferes with speed measurements (currently I just used "time flashrom ...") -- Regards, Andrew

2 4

Re: [flashrom] [PATCH 2/2] print_wiki.c: there is only one way to represent time.
by Stefan Tauner 02 Jun '14

02 Jun '14

On Sat, 31 May 2014 02:05:13 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > ISO 8601. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Self-acked and committed in r1817. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] [PATCH 1/2] print_wiki.c: refine header and include a legend explaining the test state representation.
by Stefan Tauner 02 Jun '14

02 Jun '14

On Sat, 31 May 2014 02:05:12 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Self-acked and committed in r1816 with small refinements. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1817 - trunk
by repository service 02 Jun '14

02 Jun '14

Author: stefanct Date: Mon Jun 2 02:46:02 2014 New Revision: 1817 URL: http://flashrom.org/trac/flashrom/changeset/1817 Log: print_wiki.c: there is only one way to represent time. ISO 8601. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/print_wiki.c Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Mon Jun 2 02:45:57 2014 (r1816) +++ trunk/print_wiki.c Mon Jun 2 02:46:02 2014 (r1817) @@ -31,7 +31,7 @@ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ background-color:#eeeeee; text-align:left; border:1px solid #aabbcc;\">\ <small>\n\ -'''Last update:''' %s(generated by flashrom %s)<br />\n\ +'''Last update:''' %s (generated by flashrom %s)<br />\n\ The tables below are generated from flashrom's source by copying the output of '''flashrom -z'''.<br /><br />\n\ A short explanation of the cells representing the support state follows:<br />\n\ {| border=\"0\" valign=\"top\"\n\ @@ -443,8 +443,10 @@ void print_supported_wiki(void) { time_t t = time(NULL); + char buf[sizeof("1986-02-28T12:37:42Z")]; + strftime(buf, sizeof(buf), "%Y-%m-%dT%H:%M:%SZ", gmtime(&t)); - printf(wiki_header, ctime(&t), flashrom_version); + printf(wiki_header, buf, flashrom_version); print_supported_chips_wiki(2); #if CONFIG_INTERNAL == 1 print_supported_chipsets_wiki(3);

1 0

[commit] r1816 - trunk
by repository service 02 Jun '14

02 Jun '14

Author: stefanct Date: Mon Jun 2 02:45:57 2014 New Revision: 1816 URL: http://flashrom.org/trac/flashrom/changeset/1816 Log: print_wiki.c: refine header and include a legend explaining the test state representation. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/print_wiki.c Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Mon Jun 2 02:34:58 2014 (r1815) +++ trunk/print_wiki.c Mon Jun 2 02:45:57 2014 (r1816) @@ -29,11 +29,33 @@ static const char wiki_header[] = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ -background-color:#eeeeee; text-align:right; border:1px solid #aabbcc;\">\ +background-color:#eeeeee; text-align:left; border:1px solid #aabbcc;\">\ <small>\n\ -Please do '''not''' edit these tables in the wiki directly, they are \ -generated by pasting '''flashrom -z''' output.<br />\ -'''Last update:''' %s(generated by flashrom %s)\n</small></div>\n"; +'''Last update:''' %s(generated by flashrom %s)<br />\n\ +The tables below are generated from flashrom's source by copying the output of '''flashrom -z'''.<br /><br />\n\ +A short explanation of the cells representing the support state follows:<br />\n\ +{| border=\"0\" valign=\"top\"\n\ +! style=\"text-align:left;\" |\n\ +! style=\"text-align:left;\" |\n\ +|-\n\ +|{{OK}}\n\ +| The feature was '''tested and should work''' in general unless there is a bug in flashrom or another component in \ +the system prohibits some functionality.\n\ +|-\n\ +|{{Dep}}\n\ +| '''Configuration-dependent'''. The feature was tested and should work in general but there are common \ +configurations that drastically limit flashrom's capabilities or make it completely stop working.\n\ +|-\n\ +|{{?3}}\n\ +| The feature is '''untested''' but believed to be working.\n\ +|-\n\ +|{{NA}}\n\ +| The feature is '''not applicable''' in this configuration (e.g. write operations on ROM chips).\n\ +|-\n\ +|{{No}}\n\ +| The feature is '''known to not work'''. Don't bother testing (nor reporting. Patches welcome! ;).\n\ +|}\n\ +</small></div>\n"; static const char th_start[] = "| valign=\"top\"|\n\n\ {| border=\"0\" style=\"font-size: smaller\" valign=\"top\"\n\

1 0

Re: [flashrom] [PATCH 2/2] Utilize new tested states for chipsets as well.
by Carl-Daniel Hailfinger 02 Jun '14

02 Jun '14

Am 30.05.2014 05:15 schrieb Stefan Tauner: > Mark all ME-enabled Intel chipsets as DEP, alter print.c accordingly > (print_wiki.c was already prepared). > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Thanks for your patch! Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 2

[commit] r1815 - trunk
by repository service 02 Jun '14

02 Jun '14

Author: stefanct Date: Mon Jun 2 02:34:58 2014 New Revision: 1815 URL: http://flashrom.org/trac/flashrom/changeset/1815 Log: Utilize new tested states for chipsets as well. Mark all ME-enabled Intel chipsets as DEP, alter print.c accordingly (print_wiki.c was already prepared). And realign the chipset enable table when we are at it already. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c trunk/print.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Mon Jun 2 02:12:23 2014 (r1814) +++ trunk/chipset_enable.c Mon Jun 2 02:34:58 2014 (r1815) @@ -1366,60 +1366,60 @@ /* Please keep this list numerically sorted by vendor/device ID. */ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) - {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, - {0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600}, - {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, - {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, - {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, - {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, - {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, - {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, - {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, - {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530}, - {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, - {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, - {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, - {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, - {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, - {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, - {0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540}, - {0x1039, 0x0648, OK, "SiS", "648", enable_flash_sis540}, - {0x1039, 0x0650, OK, "SiS", "650", enable_flash_sis540}, - {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540}, - {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, - {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, - {0x1039, 0x0730, OK, "SiS", "730", enable_flash_sis540}, - {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, - {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, - {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, - {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, - {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, - {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, - {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, - {0x1039, 0x0755, OK, "SiS", "755", enable_flash_sis540}, - {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, - {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, - {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, - {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, - {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, - {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, - {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x10b9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, - {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, - {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ - {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ - {0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2}, - {0x10de, 0x00e0, OK, "NVIDIA", "NForce3", enable_flash_nvidia_nforce2}, + {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, + {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, + {0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600}, + {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, + {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, + {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, + {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, + {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, + {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, + {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, + {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, + {0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540}, + {0x1039, 0x0648, OK, "SiS", "648", enable_flash_sis540}, + {0x1039, 0x0650, OK, "SiS", "650", enable_flash_sis540}, + {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540}, + {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, + {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, + {0x1039, 0x0730, OK, "SiS", "730", enable_flash_sis540}, + {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, + {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, + {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, + {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, + {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, + {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, + {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, + {0x1039, 0x0755, OK, "SiS", "755", enable_flash_sis540}, + {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, + {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, + {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, + {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, + {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, + {0x10b9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, + {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, + {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ + {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ + {0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2}, + {0x10de, 0x00e0, OK, "NVIDIA", "NForce3", enable_flash_nvidia_nforce2}, /* Slave, should not be here, to fix known bug for A01. */ - {0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804}, - {0x10de, 0x0260, OK, "NVIDIA", "MCP51", enable_flash_ck804}, - {0x10de, 0x0261, OK, "NVIDIA", "MCP51", enable_flash_ck804}, - {0x10de, 0x0262, NT, "NVIDIA", "MCP51", enable_flash_ck804}, - {0x10de, 0x0263, NT, "NVIDIA", "MCP51", enable_flash_ck804}, - {0x10de, 0x0360, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* M57SLI*/ + {0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804}, + {0x10de, 0x0260, OK, "NVIDIA", "MCP51", enable_flash_ck804}, + {0x10de, 0x0261, OK, "NVIDIA", "MCP51", enable_flash_ck804}, + {0x10de, 0x0262, NT, "NVIDIA", "MCP51", enable_flash_ck804}, + {0x10de, 0x0263, NT, "NVIDIA", "MCP51", enable_flash_ck804}, + {0x10de, 0x0360, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* M57SLI*/ /* 10de:0361 is present in Tyan S2915 OEM systems, but not connected to * the flash chip. Instead, 10de:0364 is connected to the flash chip. * Until we have PCI device class matching or some fallback mechanism, @@ -1427,221 +1427,221 @@ * dual-MCP55 boards. */ #if 0 - {0x10de, 0x0361, NT, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ + {0x10de, 0x0361, NT, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ #endif - {0x10de, 0x0362, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0363, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0364, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x03e0, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, - {0x10de, 0x03e1, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, - {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, - {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, - {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, - {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, - {0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, - {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x}, - {0x10de, 0x075c, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, - {0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, - {0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, - {0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, - {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, - {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, - {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, - {0x10de, 0x0d80, NT, "NVIDIA", "MCP89", enable_flash_mcp6x_7x}, + {0x10de, 0x0362, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ + {0x10de, 0x0363, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ + {0x10de, 0x0364, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ + {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ + {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ + {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ + {0x10de, 0x03e0, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x03e1, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x}, + {0x10de, 0x075c, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, + {0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, + {0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, + {0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0d80, NT, "NVIDIA", "MCP89", enable_flash_mcp6x_7x}, /* VIA northbridges */ - {0x1106, 0x0585, NT, "VIA", "VT82C585VPX", via_no_byte_merge}, - {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, - {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, - {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, - {0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge}, - {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, + {0x1106, 0x0585, NT, "VIA", "VT82C585VPX", via_no_byte_merge}, + {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, + {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, + {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, + {0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge}, + {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, /* VIA southbridges */ - {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_vt82c586}, - {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_vt82c596}, - {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_vt82c596}, - {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, - {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, - {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, - {0x1106, 0x3227, OK, "VIA", "VT8237(R)", enable_flash_vt823x}, - {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, - {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, - {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, - {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, - {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, - {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, - {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, - {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, - {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, - {0x8086, 0x0c60, NT, "Intel", "S12x0", enable_flash_s12x0}, - {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, - {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x1c44, OK, "Intel", "Z68", enable_flash_pch6}, - {0x8086, 0x1c46, OK, "Intel", "P67", enable_flash_pch6}, - {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_pch6}, - {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_pch6}, - {0x8086, 0x1c4a, OK, "Intel", "H67", enable_flash_pch6}, - {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_pch6}, - {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6}, - {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_pch6}, - {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_pch6}, - {0x8086, 0x1c4f, OK, "Intel", "QM67", enable_flash_pch6}, - {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_pch6}, - {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6}, - {0x8086, 0x1c54, OK, "Intel", "C204", enable_flash_pch6}, - {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, - {0x8086, 0x1c5c, OK, "Intel", "H61", enable_flash_pch6}, - {0x8086, 0x1d40, OK, "Intel", "C60x/X79", enable_flash_pch6}, - {0x8086, 0x1d41, OK, "Intel", "C60x/X79", enable_flash_pch6}, - {0x8086, 0x1e44, OK, "Intel", "Z77", enable_flash_pch7}, - {0x8086, 0x1e46, NT, "Intel", "Z75", enable_flash_pch7}, - {0x8086, 0x1e47, NT, "Intel", "Q77", enable_flash_pch7}, - {0x8086, 0x1e48, NT, "Intel", "Q75", enable_flash_pch7}, - {0x8086, 0x1e49, OK, "Intel", "B75", enable_flash_pch7}, - {0x8086, 0x1e4a, OK, "Intel", "H77", enable_flash_pch7}, - {0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7}, - {0x8086, 0x1e55, OK, "Intel", "QM77", enable_flash_pch7}, - {0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7}, - {0x8086, 0x1e57, OK, "Intel", "HM77", enable_flash_pch7}, - {0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7}, - {0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7}, - {0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7}, - {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, - {0x8086, 0x1e5f, OK, "Intel", "NM70", enable_flash_pch7}, - {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, - {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, - {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, - {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich0}, - {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich2345}, - {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich2345}, - {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich2345}, - {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich2345}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich2345}, - {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich2345}, - {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich2345}, - {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich2345}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich2345}, - {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich6}, - {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich6}, - {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich6}, - {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich6}, - {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, - {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, - {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, - {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, - {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, - {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, - {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, - {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, - {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, - {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, - {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, - {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, - {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, - {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, - {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, - {0x8086, 0x3a10, NT, "Intel", "ICH10R Engineering Sample", enable_flash_ich10}, - {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, - {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, - {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, - {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_pch5}, - {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_pch5}, - {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_pch5}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_pch5}, - {0x8086, 0x3b06, OK, "Intel", "H55", enable_flash_pch5}, - {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_pch5}, - {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, - {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_pch5}, - {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_pch5}, - {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_pch5}, - {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_pch5}, - {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_pch5}, - {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_pch5}, - {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_pch5}, - {0x8086, 0x3b14, OK, "Intel", "3420", enable_flash_pch5}, - {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_pch5}, - {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_pch5}, - {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, - {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, - {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, - {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, - {0x8086, 0x8186, OK, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_tunnelcreek}, - {0x8086, 0x8c40, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c41, NT, "Intel", "Lynx Point Mobile Engineering Sample", enable_flash_pch8}, - {0x8086, 0x8c42, NT, "Intel", "Lynx Point Desktop Engineering Sample", enable_flash_pch8}, - {0x8086, 0x8c43, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c44, OK, "Intel", "Z87", enable_flash_pch8}, - {0x8086, 0x8c45, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c46, NT, "Intel", "Z85", enable_flash_pch8}, - {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8}, - {0x8086, 0x8c4a, OK, "Intel", "H87", enable_flash_pch8}, - {0x8086, 0x8c4b, OK, "Intel", "HM87", enable_flash_pch8}, - {0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8}, - {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c4e, NT, "Intel", "Q87", enable_flash_pch8}, - {0x8086, 0x8c4f, NT, "Intel", "QM87", enable_flash_pch8}, - {0x8086, 0x8c50, OK, "Intel", "B85", enable_flash_pch8}, - {0x8086, 0x8c51, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c52, NT, "Intel", "C222", enable_flash_pch8}, - {0x8086, 0x8c53, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c54, NT, "Intel", "C224", enable_flash_pch8}, - {0x8086, 0x8c55, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c56, NT, "Intel", "C226", enable_flash_pch8}, - {0x8086, 0x8c57, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c58, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c59, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c5a, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c5b, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c5c, NT, "Intel", "H81", enable_flash_pch8}, - {0x8086, 0x8c5d, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c5e, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c5f, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x9c41, NT, "Intel", "Lynx Point LP Engineering Sample", enable_flash_pch8_lp}, - {0x8086, 0x9c43, NT, "Intel", "Lynx Point LP Premium", enable_flash_pch8_lp}, - {0x8086, 0x9c45, NT, "Intel", "Lynx Point LP Mainstream", enable_flash_pch8_lp}, - {0x8086, 0x9c47, NT, "Intel", "Lynx Point LP Value", enable_flash_pch8_lp}, - {0x8086, 0x8d40, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d41, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d42, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d43, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d44, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d45, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d46, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d47, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d48, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d49, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d4a, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d4b, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d4c, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d4d, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d4e, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d4f, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d50, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d51, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d52, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d53, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d54, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d55, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d56, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d57, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d58, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d59, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d5a, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d5b, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d5c, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d5d, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d5e, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, - {0x8086, 0x8d5f, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_vt82c586}, + {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_vt82c596}, + {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_vt82c596}, + {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, + {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, + {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, + {0x1106, 0x3227, OK, "VIA", "VT8237(R)", enable_flash_vt823x}, + {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, + {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, + {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, + {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, + {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, + {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, + {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, + {0x8086, 0x0c60, NT, "Intel", "S12x0", enable_flash_s12x0}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, DEP, "Intel", "Z68", enable_flash_pch6}, + {0x8086, 0x1c46, DEP, "Intel", "P67", enable_flash_pch6}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_pch6}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_pch6}, + {0x8086, 0x1c4a, DEP, "Intel", "H67", enable_flash_pch6}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_pch6}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_pch6}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_pch6}, + {0x8086, 0x1c4f, DEP, "Intel", "QM67", enable_flash_pch6}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_pch6}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6}, + {0x8086, 0x1c54, DEP, "Intel", "C204", enable_flash_pch6}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, + {0x8086, 0x1c5c, DEP, "Intel", "H61", enable_flash_pch6}, + {0x8086, 0x1d40, DEP, "Intel", "C60x/X79", enable_flash_pch6}, + {0x8086, 0x1d41, DEP, "Intel", "C60x/X79", enable_flash_pch6}, + {0x8086, 0x1e44, DEP, "Intel", "Z77", enable_flash_pch7}, + {0x8086, 0x1e46, NT, "Intel", "Z75", enable_flash_pch7}, + {0x8086, 0x1e47, NT, "Intel", "Q77", enable_flash_pch7}, + {0x8086, 0x1e48, NT, "Intel", "Q75", enable_flash_pch7}, + {0x8086, 0x1e49, DEP, "Intel", "B75", enable_flash_pch7}, + {0x8086, 0x1e4a, DEP, "Intel", "H77", enable_flash_pch7}, + {0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7}, + {0x8086, 0x1e55, DEP, "Intel", "QM77", enable_flash_pch7}, + {0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7}, + {0x8086, 0x1e57, DEP, "Intel", "HM77", enable_flash_pch7}, + {0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7}, + {0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7}, + {0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7}, + {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, + {0x8086, 0x1e5f, DEP, "Intel", "NM70", enable_flash_pch7}, + {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, + {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, + {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, + {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich0}, + {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich2345}, + {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich2345}, + {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich2345}, + {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich2345}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich2345}, + {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich2345}, + {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich2345}, + {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich2345}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich2345}, + {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich6}, + {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich6}, + {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich6}, + {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich6}, + {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, + {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, + {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, + {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, + {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, + {0x8086, 0x2810, DEP, "Intel", "ICH8/ICH8R", enable_flash_ich8}, + {0x8086, 0x2811, DEP, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2812, DEP, "Intel", "ICH8DH", enable_flash_ich8}, + {0x8086, 0x2814, DEP, "Intel", "ICH8DO", enable_flash_ich8}, + {0x8086, 0x2815, DEP, "Intel", "ICH8M", enable_flash_ich8}, + {0x8086, 0x2910, DEP, "Intel", "ICH9 Eng. Sample", enable_flash_ich9}, + {0x8086, 0x2912, DEP, "Intel", "ICH9DH", enable_flash_ich9}, + {0x8086, 0x2914, DEP, "Intel", "ICH9DO", enable_flash_ich9}, + {0x8086, 0x2916, DEP, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2917, DEP, "Intel", "ICH9M-E", enable_flash_ich9}, + {0x8086, 0x2918, DEP, "Intel", "ICH9", enable_flash_ich9}, + {0x8086, 0x2919, DEP, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a10, NT, "Intel", "ICH10R Eng. Sample", enable_flash_ich10}, + {0x8086, 0x3a14, DEP, "Intel", "ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, DEP, "Intel", "ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, DEP, "Intel", "ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, DEP, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3a1e, NT, "Intel", "ICH10 Eng. Sample", enable_flash_ich10}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_pch5}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_pch5}, + {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_pch5}, + {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_pch5}, + {0x8086, 0x3b06, DEP, "Intel", "H55", enable_flash_pch5}, + {0x8086, 0x3b07, DEP, "Intel", "QM57", enable_flash_pch5}, + {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, + {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_pch5}, + {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_pch5}, + {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_pch5}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_pch5}, + {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_pch5}, + {0x8086, 0x3b0f, DEP, "Intel", "QS57", enable_flash_pch5}, + {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_pch5}, + {0x8086, 0x3b14, DEP, "Intel", "3420", enable_flash_pch5}, + {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_pch5}, + {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_pch5}, + {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, + {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, + {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, + {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, + {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8186, OK, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_tunnelcreek}, + {0x8086, 0x8c40, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c41, NT, "Intel", "Lynx Point Mobile Eng. Sample", enable_flash_pch8}, + {0x8086, 0x8c42, NT, "Intel", "Lynx Point Desktop Eng. Sample",enable_flash_pch8}, + {0x8086, 0x8c43, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c44, DEP, "Intel", "Z87", enable_flash_pch8}, + {0x8086, 0x8c45, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c46, NT, "Intel", "Z85", enable_flash_pch8}, + {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8}, + {0x8086, 0x8c4a, DEP, "Intel", "H87", enable_flash_pch8}, + {0x8086, 0x8c4b, DEP, "Intel", "HM87", enable_flash_pch8}, + {0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8}, + {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c4e, NT, "Intel", "Q87", enable_flash_pch8}, + {0x8086, 0x8c4f, NT, "Intel", "QM87", enable_flash_pch8}, + {0x8086, 0x8c50, DEP, "Intel", "B85", enable_flash_pch8}, + {0x8086, 0x8c51, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c52, NT, "Intel", "C222", enable_flash_pch8}, + {0x8086, 0x8c53, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c54, NT, "Intel", "C224", enable_flash_pch8}, + {0x8086, 0x8c55, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c56, NT, "Intel", "C226", enable_flash_pch8}, + {0x8086, 0x8c57, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c58, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c59, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5a, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5b, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5c, NT, "Intel", "H81", enable_flash_pch8}, + {0x8086, 0x8c5d, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5e, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5f, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x9c41, NT, "Intel", "Lynx Point LP Eng. Sample", enable_flash_pch8_lp}, + {0x8086, 0x9c43, NT, "Intel", "Lynx Point LP Premium", enable_flash_pch8_lp}, + {0x8086, 0x9c45, NT, "Intel", "Lynx Point LP Mainstream", enable_flash_pch8_lp}, + {0x8086, 0x9c47, NT, "Intel", "Lynx Point LP Value", enable_flash_pch8_lp}, + {0x8086, 0x8d40, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d41, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d42, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d43, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d44, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d45, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d46, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d47, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d48, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d49, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d4a, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d4b, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d4c, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d4d, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d4e, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d4f, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d50, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d51, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d52, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d53, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d54, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d55, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d56, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d57, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d58, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d59, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5a, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5b, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5c, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5d, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5e, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5f, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, #endif {0}, }; Modified: trunk/print.c ============================================================================== --- trunk/print.c Mon Jun 2 02:12:23 2014 (r1814) +++ trunk/print.c Mon Jun 2 02:34:58 2014 (r1815) @@ -395,7 +395,7 @@ for (i = strlen("Chipset"); i < maxchipsetlen; i++) msg_ginfo(" "); - msg_ginfo("PCI IDs State\n\n"); + msg_ginfo("PCI IDs Status\n\n"); for (c = chipset_enables; c->vendor_name != NULL; c++) { msg_ginfo("%s", c->vendor_name); @@ -404,8 +404,8 @@ msg_ginfo("%s", c->device_name); for (i = 0; i < maxchipsetlen - strlen(c->device_name); i++) msg_ginfo(" "); - msg_ginfo("%04x:%04x%s\n", c->vendor_id, c->device_id, - (c->status == NT) ? " (untested)" : ""); + msg_ginfo("%04x:%04x %s\n", c->vendor_id, c->device_id, + test_state_to_text(c->status)); } }

1 0

Re: [flashrom] [PATCH] Add default arguments for the default programmer (only).
by Carl-Daniel Hailfinger 02 Jun '14

02 Jun '14

Am 30.05.2014 00:52 schrieb Stefan Tauner: > This code exists thanks to food for thought from Urja Rannikko. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Interesting, to say the least. The default parameter only applies if -p is not specified at all, so there are no unexpected side effects. The only complaint I have (except the question "who would want to use that") is that you can run make CONFIG_DEFAULT_PROGRAMMER_ARGS="foobar" without having to specify CONFIG_DEFAULT_PROGRAMMER as well. CONFIG_DEFAULT_PROGRAMMER_ARGS won't have any effect in that case during runtime, but that might surprise someone who specified it. Hm. Maybe I should really ask who would want to use that... it's obviously not a feature distributions would use, although it seems some of them use CONFIG_DEFAULT_PROGRAMMER to keep the behavoir unchanged compared to previous releases. Not opposed to it, but not really convinced either. Regards, Carl-Daniel > diff --git a/Makefile b/Makefile > index 346d46a..998979d 100644 > --- a/Makefile > +++ b/Makefile > @@ -52,6 +52,11 @@ DOSLIBS_BASE ?= .. > # evaluated below, namely those that enable/disable the various programmers). > # Compilation will fail for unspecified values. > CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INVALID > +# The following adds a default parameter for the default programmer set above (only). > +CONFIG_DEFAULT_PROGRAMMER_ARGS ?= '' > +# Example: compiling with > +# make CONFIG_DEFAULT_PROGRAMMER=PROGRAMMER_SERPROG CONFIG_DEFAULT_PROGRAMMER_ARGS="dev=/dev/ttyUSB0:1500000" > +# would make executing './flashrom' (almost) equivialent to './flashrom -p serprog:dev=/dev/ttyUSB0:1500000'. > > # If your compiler spits out excessive warnings, run make WARNERROR=no > # You shouldn't have to change this flag. > @@ -471,6 +476,7 @@ CONFIG_INTERNAL_DMI ?= yes > # Depending on the CONFIG_* variables set and verified above we set compiler flags and parameters below. > > FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER=$(CONFIG_DEFAULT_PROGRAMMER)' > +FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER_ARGS="$(CONFIG_DEFAULT_PROGRAMMER_ARGS)"' > > ifeq ($(CONFIG_INTERNAL), yes) > FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' > diff --git a/cli_classic.c b/cli_classic.c > index a32d55b..fc1b9ba 100644 > --- a/cli_classic.c > +++ b/cli_classic.c > @@ -396,8 +396,10 @@ int main(int argc, char *argv[]) > if (prog == PROGRAMMER_INVALID) { > if (CONFIG_DEFAULT_PROGRAMMER != PROGRAMMER_INVALID) { > prog = CONFIG_DEFAULT_PROGRAMMER; > - msg_pinfo("Using default programmer \"%s\".\n", > - programmer_table[CONFIG_DEFAULT_PROGRAMMER].name); > + /* We need to strdup here because we free(pparam) unconditionally later. */ > + pparam = strdup(CONFIG_DEFAULT_PROGRAMMER_ARGS); > + msg_pinfo("Using default programmer \"%s\" with arguments \"%s\".\n", > + programmer_table[CONFIG_DEFAULT_PROGRAMMER].name, pparam); > } else { > msg_perr("Please select a programmer with the --programmer parameter.\n" > "Previously this was not necessary because there was a default set.\n" -- http://www.hailfinger.org/

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