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[PATCH] winbondw25x32/64 support
by Bao, Zheng 26 Nov '09

26 Nov '09

Add entries of W25x32 and W25x64. The modle_ids are already in the header. W25x32 has been successfully probed. W25x64 is not available. I just get information from datasheet. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Index: flashchips.c =================================================================== --- flashchips.c (revision 781) +++ flashchips.c (working copy) @@ -3038,6 +3038,38 @@ { .vendor = "Winbond", + .name = "W25x32", + .bustype = CHIP_BUSTYPE_SPI, + .… [View More]

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[commit] r782 - trunk
by svn＠flashrom.org 26 Nov '09

26 Nov '09

Author: hailfinger Date: 2009-11-26 12:05:01 +0100 (Thu, 26 Nov 2009) New Revision: 782 Modified: trunk/flashchips.c Log: Add entries of W25x32 and W25x64. The model_ids are already in the header. W25x32 has been successfully probed. W25x64 is not available, the entry is based on the datasheet. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =====================================… [View More]

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Generated zeros and reading firmware after flashing them
by Xangel2Net 25 Nov '09

25 Nov '09

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[commit] r781 - trunk
by svn＠flashrom.org 25 Nov '09

25 Nov '09

Author: hailfinger Date: 2009-11-25 18:05:52 +0100 (Wed, 25 Nov 2009) New Revision: 781 Modified: trunk/flashrom.c Log: Clarify a comment about verification routine usage. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-11-25 16:58:17 UTC (rev 780) +++ trunk/… [View More]

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[PATCH] Reduce realloc syscall overhead for ft2232 and bitbang
by Carl-Daniel Hailfinger 25 Nov '09

25 Nov '09

Reduce realloc syscall overhead for FT2232 and bitbang. FT2232 ran realloc() for every executed command. Start with a big enough buffer and don't touch buffer size unless it needs to grow. Bitbang was slightly better: It only ran realloc() if buffer size changed. Still, the solution above improves performance and reliability. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-realloc_overhead/bitbang_spi.c ========================================… [View More]

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[commit] r780 - trunk
by svn＠flashrom.org 25 Nov '09

25 Nov '09

Author: hailfinger Date: 2009-11-25 17:58:17 +0100 (Wed, 25 Nov 2009) New Revision: 780 Modified: trunk/bitbang_spi.c trunk/ft2232_spi.c Log: Reduce realloc syscall overhead for FT2232 and bitbang. FT2232 ran realloc() for every executed command. Start with a big enough buffer and don't touch buffer size unless it needs to grow. Bitbang was slightly better: It only ran realloc() if buffer size changed. Still, the solution above improves performance and reliability. Signed-off-by: Carl-… [View More]Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/bitbang_spi.c =================================================================== --- trunk/bitbang_spi.c 2009-11-25 16:41:50 UTC (rev 779) +++ trunk/bitbang_spi.c 2009-11-25 16:58:17 UTC (rev 780) @@ -87,14 +87,16 @@ static unsigned char *bufout = NULL; static unsigned char *bufin = NULL; static int oldbufsize = 0; - int bufsize = max(writecnt + readcnt, 260); + int bufsize; int i; /* Arbitrary size limitation here. We're only constrained by memory. */ if (writecnt > 65536 || readcnt > 65536) return SPI_INVALID_LENGTH; - if (bufsize != oldbufsize) { + bufsize = max(writecnt + readcnt, 260); + /* Never shrink. realloc() calls are expensive. */ + if (bufsize > oldbufsize) { bufout = realloc(bufout, bufsize); if (!bufout) { fprintf(stderr, "Out of memory!\n"); @@ -109,6 +111,7 @@ free(bufout); exit(1); } + oldbufsize = bufsize; } memcpy(bufout, writearr, writecnt); Modified: trunk/ft2232_spi.c =================================================================== --- trunk/ft2232_spi.c 2009-11-25 16:41:50 UTC (rev 779) +++ trunk/ft2232_spi.c 2009-11-25 16:58:17 UTC (rev 780) @@ -200,14 +200,22 @@ static unsigned char *buf = NULL; /* failed is special. We use bitwise ops, but it is essentially bool. */ int i = 0, ret = 0, failed = 0; + int bufsize; + static int oldbufsize = 0; if (writecnt > 65536 || readcnt > 65536) return SPI_INVALID_LENGTH; - buf = realloc(buf, writecnt + readcnt + 100); - if (!buf) { - fprintf(stderr, "Out of memory!\n"); - exit(1); // -1 + /* buf is not used for the response from the chip. */ + bufsize = max(writecnt + 9, 260 + 9); + /* Never shrink. realloc() calls are expensive. */ + if (bufsize > oldbufsize) { + buf = realloc(buf, bufsize); + if (!buf) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + oldbufsize = bufsize; } /* [View Less]

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[PATCH] Clean up and fix jedec.c error handling
by Carl-Daniel Hailfinger 25 Nov '09

25 Nov '09

jedec.c was missing error handling in a few cases. Fix. jedec.c error handling used double negation in too many places for no good reason. Clean up. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-jedec_errorhandling/jedec.c =================================================================== --- flashrom-jedec_errorhandling/jedec.c (Revision 777) +++ flashrom-jedec_errorhandling/jedec.c (Arbeitskopie) @@ -262,7 +262,7 @@ int … [View More]write_page_write_jedec(struct flashchip *flash, uint8_t *src, int start, int page_size) { - int i, tried = 0, ok; + int i, tried = 0, failed; uint8_t *s = src; chipaddr bios = flash->virtual_memory; chipaddr dst = bios + start; @@ -287,27 +287,27 @@ dst = d; src = s; - ok = !verify_range(flash, src, start, page_size, NULL); + failed = verify_range(flash, src, start, page_size, NULL); - if (!ok && tried++ < MAX_REFLASH_TRIES) { + if (failed && tried++ < MAX_REFLASH_TRIES) { fprintf(stderr, "retrying.\n"); goto retry; } - if (!ok) { + if (failed) { fprintf(stderr, " page 0x%lx failed!\n", (d - bios) / page_size); } - return !ok; + return failed; } int write_byte_program_jedec(chipaddr bios, uint8_t *src, chipaddr dst) { - int tried = 0, ok = 1; + int tried = 0, failed = 0; - /* If the data is 0xFF, don't program it */ + /* If the data is 0xFF, don't program it and don't complain. */ if (*src == 0xFF) { - return -1; + return 0; } retry: @@ -325,27 +325,30 @@ } if (tried >= MAX_REFLASH_TRIES) - ok = 0; + failed = 1; - return !ok; + return failed; } int write_sector_jedec(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size) { - int i; + int i, failed = 0; for (i = 0; i < page_size; i++) { - write_byte_program_jedec(bios, src, dst); + if (write_byte_program_jedec(bios, src, dst)) + failed = 1; dst++, src++; } + if (failed) + fprintf(stderr, " writing sector at 0x%lx failed!\n", dst); - return 0; + return failed; } int write_jedec(struct flashchip *flash, uint8_t *buf) { - int i; + int i, failed = 0; int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; @@ -358,12 +361,13 @@ printf("Programming page: "); for (i = 0; i < total_size / page_size; i++) { printf("%04d at address: 0x%08x", i, i * page_size); - write_page_write_jedec(flash, buf + i * page_size, - i * page_size, page_size); + if (write_page_write_jedec(flash, buf + i * page_size, + i * page_size, page_size)) + failed = 1; printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); protect_jedec(bios); - return 0; + return failed; } -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers." [View Less]

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[commit] r779 - trunk
by svn＠flashrom.org 25 Nov '09

25 Nov '09

Author: hailfinger Date: 2009-11-25 17:41:50 +0100 (Wed, 25 Nov 2009) New Revision: 779 Modified: trunk/jedec.c Log: jedec.c was missing error handling in a few cases. Fix. jedec.c error handling used double negation in too many places for no good reason. Clean up. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/jedec.c ===================================================================… [View More] --- trunk/jedec.c 2009-11-25 15:04:28 UTC (rev 778) +++ trunk/jedec.c 2009-11-25 16:41:50 UTC (rev 779) @@ -262,7 +262,7 @@ int write_page_write_jedec(struct flashchip *flash, uint8_t *src, int start, int page_size) { - int i, tried = 0, ok; + int i, tried = 0, failed; uint8_t *s = src; chipaddr bios = flash->virtual_memory; chipaddr dst = bios + start; @@ -287,27 +287,27 @@ dst = d; src = s; - ok = !verify_range(flash, src, start, page_size, NULL); + failed = verify_range(flash, src, start, page_size, NULL); - if (!ok && tried++ < MAX_REFLASH_TRIES) { + if (failed && tried++ < MAX_REFLASH_TRIES) { fprintf(stderr, "retrying.\n"); goto retry; } - if (!ok) { + if (failed) { fprintf(stderr, " page 0x%lx failed!\n", (d - bios) / page_size); } - return !ok; + return failed; } int write_byte_program_jedec(chipaddr bios, uint8_t *src, chipaddr dst) { - int tried = 0, ok = 1; + int tried = 0, failed = 0; - /* If the data is 0xFF, don't program it */ + /* If the data is 0xFF, don't program it and don't complain. */ if (*src == 0xFF) { - return -1; + return 0; } retry: @@ -325,27 +325,32 @@ } if (tried >= MAX_REFLASH_TRIES) - ok = 0; + failed = 1; - return !ok; + return failed; } int write_sector_jedec(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size) { - int i; + int i, failed = 0; + chipaddr olddst; + olddst = dst; for (i = 0; i < page_size; i++) { - write_byte_program_jedec(bios, src, dst); + if (write_byte_program_jedec(bios, src, dst)) + failed = 1; dst++, src++; } + if (failed) + fprintf(stderr, " writing sector at 0x%lx failed!\n", olddst); - return 0; + return failed; } int write_jedec(struct flashchip *flash, uint8_t *buf) { - int i; + int i, failed = 0; int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; @@ -358,12 +363,13 @@ printf("Programming page: "); for (i = 0; i < total_size / page_size; i++) { printf("%04d at address: 0x%08x", i, i * page_size); - write_page_write_jedec(flash, buf + i * page_size, - i * page_size, page_size); + if (write_page_write_jedec(flash, buf + i * page_size, + i * page_size, page_size)) + failed = 1; printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); protect_jedec(bios); - return 0; + return failed; } [View Less]

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[PATCH] write_sst_fwhub: optimized for safety and speed
by Adam Jurkowski 25 Nov '09

25 Nov '09

Moved from coreboot list Tested with SST49LF008A On 2009-11-24 00:02, Carl-Daniel Hailfinger wrote: > Hi Adam, > > thanks for your patch. It looks good. > Unfortunately, it conflicts with the new generic partial flashing > support which will be merged soon. However, given that the partial > flashing support is not completely ready yet, I think I'll apply your > patch now and revert it once the generic partial flashing support is ready. > > On 23.11.2009 16:20, Adam … [View More]

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[commit] r778 - trunk
by svn＠flashrom.org 25 Nov '09

25 Nov '09

Author: hailfinger Date: 2009-11-25 16:04:28 +0100 (Wed, 25 Nov 2009) New Revision: 778 Modified: trunk/sst_fwhub.c Log: Optimized write_sst_fwhub for safety and speed: Now uses block erase instead of chip erase. Also introduced auto skip feature. Signed-off-by: Adam Jurkowski <adam.jurkowski(a)kontron.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/sst_fwhub.c =================================================================== --- … [View More]trunk/sst_fwhub.c 2009-11-25 02:07:30 UTC (rev 777) +++ trunk/sst_fwhub.c 2009-11-25 15:04:28 UTC (rev 778) @@ -2,6 +2,7 @@ * This file is part of the flashrom project. * * Copyright (C) 2000 Silicon Integrated System Corporation + * Copyright (C) 2009 Kontron Modular Computers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,6 +21,8 @@ /* Adapted from the Intel FW hub stuff for 82802ax parts. */ +#include <stdlib.h> +#include <string.h> #include "flash.h" // I need that Berkeley bit-map printer @@ -130,28 +133,33 @@ int write_sst_fwhub(struct flashchip *flash, uint8_t *buf) { - int i; + int i, rc; int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; - uint8_t blockstatus; - - // FIXME: We want block wide erase instead of ironing the whole chip - if (erase_sst_fwhub(flash)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - + uint8_t *readbuf = malloc(page_size); + printf("Programming page: "); for (i = 0; i < total_size / page_size; i++) { printf("%04d at address: 0x%08x", i, i * page_size); - blockstatus = clear_sst_fwhub_block_lock(flash, i * page_size); - if (blockstatus) { - printf(" is locked down permanently, aborting\n"); - return 1; + + /* Auto Skip Blocks, which already contain the desired data: + * Faster, because we only write, what has changed + * More secure, because blocks, which are excluded + * (with the exclude or layout feature) + * are not erased and rewritten; data is retained also + * in sudden power off situations + */ + flash->read(flash, readbuf, i * page_size, page_size); + if (memcmp((void *)(buf + i * page_size), + (void *)(readbuf), page_size)) { + rc = erase_sst_fwhub_block(flash, i * page_size, + page_size); + if (rc) + return 1; + write_sector_jedec(bios, buf + i * page_size, + bios + i * page_size, page_size); } - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); [View Less]

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Help writing Atmel AT26DF321 and read/writing Winbond W25X32
by Nando 25 Nov '09

25 Nov '09

Hi flashrom, I've patched the latest flashrom to allow me to dump my bios from Winbond W25x32 SPI bios chip. Strange thing is I got it to work ONCE successfully, with a dump that looks good. This worked once, in between hotswaps of the AT25DF321 chip and I haven't been able to duplicate the read again. I get an OPCODE 0x03 error with bios dump containg some data at starting few blocks followed by FFs. Then I hotswap in a blank Atmel AT25DF321 and do a ./flashrom -w /2510P-F0A-DUMP.ROM -V … [View More]

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[PATCH] Kill hardcoded block erase on ICH SPI
by Carl-Daniel Hailfinger 25 Nov '09

25 Nov '09

Kill hardcoded block erase on ICH SPI. The existing code does not work for all SPI chips, and it just was a band-aid to cope with locked down chipsets back in a time when there was no eraseblock infrastructure. Basically, this unbreaks a few SPI chips on ICH. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-ich_spi_no_hardcoded_block_erase/ichspi.c =================================================================== --- flashrom-… [View More]

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[commit] r777 - trunk
by svn＠flashrom.org 25 Nov '09

25 Nov '09

Author: hailfinger Date: 2009-11-25 03:07:30 +0100 (Wed, 25 Nov 2009) New Revision: 777 Modified: trunk/ichspi.c Log: Kill hardcoded block erase on ICH SPI. The existing code does not work for all SPI chips, and it just was a band-aid to cope with locked down chipsets back in a time when there was no eraseblock infrastructure. Basically, this unbreaks a few SPI chips on ICH. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Maciej Pijanka <… [View More]

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Error at verifyng Soltek 75FRN2-L
by Xangel2Net 25 Nov '09

25 Nov '09

When I tried to flash my BIOS with flashrom, i had received an error - Verifying flash... VERIFY FAILED at 0x00000000! Expected=0x25, Read=0xa5, failed byte count from 0x00000000-0x0003ffff: 0x2161f. Motherboard - Sotlek 75FRN2-L. BIOS - AWARD-Phoenix.

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Re: [flashrom] [PATCH] Configurable SPI speed and man page for Bus Pirate
by Sean Nelson 24 Nov '09

24 Nov '09

Send Ack to list. And send Tested-by while I'm at it. Acked-by: Sean Nelson <audiohacked(a)gmail.com> Tested-by: Sean Nelson <audiohacked(a)gmail.com> On Tue, Nov 24, 2009 at 8:41 AM, Sean Nelson <audiohacked(a)gmail.com> wrote: > Acked-by: Sean Nelson <audiohacked(a)gmail.com> > > On Tue, Nov 24, 2009 at 4:59 AM, Carl-Daniel Hailfinger > <c-d.hailfinger.devel.2006(a)gmx.net> wrote: >> Add the ability to set Bus Pirate SPI speed via the command … [View More]line. >> Example usage: >> flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo >> flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M >> >> Refactor programmer option parsing (this allows cleanups in other >> programmers as well). >> >> Increase SPI read size from 8 to 12 bytes (current single-transaction >> limit of the Bus Pirate raw SPI protocol). >> >> Add Bus Pirate to the list of programmers supporting 4 byte RDID. >> >> Add Bus Pirate syntax to the man page. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> >> >> Index: flashrom-buspiratespi_spispeed_manpage/flashrom.8 >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Arbeitskopie) >> @@ -152,6 +152,8 @@ >> .sp >> .BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" >> .sp >> +.BR "* buspiratespi" " (for flash ROMs attached to a Bus Pirate)" >> +.sp >> The dummy programmer has an optional parameter specifying the bus types it >> should support. For that you have to use the >> .B "flashrom -p dummy:type" >> @@ -219,6 +221,16 @@ >> instead. More information about serprog is available in serprog-protocol.txt in >> the source distribution. >> .sp >> +The buspiratespi programmer has a required dev parameter specifying the Bus >> +Pirate device node and an optional spispeed parameter specifying the frequency >> +of the SPI bus. The parameter delimiter is a comma. Syntax is >> +.B "flashrom -p buspiratespi:dev=/dev/device,spispeed=frequency" >> +where >> +.B frequency >> +can be any of >> +.B 30k 125k 250k 1M 2M 2.6M 4M 8M >> +(in Hz). >> +.sp >> Support for some programmers can be disabled at compile time. >> .B "flashrom -h" >> lists all supported programmers. >> Index: flashrom-buspiratespi_spispeed_manpage/flash.h >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/flash.h (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/flash.h (Arbeitskopie) >> @@ -488,6 +488,10 @@ >> int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); >> >> /* buspirate_spi.c */ >> +struct buspirate_spispeeds { >> + const char *name; >> + const int speed; >> +}; >> int buspirate_spi_init(void); >> int buspirate_spi_shutdown(void); >> int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); >> @@ -503,6 +507,7 @@ >> int erase_flash(struct flashchip *flash); >> int min(int a, int b); >> int max(int a, int b); >> +char *extract_param(char **haystack, char *needle, char *delim); >> int check_erased_range(struct flashchip *flash, int start, int len); >> int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); >> char *strcat_realloc(char *dest, const char *src); >> Index: flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Arbeitskopie) >> @@ -131,34 +131,37 @@ >> return 0; >> } >> >> +static const struct buspirate_spispeeds spispeeds[] = { >> + {"30k", 0x0}, >> + {"125k", 0x1}, >> + {"250k", 0x2}, >> + {"1M", 0x3}, >> + {"2M", 0x4}, >> + {"2.6M", 0x5}, >> + {"4M", 0x6}, >> + {"8M", 0x7}, >> + {NULL, 0x0} >> +}; >> + >> int buspirate_spi_init(void) >> { >> unsigned char buf[512]; >> int ret = 0; >> int i; >> - char *devpos = NULL; >> char *dev = NULL; >> - int devlen; >> + char *speed = NULL; >> + int spispeed = 0x7; >> >> if (programmer_param && !strlen(programmer_param)) { >> free(programmer_param); >> programmer_param = NULL; >> } >> if (programmer_param) { >> - devpos = strstr(programmer_param, "dev="); >> - if (devpos) { >> - devpos += 4; >> - devlen = strcspn(devpos, ",:"); >> - if (devlen) { >> - dev = malloc(devlen + 1); >> - if (!dev) { >> - fprintf(stderr, "Out of memory!\n"); >> - exit(1); >> - } >> - strncpy(dev, devpos, devlen); >> - dev[devlen] = '\0'; >> - } >> - } >> + dev = extract_param(&programmer_param, "dev=", ",:"); >> + speed = extract_param(&programmer_param, "spispeed=", ",:"); >> + if (strlen(programmer_param)) >> + fprintf(stderr, "Unhandled programmer parameters: %s\n", >> + programmer_param); >> free(programmer_param); >> programmer_param = NULL; >> } >> @@ -167,6 +170,18 @@ >> "buspiratespi:dev=/dev/ttyUSB0\n"); >> return 1; >> } >> + if (speed) { >> + for (i = 0; spispeeds[i].name; i++) >> + if (!strncasecmp(spispeeds[i].name, speed, >> + strlen(spispeeds[i].name))) { >> + spispeed = spispeeds[i].speed; >> + break; >> + } >> + if (!spispeeds[i].name) >> + fprintf(stderr, "Invalid SPI speed, using default.\n"); >> + } >> + /* This works because speeds numbering starts at 0 and is contiguous. */ >> + printf_debug("SPI speed is %sHz\n", spispeeds[spispeed].name); >> >> ret = buspirate_serialport_setup(dev); >> if (ret) >> @@ -224,8 +239,8 @@ >> return 1; >> } >> >> - /* Set speed to 8 MHz */ >> - buf[0] = 0x60 | 0x7; >> + /* Set SPI speed */ >> + buf[0] = 0x60 | spispeed; >> ret = buspirate_sendrecv(buf, 1, 1); >> if (ret) >> return 1; >> @@ -351,8 +366,7 @@ >> >> int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) >> { >> - /* Maximum read length is 12 bytes, use 8 for now. */ >> - return spi_read_chunked(flash, buf, start, len, 8); >> + return spi_read_chunked(flash, buf, start, len, 12); >> } >> >> /* We could do 12-byte writes, but for now we use the generic 1-byte code. */ >> Index: flashrom-buspiratespi_spispeed_manpage/spi.c >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/spi.c (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/spi.c (Arbeitskopie) >> @@ -319,6 +319,9 @@ >> #if DUMMY_SUPPORT == 1 >> case SPI_CONTROLLER_DUMMY: >> #endif >> +#if BUSPIRATE_SPI_SUPPORT == 1 >> + case SPI_CONTROLLER_BUSPIRATE: >> +#endif >> return probe_spi_rdid_generic(flash, 4); >> default: >> printf_debug("4b ID not supported on this SPI controller\n"); >> Index: flashrom-buspiratespi_spispeed_manpage/flashrom.c >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/flashrom.c (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/flashrom.c (Arbeitskopie) >> @@ -336,6 +336,60 @@ >> return dest; >> } >> >> +/* This is a somewhat hacked function similar in some ways to strtok(). >> + * It will look for needle in haystack, return a copy of needle and remove >> + * everything from the first occurrence of needle to the next delimiter >> + * from haystack. >> + */ >> +char *extract_param(char **haystack, char *needle, char *delim) >> +{ >> + char *param_pos, *rest, *tmp; >> + char *dev = NULL; >> + int devlen; >> + >> + param_pos = strstr(*haystack, needle); >> + do { >> + if (!param_pos) >> + return NULL; >> + /* Beginning of the string? */ >> + if (param_pos == *haystack) >> + break; >> + /* After a delimiter? */ >> + if (strchr(delim, *(param_pos - 1))) >> + break; >> + /* Continue searching. */ >> + param_pos++; >> + param_pos = strstr(param_pos, needle); >> + } while (1); >> + >> + if (param_pos) { >> + param_pos += strlen(needle); >> + devlen = strcspn(param_pos, delim); >> + if (devlen) { >> + dev = malloc(devlen + 1); >> + if (!dev) { >> + fprintf(stderr, "Out of memory!\n"); >> + exit(1); >> + } >> + strncpy(dev, param_pos, devlen); >> + dev[devlen] = '\0'; >> + } >> + rest = param_pos + devlen; >> + rest += strspn(rest, delim); >> + param_pos -= strlen(needle); >> + memmove(param_pos, rest, strlen(rest) + 1); >> + tmp = realloc(*haystack, strlen(*haystack) + 1); >> + if (!tmp) { >> + fprintf(stderr, "Out of memory!\n"); >> + exit(1); >> + } >> + *haystack = tmp; >> + } >> + >> + >> + return dev; >> +} >> + >> /* start is an offset to the base address of the flash chip */ >> int check_erased_range(struct flashchip *flash, int start, int len) >> { >> >> >> -- >> Developer quote of the month: >> "We are juggling too many chainsaws and flaming arrows and tigers." >> >> >> _______________________________________________ >> flashrom mailing list >> flashrom(a)flashrom.org >> http://www.flashrom.org/mailman/listinfo/flashrom >> > [View Less]

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[commit] r776 - trunk
by svn＠flashrom.org 24 Nov '09

24 Nov '09

Author: hailfinger Date: 2009-11-24 19:27:10 +0100 (Tue, 24 Nov 2009) New Revision: 776 Modified: trunk/buspirate_spi.c trunk/flash.h trunk/flashrom.8 trunk/flashrom.c trunk/spi.c Log: Add the ability to set Bus Pirate SPI speed via the command line. Example usage: flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M Refactor programmer option parsing (this allows cleanups in other programmers as well). Increase SPI read … [View More]size from 8 to 12 bytes (current single-transaction limit of the Bus Pirate raw SPI protocol). Add Bus Pirate to the list of programmers supporting 4 byte RDID. Add Bus Pirate syntax to the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Tested-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/buspirate_spi.c =================================================================== --- trunk/buspirate_spi.c 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/buspirate_spi.c 2009-11-24 18:27:10 UTC (rev 776) @@ -131,34 +131,37 @@ return 0; } +static const struct buspirate_spispeeds spispeeds[] = { + {"30k", 0x0}, + {"125k", 0x1}, + {"250k", 0x2}, + {"1M", 0x3}, + {"2M", 0x4}, + {"2.6M", 0x5}, + {"4M", 0x6}, + {"8M", 0x7}, + {NULL, 0x0} +}; + int buspirate_spi_init(void) { unsigned char buf[512]; int ret = 0; int i; - char *devpos = NULL; char *dev = NULL; - int devlen; + char *speed = NULL; + int spispeed = 0x7; if (programmer_param && !strlen(programmer_param)) { free(programmer_param); programmer_param = NULL; } if (programmer_param) { - devpos = strstr(programmer_param, "dev="); - if (devpos) { - devpos += 4; - devlen = strcspn(devpos, ",:"); - if (devlen) { - dev = malloc(devlen + 1); - if (!dev) { - fprintf(stderr, "Out of memory!\n"); - exit(1); - } - strncpy(dev, devpos, devlen); - dev[devlen] = '\0'; - } - } + dev = extract_param(&programmer_param, "dev=", ",:"); + speed = extract_param(&programmer_param, "spispeed=", ",:"); + if (strlen(programmer_param)) + fprintf(stderr, "Unhandled programmer parameters: %s\n", + programmer_param); free(programmer_param); programmer_param = NULL; } @@ -167,6 +170,18 @@ "buspiratespi:dev=/dev/ttyUSB0\n"); return 1; } + if (speed) { + for (i = 0; spispeeds[i].name; i++) + if (!strncasecmp(spispeeds[i].name, speed, + strlen(spispeeds[i].name))) { + spispeed = spispeeds[i].speed; + break; + } + if (!spispeeds[i].name) + fprintf(stderr, "Invalid SPI speed, using default.\n"); + } + /* This works because speeds numbering starts at 0 and is contiguous. */ + printf_debug("SPI speed is %sHz\n", spispeeds[spispeed].name); ret = buspirate_serialport_setup(dev); if (ret) @@ -224,8 +239,8 @@ return 1; } - /* Set speed to 8 MHz */ - buf[0] = 0x60 | 0x7; + /* Set SPI speed */ + buf[0] = 0x60 | spispeed; ret = buspirate_sendrecv(buf, 1, 1); if (ret) return 1; @@ -351,8 +366,7 @@ int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - /* Maximum read length is 12 bytes, use 8 for now. */ - return spi_read_chunked(flash, buf, start, len, 8); + return spi_read_chunked(flash, buf, start, len, 12); } /* We could do 12-byte writes, but for now we use the generic 1-byte code. */ Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/flash.h 2009-11-24 18:27:10 UTC (rev 776) @@ -488,6 +488,10 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); /* buspirate_spi.c */ +struct buspirate_spispeeds { + const char *name; + const int speed; +}; int buspirate_spi_init(void); int buspirate_spi_shutdown(void); int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); @@ -503,6 +507,7 @@ int erase_flash(struct flashchip *flash); int min(int a, int b); int max(int a, int b); +char *extract_param(char **haystack, char *needle, char *delim); int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); char *strcat_realloc(char *dest, const char *src); Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/flashrom.8 2009-11-24 18:27:10 UTC (rev 776) @@ -152,6 +152,8 @@ .sp .BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" .sp +.BR "* buspiratespi" " (for flash ROMs attached to a Bus Pirate)" +.sp The dummy programmer has an optional parameter specifying the bus types it should support. For that you have to use the .B "flashrom -p dummy:type" @@ -219,6 +221,16 @@ instead. More information about serprog is available in serprog-protocol.txt in the source distribution. .sp +The buspiratespi programmer has a required dev parameter specifying the Bus +Pirate device node and an optional spispeed parameter specifying the frequency +of the SPI bus. The parameter delimiter is a comma. Syntax is +.B "flashrom -p buspiratespi:dev=/dev/device,spispeed=frequency" +where +.B frequency +can be any of +.B 30k 125k 250k 1M 2M 2.6M 4M 8M +(in Hz). +.sp Support for some programmers can be disabled at compile time. .B "flashrom -h" lists all supported programmers. Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/flashrom.c 2009-11-24 18:27:10 UTC (rev 776) @@ -336,6 +336,60 @@ return dest; } +/* This is a somewhat hacked function similar in some ways to strtok(). + * It will look for needle in haystack, return a copy of needle and remove + * everything from the first occurrence of needle to the next delimiter + * from haystack. + */ +char *extract_param(char **haystack, char *needle, char *delim) +{ + char *param_pos, *rest, *tmp; + char *dev = NULL; + int devlen; + + param_pos = strstr(*haystack, needle); + do { + if (!param_pos) + return NULL; + /* Beginning of the string? */ + if (param_pos == *haystack) + break; + /* After a delimiter? */ + if (strchr(delim, *(param_pos - 1))) + break; + /* Continue searching. */ + param_pos++; + param_pos = strstr(param_pos, needle); + } while (1); + + if (param_pos) { + param_pos += strlen(needle); + devlen = strcspn(param_pos, delim); + if (devlen) { + dev = malloc(devlen + 1); + if (!dev) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + strncpy(dev, param_pos, devlen); + dev[devlen] = '\0'; + } + rest = param_pos + devlen; + rest += strspn(rest, delim); + param_pos -= strlen(needle); + memmove(param_pos, rest, strlen(rest) + 1); + tmp = realloc(*haystack, strlen(*haystack) + 1); + if (!tmp) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + *haystack = tmp; + } + + + return dev; +} + /* start is an offset to the base address of the flash chip */ int check_erased_range(struct flashchip *flash, int start, int len) { Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/spi.c 2009-11-24 18:27:10 UTC (rev 776) @@ -319,6 +319,9 @@ #if DUMMY_SUPPORT == 1 case SPI_CONTROLLER_DUMMY: #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + case SPI_CONTROLLER_BUSPIRATE: +#endif return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n"); [View Less]

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Re: [flashrom] flash erase failure
by Thao Hoang 24 Nov '09

24 Nov '09

Here is the output for the MSI CR600 laptop. Both the chipset and the chip is not recognize by flashrom. I provide all the output you ask and also included the output of dmidecode. --- On Mon, 11/23/09, Adrian Glaubitz <adrian.glaubitz(a)googlemail.com> wrote: From: Adrian Glaubitz <adrian.glaubitz(a)googlemail.com> Subject: Re: [flashrom] flash erase failure To: "Thao Hoang" <thao_hoang(a)yahoo.com>, flashrom(a)flashrom.org Date: Monday, … [View More]

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flashrom reviewers needed
by Carl-Daniel Hailfinger 24 Nov '09

24 Nov '09

Hi, I'm sorry for cross-posting this to coreboot@ and flashrom@, but flashrom is suffering badly from reviewer shortage. If you have some spare time and feel like reviewing stuff, please take a look at a few patches which have accumulated over the last few months. Below is the list, together with a link to patchwork. In case someone wants a convenient way to reply, just tell me to do so and I'll add a "ping" reply to the respecitive patch threads on the flashrom mailing list. http://… [View More]

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[RFC] Setting the correct Patchwork status
by Carl-Daniel Hailfinger 24 Nov '09

24 Nov '09

Hi, I'd like to get some input on using the correct "patch state" in Patchwork. 1. Patches which have been acked and are waiting for commit. 2. Patches which are not intended for merging, but which should stay easily available in case someone needs them. This includes debug patches and emergency recovery patches. For type 1, I think either "Awaiting upstream" or "Under review" are OK. We could add an additional state "Waiting for commit". For type 2, it is a lot more difficult. "Not … [View More]

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[PATCH] Configurable SPI speed and man page for Bus Pirate
by Carl-Daniel Hailfinger 24 Nov '09

24 Nov '09

Add the ability to set Bus Pirate SPI speed via the command line. Example usage: flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M Refactor programmer option parsing (this allows cleanups in other programmers as well). Increase SPI read size from 8 to 12 bytes (current single-transaction limit of the Bus Pirate raw SPI protocol). Add Bus Pirate to the list of programmers supporting 4 byte RDID. Add Bus Pirate syntax to the man page. … [View More]Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-buspiratespi_spispeed_manpage/flashrom.8 =================================================================== --- flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Arbeitskopie) @@ -152,6 +152,8 @@ .sp .BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" .sp +.BR "* buspiratespi" " (for flash ROMs attached to a Bus Pirate)" +.sp The dummy programmer has an optional parameter specifying the bus types it should support. For that you have to use the .B "flashrom -p dummy:type" @@ -219,6 +221,16 @@ instead. More information about serprog is available in serprog-protocol.txt in the source distribution. .sp +The buspiratespi programmer has a required dev parameter specifying the Bus +Pirate device node and an optional spispeed parameter specifying the frequency +of the SPI bus. The parameter delimiter is a comma. Syntax is +.B "flashrom -p buspiratespi:dev=/dev/device,spispeed=frequency" +where +.B frequency +can be any of +.B 30k 125k 250k 1M 2M 2.6M 4M 8M +(in Hz). +.sp Support for some programmers can be disabled at compile time. .B "flashrom -h" lists all supported programmers. Index: flashrom-buspiratespi_spispeed_manpage/flash.h =================================================================== --- flashrom-buspiratespi_spispeed_manpage/flash.h (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/flash.h (Arbeitskopie) @@ -488,6 +488,10 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); /* buspirate_spi.c */ +struct buspirate_spispeeds { + const char *name; + const int speed; +}; int buspirate_spi_init(void); int buspirate_spi_shutdown(void); int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); @@ -503,6 +507,7 @@ int erase_flash(struct flashchip *flash); int min(int a, int b); int max(int a, int b); +char *extract_param(char **haystack, char *needle, char *delim); int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); char *strcat_realloc(char *dest, const char *src); Index: flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c =================================================================== --- flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Arbeitskopie) @@ -131,34 +131,37 @@ return 0; } +static const struct buspirate_spispeeds spispeeds[] = { + {"30k", 0x0}, + {"125k", 0x1}, + {"250k", 0x2}, + {"1M", 0x3}, + {"2M", 0x4}, + {"2.6M", 0x5}, + {"4M", 0x6}, + {"8M", 0x7}, + {NULL, 0x0} +}; + int buspirate_spi_init(void) { unsigned char buf[512]; int ret = 0; int i; - char *devpos = NULL; char *dev = NULL; - int devlen; + char *speed = NULL; + int spispeed = 0x7; if (programmer_param && !strlen(programmer_param)) { free(programmer_param); programmer_param = NULL; } if (programmer_param) { - devpos = strstr(programmer_param, "dev="); - if (devpos) { - devpos += 4; - devlen = strcspn(devpos, ",:"); - if (devlen) { - dev = malloc(devlen + 1); - if (!dev) { - fprintf(stderr, "Out of memory!\n"); - exit(1); - } - strncpy(dev, devpos, devlen); - dev[devlen] = '\0'; - } - } + dev = extract_param(&programmer_param, "dev=", ",:"); + speed = extract_param(&programmer_param, "spispeed=", ",:"); + if (strlen(programmer_param)) + fprintf(stderr, "Unhandled programmer parameters: %s\n", + programmer_param); free(programmer_param); programmer_param = NULL; } @@ -167,6 +170,18 @@ "buspiratespi:dev=/dev/ttyUSB0\n"); return 1; } + if (speed) { + for (i = 0; spispeeds[i].name; i++) + if (!strncasecmp(spispeeds[i].name, speed, + strlen(spispeeds[i].name))) { + spispeed = spispeeds[i].speed; + break; + } + if (!spispeeds[i].name) + fprintf(stderr, "Invalid SPI speed, using default.\n"); + } + /* This works because speeds numbering starts at 0 and is contiguous. */ + printf_debug("SPI speed is %sHz\n", spispeeds[spispeed].name); ret = buspirate_serialport_setup(dev); if (ret) @@ -224,8 +239,8 @@ return 1; } - /* Set speed to 8 MHz */ - buf[0] = 0x60 | 0x7; + /* Set SPI speed */ + buf[0] = 0x60 | spispeed; ret = buspirate_sendrecv(buf, 1, 1); if (ret) return 1; @@ -351,8 +366,7 @@ int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - /* Maximum read length is 12 bytes, use 8 for now. */ - return spi_read_chunked(flash, buf, start, len, 8); + return spi_read_chunked(flash, buf, start, len, 12); } /* We could do 12-byte writes, but for now we use the generic 1-byte code. */ Index: flashrom-buspiratespi_spispeed_manpage/spi.c =================================================================== --- flashrom-buspiratespi_spispeed_manpage/spi.c (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/spi.c (Arbeitskopie) @@ -319,6 +319,9 @@ #if DUMMY_SUPPORT == 1 case SPI_CONTROLLER_DUMMY: #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + case SPI_CONTROLLER_BUSPIRATE: +#endif return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n"); Index: flashrom-buspiratespi_spispeed_manpage/flashrom.c =================================================================== --- flashrom-buspiratespi_spispeed_manpage/flashrom.c (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/flashrom.c (Arbeitskopie) @@ -336,6 +336,60 @@ return dest; } +/* This is a somewhat hacked function similar in some ways to strtok(). + * It will look for needle in haystack, return a copy of needle and remove + * everything from the first occurrence of needle to the next delimiter + * from haystack. + */ +char *extract_param(char **haystack, char *needle, char *delim) +{ + char *param_pos, *rest, *tmp; + char *dev = NULL; + int devlen; + + param_pos = strstr(*haystack, needle); + do { + if (!param_pos) + return NULL; + /* Beginning of the string? */ + if (param_pos == *haystack) + break; + /* After a delimiter? */ + if (strchr(delim, *(param_pos - 1))) + break; + /* Continue searching. */ + param_pos++; + param_pos = strstr(param_pos, needle); + } while (1); + + if (param_pos) { + param_pos += strlen(needle); + devlen = strcspn(param_pos, delim); + if (devlen) { + dev = malloc(devlen + 1); + if (!dev) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + strncpy(dev, param_pos, devlen); + dev[devlen] = '\0'; + } + rest = param_pos + devlen; + rest += strspn(rest, delim); + param_pos -= strlen(needle); + memmove(param_pos, rest, strlen(rest) + 1); + tmp = realloc(*haystack, strlen(*haystack) + 1); + if (!tmp) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + *haystack = tmp; + } + + + return dev; +} + /* start is an offset to the base address of the flash chip */ int check_erased_range(struct flashchip *flash, int start, int len) { -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers." 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Re: [flashrom] Error compiling flashrom 0.9.1 from source code.
by Luis Ortega 24 Nov '09

24 Nov '09

Hi, my name is Luis Ortega. I want to inform you that I receive an error upon compiling flashrom 0.9.1 from the source code at the following location. The operating system used is Ubuntu 9.10... http://qa.coreboot.org/releases/flashrom-0.9.1.tar.bz2 The following is displayed upon compiling flashrom... sudo make Checking for a C compiler... found. Checking for pciutils and zlib... found. Checking for FTDI support... not found. cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'… [View More]FLASHROM_VERSION="0.9.1-r710"' -o chipset_enable.o -c chipset_enable.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o board_enable.o -c board_enable.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o udelay.o -c udelay.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o jedec.o -c jedec.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o stm50flw0x0x.o -c stm50flw0x0x.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst28sf040.o -c sst28sf040.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o am29f040b.o -c am29f040b.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o mx29f002.o -c mx29f002.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o m29f400bt.o -c m29f400bt.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o pm29f002.o -c pm29f002.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o w49f002u.o -c w49f002u.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o 82802ab.o -c 82802ab.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o pm49fl00x.o -c pm49fl00x.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst49lf040.o -c sst49lf040.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o en29f002a.o -c en29f002a.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst49lfxxxc.o -c sst49lfxxxc.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst_fwhub.o -c sst_fwhub.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o layout.o -c layout.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o cbtable.o -c cbtable.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o flashchips.o -c flashchips.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o physmap.o -c physmap.c cc1: warnings being treated as errors physmap.c: In function ‘rdmsr’: physmap.c:146: error: dereferencing type-punned pointer will break strict-aliasing rules make: *** [physmap.o] Error 1 I was told via IRCto report it here. Best regards, Luis Ortega [View Less]

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flashrom test
by MAKAPOH 24 Nov '09

24 Nov '09

Hello! flashrom -r MyBIOS.bin flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF003A/B" (384 KB, FWH) at physical address 0xfffa0000. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. … [View More]Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Reading flash... done. flashrom -rV MyBIOS.bin flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 846M loops per second, 100 myus = 200 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F002(N)BB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F002(N)BT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N), 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMIC A49LF040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EMST F49B002UA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EON EN29F002(A)(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004BC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004TC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 28F001BX-T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm29F0002B, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm39LV010, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL002, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL004, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29EE020A, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF002A/B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF003A/B, 384 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Lock status for 0x000000 (size 0x010000) is 01, write locked Lock status for 0x010000 (size 0x010000) is 01, write locked Lock status for 0x020000 (size 0x010000) is 01, write locked Lock status for 0x030000 (size 0x010000) is 01, write locked Lock status for 0x040000 (size 0x010000) is 01, write locked Lock status for 0x050000 (size 0x010000) is 01, write locked Found chip "SST SST49LF003A/B" (384 KB, FWH) at physical address 0xfffa0000. Probing for SST SST49LF004A/B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F002T/NT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29W040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x29, id2 0xee Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xbf, id2 0x1b Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49F002U, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002FA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Reading flash... done. flashrom -Vw MyBIOS.bin flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 831M loops per second, 100 myus = 208 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F002(N)BB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F002(N)BT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N), 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMIC A49LF040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EMST F49B002UA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EON EN29F002(A)(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004BC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004TC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 28F001BX-T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm29F0002B, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm39LV010, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL002, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL004, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29EE020A, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF002A/B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF003A/B, 384 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Lock status for 0x000000 (size 0x010000) is 00, full access Lock status for 0x010000 (size 0x010000) is 01, write locked Lock status for 0x020000 (size 0x010000) is 01, write locked Lock status for 0x030000 (size 0x010000) is 01, write locked Lock status for 0x040000 (size 0x010000) is 01, write locked Lock status for 0x050000 (size 0x010000) is 01, write locked Found chip "SST SST49LF003A/B" (384 KB, FWH) at physical address 0xfffa0000. Probing for SST SST49LF004A/B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F002T/NT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29W040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x29, id2 0xee Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xbf, id2 0x1b Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49F002U, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002FA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Lock status for 0x000000 (size 0x010000) is 00, full access ERASE FAILED at 0x00000000! Expected=0xff, Read=0x23, failed byte count from 0x00000000-0x0000ffff: 0xff1b ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! С уважением, Андрей. mail: makapoh(a)bk.ru ICQ: 333335352 [View Less]

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[PATCHES] Sanyo Generic Detection & Sanyo LF25FW203A chip support
by Sean Nelson 24 Nov '09

24 Nov '09

Add Generic SPI detect for Sanyo chips. Add LF25FW203A support. The generic patch has to be applied before the lf25fw203 patch. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

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[commit] r775 - trunk
by svn＠flashrom.org 24 Nov '09

24 Nov '09

Author: hailfinger Date: 2009-11-24 03:11:08 +0100 (Tue, 24 Nov 2009) New Revision: 775 Modified: trunk/flashchips.c Log: Add Sanyo LF25FW203A support. This chip is sometimes labeled as 25FW203T. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-11-24 02:08:11 UTC (rev 774) +++ … [View More]

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[commit] r774 - trunk
by svn＠flashrom.org 24 Nov '09

24 Nov '09

Author: hailfinger Date: 2009-11-24 03:08:11 +0100 (Tue, 24 Nov 2009) New Revision: 774 Modified: trunk/flashchips.c trunk/flashchips.h Log: Add Generic SPI RDID detection for Sanyo chips. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-11-24 00:23:33 UTC (rev 773) +++ trunk/… [View More]

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Asus M2V-MX information
by Michael Spang 24 Nov '09

24 Nov '09

On Asus M2V-MX running 'flashrom -E' fails with the following output: flashrom v0.9.1-r771 No coreboot table found. Found chipset "VIA VT8237A", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF040B" (512 KB, LPC) at physical address 0xfff80000. Erasing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x41, failed byte count from 0x00000000-0x0000ffff: 0xfdea ERASE FAILED! ERASE FAILED! ERASE … [View More]

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Re: [flashrom] [commit] r772 - trunk
by Stefan Reinauer 24 Nov '09

24 Nov '09

svn(a)flashrom.org wrote: > +ifeq ($(CONFIG_BUSPIRATESPI), yes) > +FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' > +OBJS += buspirate_spi.o > +endif > + > +# Ugly, but there's no elif/elseif. > ifeq ($(CONFIG_SERPROG), yes) > OBJS += serial.o > +else > +ifeq ($(CONFIG_BUSPIRATESPI), yes) > +OBJS += serial.o > endif > +endif how long before we see Kconfig? ;-)

2 1

[commit] r773 - trunk
by svn＠flashrom.org 24 Nov '09

24 Nov '09

Author: hailfinger Date: 2009-11-24 01:23:33 +0100 (Tue, 24 Nov 2009) New Revision: 773 Modified: trunk/Makefile Log: Revert debug compilation which was committed in r772 by accident. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-11-24 00:20:03 UTC (rev 772) +++ … [View More]

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Re: [flashrom] [PATCH] Bus Pirate SPI support in flashrom
by Sean Nelson 24 Nov '09

24 Nov '09

Patch with SPI mode init code. On Sat, Nov 21, 2009 at 2:50 AM, Sean Nelson <audiohacked(a)gmail.com> wrote: > Verbose log of flashrom-buspiratespi. > > On Fri, Nov 20, 2009 at 8:53 PM, Carl-Daniel Hailfinger > <c-d.hailfinger.devel.2006(a)gmx.net> wrote: >> Add Bus Pirate SPI support to flashrom. >> >> Untested, should work. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> >> >> Index: … [View More]flashrom-buspiratespi/flash.h >> =================================================================== >> --- flashrom-buspiratespi/flash.h (Revision 767) >> +++ flashrom-buspiratespi/flash.h (Arbeitskopie) >> @@ -104,6 +104,9 @@ >> #if SERPROG_SUPPORT == 1 >> PROGRAMMER_SERPROG, >> #endif >> +#if BUSPIRATE_SPI_SUPPORT == 1 >> + PROGRAMMER_BUSPIRATESPI, >> +#endif >> PROGRAMMER_INVALID /* This must always be the last entry. */ >> }; >> >> @@ -484,6 +487,12 @@ >> int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); >> int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); >> >> +/* buspirate_spi.c */ >> +int buspirate_spi_init(void); >> +int buspirate_spi_shutdown(void); >> +int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); >> +int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); >> + >> /* flashrom.c */ >> extern char *programmer_param; >> extern int verbose; >> @@ -527,6 +536,9 @@ >> #if DUMMY_SUPPORT == 1 >> SPI_CONTROLLER_DUMMY, >> #endif >> +#if BUSPIRATE_SPI_SUPPORT == 1 >> + SPI_CONTROLLER_BUSPIRATE, >> +#endif >> SPI_CONTROLLER_INVALID /* This must always be the last entry. */ >> }; >> extern const int spi_programmer_count; >> @@ -736,5 +748,8 @@ >> uint8_t serprog_chip_readb(const chipaddr addr); >> void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); >> void serprog_delay(int delay); >> +void sp_flush_incoming(void); >> +int sp_openserport(char *dev, unsigned int baud); >> +extern int sp_fd; >> >> #endif /* !__FLASH_H__ */ >> Index: flashrom-buspiratespi/buspirate_spi.c >> =================================================================== >> --- flashrom-buspiratespi/buspirate_spi.c (Revision 0) >> +++ flashrom-buspiratespi/buspirate_spi.c (Revision 0) >> @@ -0,0 +1,317 @@ >> +/* >> + * This file is part of the flashrom project. >> + * >> + * Copyright (C) 2009 Carl-Daniel Hailfinger >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License as published by >> + * the Free Software Foundation; version 2 of the License. >> + * >> + * This program is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * You should have received a copy of the GNU General Public License >> + * along with this program; if not, write to the Free Software >> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA >> + */ >> + >> +#include <stdio.h> >> +#include <stdint.h> >> +#include <string.h> >> +#include <stdlib.h> >> +#include <ctype.h> >> +#include <fcntl.h> >> +#include "flash.h" >> +#include "spi.h" >> + >> +int buspirate_serialport_setup(char *dev) >> +{ >> + /* 115200bps, 8 databits, no parity, 1 stopbit */ >> + sp_fd = sp_openserport(dev, 115200); >> + return 0; >> +} >> + >> +int buspirate_serialport_shutdown(void) >> +{ >> + close(sp_fd); >> + return 0; >> +} >> + >> +int serialport_write(unsigned char *buf, unsigned int writecnt) >> +{ >> + int tmp = 0; >> + >> + while (tmp != writecnt) { >> + tmp = write(sp_fd, buf + tmp, writecnt - tmp); >> + if (tmp == -1) >> + return 1; >> + if (!tmp) >> + printf_debug("Empty write\n"); >> + } >> + >> + return 0; >> +} >> + >> +int serialport_read(unsigned char *buf, unsigned int readcnt) >> +{ >> + int tmp = 0; >> + >> + while (tmp != readcnt) { >> + tmp = read(sp_fd, buf + tmp, readcnt - tmp); >> + if (tmp == -1) >> + return 1; >> + if (!tmp) >> + printf_debug("Empty read\n"); >> + } >> + >> + return 0; >> +} >> + >> +int buspirate_discard_read(void) >> +{ >> + int flags; >> + >> + printf_debug("%s\n", __func__); >> + flags = fcntl(sp_fd, F_GETFL); >> + flags |= O_NONBLOCK; >> + fcntl(sp_fd, F_SETFL, flags); >> + sp_flush_incoming(); >> + flags &= ~O_NONBLOCK; >> + fcntl(sp_fd, F_SETFL, flags); >> + >> + return 0; >> +} >> + >> +#undef FAKE_COMMUNICATION >> +int buspirate_sendrecv(unsigned char *buf, unsigned int writecnt, unsigned int readcnt) >> +{ >> + int i, ret = 0; >> + >> + printf_debug("%s: write %i, read %i\n", __func__, writecnt, readcnt); >> + if (!writecnt && !readcnt) { >> + fprintf(stderr, "Zero length command!\n"); >> + return 1; >> + } >> + printf_debug("Sending"); >> + for (i = 0; i < writecnt; i++) >> + printf_debug(" 0x%02x", buf[i]); >> +#ifdef FAKE_COMMUNICATION >> + /* Placate the caller for now. */ >> + buf[0] = 0x01; >> + memset(buf + 1, 0xff, readcnt - 1); >> + ret = 0; >> +#else >> + if (writecnt) >> + ret = serialport_write(buf, writecnt); >> + if (ret) >> + return ret; >> + if (readcnt) >> + ret = serialport_read(buf, readcnt); >> + if (ret) >> + return ret; >> +#endif >> + printf_debug(", receiving"); >> + for (i = 0; i < readcnt; i++) >> + printf_debug(" 0x%02x", buf[i]); >> + printf_debug("\n"); >> + return 0; >> +} >> + >> +int buspirate_spi_init(void) >> +{ >> + unsigned char buf[512]; >> + int ret = 0; >> + int i; >> + char *devpos = NULL; >> + char *dev = NULL; >> + int devlen; >> + >> + if (programmer_param && !strlen(programmer_param)) { >> + free(programmer_param); >> + programmer_param = NULL; >> + } >> + if (programmer_param) { >> + devpos = strstr(programmer_param, "dev="); >> + if (devpos) { >> + devpos += 4; >> + devlen = strcspn(devpos, ",:"); >> + if (devlen) { >> + dev = malloc(devlen + 1); >> + if (!dev) { >> + fprintf(stderr, "Out of memory!\n"); >> + exit(1); >> + } >> + strncpy(dev, devpos, devlen); >> + dev[devlen] = '\0'; >> + } >> + } >> + free(programmer_param); >> + programmer_param = NULL; >> + } >> + if (!dev) { >> + fprintf(stderr, "No serial device given. Use flashrom -p " >> + "buspiratespi:dev=/dev/ttyUSB0\n"); >> + return 1; >> + } >> + >> + ret = buspirate_serialport_setup(dev); >> + if (ret) >> + return ret; >> + >> + /* This is the brute force version, but it should work. */ >> + for (i = 0; i < 19; i++) { >> + /* Enter raw bitbang mode */ >> + buf[0] = 0x00; >> + /* Send the command, don't read the response. */ >> + ret = buspirate_sendrecv(buf, 1, 0); >> + if (ret) >> + return ret; >> + /* Read any response and discard it. */ >> + ret = buspirate_discard_read(); >> + if (ret) >> + return ret; >> + } >> + /* Enter raw bitbang mode */ >> + buf[0] = 0x00; >> + ret = buspirate_sendrecv(buf, 1, 5); >> + if (ret) >> + return ret; >> + if (memcmp(buf, "BBIO", 4)) { >> + fprintf(stderr, "Entering raw bitbang mode failed!\n"); >> + return 1; >> + } >> + printf_debug("Raw bitbang mode version %c\n", buf[4]); >> + if (buf[4] != '1') { >> + fprintf(stderr, "Can't handle raw bitbang mode version %c!\n", >> + buf[4]); >> + return 1; >> + } >> + /* Enter raw SPI mode */ >> + buf[0] = 0x01; >> + ret = buspirate_sendrecv(buf, 1, 4); >> + if (memcmp(buf, "SPI", 3)) { >> + fprintf(stderr, "Entering raw SPI mode failed!\n"); >> + return 1; >> + } >> + printf_debug("Raw SPI mode version %c\n", buf[3]); >> + if (buf[3] != '1') { >> + fprintf(stderr, "Can't handle raw SPI mode version %c!\n", >> + buf[3]); >> + return 1; >> + } >> + >> + /* Initial setup: Enable power, */ >> + /* De-assert CS# */ >> + buf[0] = 0x03; >> + ret = buspirate_sendrecv(buf, 1, 1); >> + if (ret) >> + return 1; >> + if (buf[0] != 0x01) { >> + fprintf(stderr, "Protocol error!\n"); >> + return 1; >> + } >> + >> + buses_supported = CHIP_BUSTYPE_SPI; >> + spi_controller = SPI_CONTROLLER_BUSPIRATE; >> + >> + return 0; >> +} >> + >> +int buspirate_spi_shutdown(void) >> +{ >> + unsigned char buf[5]; >> + int ret = 0; >> + >> + /* Exit raw SPI mode (enter raw bitbang mode) */ >> + buf[0] = 0x00; >> + ret = buspirate_sendrecv(buf, 1, 5); >> + if (ret) >> + return ret; >> + if (memcmp(buf, "BBIO", 4)) { >> + fprintf(stderr, "Entering raw bitbang mode failed!\n"); >> + return 1; >> + } >> + printf_debug("Raw bitbang mode version %c\n", buf[4]); >> + if (buf[4] != '1') { >> + fprintf(stderr, "Can't handle raw bitbang mode version %c!\n", >> + buf[4]); >> + return 1; >> + } >> + /* Reset Bus Pirate (return to user terminal) */ >> + buf[0] = 0x0f; >> + ret = buspirate_sendrecv(buf, 1, 0); >> + if (ret) >> + return ret; >> + >> + /* Shut down serial port communication */ >> + ret = buspirate_serialport_shutdown(); >> + if (ret) >> + return ret; >> + printf_debug("Bus Pirate shutdown completed.\n"); >> + >> + return 0; >> +} >> + >> +int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, >> + const unsigned char *writearr, unsigned char *readarr) >> +{ >> + static unsigned char *buf = NULL; >> + int i = 0, ret = 0; >> + >> + if (writecnt > 16 || readcnt > 16 || (readcnt + writecnt) > 16) >> + return SPI_INVALID_LENGTH; >> + >> + /* +2 is pretty arbitrary. */ >> + buf = realloc(buf, writecnt + readcnt + 2); >> + if (!buf) { >> + fprintf(stderr, "Out of memory!\n"); >> + exit(1); // -1 >> + } >> + >> + /* Assert CS# */ >> + buf[i++] = 0x02; >> + ret = buspirate_sendrecv(buf, 1, 1); >> + if (ret) >> + return SPI_GENERIC_ERROR; >> + if (buf[0] != 0x01) { >> + fprintf(stderr, "Protocol error!\n"); >> + return SPI_GENERIC_ERROR; >> + } >> + >> + i = 0; >> + buf[i++] = 0x10 | (writecnt + readcnt - 1); >> + memcpy(buf + i, writearr, writecnt); >> + i += writecnt; >> + memset(buf + i, 0, readcnt); >> + ret = buspirate_sendrecv(buf, i + readcnt, i + readcnt); >> + if (ret) >> + return SPI_GENERIC_ERROR; >> + if (buf[0] != 0x01) { >> + fprintf(stderr, "Protocol error!\n"); >> + return SPI_GENERIC_ERROR; >> + } >> + memcpy(readarr, buf + i, readcnt); >> + >> + i = 0; >> + /* De-assert CS# */ >> + buf[i++] = 0x03; >> + ret = buspirate_sendrecv(buf, 1, 1); >> + if (ret) >> + return SPI_GENERIC_ERROR; >> + if (buf[0] != 0x01) { >> + fprintf(stderr, "Protocol error!\n"); >> + return SPI_GENERIC_ERROR; >> + } >> + >> + return ret; >> +} >> + >> +int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) >> +{ >> + /* Maximum read length is 12 bytes, use 8 for now. */ >> + return spi_read_chunked(flash, buf, start, len, 8); >> +} >> + >> +/* We could do 12-byte writes, but for now we use the generic 1-byte code. */ >> Index: flashrom-buspiratespi/serprog.c >> =================================================================== >> --- flashrom-buspiratespi/serprog.c (Revision 767) >> +++ flashrom-buspiratespi/serprog.c (Arbeitskopie) >> @@ -61,7 +61,7 @@ >> #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ >> #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ >> >> -static int sp_fd; >> +int sp_fd; >> >> static uint16_t sp_device_serbuf_size = 16; >> static uint16_t sp_device_opbuf_size = 300; >> @@ -185,7 +185,7 @@ >> {0, 0} /* Terminator */ >> }; >> >> -static int sp_openserport(char *dev, unsigned int baud) >> +int sp_openserport(char *dev, unsigned int baud) >> { >> struct termios options; >> int fd, i; >> @@ -208,20 +208,16 @@ >> break; >> } >> } >> - options.c_cflag &= ~PARENB; >> - options.c_cflag &= ~CSTOPB; >> - options.c_cflag &= ~CSIZE; >> - options.c_cflag |= CS8; >> - options.c_cflag &= ~CRTSCTS; >> + options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); >> + options.c_cflag |= (CS8 | CLOCAL | CREAD); >> options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); >> options.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); >> options.c_oflag &= ~OPOST; >> - options.c_cflag |= (CLOCAL | CREAD); >> tcsetattr(fd, TCSANOW, &options); >> return fd; >> } >> >> -static void sp_flush_incoming(void) >> +void sp_flush_incoming(void) >> { >> int i; >> for (i=0;i<100;i++) { /* In case the device doesnt do EAGAIN, just read 0 */ >> Index: flashrom-buspiratespi/spi.c >> =================================================================== >> --- flashrom-buspiratespi/spi.c (Revision 767) >> +++ flashrom-buspiratespi/spi.c (Arbeitskopie) >> @@ -100,6 +100,15 @@ >> }, >> #endif >> >> +#if BUSPIRATE_SPI_SUPPORT == 1 >> + { /* SPI_CONTROLLER_BUSPIRATE */ >> + .command = buspirate_spi_send_command, >> + .multicommand = default_spi_send_multicommand, >> + .read = buspirate_spi_read, >> + .write_256 = spi_chip_write_1, >> + }, >> +#endif >> + >> {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ >> }; >> >> Index: flashrom-buspiratespi/Makefile >> =================================================================== >> --- flashrom-buspiratespi/Makefile (Revision 767) >> +++ flashrom-buspiratespi/Makefile (Arbeitskopie) >> @@ -89,6 +89,9 @@ >> # Always enable Dr. Kaiser for now. >> CONFIG_DRKAISER ?= yes >> >> +# Always enable Bus Pirate SPI for now. >> +CONFIG_BUSPIRATESPI ?= yes >> + >> # Disable wiki printing by default. It is only useful if you have wiki access. >> CONFIG_PRINT_WIKI ?= no >> >> @@ -138,6 +141,11 @@ >> OBJS += drkaiser.o >> endif >> >> +ifeq ($(CONFIG_BUSPIRATESPI), yes) >> +FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' >> +OBJS += buspirate_spi.o >> +endif >> + >> ifeq ($(CONFIG_PRINT_WIKI), yes) >> FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' >> OBJS += print_wiki.o >> Index: flashrom-buspiratespi/spi.h >> =================================================================== >> --- flashrom-buspiratespi/spi.h (Revision 767) >> +++ flashrom-buspiratespi/spi.h (Arbeitskopie) >> @@ -106,6 +106,7 @@ >> #define JEDEC_BYTE_PROGRAM_INSIZE 0x00 >> >> /* Error codes */ >> +#define SPI_GENERIC_ERROR -1 >> #define SPI_INVALID_OPCODE -2 >> #define SPI_INVALID_ADDRESS -3 >> #define SPI_INVALID_LENGTH -4 >> Index: flashrom-buspiratespi/flashrom.c >> =================================================================== >> --- flashrom-buspiratespi/flashrom.c (Revision 767) >> +++ flashrom-buspiratespi/flashrom.c (Arbeitskopie) >> @@ -204,6 +204,25 @@ >> }, >> #endif >> >> +#if BUSPIRATE_SPI_SUPPORT == 1 >> + { >> + .name = "buspiratespi", >> + .init = buspirate_spi_init, >> + .shutdown = buspirate_spi_shutdown, >> + .map_flash_region = fallback_map, >> + .unmap_flash_region = fallback_unmap, >> + .chip_readb = noop_chip_readb, >> + .chip_readw = fallback_chip_readw, >> + .chip_readl = fallback_chip_readl, >> + .chip_readn = fallback_chip_readn, >> + .chip_writeb = noop_chip_writeb, >> + .chip_writew = fallback_chip_writew, >> + .chip_writel = fallback_chip_writel, >> + .chip_writen = fallback_chip_writen, >> + .delay = internal_delay, >> + }, >> +#endif >> + >> {}, /* This entry corresponds to PROGRAMMER_INVALID. */ >> }; >> >> >> >> -- >> Developer quote of the month: >> "We are juggling too many chainsaws and flaming arrows and tigers." >> >> > [View Less]

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[commit] r772 - trunk
by svn＠flashrom.org 24 Nov '09

24 Nov '09

Author: hailfinger Date: 2009-11-24 01:20:03 +0100 (Tue, 24 Nov 2009) New Revision: 772 Added: trunk/buspirate_spi.c Modified: trunk/Makefile trunk/flash.h trunk/flashrom.c trunk/spi.c trunk/spi.h Log: Add Bus Pirate SPI support to flashrom. The code should work on Linux/*BSD/MacOSX and relies on the serial code implementation in serial.c. Support for additional platforms (Windows) will have to be added to serial.c for this to work. For tests without a Bus Pirate (or with … [View More]non-functional serial code) it is possible to #define FAKE_COMMUNICATION in buspirate_spi.c. Thanks to Sean Nelson for the SPI mode settings code. I tweaked it a bit to make configuration from a commandline easier should anybody want that feature. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Tested-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-11-23 19:20:11 UTC (rev 771) +++ trunk/Makefile 2009-11-24 00:20:03 UTC (rev 772) @@ -25,7 +25,7 @@ DIFF = diff PREFIX ?= /usr/local MANDIR ?= $(PREFIX)/share/man -CFLAGS ?= -Os -Wall -Werror +CFLAGS ?= -Os -Wall -Werror -g EXPORTDIR ?= . OS_ARCH = $(shell uname) @@ -89,6 +89,9 @@ # Always enable Dr. Kaiser for now. CONFIG_DRKAISER ?= yes +# Always enable Bus Pirate SPI for now. +CONFIG_BUSPIRATESPI ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -138,9 +141,19 @@ OBJS += drkaiser.o endif +ifeq ($(CONFIG_BUSPIRATESPI), yes) +FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' +OBJS += buspirate_spi.o +endif + +# Ugly, but there's no elif/elseif. ifeq ($(CONFIG_SERPROG), yes) OBJS += serial.o +else +ifeq ($(CONFIG_BUSPIRATESPI), yes) +OBJS += serial.o endif +endif ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' Added: trunk/buspirate_spi.c =================================================================== --- trunk/buspirate_spi.c (rev 0) +++ trunk/buspirate_spi.c 2009-11-24 00:20:03 UTC (rev 772) @@ -0,0 +1,358 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdio.h> +#include <stdint.h> +#include <string.h> +#include <stdlib.h> +#include <ctype.h> +#include <fcntl.h> +#include "flash.h" +#include "spi.h" + +/* Change this to #define if you want to test without a serial implementation */ +#undef FAKE_COMMUNICATION + +#ifndef FAKE_COMMUNICATION +int buspirate_serialport_setup(char *dev) +{ + /* 115200bps, 8 databits, no parity, 1 stopbit */ + sp_fd = sp_openserport(dev, 115200); + return 0; +} + +int buspirate_serialport_shutdown(void) +{ + close(sp_fd); + return 0; +} + +int serialport_write(unsigned char *buf, unsigned int writecnt) +{ + int tmp = 0; + + while (tmp != writecnt) { + tmp = write(sp_fd, buf + tmp, writecnt - tmp); + if (tmp == -1) + return 1; + if (!tmp) + printf_debug("Empty write\n"); + } + + return 0; +} + +int serialport_read(unsigned char *buf, unsigned int readcnt) +{ + int tmp = 0; + + while (tmp != readcnt) { + tmp = read(sp_fd, buf + tmp, readcnt - tmp); + if (tmp == -1) + return 1; + if (!tmp) + printf_debug("Empty read\n"); + } + + return 0; +} + +int buspirate_discard_read(void) +{ + int flags; + + printf_debug("%s\n", __func__); + flags = fcntl(sp_fd, F_GETFL); + flags |= O_NONBLOCK; + fcntl(sp_fd, F_SETFL, flags); + sp_flush_incoming(); + flags &= ~O_NONBLOCK; + fcntl(sp_fd, F_SETFL, flags); + + return 0; +} +#else +#define buspirate_serialport_setup(...) 0 +#define buspirate_serialport_shutdown(...) 0 +#define serialport_write(...) 0 +#define serialport_read(...) 0 +#define buspirate_discard_read(...) 0 +#endif + +int buspirate_sendrecv(unsigned char *buf, unsigned int writecnt, unsigned int readcnt) +{ + int i, ret = 0; + + printf_debug("%s: write %i, read %i\n", __func__, writecnt, readcnt); + if (!writecnt && !readcnt) { + fprintf(stderr, "Zero length command!\n"); + return 1; + } + printf_debug("Sending"); + for (i = 0; i < writecnt; i++) + printf_debug(" 0x%02x", buf[i]); +#ifdef FAKE_COMMUNICATION + /* Placate the caller for now. */ + if (readcnt) { + buf[0] = 0x01; + memset(buf + 1, 0xff, readcnt - 1); + } + ret = 0; +#else + if (writecnt) + ret = serialport_write(buf, writecnt); + if (ret) + return ret; + if (readcnt) + ret = serialport_read(buf, readcnt); + if (ret) + return ret; +#endif + printf_debug(", receiving"); + for (i = 0; i < readcnt; i++) + printf_debug(" 0x%02x", buf[i]); + printf_debug("\n"); + return 0; +} + +int buspirate_spi_init(void) +{ + unsigned char buf[512]; + int ret = 0; + int i; + char *devpos = NULL; + char *dev = NULL; + int devlen; + + if (programmer_param && !strlen(programmer_param)) { + free(programmer_param); + programmer_param = NULL; + } + if (programmer_param) { + devpos = strstr(programmer_param, "dev="); + if (devpos) { + devpos += 4; + devlen = strcspn(devpos, ",:"); + if (devlen) { + dev = malloc(devlen + 1); + if (!dev) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + strncpy(dev, devpos, devlen); + dev[devlen] = '\0'; + } + } + free(programmer_param); + programmer_param = NULL; + } + if (!dev) { + fprintf(stderr, "No serial device given. Use flashrom -p " + "buspiratespi:dev=/dev/ttyUSB0\n"); + return 1; + } + + ret = buspirate_serialport_setup(dev); + if (ret) + return ret; + + /* This is the brute force version, but it should work. */ + for (i = 0; i < 19; i++) { + /* Enter raw bitbang mode */ + buf[0] = 0x00; + /* Send the command, don't read the response. */ + ret = buspirate_sendrecv(buf, 1, 0); + if (ret) + return ret; + /* Read any response and discard it. */ + ret = buspirate_discard_read(); + if (ret) + return ret; + } + /* Enter raw bitbang mode */ + buf[0] = 0x00; + ret = buspirate_sendrecv(buf, 1, 5); + if (ret) + return ret; + if (memcmp(buf, "BBIO", 4)) { + fprintf(stderr, "Entering raw bitbang mode failed!\n"); + return 1; + } + printf_debug("Raw bitbang mode version %c\n", buf[4]); + if (buf[4] != '1') { + fprintf(stderr, "Can't handle raw bitbang mode version %c!\n", + buf[4]); + return 1; + } + /* Enter raw SPI mode */ + buf[0] = 0x01; + ret = buspirate_sendrecv(buf, 1, 4); + if (memcmp(buf, "SPI", 3)) { + fprintf(stderr, "Entering raw SPI mode failed!\n"); + return 1; + } + printf_debug("Raw SPI mode version %c\n", buf[3]); + if (buf[3] != '1') { + fprintf(stderr, "Can't handle raw SPI mode version %c!\n", + buf[3]); + return 1; + } + + /* Initial setup (SPI peripherals config): Enable power, CS high, AUX */ + buf[0] = 0x40 | 0xb; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return 1; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error while setting power/CS/AUX!\n"); + return 1; + } + + /* Set speed to 8 MHz */ + buf[0] = 0x60 | 0x7; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return 1; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error while setting SPI speed!\n"); + return 1; + } + + /* Set SPI config: output type, idle, clock edge, sample */ + buf[0] = 0x80 | 0xa; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return 1; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error while setting SPI config!\n"); + return 1; + } + + /* De-assert CS# */ + buf[0] = 0x03; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return 1; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error while raising CS#!\n"); + return 1; + } + + buses_supported = CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_BUSPIRATE; + + return 0; +} + +int buspirate_spi_shutdown(void) +{ + unsigned char buf[5]; + int ret = 0; + + /* Exit raw SPI mode (enter raw bitbang mode) */ + buf[0] = 0x00; + ret = buspirate_sendrecv(buf, 1, 5); + if (ret) + return ret; + if (memcmp(buf, "BBIO", 4)) { + fprintf(stderr, "Entering raw bitbang mode failed!\n"); + return 1; + } + printf_debug("Raw bitbang mode version %c\n", buf[4]); + if (buf[4] != '1') { + fprintf(stderr, "Can't handle raw bitbang mode version %c!\n", + buf[4]); + return 1; + } + /* Reset Bus Pirate (return to user terminal) */ + buf[0] = 0x0f; + ret = buspirate_sendrecv(buf, 1, 0); + if (ret) + return ret; + + /* Shut down serial port communication */ + ret = buspirate_serialport_shutdown(); + if (ret) + return ret; + printf_debug("Bus Pirate shutdown completed.\n"); + + return 0; +} + +int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + static unsigned char *buf = NULL; + int i = 0, ret = 0; + + if (writecnt > 16 || readcnt > 16 || (readcnt + writecnt) > 16) + return SPI_INVALID_LENGTH; + + /* +2 is pretty arbitrary. */ + buf = realloc(buf, writecnt + readcnt + 2); + if (!buf) { + fprintf(stderr, "Out of memory!\n"); + exit(1); // -1 + } + + /* Assert CS# */ + buf[i++] = 0x02; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return SPI_GENERIC_ERROR; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error while lowering CS#!\n"); + return SPI_GENERIC_ERROR; + } + + i = 0; + buf[i++] = 0x10 | (writecnt + readcnt - 1); + memcpy(buf + i, writearr, writecnt); + i += writecnt; + memset(buf + i, 0, readcnt); + ret = buspirate_sendrecv(buf, i + readcnt, i + readcnt); + if (ret) + return SPI_GENERIC_ERROR; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error while reading/writing SPI!\n"); + return SPI_GENERIC_ERROR; + } + memcpy(readarr, buf + i, readcnt); + + i = 0; + /* De-assert CS# */ + buf[i++] = 0x03; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return SPI_GENERIC_ERROR; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error while raising CS#!\n"); + return SPI_GENERIC_ERROR; + } + + return ret; +} + +int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + /* Maximum read length is 12 bytes, use 8 for now. */ + return spi_read_chunked(flash, buf, start, len, 8); +} + +/* We could do 12-byte writes, but for now we use the generic 1-byte code. */ Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-23 19:20:11 UTC (rev 771) +++ trunk/flash.h 2009-11-24 00:20:03 UTC (rev 772) @@ -104,6 +104,9 @@ #if SERPROG_SUPPORT == 1 PROGRAMMER_SERPROG, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + PROGRAMMER_BUSPIRATESPI, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -484,6 +487,12 @@ int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); +/* buspirate_spi.c */ +int buspirate_spi_init(void); +int buspirate_spi_shutdown(void); +int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); + /* flashrom.c */ extern char *programmer_param; extern int verbose; @@ -527,6 +536,9 @@ #if DUMMY_SUPPORT == 1 SPI_CONTROLLER_DUMMY, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + SPI_CONTROLLER_BUSPIRATE, +#endif SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-11-23 19:20:11 UTC (rev 771) +++ trunk/flashrom.c 2009-11-24 00:20:03 UTC (rev 772) @@ -204,6 +204,25 @@ }, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + { + .name = "buspiratespi", + .init = buspirate_spi_init, + .shutdown = buspirate_spi_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = noop_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = noop_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-11-23 19:20:11 UTC (rev 771) +++ trunk/spi.c 2009-11-24 00:20:03 UTC (rev 772) @@ -100,6 +100,15 @@ }, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + { /* SPI_CONTROLLER_BUSPIRATE */ + .command = buspirate_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = buspirate_spi_read, + .write_256 = spi_chip_write_1, + }, +#endif + {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ }; Modified: trunk/spi.h =================================================================== --- trunk/spi.h 2009-11-23 19:20:11 UTC (rev 771) +++ trunk/spi.h 2009-11-24 00:20:03 UTC (rev 772) @@ -106,6 +106,7 @@ #define JEDEC_BYTE_PROGRAM_INSIZE 0x00 /* Error codes */ +#define SPI_GENERIC_ERROR -1 #define SPI_INVALID_OPCODE -2 #define SPI_INVALID_ADDRESS -3 #define SPI_INVALID_LENGTH -4 [View Less]

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Re: [flashrom] flash erase failure
by Adrian Glaubitz 23 Nov '09

23 Nov '09

Hi, On Mon, Nov 23, 2009 at 10:52 PM, Thao Hoang <thao_hoang(a)yahoo.com> wrote: > > Thanks Adrian! I appreciate the advice and insight. You're welcome, again. > I was not able to run superiotool because it wasn't install on my system, however I did run the other two. > See attachment. If you really need me to run superiotool, I can download it and run it. > Yes, please install it. It would be nice to have a full output of: lspci -nnvvvxx superiotool -dV … [View More]

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Re: [flashrom] flash erase failure
by Adrian Glaubitz 23 Nov '09

23 Nov '09

Hi, On Mon, Nov 23, 2009 at 10:13 PM, Thao Hoang <thao_hoang(a)yahoo.com> wrote: > > Adrian- > > Sorry to bother you. Don't worry, you don't bother me at all. If you did, I wouldn't be here to answer ;). > If you can force a read to a similiar chip, can you force a write to using a similar chip. Something like ./flashrom -f -w (filename) -c (chipname) ?? If not, what does forcing a read tell me? I used my board to force a read and several chipname … [View More]

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Re: [flashrom] flash erase failure
by Adrian Glaubitz 23 Nov '09

23 Nov '09

Hi Thao, On Mon, Nov 23, 2009 at 9:12 PM, Thao Hoang <thao_hoang(a)yahoo.com> wrote: > > Thanks Adrian for getting back to me. Here is my motherboard information: > http://www.ibase.com.tw/2009/MB899.html#features > Good, now we know what mainboard you are using ;). > I tried to flash the board with the original backup just to make sure it works. I also did a verify and a read to make sure there wasn't a problem with the bios image so I know nothing got erase.… [View More]

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[PATCH] Move serial handling from serprog.c to serial.c
by Carl-Daniel Hailfinger 23 Nov '09

23 Nov '09

Move serial handling from serprog.c to serial.c. This is the first step in enabling platform independent serprog and it also allows other drivers to use serial port functionality without requiring serprog. Pure code move, no code changed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-serprog_serial_factorout/flash.h =================================================================== --- flashrom-serprog_serial_factorout/flash.h (Revision … [View More]768) +++ flashrom-serprog_serial_factorout/flash.h (Arbeitskopie) @@ -736,8 +736,11 @@ uint8_t serprog_chip_readb(const chipaddr addr); void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void serprog_delay(int delay); + +/* serial.c */ void sp_flush_incoming(void); int sp_openserport(char *dev, unsigned int baud); +void __attribute__((noreturn)) sp_die(char *msg); extern int sp_fd; #endif /* !__FLASH_H__ */ Index: flashrom-serprog_serial_factorout/serial.c =================================================================== --- flashrom-serprog_serial_factorout/serial.c (Revision 0) +++ flashrom-serprog_serial_factorout/serial.c (Revision 0) @@ -0,0 +1,142 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Urja Rannikko <urjaman(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdio.h> +#include <stdlib.h> +#include <unistd.h> +#include "flash.h" +#include <string.h> +#include <ctype.h> +#include <fcntl.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <errno.h> +#include <inttypes.h> +#include <termios.h> + +int sp_fd; + +void __attribute__((noreturn)) sp_die(char *msg) +{ + perror(msg); + exit(1); +} + +struct baudentry { + int flag; + unsigned int baud; +}; + +/* I'd like if the C preprocessor could have directives in macros */ +#define BAUDENTRY(baud) { B##baud, baud }, +static const struct baudentry sp_baudtable[] = { + BAUDENTRY(9600) + BAUDENTRY(19200) + BAUDENTRY(38400) + BAUDENTRY(57600) + BAUDENTRY(115200) +#ifdef B230400 + BAUDENTRY(230400) +#endif +#ifdef B460800 + BAUDENTRY(460800) +#endif +#ifdef B500000 + BAUDENTRY(500000) +#endif +#ifdef B576000 + BAUDENTRY(576000) +#endif +#ifdef B921600 + BAUDENTRY(921600) +#endif +#ifdef B1000000 + BAUDENTRY(1000000) +#endif +#ifdef B1152000 + BAUDENTRY(1152000) +#endif +#ifdef B1500000 + BAUDENTRY(1500000) +#endif +#ifdef B2000000 + BAUDENTRY(2000000) +#endif +#ifdef B2500000 + BAUDENTRY(2500000) +#endif +#ifdef B3000000 + BAUDENTRY(3000000) +#endif +#ifdef B3500000 + BAUDENTRY(3500000) +#endif +#ifdef B4000000 + BAUDENTRY(4000000) +#endif + {0, 0} /* Terminator */ +}; + +int sp_openserport(char *dev, unsigned int baud) +{ + struct termios options; + int fd, i; + fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); + if (fd < 0) + sp_die("Error: cannot open serial port"); + fcntl(fd, F_SETFL, 0); + tcgetattr(fd, &options); + for (i = 0;; i++) { + if (sp_baudtable[i].baud == 0) { + close(fd); + fprintf(stderr, + "Error: cannot configure for baudrate %d\n", + baud); + exit(1); + } + if (sp_baudtable[i].baud == baud) { + cfsetispeed(&options, sp_baudtable[i].flag); + cfsetospeed(&options, sp_baudtable[i].flag); + break; + } + } + options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); + options.c_cflag |= (CS8 | CLOCAL | CREAD); + options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); + options.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); + options.c_oflag &= ~OPOST; + tcsetattr(fd, TCSANOW, &options); + return fd; +} + +void sp_flush_incoming(void) +{ + int i; + for (i=0;i<100;i++) { /* In case the device doesnt do EAGAIN, just read 0 */ + unsigned char flush[16]; + ssize_t rv; + rv = read(sp_fd, flush, sizeof(flush)); + if ((rv == -1) && (errno == EAGAIN)) + break; + if (rv == -1) + sp_die("flush read"); + } + return; +} Index: flashrom-serprog_serial_factorout/serprog.c =================================================================== --- flashrom-serprog_serial_factorout/serprog.c (Revision 768) +++ flashrom-serprog_serial_factorout/serprog.c (Arbeitskopie) @@ -61,8 +61,6 @@ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ -int sp_fd; - static uint16_t sp_device_serbuf_size = 16; static uint16_t sp_device_opbuf_size = 300; /* Bitmap of supported commands */ @@ -95,12 +93,6 @@ whether the command is supported before doing it */ static int sp_check_avail_automatic = 0; -static void __attribute__((noreturn)) sp_die(char *msg) -{ - perror(msg); - exit(1); -} - static int sp_opensocket(char *ip, unsigned int port) { int flag = 1; @@ -130,108 +122,6 @@ return sock; } -struct baudentry { - int flag; - unsigned int baud; -}; - -/* I'd like if the C preprocessor could have directives in macros */ -#define BAUDENTRY(baud) { B##baud, baud }, -static const struct baudentry sp_baudtable[] = { - BAUDENTRY(9600) - BAUDENTRY(19200) - BAUDENTRY(38400) - BAUDENTRY(57600) - BAUDENTRY(115200) -#ifdef B230400 - BAUDENTRY(230400) -#endif -#ifdef B460800 - BAUDENTRY(460800) -#endif -#ifdef B500000 - BAUDENTRY(500000) -#endif -#ifdef B576000 - BAUDENTRY(576000) -#endif -#ifdef B921600 - BAUDENTRY(921600) -#endif -#ifdef B1000000 - BAUDENTRY(1000000) -#endif -#ifdef B1152000 - BAUDENTRY(1152000) -#endif -#ifdef B1500000 - BAUDENTRY(1500000) -#endif -#ifdef B2000000 - BAUDENTRY(2000000) -#endif -#ifdef B2500000 - BAUDENTRY(2500000) -#endif -#ifdef B3000000 - BAUDENTRY(3000000) -#endif -#ifdef B3500000 - BAUDENTRY(3500000) -#endif -#ifdef B4000000 - BAUDENTRY(4000000) -#endif - {0, 0} /* Terminator */ -}; - -int sp_openserport(char *dev, unsigned int baud) -{ - struct termios options; - int fd, i; - fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); - if (fd < 0) - sp_die("Error: cannot open serial port"); - fcntl(fd, F_SETFL, 0); - tcgetattr(fd, &options); - for (i = 0;; i++) { - if (sp_baudtable[i].baud == 0) { - close(fd); - fprintf(stderr, - "Error: cannot configure for baudrate %d\n", - baud); - exit(1); - } - if (sp_baudtable[i].baud == baud) { - cfsetispeed(&options, sp_baudtable[i].flag); - cfsetospeed(&options, sp_baudtable[i].flag); - break; - } - } - options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); - options.c_cflag |= (CS8 | CLOCAL | CREAD); - options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); - options.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); - options.c_oflag &= ~OPOST; - tcsetattr(fd, TCSANOW, &options); - return fd; -} - -void sp_flush_incoming(void) -{ - int i; - for (i=0;i<100;i++) { /* In case the device doesnt do EAGAIN, just read 0 */ - unsigned char flush[16]; - ssize_t rv; - rv = read(sp_fd, flush, sizeof(flush)); - if ((rv == -1) && (errno == EAGAIN)) - break; - if (rv == -1) - sp_die("flush read"); - } - return; -} - static int sp_sync_read_timeout(int loops) { int i; Index: flashrom-serprog_serial_factorout/Makefile =================================================================== --- flashrom-serprog_serial_factorout/Makefile (Revision 768) +++ flashrom-serprog_serial_factorout/Makefile (Arbeitskopie) @@ -138,6 +138,10 @@ OBJS += drkaiser.o endif +ifeq ($(CONFIG_SERPROG), yes) +OBJS += serial.o +endif + ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' OBJS += print_wiki.o -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers." [View Less]

2 2

[commit] r771 - trunk
by svn＠flashrom.org 23 Nov '09

23 Nov '09

Author: hailfinger Date: 2009-11-23 20:20:11 +0100 (Mon, 23 Nov 2009) New Revision: 771 Added: trunk/serial.c Modified: trunk/Makefile trunk/flash.h trunk/serprog.c Log: Move serial handling from serprog.c to serial.c. This is the first step in enabling platform independent serprog and it also allows other drivers to use serial port functionality without requiring serprog. Pure code move, no code changed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.… [View More]net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-11-23 12:55:31 UTC (rev 770) +++ trunk/Makefile 2009-11-23 19:20:11 UTC (rev 771) @@ -138,6 +138,10 @@ OBJS += drkaiser.o endif +ifeq ($(CONFIG_SERPROG), yes) +OBJS += serial.o +endif + ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' OBJS += print_wiki.o Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-23 12:55:31 UTC (rev 770) +++ trunk/flash.h 2009-11-23 19:20:11 UTC (rev 771) @@ -736,8 +736,11 @@ uint8_t serprog_chip_readb(const chipaddr addr); void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void serprog_delay(int delay); + +/* serial.c */ void sp_flush_incoming(void); int sp_openserport(char *dev, unsigned int baud); +void __attribute__((noreturn)) sp_die(char *msg); extern int sp_fd; #endif /* !__FLASH_H__ */ Added: trunk/serial.c =================================================================== --- trunk/serial.c (rev 0) +++ trunk/serial.c 2009-11-23 19:20:11 UTC (rev 771) @@ -0,0 +1,142 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Urja Rannikko <urjaman(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdio.h> +#include <stdlib.h> +#include <unistd.h> +#include "flash.h" +#include <string.h> +#include <ctype.h> +#include <fcntl.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <errno.h> +#include <inttypes.h> +#include <termios.h> + +int sp_fd; + +void __attribute__((noreturn)) sp_die(char *msg) +{ + perror(msg); + exit(1); +} + +struct baudentry { + int flag; + unsigned int baud; +}; + +/* I'd like if the C preprocessor could have directives in macros */ +#define BAUDENTRY(baud) { B##baud, baud }, +static const struct baudentry sp_baudtable[] = { + BAUDENTRY(9600) + BAUDENTRY(19200) + BAUDENTRY(38400) + BAUDENTRY(57600) + BAUDENTRY(115200) +#ifdef B230400 + BAUDENTRY(230400) +#endif +#ifdef B460800 + BAUDENTRY(460800) +#endif +#ifdef B500000 + BAUDENTRY(500000) +#endif +#ifdef B576000 + BAUDENTRY(576000) +#endif +#ifdef B921600 + BAUDENTRY(921600) +#endif +#ifdef B1000000 + BAUDENTRY(1000000) +#endif +#ifdef B1152000 + BAUDENTRY(1152000) +#endif +#ifdef B1500000 + BAUDENTRY(1500000) +#endif +#ifdef B2000000 + BAUDENTRY(2000000) +#endif +#ifdef B2500000 + BAUDENTRY(2500000) +#endif +#ifdef B3000000 + BAUDENTRY(3000000) +#endif +#ifdef B3500000 + BAUDENTRY(3500000) +#endif +#ifdef B4000000 + BAUDENTRY(4000000) +#endif + {0, 0} /* Terminator */ +}; + +int sp_openserport(char *dev, unsigned int baud) +{ + struct termios options; + int fd, i; + fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); + if (fd < 0) + sp_die("Error: cannot open serial port"); + fcntl(fd, F_SETFL, 0); + tcgetattr(fd, &options); + for (i = 0;; i++) { + if (sp_baudtable[i].baud == 0) { + close(fd); + fprintf(stderr, + "Error: cannot configure for baudrate %d\n", + baud); + exit(1); + } + if (sp_baudtable[i].baud == baud) { + cfsetispeed(&options, sp_baudtable[i].flag); + cfsetospeed(&options, sp_baudtable[i].flag); + break; + } + } + options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); + options.c_cflag |= (CS8 | CLOCAL | CREAD); + options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); + options.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); + options.c_oflag &= ~OPOST; + tcsetattr(fd, TCSANOW, &options); + return fd; +} + +void sp_flush_incoming(void) +{ + int i; + for (i=0;i<100;i++) { /* In case the device doesnt do EAGAIN, just read 0 */ + unsigned char flush[16]; + ssize_t rv; + rv = read(sp_fd, flush, sizeof(flush)); + if ((rv == -1) && (errno == EAGAIN)) + break; + if (rv == -1) + sp_die("flush read"); + } + return; +} Modified: trunk/serprog.c =================================================================== --- trunk/serprog.c 2009-11-23 12:55:31 UTC (rev 770) +++ trunk/serprog.c 2009-11-23 19:20:11 UTC (rev 771) @@ -61,8 +61,6 @@ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ -int sp_fd; - static uint16_t sp_device_serbuf_size = 16; static uint16_t sp_device_opbuf_size = 300; /* Bitmap of supported commands */ @@ -95,12 +93,6 @@ whether the command is supported before doing it */ static int sp_check_avail_automatic = 0; -static void __attribute__((noreturn)) sp_die(char *msg) -{ - perror(msg); - exit(1); -} - static int sp_opensocket(char *ip, unsigned int port) { int flag = 1; @@ -130,108 +122,6 @@ return sock; } -struct baudentry { - int flag; - unsigned int baud; -}; - -/* I'd like if the C preprocessor could have directives in macros */ -#define BAUDENTRY(baud) { B##baud, baud }, -static const struct baudentry sp_baudtable[] = { - BAUDENTRY(9600) - BAUDENTRY(19200) - BAUDENTRY(38400) - BAUDENTRY(57600) - BAUDENTRY(115200) -#ifdef B230400 - BAUDENTRY(230400) -#endif -#ifdef B460800 - BAUDENTRY(460800) -#endif -#ifdef B500000 - BAUDENTRY(500000) -#endif -#ifdef B576000 - BAUDENTRY(576000) -#endif -#ifdef B921600 - BAUDENTRY(921600) -#endif -#ifdef B1000000 - BAUDENTRY(1000000) -#endif -#ifdef B1152000 - BAUDENTRY(1152000) -#endif -#ifdef B1500000 - BAUDENTRY(1500000) -#endif -#ifdef B2000000 - BAUDENTRY(2000000) -#endif -#ifdef B2500000 - BAUDENTRY(2500000) -#endif -#ifdef B3000000 - BAUDENTRY(3000000) -#endif -#ifdef B3500000 - BAUDENTRY(3500000) -#endif -#ifdef B4000000 - BAUDENTRY(4000000) -#endif - {0, 0} /* Terminator */ -}; - -int sp_openserport(char *dev, unsigned int baud) -{ - struct termios options; - int fd, i; - fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); - if (fd < 0) - sp_die("Error: cannot open serial port"); - fcntl(fd, F_SETFL, 0); - tcgetattr(fd, &options); - for (i = 0;; i++) { - if (sp_baudtable[i].baud == 0) { - close(fd); - fprintf(stderr, - "Error: cannot configure for baudrate %d\n", - baud); - exit(1); - } - if (sp_baudtable[i].baud == baud) { - cfsetispeed(&options, sp_baudtable[i].flag); - cfsetospeed(&options, sp_baudtable[i].flag); - break; - } - } - options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); - options.c_cflag |= (CS8 | CLOCAL | CREAD); - options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); - options.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); - options.c_oflag &= ~OPOST; - tcsetattr(fd, TCSANOW, &options); - return fd; -} - -void sp_flush_incoming(void) -{ - int i; - for (i=0;i<100;i++) { /* In case the device doesnt do EAGAIN, just read 0 */ - unsigned char flush[16]; - ssize_t rv; - rv = read(sp_fd, flush, sizeof(flush)); - if ((rv == -1) && (errno == EAGAIN)) - break; - if (rv == -1) - sp_die("flush read"); - } - return; -} - static int sp_sync_read_timeout(int loops) { int i; [View Less]

1 0

[PATCH] Factor out lock functions (print, unlock, lock)
by Carl-Daniel Hailfinger 23 Nov '09

23 Nov '09

Chip locking has three actions you can do with it: - Print/read the current locking status - Lock the chip - Unlock the chip. Currently, the code usually does lock printing inside the probe function, and unlocking somewhere in the erase or write function. Only very few chips reactivate the lock after write/erase. Since many chips have identical probe/write/erase functions, but totally different locking, many such functions have been duplicated needlessly. With this patch, it is possible to … [View More]call the chip-specific locking functions from probe/write/erase functions and unify lots of code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-lock_refactor/flash.h =================================================================== --- flashrom-lock_refactor/flash.h (Revision 750) +++ flashrom-lock_refactor/flash.h (Arbeitskopie) @@ -175,6 +175,12 @@ CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI, }; +enum lockaction { + lock_print, + lock_disable, + lock_enable, +}; + /* * How many different contiguous runs of erase blocks with one size each do * we have for a given erase function? @@ -229,6 +235,7 @@ int (*write) (struct flashchip *flash, uint8_t *buf); int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len); + int (*lock) (struct flashchip *flash, enum lockaction action); /* Some flash devices have an additional register space. */ chipaddr virtual_memory; @@ -551,6 +558,7 @@ int spi_send_multicommand(struct spi_command *cmds); int spi_write_enable(void); int spi_write_disable(void); +int spi_lock(struct flashchip *flash, enum lockaction action); int spi_chip_erase_60(struct flashchip *flash); int spi_chip_erase_c7(struct flashchip *flash); int spi_chip_erase_60_c7(struct flashchip *flash); Index: flashrom-lock_refactor/flashchips.c =================================================================== --- flashrom-lock_refactor/flashchips.c (Revision 750) +++ flashrom-lock_refactor/flashchips.c (Arbeitskopie) @@ -211,6 +211,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -227,6 +228,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -243,6 +245,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -259,6 +262,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -275,6 +279,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -291,6 +296,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -307,6 +313,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -323,6 +330,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -339,6 +347,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -355,6 +364,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -371,6 +381,7 @@ .erase = NULL, .write = NULL /* Incompatible Page write */, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -387,6 +398,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -403,6 +415,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -419,6 +432,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, /*The AT26DF321 has the same ID as the AT25DF321. */ @@ -436,6 +450,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, },*/ { @@ -452,6 +467,7 @@ .erase = spi_chip_erase_60_c7, .write = NULL /* Incompatible Page write */, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -468,7 +484,6 @@ .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, - }, { @@ -533,6 +548,7 @@ .erase = NULL, .write = NULL /* Incompatible Page write */, .read = NULL /* Incompatible read */, + .lock = spi_lock, }, { @@ -549,6 +565,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = spi_lock, }, { @@ -565,6 +582,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = spi_lock, }, { @@ -581,6 +599,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = spi_lock, }, { @@ -597,6 +616,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = spi_lock, }, { @@ -613,6 +633,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = spi_lock, }, { @@ -629,6 +650,7 @@ .erase = NULL, .write = NULL, .read = NULL /* Incompatible read */, + .lock = spi_lock, }, { @@ -645,6 +667,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = spi_lock, }, { @@ -661,6 +684,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = spi_lock, }, { @@ -725,6 +749,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -821,6 +846,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -837,6 +863,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -853,6 +880,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -869,6 +897,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -885,6 +914,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -901,6 +931,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -917,6 +948,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -933,6 +965,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -949,6 +982,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -965,6 +999,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -981,6 +1016,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -997,6 +1033,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1013,6 +1050,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1029,6 +1067,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1045,6 +1084,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1061,6 +1101,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1256,6 +1297,7 @@ }, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1288,6 +1330,7 @@ }, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1323,6 +1366,7 @@ }, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1358,6 +1402,7 @@ }, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1393,6 +1438,7 @@ }, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1428,6 +1474,7 @@ }, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1444,6 +1491,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1460,6 +1508,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1476,6 +1525,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1492,6 +1542,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1508,6 +1559,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1604,6 +1656,7 @@ .erase = spi_chip_erase_d8, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1620,6 +1673,7 @@ .erase = spi_chip_erase_d8, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1636,6 +1690,7 @@ .erase = spi_chip_erase_d8, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1652,6 +1707,7 @@ .erase = spi_chip_erase_d8, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1668,6 +1724,7 @@ .erase = spi_chip_erase_d8, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1684,6 +1741,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1700,6 +1758,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1716,6 +1775,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1732,6 +1792,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1748,6 +1809,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1764,6 +1826,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1876,6 +1939,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1892,6 +1956,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_1, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1908,6 +1973,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_1, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1924,6 +1990,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_1, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1940,6 +2007,7 @@ .erase = spi_chip_erase_60, .write = spi_chip_write_1, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1956,6 +2024,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_1, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -1972,6 +2041,7 @@ .erase = spi_chip_erase_60_c7, .write = spi_chip_write_1, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2420,6 +2490,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, /* The ST M25P05 is a bit of a problem. It has the same ID as the @@ -2441,6 +2512,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2457,6 +2529,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, /* The ST M25P10 has the same problem as the M25P05. */ @@ -2474,6 +2547,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2490,6 +2564,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2506,6 +2581,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2522,6 +2598,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2538,6 +2615,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2554,6 +2632,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2570,6 +2649,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2586,6 +2666,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2602,6 +2683,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2954,6 +3036,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2970,6 +3053,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -2986,6 +3070,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -3002,6 +3087,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -3018,6 +3104,7 @@ .erase = spi_chip_erase_c7, .write = spi_chip_write_256, .read = spi_chip_read, + .lock = spi_lock, }, { @@ -3258,6 +3345,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = NULL, }, { @@ -3274,6 +3362,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = NULL, }, { @@ -3290,6 +3379,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = NULL, }, { @@ -3306,6 +3396,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = NULL, }, { @@ -3322,6 +3413,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = NULL, }, { @@ -3338,6 +3430,7 @@ .erase = NULL, .write = NULL, .read = NULL, + .lock = NULL, }, { NULL } Index: flashrom-lock_refactor/spi.c =================================================================== --- flashrom-lock_refactor/spi.c (Revision 750) +++ flashrom-lock_refactor/spi.c (Arbeitskopie) @@ -30,8 +30,6 @@ enum spi_controller spi_controller = SPI_CONTROLLER_NONE; void *spibar = NULL; -void spi_prettyprint_status_register(struct flashchip *flash); - const struct spi_programmer spi_programmer[] = { { /* SPI_CONTROLLER_NONE */ .command = NULL, @@ -268,11 +266,6 @@ printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; } @@ -327,11 +320,6 @@ printf_debug("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; } @@ -363,10 +351,6 @@ if (id2 != flash->model_id) return 0; - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); return 1; } @@ -490,6 +474,25 @@ } } +int spi_lock(struct flashchip *flash, enum lockaction action) +{ + switch (action) { + case lock_print: + spi_prettyprint_status_register(flash); + return 0; + break; + case lock_disable: + return spi_disable_blockprotect(); + break; + case lock_enable: + fprintf(stderr, "lock enable not supported.\n"); + return 1; + break; + default: /* Work around gcc. It can't see we enumerated all values. */ + return 1; + } +} + int spi_chip_erase_60(struct flashchip *flash) { int result; Index: flashrom-lock_refactor/flashrom.c =================================================================== --- flashrom-lock_refactor/flashrom.c (Revision 750) +++ flashrom-lock_refactor/flashrom.c (Arbeitskopie) @@ -448,6 +448,9 @@ printf("Found chip \"%s %s\" (%d KB, %s) at physical address 0x%lx.\n", flash->vendor, flash->name, flash->total_size, flashbuses_to_text(flash->bustype), base); + /* Print the locking status. */ + if (flash->lock) + flash->lock(flash, lock_print); return flash; } -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers." [View Less]

3 7

[PATCH] Generate a test pattern
by Carl-Daniel Hailfinger 23 Nov '09

23 Nov '09

Add the ability to generate test patterns for write testing. This will be useful once we create a --test function for flashrom. The test patterns make it easy to find skipped and duplicated bytes, are human readable, and have block numbers to detect aliasing or wraparounds. Current size limit is 16 MByte, but since neither LPC nor FWH nor SPI chips exist with bigger sizes, this is reasonably safe. If you ignore the block numbers, test patterns look like this: Pattern 0 is 05 15 25 35 45 55 65 … [View More]

2 3

[commit] r770 - trunk
by svn＠flashrom.org 23 Nov '09

23 Nov '09

Author: hailfinger Date: 2009-11-23 13:55:31 +0100 (Mon, 23 Nov 2009) New Revision: 770 Modified: trunk/flashrom.c Log: Add the ability to generate test patterns for write testing. This will be useful once we create a --test function for flashrom. The test patterns make it easy to find skipped and duplicated bytes, are human readable, and the first 8 of them have block numbers to detect aliasing or wraparounds. Current size limit for aliasing detection is 16 MByte, but since neither LPC … [View More]nor FWH nor SPI chips exist with bigger sizes, this is reasonably safe. Detailed documentation is available as source code comments above the new function generate_testpattern(). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Maciej Pijanka <maciej.pijanka(a)gmail.com> Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-11-22 01:33:40 UTC (rev 769) +++ trunk/flashrom.c 2009-11-23 12:55:31 UTC (rev 770) @@ -407,6 +407,142 @@ return ret; } +/* This function generates various test patterns useful for testing controller + * and chip communication as well as chip behaviour. + * + * If a byte can be written multiple times, each time keeping 0-bits at 0 + * and changing 1-bits to 0 if the new value for that bit is 0, the effect + * is essentially an AND operation. That's also the reason why this function + * provides the result of AND between various patterns. + * + * Below is a list of patterns (and their block length). + * Pattern 0 is 05 15 25 35 45 55 65 75 85 95 a5 b5 c5 d5 e5 f5 (16 Bytes) + * Pattern 1 is 0a 1a 2a 3a 4a 5a 6a 7a 8a 9a aa ba ca da ea fa (16 Bytes) + * Pattern 2 is 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f (16 Bytes) + * Pattern 3 is a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af (16 Bytes) + * Pattern 4 is 00 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 (16 Bytes) + * Pattern 5 is 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f (16 Bytes) + * Pattern 6 is 00 (1 Byte) + * Pattern 7 is ff (1 Byte) + * Patterns 0-7 have a big-endian block number in the last 2 bytes of each 256 + * byte block. + * + * Pattern 8 is 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11... (256 B) + * Pattern 9 is ff fe fd fc fb fa f9 f8 f7 f6 f5 f4 f3 f2 f1 f0 ef ee... (256 B) + * Pattern 10 is 00 00 00 01 00 02 00 03 00 04... (128 kB big-endian counter) + * Pattern 11 is ff ff ff fe ff fd ff fc ff fb... (128 kB big-endian downwards) + * Pattern 12 is 00 (1 Byte) + * Pattern 13 is ff (1 Byte) + * Patterns 8-13 have no block number. + * + * Patterns 0-3 are created to detect and efficiently diagnose communication + * slips like missed bits or bytes and their repetitive nature gives good visual + * cues to the person inspecting the results. In addition, the following holds: + * AND Pattern 0/1 == Pattern 4 + * AND Pattern 2/3 == Pattern 5 + * AND Pattern 0/1/2/3 == AND Pattern 4/5 == Pattern 6 + * A weakness of pattern 0-5 is the inability to detect swaps/copies between + * any two 16-byte blocks except for the last 16-byte block in a 256-byte bloc. + * They work perfectly for detecting any swaps/aliasing of blocks >= 256 bytes. + * 0x5 and 0xa were picked because they are 0101 and 1010 binary. + * Patterns 8-9 are best for detecting swaps/aliasing of blocks < 256 bytes. + * Besides that, they provide for bit testing of the last two bytes of every + * 256 byte block which contains the block number for patterns 0-6. + * Patterns 10-11 are special purpose for detecting subblock aliasing with + * block sizes >256 bytes (some Dataflash chips etc.) + * AND Pattern 8/9 == Pattern 12 + * AND Pattern 10/11 == Pattern 12 + * Pattern 13 is the completely erased state. + * None of the patterns can detect aliasing at boundaries which are a multiple + * of 16 MBytes (but such chips do not exist anyway for Parallel/LPC/FWH/SPI). + */ +int generate_testpattern(uint8_t *buf, uint32_t size, int variant) +{ + int i; + + if (!buf) { + fprintf(stderr, "Invalid buffer!\n"); + return 1; + } + + switch (variant) { + case 0: + for (i = 0; i < size; i++) + buf[i] = (i & 0xf) << 4 | 0x5; + break; + case 1: + for (i = 0; i < size; i++) + buf[i] = (i & 0xf) << 4 | 0xa; + break; + case 2: + for (i = 0; i < size; i++) + buf[i] = 0x50 | (i & 0xf); + break; + case 3: + for (i = 0; i < size; i++) + buf[i] = 0xa0 | (i & 0xf); + break; + case 4: + for (i = 0; i < size; i++) + buf[i] = (i & 0xf) << 4; + break; + case 5: + for (i = 0; i < size; i++) + buf[i] = i & 0xf; + break; + case 6: + memset(buf, 0x00, size); + break; + case 7: + memset(buf, 0xff, size); + break; + case 8: + for (i = 0; i < size; i++) + buf[i] = i & 0xff; + break; + case 9: + for (i = 0; i < size; i++) + buf[i] = ~(i & 0xff); + break; + case 10: + for (i = 0; i < size % 2; i++) { + buf[i * 2] = (i >> 8) & 0xff; + buf[i * 2 + 1] = i & 0xff; + } + if (size & 0x1) + buf[i * 2] = (i >> 8) & 0xff; + break; + case 11: + for (i = 0; i < size % 2; i++) { + buf[i * 2] = ~((i >> 8) & 0xff); + buf[i * 2 + 1] = ~(i & 0xff); + } + if (size & 0x1) + buf[i * 2] = ~((i >> 8) & 0xff); + break; + case 12: + memset(buf, 0x00, size); + break; + case 13: + memset(buf, 0xff, size); + break; + } + + if ((variant >= 0) && (variant <= 7)) { + /* Write block number in the last two bytes of each 256-byte + * block, big endian for easier reading of the hexdump. + * Note that this wraps around for chips larger than 2^24 bytes + * (16 MB). + */ + for (i = 0; i < size / 256; i++) { + buf[i * 256 + 254] = (i >> 8) & 0xff; + buf[i * 256 + 255] = i & 0xff; + } + } + + return 0; +} + int check_max_decode(enum chipbustype buses, uint32_t size) { int limitexceeded = 0; [View Less]

1 0

hp pavilion a1320n failed flash (from moatsad)
by Douglas Twyman 22 Nov '09

22 Nov '09

hp pavilion a1320n media center RC410-M (Asterope3) motherboard PC: http://h10025.www1.hp.com/ewfrf/wc/product?lc=en&dlc=en&cc=us&product=18180… motherboard: http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&dlc=en&cc=us&docname=c007… Bios: http://h10025.www1.hp.com/ewfrf/wc/softwareDownloadIndex?softwareitem=pv-51… thank you doug twyman moatsad (irc)

1 0

[PATCH] FT2232 error checking
by Carl-Daniel Hailfinger 22 Nov '09

22 Nov '09

Pretty much everybody who used the FT2232 SPI driver in flashrom had problems with incorrect reads from time to time. One reason was that the hardware is pretty timing sensitive even for reads. The other reason was that the code silently ignored errors. This patch doesn't add any error recovery, but it will emit error messages if FT2232 communication goes wrong. That allows us to track down errors without investing hours in driver debugging. Jeremy, I'd be very interested in the results of an … [View More]unmodified flashrom with only this patch applied (read is sufficient). In theory, you should either get a working read or loads of error messages about send_buf/read_buf. If you get no error messages and the image read is still wrong, libftdi doesn't tell us about the problem. Oh, and please try in verbose and normal mode. Maybe there's a difference. This patch will show up at http://patchwork.coreboot.org/project/flashrom/list/ in a few minutes. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-ft2232_errorcheck/ft2232_spi.c =================================================================== --- flashrom-ft2232_errorcheck/ft2232_spi.c (Revision 756) +++ flashrom-ft2232_errorcheck/ft2232_spi.c (Arbeitskopie) @@ -198,7 +198,8 @@ { struct ftdi_context *ftdic = &ftdic_context; static unsigned char *buf = NULL; - int i = 0, ret = 0; + /* failed is special. We use bitwise ops, but it is essentially bool. */ + int i = 0, ret = 0, failed = 0; if (writecnt > 65536 || readcnt > 65536) return SPI_INVALID_LENGTH; @@ -237,6 +238,11 @@ buf[i++] = (readcnt - 1) & 0xff; buf[i++] = ((readcnt - 1) >> 8) & 0xff; ret = send_buf(ftdic, buf, i); + failed = ret; + /* We can't abort here, we still have to deassert CS#. */ + if (ret) + fprintf(stderr, "send_buf failed before read: %i\n", + ret); i = 0; if (ret == 0) { /* @@ -245,6 +251,10 @@ * command. We may be scheduled out etc. */ ret = get_buf(ftdic, readarr, readcnt); + failed |= ret; + /* We can't abort here either. */ + if (ret) + fprintf(stderr, "get_buf failed: %i\n", ret); } } @@ -252,10 +262,12 @@ buf[i++] = SET_BITS_LOW; buf[i++] = CS_BIT; buf[i++] = 0x0b; - if (send_buf(ftdic, buf, i)) - return -1; + ret = send_buf(ftdic, buf, i); + failed |= ret; + if (ret) + fprintf(stderr, "send_buf failed at end: %i\n", ret); - return ret; + return failed ? -1 : 0; } int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers." [View Less]

3 5

[commit] r769 - trunk
by svn＠flashrom.org 22 Nov '09

22 Nov '09

Author: hailfinger Date: 2009-11-22 02:33:40 +0100 (Sun, 22 Nov 2009) New Revision: 769 Modified: trunk/ft2232_spi.c Log: Pretty much everybody who used the FT2232 SPI driver in flashrom had problems with incorrect reads from time to time. One reason was that the hardware is pretty timing sensitive even for reads. The other reason was that the code silently ignored errors. This patch doesn't add any error recovery, but it will emit error messages if FT2232 communication goes wrong. That … [View More]

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[PATCH] Share serprog serial port code
by Carl-Daniel Hailfinger 21 Nov '09

21 Nov '09

Bus Pirate support needs serial communication. Serprog already has such functionality, so it makes sense to share that. TODO: Factor out serial communication into a separate file, have that code be available even if serprog is not selected and make it portable (it is very Linux-centric right now). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Index: flashrom-serprog_share/flash.h =====================… [View More]

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[commit] r768 - trunk
by svn＠flashrom.org 21 Nov '09

21 Nov '09

Author: hailfinger Date: 2009-11-21 12:02:48 +0100 (Sat, 21 Nov 2009) New Revision: 768 Modified: trunk/flash.h trunk/serprog.c Log: Bus Pirate support needs serial communication. Serprog already has such functionality, so it makes sense to share that. TODO: Factor out serial communication into a separate file, have that code be available even if serprog is not selected and make it portable (it is very Linux-centric right now). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.… [View More]

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[PATCH] Bus Pirate SPI support in flashrom
by Carl-Daniel Hailfinger 21 Nov '09

21 Nov '09

Add Bus Pirate SPI support to flashrom. Untested, should work. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-buspiratespi/flash.h =================================================================== --- flashrom-buspiratespi/flash.h (Revision 767) +++ flashrom-buspiratespi/flash.h (Arbeitskopie) @@ -104,6 +104,9 @@ #if SERPROG_SUPPORT == 1 PROGRAMMER_SERPROG, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + PROGRAMMER_BUSPIRATESPI, +#endif … [View More]PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -484,6 +487,12 @@ int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); +/* buspirate_spi.c */ +int buspirate_spi_init(void); +int buspirate_spi_shutdown(void); +int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); + /* flashrom.c */ extern char *programmer_param; extern int verbose; @@ -527,6 +536,9 @@ #if DUMMY_SUPPORT == 1 SPI_CONTROLLER_DUMMY, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + SPI_CONTROLLER_BUSPIRATE, +#endif SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; @@ -736,5 +748,8 @@ uint8_t serprog_chip_readb(const chipaddr addr); void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void serprog_delay(int delay); +void sp_flush_incoming(void); +int sp_openserport(char *dev, unsigned int baud); +extern int sp_fd; #endif /* !__FLASH_H__ */ Index: flashrom-buspiratespi/buspirate_spi.c =================================================================== --- flashrom-buspiratespi/buspirate_spi.c (Revision 0) +++ flashrom-buspiratespi/buspirate_spi.c (Revision 0) @@ -0,0 +1,317 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdio.h> +#include <stdint.h> +#include <string.h> +#include <stdlib.h> +#include <ctype.h> +#include <fcntl.h> +#include "flash.h" +#include "spi.h" + +int buspirate_serialport_setup(char *dev) +{ + /* 115200bps, 8 databits, no parity, 1 stopbit */ + sp_fd = sp_openserport(dev, 115200); + return 0; +} + +int buspirate_serialport_shutdown(void) +{ + close(sp_fd); + return 0; +} + +int serialport_write(unsigned char *buf, unsigned int writecnt) +{ + int tmp = 0; + + while (tmp != writecnt) { + tmp = write(sp_fd, buf + tmp, writecnt - tmp); + if (tmp == -1) + return 1; + if (!tmp) + printf_debug("Empty write\n"); + } + + return 0; +} + +int serialport_read(unsigned char *buf, unsigned int readcnt) +{ + int tmp = 0; + + while (tmp != readcnt) { + tmp = read(sp_fd, buf + tmp, readcnt - tmp); + if (tmp == -1) + return 1; + if (!tmp) + printf_debug("Empty read\n"); + } + + return 0; +} + +int buspirate_discard_read(void) +{ + int flags; + + printf_debug("%s\n", __func__); + flags = fcntl(sp_fd, F_GETFL); + flags |= O_NONBLOCK; + fcntl(sp_fd, F_SETFL, flags); + sp_flush_incoming(); + flags &= ~O_NONBLOCK; + fcntl(sp_fd, F_SETFL, flags); + + return 0; +} + +#undef FAKE_COMMUNICATION +int buspirate_sendrecv(unsigned char *buf, unsigned int writecnt, unsigned int readcnt) +{ + int i, ret = 0; + + printf_debug("%s: write %i, read %i\n", __func__, writecnt, readcnt); + if (!writecnt && !readcnt) { + fprintf(stderr, "Zero length command!\n"); + return 1; + } + printf_debug("Sending"); + for (i = 0; i < writecnt; i++) + printf_debug(" 0x%02x", buf[i]); +#ifdef FAKE_COMMUNICATION + /* Placate the caller for now. */ + buf[0] = 0x01; + memset(buf + 1, 0xff, readcnt - 1); + ret = 0; +#else + if (writecnt) + ret = serialport_write(buf, writecnt); + if (ret) + return ret; + if (readcnt) + ret = serialport_read(buf, readcnt); + if (ret) + return ret; +#endif + printf_debug(", receiving"); + for (i = 0; i < readcnt; i++) + printf_debug(" 0x%02x", buf[i]); + printf_debug("\n"); + return 0; +} + +int buspirate_spi_init(void) +{ + unsigned char buf[512]; + int ret = 0; + int i; + char *devpos = NULL; + char *dev = NULL; + int devlen; + + if (programmer_param && !strlen(programmer_param)) { + free(programmer_param); + programmer_param = NULL; + } + if (programmer_param) { + devpos = strstr(programmer_param, "dev="); + if (devpos) { + devpos += 4; + devlen = strcspn(devpos, ",:"); + if (devlen) { + dev = malloc(devlen + 1); + if (!dev) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + strncpy(dev, devpos, devlen); + dev[devlen] = '\0'; + } + } + free(programmer_param); + programmer_param = NULL; + } + if (!dev) { + fprintf(stderr, "No serial device given. Use flashrom -p " + "buspiratespi:dev=/dev/ttyUSB0\n"); + return 1; + } + + ret = buspirate_serialport_setup(dev); + if (ret) + return ret; + + /* This is the brute force version, but it should work. */ + for (i = 0; i < 19; i++) { + /* Enter raw bitbang mode */ + buf[0] = 0x00; + /* Send the command, don't read the response. */ + ret = buspirate_sendrecv(buf, 1, 0); + if (ret) + return ret; + /* Read any response and discard it. */ + ret = buspirate_discard_read(); + if (ret) + return ret; + } + /* Enter raw bitbang mode */ + buf[0] = 0x00; + ret = buspirate_sendrecv(buf, 1, 5); + if (ret) + return ret; + if (memcmp(buf, "BBIO", 4)) { + fprintf(stderr, "Entering raw bitbang mode failed!\n"); + return 1; + } + printf_debug("Raw bitbang mode version %c\n", buf[4]); + if (buf[4] != '1') { + fprintf(stderr, "Can't handle raw bitbang mode version %c!\n", + buf[4]); + return 1; + } + /* Enter raw SPI mode */ + buf[0] = 0x01; + ret = buspirate_sendrecv(buf, 1, 4); + if (memcmp(buf, "SPI", 3)) { + fprintf(stderr, "Entering raw SPI mode failed!\n"); + return 1; + } + printf_debug("Raw SPI mode version %c\n", buf[3]); + if (buf[3] != '1') { + fprintf(stderr, "Can't handle raw SPI mode version %c!\n", + buf[3]); + return 1; + } + + /* Initial setup: Enable power, */ + /* De-assert CS# */ + buf[0] = 0x03; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return 1; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error!\n"); + return 1; + } + + buses_supported = CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_BUSPIRATE; + + return 0; +} + +int buspirate_spi_shutdown(void) +{ + unsigned char buf[5]; + int ret = 0; + + /* Exit raw SPI mode (enter raw bitbang mode) */ + buf[0] = 0x00; + ret = buspirate_sendrecv(buf, 1, 5); + if (ret) + return ret; + if (memcmp(buf, "BBIO", 4)) { + fprintf(stderr, "Entering raw bitbang mode failed!\n"); + return 1; + } + printf_debug("Raw bitbang mode version %c\n", buf[4]); + if (buf[4] != '1') { + fprintf(stderr, "Can't handle raw bitbang mode version %c!\n", + buf[4]); + return 1; + } + /* Reset Bus Pirate (return to user terminal) */ + buf[0] = 0x0f; + ret = buspirate_sendrecv(buf, 1, 0); + if (ret) + return ret; + + /* Shut down serial port communication */ + ret = buspirate_serialport_shutdown(); + if (ret) + return ret; + printf_debug("Bus Pirate shutdown completed.\n"); + + return 0; +} + +int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + static unsigned char *buf = NULL; + int i = 0, ret = 0; + + if (writecnt > 16 || readcnt > 16 || (readcnt + writecnt) > 16) + return SPI_INVALID_LENGTH; + + /* +2 is pretty arbitrary. */ + buf = realloc(buf, writecnt + readcnt + 2); + if (!buf) { + fprintf(stderr, "Out of memory!\n"); + exit(1); // -1 + } + + /* Assert CS# */ + buf[i++] = 0x02; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return SPI_GENERIC_ERROR; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error!\n"); + return SPI_GENERIC_ERROR; + } + + i = 0; + buf[i++] = 0x10 | (writecnt + readcnt - 1); + memcpy(buf + i, writearr, writecnt); + i += writecnt; + memset(buf + i, 0, readcnt); + ret = buspirate_sendrecv(buf, i + readcnt, i + readcnt); + if (ret) + return SPI_GENERIC_ERROR; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error!\n"); + return SPI_GENERIC_ERROR; + } + memcpy(readarr, buf + i, readcnt); + + i = 0; + /* De-assert CS# */ + buf[i++] = 0x03; + ret = buspirate_sendrecv(buf, 1, 1); + if (ret) + return SPI_GENERIC_ERROR; + if (buf[0] != 0x01) { + fprintf(stderr, "Protocol error!\n"); + return SPI_GENERIC_ERROR; + } + + return ret; +} + +int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + /* Maximum read length is 12 bytes, use 8 for now. */ + return spi_read_chunked(flash, buf, start, len, 8); +} + +/* We could do 12-byte writes, but for now we use the generic 1-byte code. */ Index: flashrom-buspiratespi/serprog.c =================================================================== --- flashrom-buspiratespi/serprog.c (Revision 767) +++ flashrom-buspiratespi/serprog.c (Arbeitskopie) @@ -61,7 +61,7 @@ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ -static int sp_fd; +int sp_fd; static uint16_t sp_device_serbuf_size = 16; static uint16_t sp_device_opbuf_size = 300; @@ -185,7 +185,7 @@ {0, 0} /* Terminator */ }; -static int sp_openserport(char *dev, unsigned int baud) +int sp_openserport(char *dev, unsigned int baud) { struct termios options; int fd, i; @@ -208,20 +208,16 @@ break; } } - options.c_cflag &= ~PARENB; - options.c_cflag &= ~CSTOPB; - options.c_cflag &= ~CSIZE; - options.c_cflag |= CS8; - options.c_cflag &= ~CRTSCTS; + options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); + options.c_cflag |= (CS8 | CLOCAL | CREAD); options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); options.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); options.c_oflag &= ~OPOST; - options.c_cflag |= (CLOCAL | CREAD); tcsetattr(fd, TCSANOW, &options); return fd; } -static void sp_flush_incoming(void) +void sp_flush_incoming(void) { int i; for (i=0;i<100;i++) { /* In case the device doesnt do EAGAIN, just read 0 */ Index: flashrom-buspiratespi/spi.c =================================================================== --- flashrom-buspiratespi/spi.c (Revision 767) +++ flashrom-buspiratespi/spi.c (Arbeitskopie) @@ -100,6 +100,15 @@ }, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + { /* SPI_CONTROLLER_BUSPIRATE */ + .command = buspirate_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = buspirate_spi_read, + .write_256 = spi_chip_write_1, + }, +#endif + {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ }; Index: flashrom-buspiratespi/Makefile =================================================================== --- flashrom-buspiratespi/Makefile (Revision 767) +++ flashrom-buspiratespi/Makefile (Arbeitskopie) @@ -89,6 +89,9 @@ # Always enable Dr. Kaiser for now. CONFIG_DRKAISER ?= yes +# Always enable Bus Pirate SPI for now. +CONFIG_BUSPIRATESPI ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -138,6 +141,11 @@ OBJS += drkaiser.o endif +ifeq ($(CONFIG_BUSPIRATESPI), yes) +FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' +OBJS += buspirate_spi.o +endif + ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' OBJS += print_wiki.o Index: flashrom-buspiratespi/spi.h =================================================================== --- flashrom-buspiratespi/spi.h (Revision 767) +++ flashrom-buspiratespi/spi.h (Arbeitskopie) @@ -106,6 +106,7 @@ #define JEDEC_BYTE_PROGRAM_INSIZE 0x00 /* Error codes */ +#define SPI_GENERIC_ERROR -1 #define SPI_INVALID_OPCODE -2 #define SPI_INVALID_ADDRESS -3 #define SPI_INVALID_LENGTH -4 Index: flashrom-buspiratespi/flashrom.c =================================================================== --- flashrom-buspiratespi/flashrom.c (Revision 767) +++ flashrom-buspiratespi/flashrom.c (Arbeitskopie) @@ -204,6 +204,25 @@ }, #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + { + .name = "buspiratespi", + .init = buspirate_spi_init, + .shutdown = buspirate_spi_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = noop_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = noop_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers." 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Success: HP Mini 5101 netbook
by David Hendricks 20 Nov '09

20 Nov '09

I'm kicking myself for not getting more verbose output logged when I had the thing in my hands. I did a successful read, and it appears that they hook the firmware EEPROM straight to the southbridge instead of going thru an EC for the Mini :-) Here is a the read output I captured: flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH7M", enabling flash write... WARNING: SPI Configuration Lockdown activated. OK. Calibrating delay loop... OK. Found chip "Macronix MX25L8005" (… [View More]

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Verbose output of lspci, superiotool and flashrom - PC Chips M863 (unsupported)
by Adrian Glaubitz 20 Nov '09

20 Nov '09

Hi, Hi, tested an PC Chips M863, however the chipset was not detected and therefore flashing was not possible. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V. Product Website: <http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryI…> Adrian

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SUCCESS: Asus K8VXSE
by Adrian Glaubitz 20 Nov '09

20 Nov '09

Hello, I successfully flashed a new BIOS version onto an AsRock K8V8XSE. Used flashrom r767. Did not yet reboot the machine because someone is still logged in but since the board verified I suspect it's working fine. Please see the attached logs and mark the board as *supported*. Thanks, Adrian

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FAIL: Gigabyte GA-8IPE1000Pro2, board still intact, couldn't erase
by Adrian Glaubitz 20 Nov '09

20 Nov '09

Hi, I tried flashing an Gigabyte GA-8IPE1000Pro2. Erasing the flash failed, however, the flash is still intact. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V plus the output for the failed flash attempt. Adrian

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[PATCH] Totally generic SPI chip match
by Carl-Daniel Hailfinger 20 Nov '09

20 Nov '09

If a chip is not on the RDID generic vendor list nor on the REMS specific ID list, flashrom will claim that no chip is there. Handle these cases gracefully. flashrom will ignore generic matches if a specific chip was found, so this will have no impact on supported chips, but help a lot for a first quick analysis by the user or developer. The only drawback is that unknown chips may be recognized multiple times until they are added to flashchips.[ch]. Signed-off-by: Carl-Daniel Hailfinger <c-… [View More]d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_totally_generic_probe/flashchips.c =================================================================== --- flashrom-spi_totally_generic_probe/flashchips.c (Revision 664) +++ flashrom-spi_totally_generic_probe/flashchips.c (Arbeitskopie) @@ -3167,5 +3167,32 @@ .read = NULL, }, + { + .vendor = "Generic", + .name = "unknown SPI chip (RDID)", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rdid, + .erase = NULL, + .write = NULL, + }, + { + .vendor = "Generic", + .name = "unknown SPI chip (REMS)", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rems, + .erase = NULL, + .write = NULL, + }, + { NULL } }; Index: flashrom-spi_totally_generic_probe/flashchips.h =================================================================== --- flashrom-spi_totally_generic_probe/flashchips.h (Revision 664) +++ flashrom-spi_totally_generic_probe/flashchips.h (Arbeitskopie) @@ -34,6 +34,7 @@ * SPI parts have 16-bit device IDs if they support RDID. */ +#define GENERIC_MANUF_ID 0xffff /* Check if there is a vendor ID */ #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ Index: flashrom-spi_totally_generic_probe/spi.c =================================================================== --- flashrom-spi_totally_generic_probe/spi.c (Revision 664) +++ flashrom-spi_totally_generic_probe/spi.c (Arbeitskopie) @@ -274,6 +274,11 @@ GENERIC_DEVICE_ID == flash->model_id) return 1; + /* Test if there is any vendor ID. */ + if (GENERIC_MANUF_ID == flash->manufacture_id && + id1 != 0xff) + return 1; + return 0; } @@ -329,6 +334,11 @@ GENERIC_DEVICE_ID == flash->model_id) return 1; + /* Test if there is any vendor ID. */ + if (GENERIC_MANUF_ID == flash->manufacture_id && + id1 != 0xff) + return 1; + return 0; } -- http://www.hailfinger.org/ [View Less]

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[commit] r767 - trunk
by svn＠flashrom.org 20 Nov '09

20 Nov '09

Author: hailfinger Date: 2009-11-20 02:12:45 +0100 (Fri, 20 Nov 2009) New Revision: 767 Modified: trunk/flashchips.c trunk/flashchips.h trunk/spi.c Log: If a chip is not on the RDID generic vendor list nor on the REMS specific ID list, flashrom will claim that no chip is there. Handle these cases gracefully. flashrom will ignore generic matches if a specific chip was found, so this will have no impact on supported chips, but help a lot for a first quick analysis by the user or … [View More]developer. The only drawback is that unknown chips may be recognized multiple times until they are added to flashchips.[ch]. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Marc Jones <marcj303(a)gmail.com> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-11-17 09:57:34 UTC (rev 766) +++ trunk/flashchips.c 2009-11-20 01:12:45 UTC (rev 767) @@ -3340,5 +3340,32 @@ .read = NULL, }, + { + .vendor = "Generic", + .name = "unknown SPI chip (RDID)", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rdid, + .erase = NULL, + .write = NULL, + }, + { + .vendor = "Generic", + .name = "unknown SPI chip (REMS)", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rems, + .erase = NULL, + .write = NULL, + }, + { NULL } }; Modified: trunk/flashchips.h =================================================================== --- trunk/flashchips.h 2009-11-17 09:57:34 UTC (rev 766) +++ trunk/flashchips.h 2009-11-20 01:12:45 UTC (rev 767) @@ -34,6 +34,7 @@ * SPI parts have 16-bit device IDs if they support RDID. */ +#define GENERIC_MANUF_ID 0xffff /* Check if there is a vendor ID */ #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-11-17 09:57:34 UTC (rev 766) +++ trunk/spi.c 2009-11-20 01:12:45 UTC (rev 767) @@ -281,6 +281,11 @@ GENERIC_DEVICE_ID == flash->model_id) return 1; + /* Test if there is any vendor ID. */ + if (GENERIC_MANUF_ID == flash->manufacture_id && + id1 != 0xff) + return 1; + return 0; } @@ -340,6 +345,11 @@ GENERIC_DEVICE_ID == flash->model_id) return 1; + /* Test if there is any vendor ID. */ + if (GENERIC_MANUF_ID == flash->manufacture_id && + id1 != 0xff) + return 1; + return 0; } [View Less]

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