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[PATCH] DOS support: Makefile
by Carl-Daniel Hailfinger 21 Mar '10

21 Mar '10

Prepare the Makefile for DOS cross-compilation support. Some of the changes are pretty hackish, but they shouldn't affect compilation on other systems at all. Please note that the makefile now references files that don't exist in the tree yet, but since these references are only triggered if you're compiling for DOS and DOS support is not yet merged, I think this is OK. If you take the DOS support patch from Rudolf and replace his Makefile patch with mine, you have to call make like this: make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip WARNERROR=no OS_ARCH=DOS Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-dos/Makefile =================================================================== --- flashrom-dos/Makefile (Revision 929) +++ flashrom-dos/Makefile (Arbeitskopie) @@ -2,6 +2,7 @@ # This file is part of the flashrom project. # # Copyright (C) 2005 coresystems GmbH <stepan(a)coresystems.de> +# Copyright (C) 2009,2010 Carl-Daniel Hailfinger # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -20,15 +21,22 @@ PROGRAM = flashrom CC ?= gcc -STRIP = strip +STRIP ?= strip INSTALL = install DIFF = diff PREFIX ?= /usr/local MANDIR ?= $(PREFIX)/share/man -CFLAGS ?= -Os -Wall -Werror -Wshadow +CFLAGS ?= -Os -Wall -Wshadow EXPORTDIR ?= . -OS_ARCH = $(shell uname) +WARNERROR ?= yes + +ifeq ($(WARNERROR), yes) +CFLAGS += -Werror +endif + +# FIXME We have to differentiate between host and target arch. +OS_ARCH ?= $(shell uname) ifneq ($(OS_ARCH), SunOS) STRIP_ARGS = -s endif @@ -40,6 +48,13 @@ CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif +ifeq ($(OS_ARCH), DOS) +CPPFLAGS += -I. +OS_OBJS = getopt.o +# Bus Pirate and Serprog are not supported under DOS. +CONFIG_BUSPIRATESPI = no +CONFIG_SERPROG = no +endif CHIP_OBJS = jedec.o stm50flw0x0x.o w39v040c.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ @@ -188,14 +203,28 @@ endif ifeq ($(NEED_PCI), yes) -LIBS += -lpci +ifneq ($(OS_ARCH), DOS) +# FIXME This workaround is needed until libpci detection can handle +# cross-compiling for DOS. +CHECK_LIBPCI = yes +endif +endif + +ifeq ($(NEED_PCI), yes) FEATURE_CFLAGS += -D'NEED_PCI=1' PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o ifeq ($(OS_ARCH), NetBSD) LIBS += -lpciutils # The libpci we want. LIBS += -l$(shell uname -p) # For (i386|x86_64)_iopl(2). +else +ifeq ($(OS_ARCH), DOS) +# FIXME There needs to be a better way to do this +LIBS += libpci.a +else +LIBS += -lpci endif endif +endif ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' @@ -205,7 +234,7 @@ # We could use PULLED_IN_LIBS, but that would be ugly. FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") -OBJS = $(CHIP_OBJS) $(CLI_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) +OBJS = $(CHIP_OBJS) $(CLI_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) $(OS_OBJS) $(PROGRAM): $(OBJS) $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(FEATURE_LIBS) $(LIBS) @@ -239,7 +268,7 @@ rm -f .test.c .test; exit 1) @rm -f .test.c .test -ifeq ($(NEED_PCI), yes) +ifeq ($(CHECK_LIBPCI), yes) pciutils: compiler @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

2 5

[commit] r963 - trunk
by repository service 21 Mar '10

21 Mar '10

Author: hailfinger Date: Sun Mar 21 15:54:57 2010 New Revision: 963 URL: http://flashrom.org/trac/coreboot/changeset/963 Log: Add DOS cross-compilation support to the Makefile. Add a README with build instructions. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Rudolf Marek <r.marek(a)assembler.cz> Modified: trunk/Makefile trunk/README Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Mar 21 14:36:20 2010 (r962) +++ trunk/Makefile Sun Mar 21 15:54:57 2010 (r963) @@ -2,6 +2,7 @@ # This file is part of the flashrom project. # # Copyright (C) 2005 coresystems GmbH <stepan(a)coresystems.de> +# Copyright (C) 2009,2010 Carl-Daniel Hailfinger # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -20,15 +21,22 @@ PROGRAM = flashrom CC ?= gcc -STRIP = strip +STRIP ?= strip INSTALL = install DIFF = diff PREFIX ?= /usr/local MANDIR ?= $(PREFIX)/share/man -CFLAGS ?= -Os -Wall -Werror -Wshadow +CFLAGS ?= -Os -Wall -Wshadow EXPORTDIR ?= . -OS_ARCH = $(shell uname) +WARNERROR ?= yes + +ifeq ($(WARNERROR), yes) +CFLAGS += -Werror +endif + +# FIXME We have to differentiate between host and target arch. +OS_ARCH ?= $(shell uname) ifneq ($(OS_ARCH), SunOS) STRIP_ARGS = -s endif @@ -40,6 +48,12 @@ CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif +ifeq ($(OS_ARCH), DOS) +CPPFLAGS += -I../libgetopt -I../libpci/include +# Bus Pirate and Serprog are not supported under DOS. +CONFIG_BUSPIRATESPI = no +CONFIG_SERPROG = no +endif CHIP_OBJS = jedec.o stm50flw0x0x.o w39v040c.o w39v080fa.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ @@ -188,12 +202,26 @@ endif ifeq ($(NEED_PCI), yes) -LIBS += -lpci +ifneq ($(OS_ARCH), DOS) +# FIXME This workaround is needed until libpci detection can handle +# cross-compiling for DOS. +CHECK_LIBPCI = yes +endif +endif + +ifeq ($(NEED_PCI), yes) FEATURE_CFLAGS += -D'NEED_PCI=1' PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o ifeq ($(OS_ARCH), NetBSD) LIBS += -lpciutils # The libpci we want. LIBS += -l$(shell uname -p) # For (i386|x86_64)_iopl(2). +else +ifeq ($(OS_ARCH), DOS) +# FIXME There needs to be a better way to do this +LIBS += ../libpci/lib/libpci.a ../libgetopt/libgetopt.a +else +LIBS += -lpci +endif endif endif @@ -239,7 +267,7 @@ rm -f .test.c .test; exit 1) @rm -f .test.c .test -ifeq ($(NEED_PCI), yes) +ifeq ($(CHECK_LIBPCI), yes) pciutils: compiler @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ @@ -315,6 +343,9 @@ @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) @echo Created $(EXPORTDIR)/flashrom-$(RELEASENAME).tar.bz2 -.PHONY: all clean distclean dep compiler pciutils features export tarball +djgpp-dos: clean + make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip WARNERROR=no OS_ARCH=DOS + +.PHONY: all clean distclean dep compiler pciutils features export tarball dos -include .dependencies Modified: trunk/README ============================================================================== --- trunk/README Sun Mar 21 14:36:20 2010 (r962) +++ trunk/README Sun Mar 21 15:54:57 2010 (r963) @@ -42,7 +42,7 @@ * pciutils / libpci * pciutils-devel / pciutils-dev / libpci-dev - * zlib-devel / zlib1g-dev (only needed if libpci is static) + * zlib-devel / zlib1g-dev (needed if libpci was compiled with libz support) On FreeBSD, you need the following ports: @@ -75,6 +75,25 @@ Install DirectIO from coresystems GmbH. DirectIO is available at http://www.coresystems.de/en/directio. +To cross-compile on Linux for DOS: + + Get RPMs of the cross compiler from the DJGPP site and install them: + djcross-binutils-2.19.1-10ap.i386.rpm + djcross-gcc-tools-4.4.1-1ap.i686.rpm + djcross-gcc-4.3.2-8ap.i686.rpm + Download pciutils 3.1.5 and apply http://assembler.cz/flashrom/pciutils.patch + Download and compile http://assembler.cz/flashrom/libgetopt/ + Compile pciutils, see README.DJGPP for instructions. + Enter the flashrom directory. + ../libpci should contain pciutils source and binaries. + ../libgetopt should contain getopt.a from libgetopt. + Run either (change settings where appropriate) + make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip OS_ARCH=DOS + or (above settings hardcoded) + make djgpp-dos + You might have to add WARNERROR=no to the make command line. + To run flashrom.exe, download http://clio.rice.edu/djgpp/csdpmi7b.zip and + make sure CWSDPMI.EXE is in the current directory. Installation ------------

1 0

[PATCH] Board enable for Termtek TK-3370
by Daniel Brandt 21 Mar '10

21 Mar '10

During an intensive IRC session about two weeks ago I got all the help I needed to patch in support for this fairly rare thin client motherboard that I happen to own. I've tested reading, writing and verifying and everything seem to work, so I'm submitting the patch. Also attaching lspci and superiotool output as requested. Regards, Daniel

2 2

[commit] r962 - trunk
by repository service 21 Mar '10

21 Mar '10

Author: mkarcher Date: Sun Mar 21 14:36:20 2010 New Revision: 962 URL: http://flashrom.org/trac/coreboot/changeset/962 Log: Adds board enable to Termtek TK-3370 thin client motherboard. Signed-off-by: Daniel Brandt <dbr(a)mindglow.se> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Mar 20 16:15:36 2010 (r961) +++ trunk/board_enable.c Sun Mar 21 14:36:20 2010 (r962) @@ -206,6 +206,17 @@ } /** + * Suited for: + * - Termtek TK-3370 (rev. 2.5b) + */ +static int w836xx_memw_enable_4e(const char *name) +{ + w836xx_memw_enable(0x4E); + + return 0; +} + +/** * */ static int it8705f_write_enable(uint8_t port, const char *name) @@ -1400,6 +1411,7 @@ {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, OK, via_apollo_gpo0_lower}, {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, "Tekram", "P6Pro-A5", 256, OK, NULL}, + {0x1106, 0x3123, 0x1106, 0x3123, 0x1106, 0x3059, 0x1106, 0x4161, NULL, NULL, NULL, "Termtek", "TK-3370 (Rev:2.5B)", 0, OK, w836xx_memw_enable_4e}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise}, {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", 0, OK, it87xx_probe_spi_flash},

1 0

[PATCH] 82802ab and stm50flw0x0x cleanup
by Carl-Daniel Hailfinger 20 Mar '10

20 Mar '10

Kill a few unused functions in 82802ab.c and stm50flw0x0x.c. Replace wait_stm50flw0x0x() with wait_82802ab() as the the read id mode stuff is historic cruft that was never needed. Replace erase_82802ab_block() with erase_82802ab_block_withunlock(). Factor out unlocking from erase_82802ab_block(). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-82802ab_stm50flw0x0x_cleanup/flashchips.c =================================================================== --- flashrom-82802ab_stm50flw0x0x_cleanup/flashchips.c (Revision 947) +++ flashrom-82802ab_stm50flw0x0x_cleanup/flashchips.c (Arbeitskopie) @@ -2315,128 +2315,128 @@ .manufacture_id = INTEL_ID, .model_id = P28F001BXB, .total_size = 128, .page_size = 128 * 1024, /* 8k + 2x4k + 112k */ .feature_bits = 0, .tested = TEST_BAD_WRITE, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { .eraseblocks = { {8 * 1024, 1}, {4 * 1024, 2}, {112 * 1024, 1}, }, - .block_erase = erase_82802ab_block, + .block_erase = erase_82802ab_block_withunlock, }, }, .write = NULL, .read = read_memmapped, }, { .vendor = "Intel", .name = "28F001BX-T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = P28F001BXT, .total_size = 128, .page_size = 128 * 1024, /* 112k + 2x4k + 8k */ .feature_bits = 0, .tested = TEST_BAD_WRITE, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { .eraseblocks = { {112 * 1024, 1}, {4 * 1024, 2}, {8 * 1024, 1}, }, - .block_erase = erase_82802ab_block, + .block_erase = erase_82802ab_block_withunlock, }, }, .write = NULL, .read = read_memmapped, }, { .vendor = "Intel", .name = "28F004S5", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = E_28F004S5, .total_size = 512, .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { .eraseblocks = { {64 * 1024, 8} }, - .block_erase = erase_82802ab_block, + .block_erase = erase_82802ab_block_withunlock, }, }, .write = write_82802ab, .read = read_memmapped, }, { .vendor = "Intel", .name = "82802AB", .bustype = CHIP_BUSTYPE_FWH, .manufacture_id = INTEL_ID, .model_id = I_82802AB, .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = { { .eraseblocks = { {64 * 1024, 8} }, - .block_erase = erase_82802ab_block, + .block_erase = erase_82802ab_block_withunlock, }, }, .write = write_82802ab, .read = read_memmapped, }, { .vendor = "Intel", .name = "82802AC", .bustype = CHIP_BUSTYPE_FWH, .manufacture_id = INTEL_ID, .model_id = I_82802AC, .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = { { .eraseblocks = { {64 * 1024, 16} }, - .block_erase = erase_82802ab_block, + .block_erase = erase_82802ab_block_withunlock, }, }, .write = write_82802ab, .read = read_memmapped, }, { .vendor = "Macronix", .name = "MX25L512", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = MX_ID, .model_id = MX_25L512, .total_size = 64, .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, Index: flashrom-82802ab_stm50flw0x0x_cleanup/stm50flw0x0x.c =================================================================== --- flashrom-82802ab_stm50flw0x0x_cleanup/stm50flw0x0x.c (Revision 947) +++ flashrom-82802ab_stm50flw0x0x_cleanup/stm50flw0x0x.c (Arbeitskopie) @@ -20,52 +20,32 @@ */ /* * This module is designed for supporting the devices * ST M50FLW040A (not yet tested) * ST M50FLW040B (not yet tested) * ST M50FLW080A * ST M50FLW080B (not yet tested) */ #include <string.h> #include <stdlib.h> #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" -static void wait_stm50flw0x0x(chipaddr bios) -{ - chip_writeb(0x70, bios); - if ((chip_readb(bios) & 0x80) == 0) { // it's busy - while ((chip_readb(bios) & 0x80) == 0) ; - } - - // put another command to get out of status register mode - - chip_writeb(0x90, bios); - programmer_delay(10); - - chip_readb(bios); // Read device ID (to make sure?) - - // this is needed to jam it out of "read id" mode - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); -} - /* * claus.gindhart(a)kontron.com * The ST M50FLW080B and STM50FLW080B chips have to be unlocked, * before you can erase them or write to them. */ int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset) { chipaddr wrprotect = flash->virtual_registers + 2; const uint8_t unlock_sector = 0x00; int j; /* * These chips have to be unlocked before you can erase them or write * to them. The size of the locking sectors depends on the type * of chip. * @@ -100,104 +80,66 @@ return 0; } int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize) { chipaddr bios = flash->virtual_memory + block; // clear status register chip_writeb(0x50, bios); printf_debug("Erase at 0x%lx\n", bios); // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); programmer_delay(10); - wait_stm50flw0x0x(flash->virtual_memory); + wait_82802ab(flash->virtual_memory); if (check_erased_range(flash, block, blocksize)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } printf("DONE BLOCK 0x%x\n", block); return 0; } int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize) { chipaddr bios = flash->virtual_memory + sector; // clear status register chip_writeb(0x50, bios); printf_debug("Erase at 0x%lx\n", bios); // now start it chip_writeb(0x32, bios); chip_writeb(0xd0, bios); programmer_delay(10); - wait_stm50flw0x0x(flash->virtual_memory); + wait_82802ab(flash->virtual_memory); if (check_erased_range(flash, sector, sectorsize)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } printf("DONE BLOCK 0x%x\n", sector); return 0; } -int write_page_stm50flw0x0x(chipaddr bios, uint8_t *src, - chipaddr dst, int page_size) -{ - int i, rc = 0; - chipaddr d = dst; - uint8_t *s = src; - - /* transfer data from source to destination */ - for (i = 0; i < page_size; i++) { - chip_writeb(0x40, dst); - chip_writeb(*src++, dst++); - wait_stm50flw0x0x(bios); - } - -/* claus.gindhart(a)kontron.com - * TODO - * I think, that verification is not required, but - * i leave it in anyway - */ - dst = d; - src = s; - for (i = 0; i < page_size; i++) { - if (chip_readb(dst) != *src) { - rc = -1; - break; - } - dst++; - src++; - } - - if (rc) { - fprintf(stderr, " page 0x%lx failed!\n", - (d - bios) / page_size); - } - - return rc; -} - /* I simply erase block by block * I Chip This is not the fastest way, but it works */ int erase_stm50flw0x0x(struct flashchip *flash) { int i; int total_size = flash->total_size * 1024; int page_size = flash->page_size; printf("Erasing page:\n"); for (i = 0; i < total_size / page_size; i++) { printf ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); printf("%04d at address: 0x%08x ", i, i * page_size); if (unlock_block_stm50flw0x0x(flash, i * page_size)) { fprintf(stderr, "UNLOCK FAILED!\n"); @@ -245,24 +187,24 @@ * Faster, because we only write, what has changed * More secure, because blocks, which are excluded * (with the exclude or layout feature) * are not erased and rewritten; data is retained also * in sudden power off situations */ chip_readn(tmpbuf, bios + i * page_size, page_size); if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } rc = unlock_block_stm50flw0x0x(flash, i * page_size); if (!rc) rc = erase_block_stm50flw0x0x(flash, i * page_size, page_size); if (!rc) - write_page_stm50flw0x0x(bios, buf + i * page_size, + write_page_82802ab(bios, buf + i * page_size, bios + i * page_size, page_size); } printf("\n"); free(tmpbuf); return rc; } Index: flashrom-82802ab_stm50flw0x0x_cleanup/82802ab.c =================================================================== --- flashrom-82802ab_stm50flw0x0x_cleanup/82802ab.c (Revision 947) +++ flashrom-82802ab_stm50flw0x0x_cleanup/82802ab.c (Arbeitskopie) @@ -1,20 +1,21 @@ /* * This file is part of the flashrom project. * * Copyright (C) 2000 Silicon Integrated System Corporation + * Copyright (C) 2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ @@ -79,79 +80,75 @@ { uint8_t status; chip_writeb(0x70, bios); if ((chip_readb(bios) & 0x80) == 0) { // it's busy while ((chip_readb(bios) & 0x80) == 0) ; } status = chip_readb(bios); /* Reset to get a clean state */ chip_writeb(0xFF, bios); return status; } +int unlock_82802ab_block(struct flashchip *flash, unsigned int page) +{ + chipaddr wrprotect = flash->virtual_registers + page + 2; + + /* Clear write protect */ + chip_writeb(0, wrprotect); + + return 0; +} + +/* FIXME: Ugly hack. Shoud do unlock separately. */ +int erase_82802ab_block_withunlock(struct flashchip *flash, unsigned int page, unsigned int pagesize) +{ + unlock_82802ab_block(flash, page); + return erase_82802ab_block(flash, page, pagesize); +} + int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize) { chipaddr bios = flash->virtual_memory; - chipaddr wrprotect = flash->virtual_registers + page + 2; uint8_t status; // clear status register chip_writeb(0x50, bios + page); - // clear write protect - chip_writeb(0, wrprotect); - // now start it chip_writeb(0x20, bios + page); chip_writeb(0xd0, bios + page); programmer_delay(10); // now let's see what the register is status = wait_82802ab(bios); print_82802ab_status(status); if (check_erased_range(flash, page, pagesize)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } printf("DONE BLOCK 0x%x\n", page); return 0; } -int erase_82802ab(struct flashchip *flash) -{ - int i; - unsigned int total_size = flash->total_size * 1024; - - printf("total_size is %d; flash->page_size is %d\n", - total_size, flash->page_size); - for (i = 0; i < total_size; i += flash->page_size) - if (erase_82802ab_block(flash, i, flash->page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - printf("DONE ERASE\n"); - - return 0; -} - void write_page_82802ab(chipaddr bios, uint8_t *src, chipaddr dst, int page_size) { int i; for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ chip_writeb(0x40, dst); chip_writeb(*src++, dst++); wait_82802ab(bios); } } int write_82802ab(struct flashchip *flash, uint8_t *buf) { int i; @@ -171,28 +168,28 @@ printf("%04d at address: 0x%08x", i, i * page_size); /* Auto Skip Blocks, which already contain the desired data * Faster, because we only write, what has changed * More secure, because blocks, which are excluded * (with the exclude or layout feature) * or not erased and rewritten; their data is retained also in * sudden power off situations */ chip_readn(tmpbuf, bios + i * page_size, page_size); if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } /* erase block by block and write block by block; this is the most secure way */ - if (erase_82802ab_block(flash, i * page_size, page_size)) { + if (erase_82802ab_block_withunlock(flash, i * page_size, page_size)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } write_page_82802ab(bios, buf + i * page_size, bios + i * page_size, page_size); } printf("\n"); free(tmpbuf); return 0; } Index: flashrom-82802ab_stm50flw0x0x_cleanup/chipdrivers.h =================================================================== --- flashrom-82802ab_stm50flw0x0x_cleanup/chipdrivers.h (Revision 947) +++ flashrom-82802ab_stm50flw0x0x_cleanup/chipdrivers.h (Arbeitskopie) @@ -43,34 +43,34 @@ int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_chip_write_1(struct flashchip *flash, uint8_t *buf); int spi_chip_write_256(struct flashchip *flash, uint8_t *buf); int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); int spi_disable_blockprotect(void); int spi_byte_program(int addr, uint8_t databyte); int spi_nbyte_program(int addr, uint8_t *bytes, int len); int spi_nbyte_read(int addr, uint8_t *bytes, int len); int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf); /* 82802ab.c */ uint8_t wait_82802ab(chipaddr bios); int probe_82802ab(struct flashchip *flash); -int erase_82802ab(struct flashchip *flash); int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize); +int erase_82802ab_block_withunlock(struct flashchip *flash, unsigned int page, unsigned int pagesize); int write_82802ab(struct flashchip *flash, uint8_t *buf); void print_82802ab_status(uint8_t status); void write_page_82802ab(chipaddr bios, uint8_t *src, chipaddr dst, int page_size); /* jedec.c */ uint8_t oddparity(uint8_t val); void toggle_ready_jedec(chipaddr dst); void data_polling_jedec(chipaddr dst, uint8_t data); int write_byte_program_jedec(chipaddr bios, uint8_t *src, chipaddr dst); int probe_jedec(struct flashchip *flash); int erase_chip_jedec(struct flashchip *flash); int write_jedec(struct flashchip *flash, uint8_t *buf); int write_jedec_1(struct flashchip *flash, uint8_t *buf); int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize); int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize); @@ -112,23 +112,22 @@ /* sst_fwhub.c */ int printlock_sst_fwhub(struct flashchip *flash); int unlock_sst_fwhub(struct flashchip *flash); /* w39v040c.c */ int printlock_w39v040c(struct flashchip *flash); /* w39V080fa.c */ int unlock_winbond_fwhub(struct flashchip *flash); /* w29ee011.c */ int probe_w29ee011(struct flashchip *flash); /* stm50flw0x0x.c */ int probe_stm50flw0x0x(struct flashchip *flash); -int erase_stm50flw0x0x(struct flashchip *flash); int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf); #endif /* !__CHIPDRIVERS_H__ */ -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

3 9

[commit] r961 - trunk
by repository service 20 Mar '10

20 Mar '10

Author: snelson Date: Sat Mar 20 16:15:36 2010 New Revision: 961 URL: http://flashrom.org/trac/coreboot/changeset/961 Log: unlock fixup Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/82802ab.c trunk/stm50flw0x0x.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Sat Mar 20 04:01:19 2010 (r960) +++ trunk/82802ab.c Sat Mar 20 16:15:36 2010 (r961) @@ -97,7 +97,7 @@ int i; //chipaddr wrprotect = flash->virtual_registers + page + 2; - for (i = 0; i < flash->total_size; i+= flash->page_size) + for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) { chip_writeb(0, flash->virtual_registers + i + 2); } Modified: trunk/stm50flw0x0x.c ============================================================================== --- trunk/stm50flw0x0x.c Sat Mar 20 04:01:19 2010 (r960) +++ trunk/stm50flw0x0x.c Sat Mar 20 16:15:36 2010 (r961) @@ -85,7 +85,7 @@ { int i; - for (i = 0; i < flash->total_size; i+= flash->page_size) { + for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) { if(unlock_block_stm50flw0x0x(flash, i)) { fprintf(stderr, "UNLOCK FAILED!\n"); return -1;

1 0

[commit] r960 - trunk
by repository service 20 Mar '10

20 Mar '10

Author: snelson Date: Sat Mar 20 04:01:19 2010 New Revision: 960 URL: http://flashrom.org/trac/coreboot/changeset/960 Log: The Intel 28F001BX-T/B chips don't have block locks or mention of registers; chip is Old. The Intel 28F004S5 mentions block locks which require a remapping registers. Fixes problems brought up by carldani because of commit r948. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Mar 20 00:01:34 2010 (r959) +++ trunk/flashchips.c Sat Mar 20 04:01:19 2010 (r960) @@ -2316,7 +2316,6 @@ .model_id = P28F001BXB, .total_size = 128, .page_size = 128 * 1024, /* 8k + 2x4k + 112k */ - .feature_bits = 0, .tested = TEST_BAD_WRITE, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ @@ -2331,7 +2330,6 @@ .block_erase = erase_block_82802ab, }, }, - .unlock = unlock_82802ab, .write = NULL, .read = read_memmapped, }, @@ -2344,7 +2342,6 @@ .model_id = P28F001BXT, .total_size = 128, .page_size = 128 * 1024, /* 112k + 2x4k + 8k */ - .feature_bits = 0, .tested = TEST_BAD_WRITE, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ @@ -2359,7 +2356,6 @@ .block_erase = erase_block_82802ab, }, }, - .unlock = unlock_82802ab, .write = NULL, .read = read_memmapped, }, @@ -2372,6 +2368,7 @@ .model_id = E_28F004S5, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */

1 0

MCP SPI dump
by Kevin Bosworth 20 Mar '10

20 Mar '10

Hi, I'm not sure if you really need this. But, here it is, the output from flashrom and lspci as mentioned on http://www.phoronix.com/forums/showthread.php?t=21054&highlight=flashrom. The attached info is for the motherboard Nvidia 790i Ultra SLI (part #-132-CK-NF79) by EVGA. Let me know if you need additional info. Thanks. Kevin

1 0

[PATCH 06/11] Rebased Board Enable Patch: Asus P4B533-E Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
by Sean Nelson 20 Mar '10

20 Mar '10

--- board_enable.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 89dad8a..13abc40 100644 --- a/board_enable.c +++ b/board_enable.c @@ -939,26 +939,27 @@ static int intel_ich_gpio19_raise(const char *name) * Suited for: * - Asus P4B266LM (Sony Vaio PCV-RX650): socket478 + 845D + ICH2. * - Asus P4C800-E Deluxe: socket478 + 875P + ICH5. * - Asus P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R. */ static int intel_ich_gpio21_raise(const char *name) { return intel_ich_gpio_set(21, 1); } /** * Suited for: * - Asus P4B266: socket478 + intel 845D + ICH2. + * - Asus P4B533-E: socket478 + 845E + ICH4 * - Asus P4B-MX variant in HP Vectra VL420 SFF: socket478 + 845D + ICH2 */ static int intel_ich_gpio22_raise(const char *name) { return intel_ich_gpio_set(22, 1); } /** * Suited for HP Vectra VL400: 815 + ICH + PC87360. */ static int board_hp_vl400(const char *name) { -- 1.6.6

1 2

[PATCH 11/11] Rebased Board Enable Patch: iBase MB899.
by Sean Nelson 20 Mar '10

20 Mar '10

Signed-off-by: Luc Verhaegen <libv(a)skynet.be> --- board_enable.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index b7b62f9..8692a98 100644 --- a/board_enable.c +++ b/board_enable.c @@ -974,26 +974,34 @@ static int board_hp_vl400(const char *name) } /** * Suited for: * - Dell Poweredge 1850: Intel PPGA604 + E7520 + ICH5R. * - ASRock P4i65GV: Intel Socket478 + 865GV + ICH5R. */ static int intel_ich_gpio23_raise(const char *name) { return intel_ich_gpio_set(23, 1); } /** + * Suited for IBase MB899: i945GM + ICH7. + */ +static int intel_ich_gpio26_raise(const char *name) +{ + return intel_ich_gpio_set(26, 1); +} + +/** * Suited for Acorp 6A815EPD: socket 370 + intel 815 + ICH2. */ static int board_acorp_6a815epd(const char *name) { int ret; /* Lower Blocks Lock -- pin 7 of PLCC32 */ ret = intel_ich_gpio_set(22, 1); if (!ret) /* Top Block Lock -- pin 8 of PLCC32 */ ret = intel_ich_gpio_set(23, 1); return ret; } @@ -1361,26 +1369,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, OK, it87xx_probe_spi_flash}, {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, OK, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, OK, nvidia_mcp_gpio21_raise}, {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, OK, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x7910, 0x1458, 0x5000, 0x1002, 0x438D, 0x1458, 0x5001, NULL, NULL, NULL, "GIGABYTE", "GA-MA69VM-S2", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, "^GA-MA78GM-S2H$", NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, OK, it87xx_probe_spi_flash}, {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable}, {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400}, {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27B9, 0, 0, NULL, "ibase", "mb899", "iBASE", "MB899", 0, NT, intel_ich_gpio26_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio4_4_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, "MSI", "MS-7207 (K8N GM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, -- 1.6.6

1 1

[commit] r959 - trunk
by repository service 20 Mar '10

20 Mar '10

Author: snelson Date: Sat Mar 20 00:01:34 2010 New Revision: 959 URL: http://flashrom.org/trac/coreboot/changeset/959 Log: Rebased Board Enable Patch: iBase MB899. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Mar 20 00:00:07 2010 (r958) +++ trunk/board_enable.c Sat Mar 20 00:01:34 2010 (r959) @@ -984,6 +984,14 @@ } /** + * Suited for IBase MB899: i945GM + ICH7. + */ +static int intel_ich_gpio26_raise(const char *name) +{ + return intel_ich_gpio_set(26, 1); +} + +/** * Suited for Acorp 6A815EPD: socket 370 + intel 815 + ICH2. */ static int board_acorp_6a815epd(const char *name) @@ -1371,6 +1379,7 @@ {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable}, {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400}, {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27B9, 0, 0, NULL, "ibase", "mb899", "iBASE", "MB899", 0, NT, intel_ich_gpio26_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower},

1 0

[PATCH 10/11] Rebased Board Enable Patch: Abit AN-M2.
by Sean Nelson 20 Mar '10

20 Mar '10

Ah, right-o, pulled this out of my git repo where it has been sitting since the 24th :) Luc Verhaegen. --- board_enable.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index de274e7..b7b62f9 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1313,26 +1313,27 @@ static int it8712f_gpio3_1_raise(const char *name) * The coreboot ids are used two fold. When running with a coreboot firmware, * the ids uniquely matches the coreboot board identification string. When a * legacy bios is installed and when autodetection is not possible, these ids * can be used to identify the board through the -m command line argument. * * When a board is identified through its coreboot ids (in both cases), the * main pci ids are still required to match, as a safeguard. */ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ + {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, "Abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise}, {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, NT, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, -- 1.6.6

1 1

[commit] r958 - trunk
by repository service 20 Mar '10

20 Mar '10

Author: snelson Date: Sat Mar 20 00:00:07 2010 New Revision: 958 URL: http://flashrom.org/trac/coreboot/changeset/958 Log: Rebased Board Enable Patch: Abit AN-M2. Original patch by: Luc Verhaegen. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:58:15 2010 (r957) +++ trunk/board_enable.c Sat Mar 20 00:00:07 2010 (r958) @@ -1323,6 +1323,7 @@ struct board_pciid_enable board_pciid_enables[] = { /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ + {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, "Abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise}, {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower},

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[PATCH 08/11] Reversed-engineered board enable for the ASUS A8N-LA. IDs are ISA and SMBus. Added dmi string to match 3 HP boards: Nagami, Nagami2, Nagami2L.
by Sean Nelson 19 Mar '10

19 Mar '10

Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> --- board_enable.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 731171c..aa9fec8 100644 --- a/board_enable.c +++ b/board_enable.c @@ -531,26 +531,27 @@ static int nvidia_mcp_gpio_set(int gpio, int raise) base += 0xC0; tmp = INB(base + gpio); tmp &= ~0x0F; /* null lower nibble */ tmp |= 0x04; /* gpio -> output. */ if (raise) tmp |= 0x01; OUTB(tmp, base + gpio); return 0; } /** + * Suited for ASUS A8N-LA: nVidia MCP51. * Suited for ASUS M2NBP-VM CSM: nVidia MCP51. */ static int nvidia_mcp_gpio0_raise(const char *name) { return nvidia_mcp_gpio_set(0x00, 1); } /** * Suited for Abit KN8 Ultra: nVidia CK804. */ static int nvidia_mcp_gpio2_lower(const char *name) { return nvidia_mcp_gpio_set(0x02, 0); @@ -1329,26 +1330,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8JM", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, + {0x10DE, 0x0260, 0x103c, 0x2a3e, 0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI", NULL, NULL, "ASUS", "A8N-LA", 0, NT, nvidia_mcp_gpio0_raise}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x1A30, 0x1043, 0x8088, 0x8086, 0x24C3, 0x1043, 0x8089, NULL, NULL, NULL, "ASUS", "P4B533-E", 0, NT, intel_ich_gpio22_raise}, {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, OK, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, OK, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, it8705f_write_enable_2e}, -- 1.6.6

1 1

[commit] r957 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:58:15 2010 New Revision: 957 URL: http://flashrom.org/trac/coreboot/changeset/957 Log: Reversed-engineered board enable for the ASUS A8N-LA. Rebased. IDs are ISA and SMBus. Added dmi string to match 3 HP boards: Nagami, Nagami2, Nagami2L. This could match any HP Nagami board. Needs testing. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:55:48 2010 (r956) +++ trunk/board_enable.c Fri Mar 19 23:58:15 2010 (r957) @@ -541,6 +541,7 @@ } /** + * Suited for ASUS A8N-LA: nVidia MCP51. * Suited for ASUS M2NBP-VM CSM: nVidia MCP51. */ static int nvidia_mcp_gpio0_raise(const char *name) @@ -1339,6 +1340,7 @@ {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8JM", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, + {0x10DE, 0x0260, 0x103c, 0x2a3e, 0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI", NULL, NULL, "ASUS", "A8N-LA", 0, NT, nvidia_mcp_gpio0_raise}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise},

1 0

[PATCH 09/11] Rebased Board Enable Patch: 2nd attempt to fix board detection on GA-MA74GM-S2H.
by Sean Nelson 19 Mar '10

19 Mar '10

This board (GA-MA74GM-S2H) has the same list of pciids as the GA-MA78M-S2H, so I narroved search conditions by populating corresponding board_pciid_enable entry for GA-MA78M-S2H with DMI pattern. I don't have GA-MA78M-S2H available, so, please, test whether this works or not. P.S. I made a typo in the previous patch, so this is a fixed one. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- board_enable.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/board_enable.c b/board_enable.c index aa9fec8..de274e7 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1355,27 +1355,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, OK, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, it8705f_write_enable_2e}, {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, OK, board_epox_ep_bx3}, {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, OK, it87xx_probe_spi_flash}, {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, OK, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, OK, nvidia_mcp_gpio21_raise}, {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, OK, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x7910, 0x1458, 0x5000, 0x1002, 0x438D, 0x1458, 0x5001, NULL, NULL, NULL, "GIGABYTE", "GA-MA69VM-S2", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, OK, it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, "^GA-MA78GM-S2H$", NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, OK, it87xx_probe_spi_flash}, {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable}, {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400}, {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, -- 1.6.6

1 1

[commit] r956 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:55:48 2010 New Revision: 956 URL: http://flashrom.org/trac/coreboot/changeset/956 Log: Rebased Board Enable Patch: 2nd attempt to fix board detection on GA-MA74GM-S2H. This board (GA-MA74GM-S2H) has the same list of pciids as the GA-MA78M-S2H, so I narroved search conditions by populating corresponding board_pciid_enable entry for GA-MA78M-S2H with DMI pattern. Untested! Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:52:00 2010 (r955) +++ trunk/board_enable.c Fri Mar 19 23:55:48 2010 (r956) @@ -1363,7 +1363,7 @@ {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x7910, 0x1458, 0x5000, 0x1002, 0x438D, 0x1458, 0x5001, NULL, NULL, NULL, "GIGABYTE", "GA-MA69VM-S2", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, OK, it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, "^GA-MA78GM-S2H$", NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, OK, it87xx_probe_spi_flash}, {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable}, {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400},

1 0

[commit] r955 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:52:00 2010 New Revision: 955 URL: http://flashrom.org/trac/coreboot/changeset/955 Log: Rebased Board Enable Patch: Asus P4B533-E Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:49:09 2010 (r954) +++ trunk/board_enable.c Fri Mar 19 23:52:00 2010 (r955) @@ -949,6 +949,7 @@ /** * Suited for: * - Asus P4B266: socket478 + intel 845D + ICH2. + * - Asus P4B533-E: socket478 + 845E + ICH4 * - Asus P4B-MX variant in HP Vectra VL420 SFF: socket478 + 845D + ICH2 */ static int intel_ich_gpio22_raise(const char *name) @@ -1342,6 +1343,7 @@ {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x1A30, 0x1043, 0x8088, 0x8086, 0x24C3, 0x1043, 0x8089, NULL, NULL, NULL, "ASUS", "P4B533-E", 0, NT, intel_ich_gpio22_raise}, {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a},

1 0

[PATCH 07/11] Rebased Board Enable Patch: Factor out Via Apollo GPO setting
by Sean Nelson 19 Mar '10

19 Mar '10

Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- board_enable.c | 47 ++++++++++++++++++++++++++++++++++++++--------- 1 files changed, 38 insertions(+), 9 deletions(-) diff --git a/board_enable.c b/board_enable.c index 13abc40..731171c 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1004,64 +1004,92 @@ static int board_kontron_986lcd_m(const char *name) { int ret; ret = intel_ich_gpio_set(34, 1); /* #TBL */ if (!ret) ret = intel_ich_gpio_set(35, 1); /* #WP */ return ret; } /** * Suited for Soyo SY-7VCA: Pro133A + VT82C686. */ -static int board_soyo_sy_7vca(const char *name) +static int via_apollo_gpo_set(int gpio, int raise) { - struct pci_dev *dev; + struct pci_dev *dev; uint32_t base; - uint8_t tmp; + uint32_t tmp; /* VT82C686 Power management */ dev = pci_dev_find(0x1106, 0x3057); if (!dev) { fprintf(stderr, "\nERROR: VT82C686 PM device not found.\n"); return -1; } - /* GPO0 output from PM IO base + 0x4C */ + printf("\nVIA Apollo ACPI: %sing GPIO%02d.\n", + raise ? "Rais" : "Dropp", gpio); + + /* select GPO function on multiplexed pins */ tmp = pci_read_byte(dev, 0x54); - tmp &= ~0x03; + switch(gpio) + { + case 0: + tmp &= ~0x03; + break; + case 1: + tmp |= 0x04; + break; + case 2: + tmp |= 0x08; + break; + case 3: + tmp |= 0x10; + break; + } pci_write_byte(dev, 0x54, tmp); /* PM IO base */ base = pci_read_long(dev, 0x48) & 0x0000FF00; /* Drop GPO0 */ - tmp = INB(base + 0x4C); - tmp &= ~0x01; - OUTB(tmp, base + 0x4C); + tmp = INL(base + 0x4C); + if (raise) + tmp |= 1U << gpio; + else + tmp &= ~(1U << gpio); + OUTL(tmp, base + 0x4C); return 0; } /** * Suited for Abit VT6X5: Pro133x + VT82C686A */ static int via_apollo_gpo4_lower(const char *name) { return via_apollo_gpo_set(4, 0); } /** + * Suited for Soyo SY-7VCA: Pro133A + VT82C686. + */ +static int via_apollo_gpo0_lower(const char *name) +{ + return via_apollo_gpo_set(0, 0); +} + +/** * Enable some GPIO pin on SiS southbridge. * Suited for MSI 651M-L: SiS651 / SiS962 */ static int board_msi_651ml(const char *name) { struct pci_dev *dev; uint16_t base, temp; dev = pci_dev_find(0x1039, 0x0962); if (!dev) { fprintf(stderr, "Expected south bridge not found\n"); return 1; } @@ -1305,26 +1333,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8JM", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x1A30, 0x1043, 0x8088, 0x8086, 0x24C3, 0x1043, 0x8089, NULL, NULL, NULL, "ASUS", "P4B533-E", 0, NT, intel_ich_gpio22_raise}, {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, OK, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, OK, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, it8705f_write_enable_2e}, {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, OK, board_epox_ep_bx3}, {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, OK, it87xx_probe_spi_flash}, @@ -1346,27 +1375,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio4_4_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, "MSI", "MS-7207 (K8N GM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, OK, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, OK, board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, OK, board_soyo_sy_7vca}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, OK, via_apollo_gpo0_lower}, {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, "Tekram", "P6Pro-A5", 256, OK, NULL}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise}, {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", 0, OK, it87xx_probe_spi_flash}, { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, 0, NT, NULL}, /* end marker */ }; /** * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -- 1.6.6

1 1

[commit] r954 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:49:09 2010 New Revision: 954 URL: http://flashrom.org/trac/coreboot/changeset/954 Log: Rebased Board Enable Patch: Factor out Via Apollo GPO setting VT6X4 actually depended on this commit, blame snelson. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:39:24 2010 (r953) +++ trunk/board_enable.c Fri Mar 19 23:49:09 2010 (r954) @@ -1013,11 +1013,11 @@ /** * Suited for Soyo SY-7VCA: Pro133A + VT82C686. */ -static int board_soyo_sy_7vca(const char *name) +static int via_apollo_gpo_set(int gpio, int raise) { - struct pci_dev *dev; + struct pci_dev *dev; uint32_t base; - uint8_t tmp; + uint32_t tmp; /* VT82C686 Power management */ dev = pci_dev_find(0x1106, 0x3057); @@ -1026,18 +1026,38 @@ return -1; } - /* GPO0 output from PM IO base + 0x4C */ + printf("\nVIA Apollo ACPI: %sing GPIO%02d.\n", + raise ? "Rais" : "Dropp", gpio); + + /* select GPO function on multiplexed pins */ tmp = pci_read_byte(dev, 0x54); - tmp &= ~0x03; + switch(gpio) + { + case 0: + tmp &= ~0x03; + break; + case 1: + tmp |= 0x04; + break; + case 2: + tmp |= 0x08; + break; + case 3: + tmp |= 0x10; + break; + } pci_write_byte(dev, 0x54, tmp); /* PM IO base */ base = pci_read_long(dev, 0x48) & 0x0000FF00; /* Drop GPO0 */ - tmp = INB(base + 0x4C); - tmp &= ~0x01; - OUTB(tmp, base + 0x4C); + tmp = INL(base + 0x4C); + if (raise) + tmp |= 1U << gpio; + else + tmp &= ~(1U << gpio); + OUTL(tmp, base + 0x4C); return 0; } @@ -1051,6 +1071,14 @@ } /** + * Suited for Soyo SY-7VCA: Pro133A + VT82C686. + */ +static int via_apollo_gpo0_lower(const char *name) +{ + return via_apollo_gpo_set(0, 0); +} + +/** * Enable some GPIO pin on SiS southbridge. * Suited for MSI 651M-L: SiS651 / SiS962 */ @@ -1355,7 +1383,7 @@ {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, OK, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, OK, board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, OK, board_soyo_sy_7vca}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, OK, via_apollo_gpo0_lower}, {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, "Tekram", "P6Pro-A5", 256, OK, NULL}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise},

1 0

[PATCH 04/11] Rebased Board Enable Patch: Abit KN8 Ultra
by Sean Nelson 19 Mar '10

19 Mar '10

patch by Chris <zinx+flashrom(a)zenthought.org> --- board_enable.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 4fe3fa1..36bf6e4 100644 --- a/board_enable.c +++ b/board_enable.c @@ -539,26 +539,34 @@ static int nvidia_mcp_gpio_set(int gpio, int raise) return 0; } /** * Suited for ASUS M2NBP-VM CSM: nVidia MCP51. */ static int nvidia_mcp_gpio0_raise(const char *name) { return nvidia_mcp_gpio_set(0x00, 1); } /** + * Suited for Abit KN8 Ultra: nVidia CK804. + */ +static int nvidia_mcp_gpio2_lower(const char *name) +{ + return nvidia_mcp_gpio_set(0x02, 0); +} + +/** * Suited for MSI K8N Neo4: nVidia CK804. * Suited for MSI K8N GM2-L: nVidia MCP51. */ static int nvidia_mcp_gpio2_raise(const char *name) { return nvidia_mcp_gpio_set(0x02, 1); } /** * Suited for ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04. */ static int nvidia_mcp_gpio10_raise(const char *name) { @@ -1269,26 +1277,27 @@ static int it8712f_gpio3_1_raise(const char *name) * legacy bios is installed and when autodetection is not possible, these ids * can be used to identify the board through the -m command line argument. * * When a board is identified through its coreboot ids (in both cases), the * main pci ids are still required to match, as a safeguard. */ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, + {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, NT, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, -- 1.6.6

1 1

[commit] r953 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:39:24 2010 New Revision: 953 URL: http://flashrom.org/trac/coreboot/changeset/953 Log: Rebased Board Enable Patch: A8JM board_enable patch Signed-off-by: James Lancaster <deathstalker(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:37:29 2010 (r952) +++ trunk/board_enable.c Fri Mar 19 23:39:24 2010 (r953) @@ -920,6 +920,14 @@ } /** + * Suited for ASUS A8JM: Intel 945 + ICH7 + */ +static int intel_ich_gpio34_raise(const char *name) +{ + return intel_ich_gpio_set(34, 1); +} + +/** * Suited for MSI MS-7046: LGA775 + 915P + ICH6. */ static int intel_ich_gpio19_raise(const char *name) @@ -1300,6 +1308,7 @@ {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, + {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8JM", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, @@ -1333,7 +1342,7 @@ {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, + {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e},

1 0

[commit] r952 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:37:29 2010 New Revision: 952 URL: http://flashrom.org/trac/coreboot/changeset/952 Log: Rebased Board Enable Patch: Abit KN8 Ultra patch by Chris <zinx+flashrom(a)zenthought.org> Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:35:21 2010 (r951) +++ trunk/board_enable.c Fri Mar 19 23:37:29 2010 (r952) @@ -549,6 +549,14 @@ } /** + * Suited for Abit KN8 Ultra: nVidia CK804. + */ +static int nvidia_mcp_gpio2_lower(const char *name) +{ + return nvidia_mcp_gpio_set(0x02, 0); +} + +/** * Suited for MSI K8N Neo4: nVidia CK804. * Suited for MSI K8N GM2-L: nVidia MCP51. */ @@ -1279,6 +1287,7 @@ /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, + {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, NT, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise},

1 0

[PATCH 03/11] Rebased Board Enable Patch: Intel SE440BX-2
by Sean Nelson 19 Mar '10

19 Mar '10

This board has no subsystem IDs, but thankfully the DMI patch is in now, which is a real life safer. There are *WAY* to many 440BX/PIIX4 boards out there to match this without DMI. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- board_enable.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 7b1fa12..4fe3fa1 100644 --- a/board_enable.c +++ b/board_enable.c @@ -693,26 +693,34 @@ static int intel_piix4_gpo_set(unsigned int gpo, int raise) return 0; } /** * Suited for EPoX EP-BX3, and maybe some other Intel 440BX based boards. */ static int board_epox_ep_bx3(const char *name) { return intel_piix4_gpo_set(22, 1); } /** + * Suited for Intel SE440BX-2 + */ +static int intel_piix4_gpo27_lower(const char *name) +{ + return intel_piix4_gpo_set(27, 0); +} + +/** * Set a GPIO line on a given intel ICH LPC controller. */ static int intel_ich_gpio_set(int gpio, int raise) { /* table mapping the different intel ICH LPC chipsets. */ static struct { uint16_t id; uint8_t base_reg; uint32_t bank0; uint32_t bank1; uint32_t bank2; } intel_ich_gpio_table[] = { {0x2410, 0x58, 0x0FE30000, 0, 0}, /* 82801AA (ICH) */ @@ -1304,26 +1312,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, OK, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, OK, nvidia_mcp_gpio21_raise}, {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, OK, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x7910, 0x1458, 0x5000, 0x1002, 0x438D, 0x1458, 0x5001, NULL, NULL, NULL, "GIGABYTE", "GA-MA69VM-S2", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, OK, it87xx_probe_spi_flash}, {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable}, {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400}, {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, + {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio4_4_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, "MSI", "MS-7207 (K8N GM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, OK, it8705f_write_enable_2e}, -- 1.6.6

1 1

[commit] r951 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:35:21 2010 New Revision: 951 URL: http://flashrom.org/trac/coreboot/changeset/951 Log: Rebased Board Enable Patch: Intel SE440BX-2 This board has no subsystem IDs, but thankfully the DMI patch is in now, which is a real life safer. There are *WAY* to many 440BX/PIIX4 boards out there to match this without DMI. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:30:49 2010 (r950) +++ trunk/board_enable.c Fri Mar 19 23:35:21 2010 (r951) @@ -703,6 +703,14 @@ } /** + * Suited for Intel SE440BX-2 + */ +static int intel_piix4_gpo27_lower(const char *name) +{ + return intel_piix4_gpo_set(27, 0); +} + +/** * Set a GPIO line on a given intel ICH LPC controller. */ static int intel_ich_gpio_set(int gpio, int raise) @@ -1314,6 +1322,7 @@ {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, + {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu},

1 0

[PATCH 02/11] Rebased Board Enable Patch: Abit VT6X4
by Sean Nelson 19 Mar '10

19 Mar '10

This board has *no* usable IDs at all, neither DMI nor PCI subsystem IDs. You have to force it using "-m abit:vt6x4" Try 3: really correct polarity of the GPIO Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- board_enable.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 9ac5653..7b1fa12 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1009,26 +1009,34 @@ static int board_soyo_sy_7vca(const char *name) /* PM IO base */ base = pci_read_long(dev, 0x48) & 0x0000FF00; /* Drop GPO0 */ tmp = INB(base + 0x4C); tmp &= ~0x01; OUTB(tmp, base + 0x4C); return 0; } /** + * Suited for Abit VT6X5: Pro133x + VT82C686A + */ +static int via_apollo_gpo4_lower(const char *name) +{ + return via_apollo_gpo_set(4, 0); +} + +/** * Enable some GPIO pin on SiS southbridge. * Suited for MSI 651M-L: SiS651 / SiS962 */ static int board_msi_651ml(const char *name) { struct pci_dev *dev; uint16_t base, temp; dev = pci_dev_find(0x1039, 0x0962); if (!dev) { fprintf(stderr, "Expected south bridge not found\n"); return 1; } @@ -1253,26 +1261,27 @@ static int it8712f_gpio3_1_raise(const char *name) * legacy bios is installed and when autodetection is not possible, these ids * can be used to identify the board through the -m command line argument. * * When a board is identified through its coreboot ids (in both cases), the * main pci ids are still required to match, as a safeguard. */ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, + {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, NT, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, -- 1.6.6

1 1

[commit] r950 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:30:49 2010 New Revision: 950 URL: http://flashrom.org/trac/coreboot/changeset/950 Log: Rebased Board Enable Patch: Abit VT6X4 This board has *no* usable IDs at all, neither DMI nor PCI subsystem IDs. You have to force it using "-m abit:vt6x4" Try 3: really correct polarity of the GPIO Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 23:26:44 2010 (r949) +++ trunk/board_enable.c Fri Mar 19 23:30:49 2010 (r950) @@ -1019,6 +1019,14 @@ } /** + * Suited for Abit VT6X5: Pro133x + VT82C686A + */ +static int via_apollo_gpo4_lower(const char *name) +{ + return via_apollo_gpo_set(4, 0); +} + +/** * Enable some GPIO pin on SiS southbridge. * Suited for MSI 651M-L: SiS651 / SiS962 */ @@ -1263,6 +1271,7 @@ /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, + {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, NT, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e},

1 0

[PATCH 01/11] Rebased Board Enable Patch: Add Asus A8N.
by Sean Nelson 19 Mar '10

19 Mar '10

Signed-off-by: Luc Verhaegen <libv(a)skynet.be> --- board_enable.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 66b5998..9ac5653 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1264,26 +1264,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, + {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, OK, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, OK, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, it8705f_write_enable_2e}, {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, -- 1.6.6

1 1

[commit] r949 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 23:26:44 2010 New Revision: 949 URL: http://flashrom.org/trac/coreboot/changeset/949 Log: Rebased Board Enable Patch: Add Asus A8N. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Mar 19 19:47:06 2010 (r948) +++ trunk/board_enable.c Fri Mar 19 23:26:44 2010 (r949) @@ -1274,6 +1274,7 @@ {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, + {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise},

1 0

[commit] r948 - trunk
by repository service 19 Mar '10

19 Mar '10

Author: snelson Date: Fri Mar 19 19:47:06 2010 New Revision: 948 URL: http://flashrom.org/trac/coreboot/changeset/948 Log: rename print_82802ab_status to print_status_82802ab add unlock_82802ab strip unlock code from erase_block_82802ab rename erase_82802ab_block to erase_block_80280ab delete sharplhf00l04.o from Makefile delete *_lhf00l04* from chipdrivers.h add unlock_stm50flw0x0x delete wait_stm50flw0x0x delete write_page_stm50flw0x0x convert erase_stm50flw0x0x to erase_chip_stm50flw0x0x delete write_stm50flw0x0x add unlock_82802ab to two Intel chips with TEST_BAD_WRITE change the status of 82802AB, 82802AC, M50FW040, M50FW080 to TEST_OK_PR Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/82802ab.c trunk/Makefile trunk/chipdrivers.h trunk/flashchips.c trunk/sharplhf00l04.c trunk/stm50flw0x0x.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Wed Mar 17 07:19:23 2010 (r947) +++ trunk/82802ab.c Fri Mar 19 19:47:06 2010 (r948) @@ -32,7 +32,7 @@ #include "chipdrivers.h" // I need that Berkeley bit-map printer -void print_82802ab_status(uint8_t status) +void print_status_82802ab(uint8_t status) { printf_debug("%s", status & 0x80 ? "Ready:" : "Busy:"); printf_debug("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); @@ -92,18 +92,27 @@ return status; } -int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize) +int unlock_82802ab(struct flashchip *flash) +{ + int i; + //chipaddr wrprotect = flash->virtual_registers + page + 2; + + for (i = 0; i < flash->total_size; i+= flash->page_size) + { + chip_writeb(0, flash->virtual_registers + i + 2); + } + + return 0; +} + +int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize) { chipaddr bios = flash->virtual_memory; - chipaddr wrprotect = flash->virtual_registers + page + 2; uint8_t status; // clear status register chip_writeb(0x50, bios + page); - // clear write protect - chip_writeb(0, wrprotect); - // now start it chip_writeb(0x20, bios + page); chip_writeb(0xd0, bios + page); @@ -111,7 +120,7 @@ // now let's see what the register is status = wait_82802ab(bios); - print_82802ab_status(status); + print_status_82802ab(status); if (check_erased_range(flash, page, pagesize)) { fprintf(stderr, "ERASE FAILED!\n"); @@ -130,7 +139,7 @@ printf("total_size is %d; flash->page_size is %d\n", total_size, flash->page_size); for (i = 0; i < total_size; i += flash->page_size) - if (erase_82802ab_block(flash, i, flash->page_size)) { + if (erase_block_82802ab(flash, i, flash->page_size)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } @@ -184,7 +193,7 @@ } /* erase block by block and write block by block; this is the most secure way */ - if (erase_82802ab_block(flash, i * page_size, page_size)) { + if (erase_block_82802ab(flash, i * page_size, page_size)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Mar 17 07:19:23 2010 (r947) +++ trunk/Makefile Fri Mar 19 19:47:06 2010 (r948) @@ -41,7 +41,7 @@ LDFLAGS += -L/usr/local/lib endif -CHIP_OBJS = jedec.o stm50flw0x0x.o w39v040c.o w39v080fa.o sharplhf00l04.o w29ee011.o \ +CHIP_OBJS = jedec.o stm50flw0x0x.o w39v040c.o w39v080fa.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Wed Mar 17 07:19:23 2010 (r947) +++ trunk/chipdrivers.h Fri Mar 19 19:47:06 2010 (r948) @@ -57,10 +57,11 @@ uint8_t wait_82802ab(chipaddr bios); int probe_82802ab(struct flashchip *flash); int erase_82802ab(struct flashchip *flash); -int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize); +int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize); int write_82802ab(struct flashchip *flash, uint8_t *buf); -void print_82802ab_status(uint8_t status); +void print_status_82802ab(uint8_t status); void write_page_82802ab(chipaddr bios, uint8_t *src, chipaddr dst, int page_size); +int unlock_82802ab(struct flashchip *flash); /* jedec.c */ uint8_t oddparity(uint8_t val); @@ -92,10 +93,6 @@ int unlock_49fl00x(struct flashchip *flash); int lock_49fl00x(struct flashchip *flash); -/* sharplhf00l04.c */ -int erase_lhf00l04_block(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen); -int write_lhf00l04(struct flashchip *flash, uint8_t *buf); - /* sst28sf040.c */ int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size); @@ -124,11 +121,8 @@ int probe_w29ee011(struct flashchip *flash); /* stm50flw0x0x.c */ -int probe_stm50flw0x0x(struct flashchip *flash); -int erase_stm50flw0x0x(struct flashchip *flash); -int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen); -int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf); +int unlock_stm50flw0x0x(struct flashchip *flash); #endif /* !__CHIPDRIVERS_H__ */ Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Wed Mar 17 07:19:23 2010 (r947) +++ trunk/flashchips.c Fri Mar 19 19:47:06 2010 (r948) @@ -2328,9 +2328,10 @@ {4 * 1024, 2}, {112 * 1024, 1}, }, - .block_erase = erase_82802ab_block, + .block_erase = erase_block_82802ab, }, }, + .unlock = unlock_82802ab, .write = NULL, .read = read_memmapped, }, @@ -2355,9 +2356,10 @@ {4 * 1024, 2}, {8 * 1024, 1}, }, - .block_erase = erase_82802ab_block, + .block_erase = erase_block_82802ab, }, }, + .unlock = unlock_82802ab, .write = NULL, .read = read_memmapped, }, @@ -2377,9 +2379,10 @@ { { .eraseblocks = { {64 * 1024, 8} }, - .block_erase = erase_82802ab_block, + .block_erase = erase_block_82802ab, }, }, + .unlock = unlock_82802ab, .write = write_82802ab, .read = read_memmapped, }, @@ -2393,16 +2396,17 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = { { .eraseblocks = { {64 * 1024, 8} }, - .block_erase = erase_82802ab_block, + .block_erase = erase_block_82802ab, }, }, + .unlock = unlock_82802ab, .write = write_82802ab, .read = read_memmapped, }, @@ -2416,16 +2420,17 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = { { .eraseblocks = { {64 * 1024, 16} }, - .block_erase = erase_82802ab_block, + .block_erase = erase_block_82802ab, }, }, + .unlock = unlock_82802ab, .write = write_82802ab, .read = read_memmapped, }, @@ -3453,7 +3458,7 @@ {64 * 1024, 15}, {8 * 1024, 8} }, - .block_erase = erase_lhf00l04_block, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {1024 * 1024, 1} @@ -3461,7 +3466,8 @@ .block_erase = NULL, /* 30 D0, only in A/A mux mode */ }, }, - .write = write_lhf00l04, + .unlock = unlock_82802ab, + .write = write_82802ab, .read = read_memmapped, }, @@ -4994,13 +5000,14 @@ .block_erase = NULL, }, { .eraseblocks = { {64 * 1024, 8}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5028,13 +5035,14 @@ .block_erase = NULL, }, { .eraseblocks = { {64 * 1024, 8}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5062,13 +5070,14 @@ .block_erase = NULL, }, { .eraseblocks = { {64 * 1024, 16}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5096,13 +5105,14 @@ .block_erase = NULL, }, { .eraseblocks = { {64 * 1024, 16}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5127,13 +5137,14 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {256 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5153,13 +5164,14 @@ { { .eraseblocks = { {64 * 1024, 32}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5172,20 +5184,21 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ .block_erasers = { { .eraseblocks = { {64 * 1024, 8}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5198,20 +5211,21 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ .block_erasers = { { .eraseblocks = { {64 * 1024, 16}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, @@ -5237,13 +5251,14 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_stm50flw0x0x, + .block_erase = erase_block_82802ab, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = erase_chip_stm50flw0x0x, } }, - .write = write_stm50flw0x0x, + .unlock = unlock_stm50flw0x0x, + .write = write_82802ab, .read = read_memmapped, }, Modified: trunk/sharplhf00l04.c ============================================================================== --- trunk/sharplhf00l04.c Wed Mar 17 07:19:23 2010 (r947) +++ trunk/sharplhf00l04.c Fri Mar 19 19:47:06 2010 (r948) @@ -36,7 +36,7 @@ chip_writeb(0x50, bios); printf("Erase at 0x%lx\n", bios); status = wait_82802ab(flash->virtual_memory); - print_82802ab_status(status); + print_status_82802ab(status); // clear write protect printf("write protect is at 0x%lx\n", (wrprotect)); printf("write protect is 0x%x\n", chip_readb(wrprotect)); @@ -49,7 +49,7 @@ programmer_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); - print_82802ab_status(status); + print_status_82802ab(status); printf("DONE BLOCK 0x%x\n", blockaddr); if (check_erased_range(flash, blockaddr, blocklen)) { Modified: trunk/stm50flw0x0x.c ============================================================================== --- trunk/stm50flw0x0x.c Wed Mar 17 07:19:23 2010 (r947) +++ trunk/stm50flw0x0x.c Fri Mar 19 19:47:06 2010 (r948) @@ -33,26 +33,6 @@ #include "flashchips.h" #include "chipdrivers.h" -static void wait_stm50flw0x0x(chipaddr bios) -{ - chip_writeb(0x70, bios); - if ((chip_readb(bios) & 0x80) == 0) { // it's busy - while ((chip_readb(bios) & 0x80) == 0) ; - } - - // put another command to get out of status register mode - - chip_writeb(0x90, bios); - programmer_delay(10); - - chip_readb(bios); // Read device ID (to make sure?) - - // this is needed to jam it out of "read id" mode - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); -} - /* * claus.gindhart(a)kontron.com * The ST M50FLW080B and STM50FLW080B chips have to be unlocked, @@ -101,25 +81,16 @@ return 0; } -int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize) +int unlock_stm50flw0x0x(struct flashchip *flash) { - chipaddr bios = flash->virtual_memory + block; - - // clear status register - chip_writeb(0x50, bios); - printf_debug("Erase at 0x%lx\n", bios); - // now start it - chip_writeb(0x20, bios); - chip_writeb(0xd0, bios); - programmer_delay(10); - - wait_stm50flw0x0x(flash->virtual_memory); + int i; - if (check_erased_range(flash, block, blocksize)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; + for (i = 0; i < flash->total_size; i+= flash->page_size) { + if(unlock_block_stm50flw0x0x(flash, i)) { + fprintf(stderr, "UNLOCK FAILED!\n"); + return -1; + } } - printf("DONE BLOCK 0x%x\n", block); return 0; } @@ -136,7 +107,7 @@ chip_writeb(0xd0, bios); programmer_delay(10); - wait_stm50flw0x0x(flash->virtual_memory); + wait_82802ab(flash->virtual_memory); if (check_erased_range(flash, sector, sectorsize)) { fprintf(stderr, "ERASE FAILED!\n"); @@ -147,122 +118,33 @@ return 0; } -int write_page_stm50flw0x0x(chipaddr bios, uint8_t *src, - chipaddr dst, int page_size) -{ - int i, rc = 0; - chipaddr d = dst; - uint8_t *s = src; - - /* transfer data from source to destination */ - for (i = 0; i < page_size; i++) { - chip_writeb(0x40, dst); - chip_writeb(*src++, dst++); - wait_stm50flw0x0x(bios); - } - -/* claus.gindhart(a)kontron.com - * TODO - * I think, that verification is not required, but - * i leave it in anyway - */ - dst = d; - src = s; - for (i = 0; i < page_size; i++) { - if (chip_readb(dst) != *src) { - rc = -1; - break; - } - dst++; - src++; - } - - if (rc) { - fprintf(stderr, " page 0x%lx failed!\n", - (d - bios) / page_size); - } - - return rc; -} - -/* I simply erase block by block - * I Chip This is not the fastest way, but it works - */ -int erase_stm50flw0x0x(struct flashchip *flash) +int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { int i; int total_size = flash->total_size * 1024; int page_size = flash->page_size; - printf("Erasing page:\n"); - for (i = 0; i < total_size / page_size; i++) { - printf - ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - printf("%04d at address: 0x%08x ", i, i * page_size); - if (unlock_block_stm50flw0x0x(flash, i * page_size)) { - fprintf(stderr, "UNLOCK FAILED!\n"); - return -1; - } - if (erase_block_stm50flw0x0x(flash, i * page_size, page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - } - printf("\n"); - - return 0; -} - -int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ if ((addr != 0) || (blocklen != flash->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); return -1; } - return erase_stm50flw0x0x(flash); -} - -int write_stm50flw0x0x(struct flashchip *flash, uint8_t * buf) -{ - int i, rc = 0; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; - uint8_t *tmpbuf = malloc(page_size); - if (!tmpbuf) { - printf("Could not allocate memory!\n"); - exit(1); - } - printf("Programming page: \n"); - for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { + printf("Erasing page:\n"); + for (i = 0; i < total_size / page_size; i++) { printf ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); printf("%04d at address: 0x%08x ", i, i * page_size); - - /* Auto Skip Blocks, which already contain the desired data - * Faster, because we only write, what has changed - * More secure, because blocks, which are excluded - * (with the exclude or layout feature) - * are not erased and rewritten; data is retained also - * in sudden power off situations - */ - chip_readn(tmpbuf, bios + i * page_size, page_size); - if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { - printf("SKIPPED\n"); - continue; + //if (unlock_block_stm50flw0x0x(flash, i * page_size)) { + // fprintf(stderr, "UNLOCK FAILED!\n"); + // return -1; + //} + if (erase_block_82802ab(flash, i * page_size, page_size)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; } - - rc = unlock_block_stm50flw0x0x(flash, i * page_size); - if (!rc) - rc = erase_block_stm50flw0x0x(flash, i * page_size, page_size); - if (!rc) - write_page_stm50flw0x0x(bios, buf + i * page_size, - bios + i * page_size, page_size); } printf("\n"); - free(tmpbuf); - return rc; + return 0; }

1 0

Flashrom - DOS version report
by RayeR 19 Mar '10

19 Mar '10

Hello, I tried DOS version of flashrom and have some notes. First I tried it at work on a Dell PC with ATI SB600 chipset but it failed to read flash. Then I tried at home on P31/ICH7 board and works fine, here'e listing of flash process: /This chipset supports the following protocols: SPI. 128,040 Calibrating delay loop... OK. Found chip "Winbond W25x40" (512 KB, SPI) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: ERASE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... Erasing flash chip... spi_block_erase_20 failed during command execution at address 0x0 SUCCESS. done. Programming page: COMPLETE. Verifying flash... VERIFIED. /It flashed OK but why it displays this? spi_block_erase_20 failed during command execution at address 0x0 Then I looked with trace tool that flashrom makes some strange file operations, see log in attachment. I found it tries to open dmidecode.exe I had it in PATH but when not flashrom hanged for some seconds and displays Bad command or filename about 6 times. Superiotool works on my ITE chip OK. BTW I UPXed it from ~2MB to 80kB :) Martin ARGUS V1.61 - (c) by M. Heilfort, April 1995 Mar, 15 2010 23.10.49 : ------ Start of logging ------ : resident ARGUS occupies 4320 Byte 23.11.00 : change directory : H:\FLASHROM OK 23.11.00 Û run program : C:\WINDOWS\COMMAND.COM /cflashrom.exe PSP = 1B34H:0000H 23.11.00 : open file RO : C:\WINDOWS\COMMAND.COM handle = 6 OK 23.11.00 : close file : handle 6 OK 23.11.00 : open file RO : C:\WINDOWS\COMMAND.COM handle = 6 OK 23.11.00 : close file : handle 6 OK 23.11.00 : close file : handle 5 OK 23.11.00 : close file : handle 6 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 7 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 8 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 9 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 10 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 11 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 12 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 13 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 14 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 15 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 16 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 17 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 18 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 19 FAIL ! error 6 : handle unknown 23.11.00 : open file RO : C:\WINDOWS\COMMAND.COM handle = 6 OK 23.11.00 : close file : handle 6 OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 Û run program : H:\FLASHROM\FLASHROM.EXE PSP = 1CF6H:0000H 23.11.00 : close file : handle 19 FAIL ! error 6 : handle unknown 23.11.00 : close file : handle 18 FAIL ! error 6 : handle unknown 23.11.00 Û run program : H:\FLASHROM\CWSDPMI.EXE PSP = 2115H:0000H 23.11.00 : open file RO : EMMXXXX0 FAIL ! error 2 : file not found 23.11.00 : close file : handle 0 OK 23.11.00 : close file : handle 1 OK 23.11.00 : close file : handle 3 OK 23.11.00 : close file : handle 4 OK 23.11.00 : close file : handle 2 OK 23.11.00 Û program resident : H:\FLASHROM\CWSDPMI.EXE Code = 0 23.11.00 : open file RO : H:\FLASHROM\FLASHROM.EXE handle = 6 OK 23.11.00 : create file : c:\cwsdpmi.swp handle = 7 OK 23.11.00 : close file : handle 6 OK 23.11.00 : duplicate handle : handle 1 to handle = 6 OK 23.11.00 : close file : handle 1 OK 23.11.00 : open file WO : C:\WINDOWS\TEMP/dj100000 FAIL ! error 2 : file not found 23.11.00 : reset file : C:\WINDOWS\TEMP/dj100000 handle = 1 OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : get current directory : H:\FLASHROM OK 23.11.00 : flush file : handle 0 OK 23.11.00 : flush file : handle 1 OK 23.11.00 : flush file : handle 2 OK 23.11.00 : flush file : handle 3 OK 23.11.00 : flush file : handle 4 OK 23.11.00 : flush file : handle 5 OK 23.11.00 : flush file : handle 6 OK 23.11.00 : flush file : handle 7 OK 23.11.00 : flush file : handle 8 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 9 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 10 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 11 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 12 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 13 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 14 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 15 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 16 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 17 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 18 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 19 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 20 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 21 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 22 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 23 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 24 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 25 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 26 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 27 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 28 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 29 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 30 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 31 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 32 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 33 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 34 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 35 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 36 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 37 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 38 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 39 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 40 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 41 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 42 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 43 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 44 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 45 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 46 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 47 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 48 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 49 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 50 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 51 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 52 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 53 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 54 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 55 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 56 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 57 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 58 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 59 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 60 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 61 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 62 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 63 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 64 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 65 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 66 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 67 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 68 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 69 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 70 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 71 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 72 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 73 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 74 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 75 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 76 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 77 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 78 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 79 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 80 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 81 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 82 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 83 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 84 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 85 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 86 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 87 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 88 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 89 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 90 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 91 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 92 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 93 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 94 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 95 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 96 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 97 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 98 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle 99 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle100 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle101 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle102 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle103 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle104 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle105 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle106 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle107 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle108 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle109 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle110 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle111 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle112 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle113 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle114 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle115 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle116 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle117 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle118 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle119 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle120 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle121 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle122 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle123 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle124 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle125 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle126 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle127 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle128 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle129 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle130 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle131 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle132 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle133 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle134 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle135 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle136 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle137 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle138 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle139 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle140 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle141 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle142 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle143 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle144 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle145 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle146 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle147 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle148 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle149 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle150 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle151 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle152 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle153 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle154 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle155 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle156 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle157 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle158 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle159 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle160 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle161 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle162 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle163 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle164 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle165 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle166 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle167 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle168 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle169 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle170 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle171 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle172 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle173 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle174 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle175 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle176 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle177 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle178 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle179 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle180 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle181 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle182 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle183 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle184 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle185 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle186 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle187 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle188 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle189 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle190 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle191 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle192 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle193 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle194 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle195 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle196 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle197 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle198 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle199 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle200 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle201 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle202 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle203 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle204 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle205 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle206 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle207 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle208 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle209 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle210 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle211 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle212 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle213 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle214 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle215 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle216 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle217 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle218 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle219 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle220 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle221 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle222 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle223 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle224 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle225 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle226 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle227 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle228 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle229 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle230 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle231 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle232 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle233 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle234 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle235 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle236 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle237 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle238 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle239 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle240 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle241 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle242 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle243 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle244 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle245 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle246 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle247 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle248 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle249 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle250 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle251 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle252 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle253 FAIL ! error 6 : handle unknown 23.11.00 : flush file : handle254 FAIL ! error 6 : handle unknown 23.11.00 Û run program : C:\WINDOWS\COMMAND.COM /c dmidecode -s system-manufacturer PSP = 540FH:0000H 23.11.00 : open file RO : C:\WINDOWS\COMMAND.COM handle = 8 OK 23.11.00 : close file : handle 8 OK 23.11.00 : open file RO : C:\WINDOWS\COMMAND.COM handle = 8 OK 23.11.00 : close file : handle 8 OK 23.11.06 : close file : handle 5 OK 23.11.06 : close file : handle 6 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 7 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 8 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 9 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 10 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 11 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 12 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 13 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 14 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 15 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 16 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 17 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 18 FAIL ! error 6 : handle unknown 23.11.06 : close file : handle 19 FAIL ! error 6 : handle unknown 23.11.06 Û exit program : Code = 0 23.11.06 : get current directory : H:\FLASHROM OK 23.11.06 : change directory : H:\FLASHROM OK 23.11.06 : get current directory : H:\FLASHROM OK 23.11.06 : --------- E N D ---------

2 1

[PATCH] fwhub minimal cleanup/consolidation
by Sean Nelson 19 Mar '10

19 Mar '10

see patch.

2 3

Call for updates in distributions: Fedora
by Carl-Daniel Hailfinger 18 Mar '10

18 Mar '10

Hi Peter, it seems Fedora is carrying flashrom 0.9.1-r893. Thanks for keeping that package up to date. Unfortunately, this revision has a few really evil bugs and some minor annoyances. It would be highly appreciated if you could update to r930. Here is a list of revisions with bugfixes so you have a short doc to prove that a flashrom update would be beneficial even during freeze times: * r894 improves reliability of SPI flashing on all Intel chipsets * r896 fixes broken DMI mainboard matching (affects a few boards) * r897 fixes erase of Winbond W25X{10,20,40,80}chips * r899 reduces the number of incorrectly detected SPI chips * r902 adds a helpful message for recent Nvidia chipsets * r907 fixes breakage for half a dozen chips (Pm49fl002, Pm49fl004, SST49LF160C, W39V080FA, W39V080FA_dual, W39V040C) * r910 fixes GPO access on Intel PIIX4 * r913 fixes an incorrectly shadowed variable * r916 detects Laptops and warns users in that case (Important!) * r919 makes sure only tested mainboard code is run automatically * r922 improves man page readability * r930 fixes a NULL pointer bug which was triggered on a huge number of boards * A sizable number of mainboards are now recognized Some new features got added since r893, but they are all default off and compiled out, so the number of added bugs should be zero. Regards, Carl-Daniel

3 4

Board enable for P4C800-E
by Michael Karcher 17 Mar '10

17 Mar '10

Tested on real hardware - works. Regards, Michael Karcher

2 2

[commit] r947 - trunk
by repository service 17 Mar '10

17 Mar '10

Author: mkarcher Date: Wed Mar 17 07:19:23 2010 New Revision: 947 URL: http://flashrom.org/trac/coreboot/changeset/947 Log: Add board enable for P4C800-E lspci/flashrom/superiotool at http://www.coreboot.org/pipermail/flashrom/2010-March/002579.html Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/print_wiki.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Wed Mar 17 01:47:56 2010 (r946) +++ trunk/board_enable.c Wed Mar 17 07:19:23 2010 (r947) @@ -914,6 +914,7 @@ /** * Suited for: * - Asus P4B266LM (Sony Vaio PCV-RX650): socket478 + 845D + ICH2. + * - Asus P4C800-E Deluxe: socket478 + 875P + ICH5. * - Asus P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R. */ static int intel_ich_gpio21_raise(const char *name) @@ -1277,6 +1278,7 @@ {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Wed Mar 17 01:47:56 2010 (r946) +++ trunk/print_wiki.c Wed Mar 17 07:19:23 2010 (r947) @@ -213,6 +213,7 @@ { "ASUS", "A7V8X-MX SE", "http://www.asus.com/product.aspx?P_ID=1guVBT1qV5oqhHyZ" }, { "ASUS", "A7V8X-X", "http://www.asus.com/product.aspx?P_ID=YcXfRrWHZ9RKoVmw" }, { "ASUS", "P4B266", "http://www.ciao.co.uk/ASUS_Intel_845D_Chipset_P4B266__5409807#productdetail" }, + { "ASUS", "P4C800-E Deluxe", "http://www.asus.com/product.aspx?P_ID=cFuVCr9bXXCckmcK" }, { "ASUS", "P4P800-E Deluxe", "http://www.asus.com/product.aspx?P_ID=INIJUvLlif7LHp3g" }, { "ASUS", "P5ND2-SLI Deluxe", "http://www.asus.com/product.aspx?P_ID=WY7XroDuUImVbgp5" }, { "ASUS", "P5A", "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/" },

1 0

[PATCH] Mask the correct number of bits for BARs
by Carl-Daniel Hailfinger 17 Mar '10

17 Mar '10

PCI device BARs of all types had only bits 1:0 cleared while reading the address. That was correct for IO BARs, but failed to mask bit 3:2 for MEM BARs, resulting in odd offsets for prefetchable MEM BARs and for 64-bit capable MEM BARs. Mask the correct number of bits for all types of BARs and add some debug printing about BAR type. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-pci_bar_masking/pcidev.c =================================================================== --- flashrom-pci_bar_masking/pcidev.c (Revision 920) +++ flashrom-pci_bar_masking/pcidev.c (Arbeitskopie) @@ -32,6 +32,7 @@ struct pcidev_status *devs) { int i; + /* FIXME: 64 bit memory BARs need a 64 bit addr. */ uint32_t addr; for (i = 0; devs[i].device_name != NULL; i++) { @@ -42,12 +43,27 @@ * Don't use dev->base_addr[x] (as value for 'bar'), won't * work on older libpci. */ - addr = pci_read_long(dev, bar) & ~0x03; + addr = pci_read_long(dev, bar); printf("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n", devs[i].vendor_name, devs[i].device_name, dev->vendor_id, dev->device_id, dev->bus, dev->dev, dev->func); + msg_pdbg("Requested BAR is %s", (addr & 0x1) ? "IO" : "MEM"); + if (addr & 0x1) { + /* Mask off IO space indicator and reserved bit. */ + msg_pdbg("\n"); + addr &= ~0x3; + } else { + msg_pdbg(", %sbit, %sprefetchable\n", + ((addr & 0x6) == 0x0) ? "32" : + (((addr & 0x6) == 0x4) ? "64" : "reserved"), + (addr & 0x8) ? "" : "not "); + /* Mask off Mem space indicator, 32/64bit type indicator + * and Prefetchable indicator. + */ + addr &= ~0xf; + } if (devs[i].status == NT) { printf("===\nThis PCI device is UNTESTED. Please " -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

2 2

[commit] r946 - trunk
by repository service 17 Mar '10

17 Mar '10

Author: hailfinger Date: Wed Mar 17 01:47:56 2010 New Revision: 946 URL: http://flashrom.org/trac/coreboot/changeset/946 Log: PCI device BARs of all types had only bits 1:0 cleared while reading the address. That was correct for IO BARs, but failed to mask bit 3:2 for MEM BARs, resulting in odd offsets for prefetchable MEM BARs and for 64-bit capable MEM BARs. Mask the correct number of bits for all types of BARs and add some debug printing about BAR type. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/pcidev.c Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Wed Mar 17 01:05:59 2010 (r945) +++ trunk/pcidev.c Wed Mar 17 01:47:56 2010 (r946) @@ -32,6 +32,7 @@ struct pcidev_status *devs) { int i; + /* FIXME: 64 bit memory BARs need a 64 bit addr. */ uint32_t addr; for (i = 0; devs[i].device_name != NULL; i++) { @@ -42,12 +43,27 @@ * Don't use dev->base_addr[x] (as value for 'bar'), won't * work on older libpci. */ - addr = pci_read_long(dev, bar) & ~0x03; + addr = pci_read_long(dev, bar); printf("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n", devs[i].vendor_name, devs[i].device_name, dev->vendor_id, dev->device_id, dev->bus, dev->dev, dev->func); + msg_pdbg("Requested BAR is %s", (addr & 0x1) ? "IO" : "MEM"); + if (addr & 0x1) { + /* Mask off IO space indicator and reserved bit. */ + msg_pdbg("\n"); + addr &= ~0x3; + } else { + msg_pdbg(", %sbit, %sprefetchable\n", + ((addr & 0x6) == 0x0) ? "32" : + (((addr & 0x6) == 0x4) ? "64" : "reserved"), + (addr & 0x8) ? "" : "not "); + /* Mask off Mem space indicator, 32/64bit type indicator + * and Prefetchable indicator. + */ + addr &= ~0xf; + } if (devs[i].status == NT) { printf("===\nThis PCI device is UNTESTED. Please "

1 0

[PATCH] Mark a bunch of parallel chips I tested as TEST_OK_PREW
by Uwe Hermann 17 Mar '10

17 Mar '10

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.randomprojects.org http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

3 4

[commit] r945 - trunk
by repository service 17 Mar '10

17 Mar '10

Author: uwe Date: Wed Mar 17 01:05:59 2010 New Revision: 945 URL: http://flashrom.org/trac/coreboot/changeset/945 Log: Mark a bunch of parallel chips I tested as TEST_OK_PRW. All operations for these chips were tested on hardware. ERASE is not marked as working yet, as there are multiple erase functions per chip and only one was (successfully) tested. I'll redo the ERASE test when the respective infrastructure in flashrom is there. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Wed Mar 17 00:59:19 2010 (r944) +++ trunk/flashchips.c Wed Mar 17 01:05:59 2010 (r945) @@ -852,7 +852,7 @@ .total_size = 128, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10000, /* 10mS, Enter=Exec */ .block_erasers = @@ -1110,7 +1110,7 @@ .total_size = 256, .page_size = 256, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = @@ -1236,7 +1236,7 @@ .total_size = 256, .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ .block_erasers = @@ -2161,7 +2161,7 @@ .total_size = 256, .page_size = 256, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = @@ -2890,7 +2890,7 @@ .total_size = 256, .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ .block_erasers = @@ -3748,7 +3748,7 @@ .total_size = 128, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -3866,7 +3866,7 @@ .total_size = 128, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = @@ -3892,7 +3892,7 @@ .total_size = 256, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = @@ -5308,7 +5308,7 @@ .total_size = 256, .page_size = 128, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = @@ -5636,7 +5636,7 @@ .total_size = 128, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, /* used datasheet for the W29C011A */ .block_erasers = @@ -5659,7 +5659,7 @@ .total_size = 256, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -5862,7 +5862,7 @@ .total_size = 256, .page_size = 128, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, .block_erasers =

1 0

[PATCH] flashrom DOS support take2 (plus patch for pciutils)
by Rudolf Marek 17 Mar '10

17 Mar '10

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello all, I reworked the physmem mapping and also did a hack to allow RO mapping of first 1MB which is not allowed under DPMI ;) I simply copy the memory and return a pointer to a copied data. This is used for the coreboot tables and there is no need for RW. The dmidecode could be also DOS recompiled but executing that if quite complicated. Therefore maybe own parser for DMI would be nice. Attached patches are for the flashrom and pciutils. To make it work try following: 1) get RPMs of the cross compiler from DJGPP site djcross-binutils-2.19.1-10ap.i386.rpm djcross-gcc-tools-4.4.1-1ap.i686.rpm djcross-gcc-4.3.2-8ap.i686.rpm Somehow install them on your system. I used alien on 32bit machine to make debs and I forced them to install on amd64 ;) 2) Download all stuff from: http://assembler.cz/flashrom 3) patch flashrom source and pciutils source 4) compile the libgetopt in its dir 5) compile the pciutils, use the README.DJGPP 6) flashrom patch expects that the ../libpci contains the stuff what is installed from pciutils and ../libgetopt contains compiled getopt.a compile it too ;) I put there also the binary image and cwsdpmi zip which exe files are needed to run the flashrom.exe (I think only cwdpmi.exe) Have fun and please test ;) The dos.patch contains some flashrom NULL ptr fix and also Carl-Daniels changes for Makefile. Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAkudHrIACgkQ3J9wPJqZRNXgtQCgk+mYKzbmeYnuVoaMgfKoOLG2 nj8AoIXJv0tIo51Wktq/GYPDj8RhIzWs =v0AX -----END PGP SIGNATURE-----

2 4

[commit] r944 - trunk
by repository service 17 Mar '10

17 Mar '10

Author: hailfinger Date: Wed Mar 17 00:59:19 2010 New Revision: 944 URL: http://flashrom.org/trac/coreboot/changeset/944 Log: Add MS-DOS crosscompilation support to flashrom. Tested, works fine. Part 1: Code changes. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/hwaccess.c trunk/hwaccess.h trunk/physmap.c Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Tue Mar 16 04:09:10 2010 (r943) +++ trunk/hwaccess.c Wed Mar 17 00:59:19 2010 (r944) @@ -36,7 +36,9 @@ if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif defined(__FreeBSD__) || defined (__DragonFly__) if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else +#elif __DJGPP__ + if (0) { +#else if (iopl(3) != 0) { #endif fprintf(stderr, "ERROR: Could not get I/O privileges (%s).\n" @@ -52,6 +54,44 @@ #endif } +#ifdef __DJGPP__ + +extern unsigned short segFS; + +#include <sys/farptr.h> + +void mmio_writeb(uint8_t val, void *addr) +{ + _farpokeb(segFS, (unsigned long) addr, val); +} + +void mmio_writew(uint16_t val, void *addr) +{ + _farpokew(segFS, (unsigned long) addr, val); +} + +void mmio_writel(uint32_t val, void *addr) +{ + _farpokel(segFS, (unsigned long) addr, val); +} + +uint8_t mmio_readb(void *addr) +{ + return _farpeekb(segFS, (unsigned long) addr); +} + +uint16_t mmio_readw(void *addr) +{ + return _farpeekw(segFS, (unsigned long) addr); +} + +uint32_t mmio_readl(void *addr) +{ + return _farpeekl(segFS, (unsigned long) addr); +} + +#else + void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val; @@ -81,3 +121,4 @@ { return *(volatile uint32_t *) addr; } +#endif Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Tue Mar 16 04:09:10 2010 (r943) +++ trunk/hwaccess.h Wed Mar 17 00:59:19 2010 (r944) @@ -68,12 +68,30 @@ #define INW inw #define INL inl #else + +#ifdef __DJGPP__ + +#include <pc.h> + + #define OUTB(x,y) outportb(y, x) + #define OUTW(x,y) outportw(y, x) + #define OUTL(x,y) outportl(y, x) + + #define INB inportb + #define INW inportw + #define INL inportl + +#else + #define OUTB outb #define OUTW outw #define OUTL outl #define INB inb #define INW inw #define INL inl + +#endif + #endif #endif Modified: trunk/physmap.c ============================================================================== --- trunk/physmap.c Tue Mar 16 04:09:10 2010 (r943) +++ trunk/physmap.c Wed Mar 17 00:59:19 2010 (r944) @@ -4,6 +4,7 @@ * Copyright (C) 2009 Peter Stuge <peter(a)stuge.se> * Copyright (C) 2009 coresystems GmbH * Copyright (C) 2010 Carl-Daniel Hailfinger + * Copyright (C) 2010 Rudolf Marek <r.marek(a)assembler.cz> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -27,7 +28,77 @@ #include <errno.h> #include "flash.h" -#ifdef __DARWIN__ +#ifdef __DJGPP__ +#include <dpmi.h> + +#define MEM_DEV "dpmi" + +unsigned short segFS = 0; + +void *sys_physmap(unsigned long phys_addr, size_t len) +{ + int ret; + __dpmi_meminfo mi; + + if (segFS == 0) { + segFS = __dpmi_allocate_ldt_descriptors (1); + __dpmi_set_segment_base_address (segFS, 0x0); + __dpmi_set_segment_limit (segFS, 0xffffffff); + } + + mi.address = phys_addr; + mi.size = len; + ret = __dpmi_physical_address_mapping (&mi); + + if (ret != 0) { + return NULL; + } + + return (void *) mi.address; +} + +#define sys_physmap_rw_uncached sys_physmap + +#include <sys/movedata.h> +#include <sys/segments.h> +#include <go32.h> + +static void *realmem_cpy; + +void *sys_physmap_ro_cached(unsigned long phys_addr, size_t len) +{ + /* no support for not a 1MB of mem */ + if ((phys_addr + len) > 1024*1024) + return NULL; + + if (realmem_cpy) + return realmem_cpy + phys_addr; + + realmem_cpy = valloc(1024*1024); + + if (!realmem_cpy) + return NULL; + + movedata(_dos_ds, 0, _my_ds(), (unsigned long) realmem_cpy, 1024*1024); + return realmem_cpy + phys_addr; +} + + +void physunmap(void *virt_addr, size_t len) +{ + __dpmi_meminfo mi; + + /* we ignore unmaps for our cheat 1MB copy */ + if ((virt_addr >= realmem_cpy) && ((virt_addr + len) <= (realmem_cpy + 1024*1024))) { + return; + } + + mi.address = (unsigned long) virt_addr; + __dpmi_free_physical_address_mapping(&mi); +} + +#elif defined(__DARWIN__) + #include <DirectIO/darwinio.h> #define MEM_DEV "DirectIO"

1 0

[PATCH 1/8] kill dead pm49fl00x.c functions
by Sean Nelson 16 Mar '10

16 Mar '10

Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> --- pm49fl00x.c | 69 ----------------------------------------------------------- 1 files changed, 0 insertions(+), 69 deletions(-) diff --git a/pm49fl00x.c b/pm49fl00x.c index 5e5eec8..fd93ef6 100644 --- a/pm49fl00x.c +++ b/pm49fl00x.c @@ -38,82 +38,13 @@ void write_lockbits_49fl00x(chipaddr bios, int size, } int unlock_49fl00x(struct flashchip *flash) { write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 0, flash->page_size); return 0; } int lock_49fl00x(struct flashchip *flash) { write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size); return 0; } - -int erase_49fl00x(struct flashchip *flash) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - - /* unprotected */ - write_lockbits_49fl00x(flash->virtual_registers, - total_size, 0, page_size); - - /* - * erase_chip_jedec() will not work... Datasheet says - * "Chip erase is available in A/A Mux Mode only". - */ - printf("Erasing page: "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page */ - if (erase_block_jedec(flash, i * page_size, page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - printf("%04d at address: 0x%08x", i, i * page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - /* protected */ - write_lockbits_49fl00x(flash->virtual_registers, - total_size, 1, page_size); - - return 0; -} - -int write_49fl00x(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; - - /* unprotected */ - write_lockbits_49fl00x(flash->virtual_registers, total_size, 0, - page_size); - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming */ - if (erase_block_jedec(flash, i * page_size, page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - - /* write to the sector */ - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec_common(flash, buf + i * page_size, - bios + i * page_size, page_size, 0xffff); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - /* protected */ - write_lockbits_49fl00x(flash->virtual_registers, total_size, 1, - page_size); - - return 0; -} -- 1.6.6

2 23

[commit] r943 - trunk
by repository service 16 Mar '10

16 Mar '10

Author: snelson Date: Tue Mar 16 04:09:10 2010 New Revision: 943 URL: http://flashrom.org/trac/coreboot/changeset/943 Log: convert _sst_fwhub functions to jedec kill unused sst_fwhub.c functions make unlock_* check if unlock was successful and only return 0 when fully successful Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/sst_fwhub.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue Mar 16 02:00:50 2010 (r942) +++ trunk/chipdrivers.h Tue Mar 16 04:09:10 2010 (r943) @@ -111,11 +111,8 @@ int unlock_49lfxxxc(struct flashchip *flash); /* sst_fwhub.c */ -int erase_sst_fwhub(struct flashchip *flash); -int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size); -int erase_sst_fwhub_sector(struct flashchip *flash, unsigned int offset, unsigned int page_size); -int write_sst_fwhub(struct flashchip *flash, uint8_t *buf); int printlock_sst_fwhub(struct flashchip *flash); +int unlock_sst_fwhub(struct flashchip *flash); /* w39v040c.c */ int printlock_w39v040c(struct flashchip *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Mar 16 02:00:50 2010 (r942) +++ trunk/flashchips.c Tue Mar 16 04:09:10 2010 (r943) @@ -4084,17 +4084,19 @@ { { .eraseblocks = { {4 * 1024, 64} }, - .block_erase = erase_sst_fwhub_sector, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {16 * 1024, 16} }, - .block_erase = erase_sst_fwhub_block, + .block_erase = erase_block_jedec, }, { .eraseblocks = { {256 * 1024, 1} }, .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ } }, .printlock = printlock_sst_fwhub, - .write = write_sst_fwhub, + .printlock = printlock_sst_fwhub, + .unlock = unlock_sst_fwhub, + .write = write_jedec_1, .read = read_memmapped, }, @@ -4114,17 +4116,19 @@ { { .eraseblocks = { {4 * 1024, 96} }, - .block_erase = erase_sst_fwhub_sector, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {64 * 1024, 6} }, - .block_erase = erase_sst_fwhub_block, + .block_erase = erase_block_jedec, }, { .eraseblocks = { {384 * 1024, 1} }, .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ } }, .printlock = printlock_sst_fwhub, - .write = write_sst_fwhub, + .printlock = printlock_sst_fwhub, + .unlock = unlock_sst_fwhub, + .write = write_jedec_1, .read = read_memmapped, }, @@ -4147,17 +4151,19 @@ { { .eraseblocks = { {4 * 1024, 128} }, - .block_erase = erase_sector_jedec, /* missing unlock */ + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {64 * 1024, 8} }, - .block_erase = erase_sst_fwhub_block, /* same as erase_block_jedec, but with unlock */ + .block_erase = erase_block_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ }, }, .printlock = printlock_sst_fwhub, - .write = write_sst_fwhub, + .printlock = printlock_sst_fwhub, + .unlock = unlock_sst_fwhub, + .write = write_jedec_1, .read = read_memmapped, }, @@ -4208,17 +4214,19 @@ { { .eraseblocks = { {4 * 1024, 256} }, - .block_erase = erase_sst_fwhub_sector, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {64 * 1024, 16} }, - .block_erase = erase_sst_fwhub_block, + .block_erase = erase_block_jedec, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ } }, .printlock = printlock_sst_fwhub, - .write = write_sst_fwhub, + .printlock = printlock_sst_fwhub, + .unlock = unlock_sst_fwhub, + .write = write_jedec_1, .read = read_memmapped, }, Modified: trunk/sst_fwhub.c ============================================================================== --- trunk/sst_fwhub.c Tue Mar 16 02:00:50 2010 (r942) +++ trunk/sst_fwhub.c Tue Mar 16 04:09:10 2010 (r943) @@ -27,18 +27,6 @@ #include "flash.h" #include "chipdrivers.h" -// I need that Berkeley bit-map printer -void print_sst_fwhub_status(uint8_t status) -{ - printf("%s", status & 0x80 ? "Ready:" : "Busy:"); - printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); - printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:"); - printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:"); - printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:"); - printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:"); - printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:"); -} - int check_sst_fwhub_block_lock(struct flashchip *flash, int offset) { chipaddr registers = flash->virtual_registers; @@ -93,91 +81,18 @@ return 0; } -int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size) +int unlock_sst_fwhub(struct flashchip *flash) { - uint8_t blockstatus = clear_sst_fwhub_block_lock(flash, offset); + int i, ret=0; - if (blockstatus) { - printf("Block lock clearing failed, not erasing block " - "at 0x%06x\n", offset); - return 1; - } - - if (erase_block_jedec(flash, offset, page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - toggle_ready_jedec(flash->virtual_memory); - - return 0; -} - -int erase_sst_fwhub_sector(struct flashchip *flash, unsigned int offset, unsigned int page_size) -{ - uint8_t blockstatus = clear_sst_fwhub_block_lock(flash, offset); - - if (blockstatus) { - printf("Sector lock clearing failed, not erasing sector " - "at 0x%06x\n", offset); - return 1; - } - - if (erase_sector_jedec(flash, offset, page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - toggle_ready_jedec(flash->virtual_memory); - - return 0; -} - -int erase_sst_fwhub(struct flashchip *flash) -{ - int i; - unsigned int total_size = flash->total_size * 1024; - - for (i = 0; i < total_size; i += flash->page_size) { - if (erase_sst_fwhub_block(flash, i, flash->page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; + for (i = 0; i < flash->total_size * 1024; i += flash->page_size) + { + if (clear_sst_fwhub_block_lock(flash, i)) + { + msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i); + ret++; } } - - return 0; + return ret; } -int write_sst_fwhub(struct flashchip *flash, uint8_t *buf) -{ - int i, rc; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; - uint8_t *readbuf = malloc(page_size); - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - printf("%04d at address: 0x%08x", i, i * page_size); - - /* Auto Skip Blocks, which already contain the desired data: - * Faster, because we only write, what has changed - * More secure, because blocks, which are excluded - * (with the exclude or layout feature) - * are not erased and rewritten; data is retained also - * in sudden power off situations - */ - flash->read(flash, readbuf, i * page_size, page_size); - if (memcmp((void *)(buf + i * page_size), - (void *)(readbuf), page_size)) { - rc = erase_sst_fwhub_block(flash, i * page_size, - page_size); - if (rc) - return 1; - write_sector_jedec_common(flash, buf + i * page_size, - bios + i * page_size, page_size, 0xffff); - } - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - - return 0; -}

1 0

[commit] r942 - trunk
by repository service 16 Mar '10

16 Mar '10

Author: snelson Date: Tue Mar 16 02:00:50 2010 New Revision: 942 URL: http://flashrom.org/trac/coreboot/changeset/942 Log: remove function probe_28sf040 delete references to dead sharplhf00l04.c and sst29sf040.c functions from chipdrivers.h Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/sst28sf040.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue Mar 16 01:51:31 2010 (r941) +++ trunk/chipdrivers.h Tue Mar 16 02:00:50 2010 (r942) @@ -93,13 +93,10 @@ int lock_49fl00x(struct flashchip *flash); /* sharplhf00l04.c */ -int probe_lhf00l04(struct flashchip *flash); int erase_lhf00l04_block(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen); int write_lhf00l04(struct flashchip *flash, uint8_t *buf); -void protect_lhf00l04(chipaddr bios); /* sst28sf040.c */ -int probe_28sf040(struct flashchip *flash); int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size); int write_28sf040(struct flashchip *flash, uint8_t *buf); Modified: trunk/sst28sf040.c ============================================================================== --- trunk/sst28sf040.c Tue Mar 16 01:51:31 2010 (r941) +++ trunk/sst28sf040.c Tue Mar 16 02:00:50 2010 (r942) @@ -92,30 +92,6 @@ return 0; } -int probe_28sf040(struct flashchip *flash) -{ - chipaddr bios = flash->virtual_memory; - uint8_t id1, id2; - - chip_writeb(RESET, bios); - programmer_delay(10); - - chip_writeb(READ_ID, bios); - programmer_delay(10); - id1 = chip_readb(bios); - programmer_delay(10); - id2 = chip_readb(bios + 0x01); - - chip_writeb(RESET, bios); - programmer_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} - int erase_28sf040(struct flashchip *flash) { chipaddr bios = flash->virtual_memory;

1 0

[commit] r941 - trunk
by repository service 16 Mar '10

16 Mar '10

Author: snelson Date: Tue Mar 16 01:51:31 2010 New Revision: 941 URL: http://flashrom.org/trac/coreboot/changeset/941 Log: remove some copied functions (from 82802ab.c) and use the 82802ab equivalents fix missing prototypes to _82802ab functions Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/sharplhf00l04.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue Mar 16 01:45:00 2010 (r940) +++ trunk/chipdrivers.h Tue Mar 16 01:51:31 2010 (r941) @@ -59,6 +59,8 @@ int erase_82802ab(struct flashchip *flash); int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize); int write_82802ab(struct flashchip *flash, uint8_t *buf); +void print_82802ab_status(uint8_t status); +void write_page_82802ab(chipaddr bios, uint8_t *src, chipaddr dst, int page_size); /* jedec.c */ uint8_t oddparity(uint8_t val); Modified: trunk/sharplhf00l04.c ============================================================================== --- trunk/sharplhf00l04.c Tue Mar 16 01:45:00 2010 (r940) +++ trunk/sharplhf00l04.c Tue Mar 16 01:51:31 2010 (r941) @@ -22,18 +22,6 @@ #include "flash.h" #include "chipdrivers.h" -// I need that Berkeley bit-map printer -void print_lhf00l04_status(uint8_t status) -{ - printf("%s", status & 0x80 ? "Ready:" : "Busy:"); - printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); - printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:"); - printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:"); - printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:"); - printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:"); - printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:"); -} - /* FIXME: The datasheet is unclear whether we should use toggle_ready_jedec * or wait_82802ab. */ @@ -48,7 +36,7 @@ chip_writeb(0x50, bios); printf("Erase at 0x%lx\n", bios); status = wait_82802ab(flash->virtual_memory); - print_lhf00l04_status(status); + print_82802ab_status(status); // clear write protect printf("write protect is at 0x%lx\n", (wrprotect)); printf("write protect is 0x%x\n", chip_readb(wrprotect)); @@ -61,7 +49,7 @@ programmer_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); - print_lhf00l04_status(status); + print_82802ab_status(status); printf("DONE BLOCK 0x%x\n", blockaddr); if (check_erased_range(flash, blockaddr, blocklen)) { @@ -71,19 +59,6 @@ return 0; } -void write_page_lhf00l04(chipaddr bios, uint8_t *src, - chipaddr dst, int page_size) -{ - int i; - - for (i = 0; i < page_size; i++) { - /* transfer data from source to destination */ - chip_writeb(0x40, dst); - chip_writeb(*src++, dst++); - wait_82802ab(bios); - } -} - int write_lhf00l04(struct flashchip *flash, uint8_t *buf) { int i; @@ -98,7 +73,7 @@ printf("Programming page: "); for (i = 0; i < total_size / page_size; i++) { printf("%04d at address: 0x%08x", i, i * page_size); - write_page_lhf00l04(bios, buf + i * page_size, + write_page_82802ab(bios, buf + i * page_size, bios + i * page_size, page_size); printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); }

1 0

[commit] r940 - trunk
by repository service 16 Mar '10

16 Mar '10

Author: snelson Date: Tue Mar 16 01:45:00 2010 New Revision: 940 URL: http://flashrom.org/trac/coreboot/changeset/940 Log: kill dead w39v080fa.c functions Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/w39v080fa.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue Mar 16 01:35:53 2010 (r939) +++ trunk/chipdrivers.h Tue Mar 16 01:45:00 2010 (r940) @@ -122,9 +122,6 @@ int printlock_w39v040c(struct flashchip *flash); /* w39V080fa.c */ -int probe_winbond_fwhub(struct flashchip *flash); -int erase_winbond_fwhub(struct flashchip *flash); -int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf); int unlock_winbond_fwhub(struct flashchip *flash); /* w29ee011.c */ Modified: trunk/w39v080fa.c ============================================================================== --- trunk/w39v080fa.c Tue Mar 16 01:35:53 2010 (r939) +++ trunk/w39v080fa.c Tue Mar 16 01:45:00 2010 (r940) @@ -111,69 +111,3 @@ return 0; } - -static int erase_sector_winbond_fwhub(struct flashchip *flash, - unsigned int sector) -{ - chipaddr bios = flash->virtual_memory; - /* Remember: too much sleep can waste your day. */ - - printf("0x%08x\b\b\b\b\b\b\b\b\b\b", sector); - - /* Sector Erase */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x80, bios + 0x5555); - - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x30, bios + sector); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - - if (check_erased_range(flash, sector, flash->page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - return 0; -} - -int erase_winbond_fwhub(struct flashchip *flash) -{ - int i, total_size = flash->total_size * 1024; - - unlock_winbond_fwhub(flash); - - printf("Erasing: "); - - for (i = 0; i < total_size; i += flash->page_size) { - if (erase_sector_winbond_fwhub(flash, i)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - } - - printf("\n"); - - return 0; -} - -int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - chipaddr bios = flash->virtual_memory; - - if (erase_winbond_fwhub(flash)) - return -1; - - printf("Programming: "); - for (i = 0; i < total_size; i += flash->page_size) { - printf("0x%08x\b\b\b\b\b\b\b\b\b\b", i); - write_sector_jedec_common(flash, buf + i, bios + i, flash->page_size, 0xffff); - } - printf("\n"); - - return 0; -}

1 0

[commit] r939 - trunk
by repository service 16 Mar '10

16 Mar '10

Author: snelson Date: Tue Mar 16 01:35:53 2010 New Revision: 939 URL: http://flashrom.org/trac/coreboot/changeset/939 Log: kill dead w39v040c.c functions Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/w39v040c.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue Mar 16 01:32:30 2010 (r938) +++ trunk/chipdrivers.h Tue Mar 16 01:35:53 2010 (r939) @@ -119,9 +119,6 @@ int printlock_sst_fwhub(struct flashchip *flash); /* w39v040c.c */ -int probe_w39v040c(struct flashchip *flash); -int erase_w39v040c(struct flashchip *flash); -int write_w39v040c(struct flashchip *flash, uint8_t *buf); int printlock_w39v040c(struct flashchip *flash); /* w39V080fa.c */ Modified: trunk/w39v040c.c ============================================================================== --- trunk/w39v040c.c Tue Mar 16 01:32:30 2010 (r938) +++ trunk/w39v040c.c Tue Mar 16 01:35:53 2010 (r939) @@ -21,36 +21,6 @@ #include "flash.h" #include "chipdrivers.h" -int probe_w39v040c(struct flashchip *flash) -{ - chipaddr bios = flash->virtual_memory; - int result = probe_jedec(flash); - uint8_t lock; - - if (!result) - return result; - - chip_writeb(0xAA, bios + 0x5555); - programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - programmer_delay(10); - chip_writeb(0x90, bios + 0x5555); - programmer_delay(10); - - lock = chip_readb(bios + 0xfff2); - - chip_writeb(0xAA, bios + 0x5555); - programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - programmer_delay(10); - chip_writeb(0xF0, bios + 0x5555); - programmer_delay(40); - - printf("%s: Boot block #TBL is %slocked, rest of chip #WP is %slocked.\n", - __func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un"); - return 1; -} - int printlock_w39v040c(struct flashchip *flash) { chipaddr bios = flash->virtual_memory; @@ -76,42 +46,3 @@ __func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un"); return 0; } - -int erase_w39v040c(struct flashchip *flash) -{ - int i; - unsigned int total_size = flash->total_size * 1024; - - for (i = 0; i < total_size; i += flash->page_size) { - if (erase_sector_jedec(flash, i, flash->page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - } - - return 0; -} - -int write_w39v040c(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; - - if (erase_flash(flash)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec_common(flash, buf + i * page_size, - bios + i * page_size, page_size, 0xffff); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - - return 0; -}

1 0

[commit] r938 - trunk
by repository service 16 Mar '10

16 Mar '10

Author: snelson Date: Tue Mar 16 01:32:30 2010 New Revision: 938 URL: http://flashrom.org/trac/coreboot/changeset/938 Log: kill dead pm49fl00x.c functions Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/pm49fl00x.c Modified: trunk/pm49fl00x.c ============================================================================== --- trunk/pm49fl00x.c Mon Mar 15 04:48:42 2010 (r937) +++ trunk/pm49fl00x.c Tue Mar 16 01:32:30 2010 (r938) @@ -48,72 +48,3 @@ write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size); return 0; } - -int erase_49fl00x(struct flashchip *flash) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - - /* unprotected */ - write_lockbits_49fl00x(flash->virtual_registers, - total_size, 0, page_size); - - /* - * erase_chip_jedec() will not work... Datasheet says - * "Chip erase is available in A/A Mux Mode only". - */ - printf("Erasing page: "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page */ - if (erase_block_jedec(flash, i * page_size, page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - printf("%04d at address: 0x%08x", i, i * page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - /* protected */ - write_lockbits_49fl00x(flash->virtual_registers, - total_size, 1, page_size); - - return 0; -} - -int write_49fl00x(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; - - /* unprotected */ - write_lockbits_49fl00x(flash->virtual_registers, total_size, 0, - page_size); - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming */ - if (erase_block_jedec(flash, i * page_size, page_size)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - - /* write to the sector */ - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec_common(flash, buf + i * page_size, - bios + i * page_size, page_size, 0xffff); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - /* protected */ - write_lockbits_49fl00x(flash->virtual_registers, total_size, 1, - page_size); - - return 0; -}

1 0

Re: [flashrom] [PATCH] Fix non-FWH chips with FWH-like commands
by Carl-Daniel Hailfinger 15 Mar '10

15 Mar '10

On 14.03.2010 01:13, Michael Karcher wrote: > Flash registers are not mapped on these chips, but the unprotection > code in erase_82802ab_block tried to access them. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > I have a patch which switches these chips to use FEATURE_BITS. Let me dig it up. Regards, Carl-Daniel -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

2 4

[commit] r937 - trunk
by repository service 15 Mar '10

15 Mar '10

Author: hailfinger Date: Mon Mar 15 04:48:42 2010 New Revision: 937 URL: http://flashrom.org/trac/coreboot/changeset/937 Log: Add FEATURE_REGISTERMAP to * Intel 82802AB, 82802AC * Sharp LHF00L04 * SST SST49LF004C, SST49LF008C, SST49LF016C, SST49LF160C * ST M50FLW040A, M50FLW040B, M50FLW080A, M50FLW080B, M50FW002, M50FW016 M50FW040, M50FW080, M50LPW116 Make register mapping conditional on FEATURE_REGISTERMAP in 82802ab.c. Replace probe_49lfxxxc with probe_82802ab. Replace probe_28sf040 with probe_82802ab. Replace probe_sst_fwhub with probe_jedec. Add printlock_sst_fwhub to chips which used probe_sst_fwhub. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/82802ab.c trunk/chipdrivers.h trunk/flashchips.c trunk/sst_fwhub.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Sun Mar 14 18:57:52 2010 (r936) +++ trunk/82802ab.c Mon Mar 15 04:48:42 2010 (r937) @@ -69,7 +69,8 @@ if (id1 != flash->manufacture_id || id2 != flash->model_id) return 0; - map_flash_registers(flash); + if (flash->feature_bits & FEATURE_REGISTERMAP) + map_flash_registers(flash); return 1; } Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sun Mar 14 18:57:52 2010 (r936) +++ trunk/chipdrivers.h Mon Mar 15 04:48:42 2010 (r937) @@ -112,11 +112,11 @@ int unlock_49lfxxxc(struct flashchip *flash); /* sst_fwhub.c */ -int probe_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size); int erase_sst_fwhub_sector(struct flashchip *flash, unsigned int offset, unsigned int page_size); int write_sst_fwhub(struct flashchip *flash, uint8_t *buf); +int printlock_sst_fwhub(struct flashchip *flash); /* w39v040c.c */ int probe_w39v040c(struct flashchip *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Mar 14 18:57:52 2010 (r936) +++ trunk/flashchips.c Mon Mar 15 04:48:42 2010 (r937) @@ -2392,7 +2392,7 @@ .model_id = I_82802AB, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ @@ -2415,7 +2415,7 @@ .model_id = I_82802AC, .total_size = 1024, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ @@ -3442,9 +3442,9 @@ .model_id = SHARP_LHF00L04, .total_size = 1024, .page_size = 64 * 1024, - .feature_bits = FEATURE_EITHER_RESET, + .feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_49lfxxxc, + .probe = probe_82802ab, .probe_timing = TIMING_ZERO, .block_erasers = { @@ -3723,7 +3723,7 @@ .page_size = 256, .feature_bits = 0, .tested = TEST_UNTESTED, - .probe = probe_28sf040, + .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst28sf040.c) */ .block_erasers = { @@ -4078,8 +4078,8 @@ .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PRW, - .probe = probe_sst_fwhub, - .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe = probe_jedec, + .probe_timing = 1, /* 150 ns */ .block_erasers = { { @@ -4093,6 +4093,7 @@ .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ } }, + .printlock = printlock_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4107,8 +4108,8 @@ .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PR, - .probe = probe_sst_fwhub, - .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe = probe_jedec, + .probe_timing = 1, /* 150 ns */ .block_erasers = { { @@ -4122,6 +4123,7 @@ .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ } }, + .printlock = printlock_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4139,8 +4141,8 @@ .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PREW, - .probe = probe_sst_fwhub, - .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe = probe_jedec, + .probe_timing = 1, /* 150 ns */ .block_erasers = { { @@ -4154,6 +4156,7 @@ .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ }, }, + .printlock = printlock_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4166,9 +4169,9 @@ .model_id = SST_49LF004C, .total_size = 512, .page_size = 4 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_49lfxxxc, + .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { @@ -4199,8 +4202,8 @@ .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, .tested = TEST_OK_PRW, - .probe = probe_sst_fwhub, - .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe = probe_jedec, + .probe_timing = 1, /* 150 ns */ .block_erasers = { { @@ -4214,6 +4217,7 @@ .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ } }, + .printlock = printlock_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4226,9 +4230,9 @@ .model_id = SST_49LF008C, .total_size = 1024, .page_size = 4 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_49lfxxxc, + .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { @@ -4257,9 +4261,9 @@ .model_id = SST_49LF016C, .total_size = 2048, .page_size = 4 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, - .probe = probe_49lfxxxc, + .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { @@ -4378,7 +4382,7 @@ .feature_bits = FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = 1, /* 150ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe_timing = 1, /* 150ns */ .block_erasers = { { @@ -4433,9 +4437,9 @@ .model_id = SST_49LF160C, .total_size = 2048, .page_size = 4 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, - .probe = probe_49lfxxxc, + .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { @@ -4966,7 +4970,7 @@ .model_id = ST_M50FLW040A, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_FIXME, @@ -5000,7 +5004,7 @@ .model_id = ST_M50FLW040B, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_FIXME, @@ -5034,7 +5038,7 @@ .model_id = ST_M50FLW080A, .total_size = 1024, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_FIXME, @@ -5068,7 +5072,7 @@ .model_id = ST_M50FLW080B, .total_size = 1024, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_FIXME, @@ -5102,7 +5106,7 @@ .model_id = ST_M50FW002, .total_size = 256, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ @@ -5133,7 +5137,7 @@ .model_id = ST_M50FW016, .total_size = 2048, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ @@ -5159,7 +5163,7 @@ .model_id = ST_M50FW040, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ @@ -5185,7 +5189,7 @@ .model_id = ST_M50FW080, .total_size = 1024, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ @@ -5211,7 +5215,7 @@ .model_id = ST_M50LPW116, .total_size = 2048, .page_size = 64 * 1024, - .feature_bits = 0, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ Modified: trunk/sst_fwhub.c ============================================================================== --- trunk/sst_fwhub.c Sun Mar 14 18:57:52 2010 (r936) +++ trunk/sst_fwhub.c Mon Mar 15 04:48:42 2010 (r937) @@ -83,18 +83,14 @@ return blockstatus; } -/* probe_jedec works fine for probing */ -int probe_sst_fwhub(struct flashchip *flash) +int printlock_sst_fwhub(struct flashchip *flash) { int i; - if (probe_jedec(flash) == 0) - return 0; - for (i = 0; i < flash->total_size * 1024; i += flash->page_size) check_sst_fwhub_block_lock(flash, i); - return 1; + return 0; } int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size)

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